Looks like these are the magic bits that need to be set:

dpll |= (7<<9) | (1<<13) | (1<<14);

Anyone happen to have proper descriptions for these bits so I could add them to psb_intel_reg.h or thoughts on how/where an option could be exposed to enable these?

On Mon, Apr 6, 2015 at 4:48 PM, George McCollister george.mccollister@gmail.com wrote:

emgd had an option to enable spread spectrum clocking on LVDS. The documentation is vague but the setting that works is: Option "ALL/1/Port/4/Attr/43" "7"

Anyone have any idea how to set this with gma500_gfx or if it doesn't support it, how to put the hardware in this mode?

Thanks, George McCollister