On Tue, Jan 22, 2019 at 05:44:28PM +0200, Laurent Pinchart wrote:

Hi Biju,

Thank you for the patch.

On Tue, Jan 22, 2019 at 03:25:46PM +0000, Biju Das wrote:

...

Document the RZ/G1N (R8A7744) LVDS bindings.

Signed-off-by: Biju Das biju.das@bp.renesas.com

Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com

and taken in my tree.

Reviewed-by: Simon Horman horms+renesas@verge.net.au

...

---

Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 + 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index 27a054e..900a884 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt @@ -8,6 +8,7 @@ Required properties:

• compatible : Shall contain one of
  • "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders

• • "renesas,r8a7744-lvds" for R8A7744 (RZ/G1N) compatible LVDS encoders
  • "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders
  • "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders
  • "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders

-- Regards,

Laurent Pinchart

On Tue, Jan 22, 2019 at 03:25:47PM +0000, Biju Das wrote:

The LVDS encoders on RZ/G1N SoC is similar to RZ/G1M. Add support for RZ/G1N (R8A7744) SoC to the LVDS encoder driver.

Signed-off-by: Biju Das biju.das@bp.renesas.com

Reviewed-by: Simon Horman horms+renesas@verge.net.au

---

drivers/gpu/drm/rcar-du/rcar_lvds.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds.c b/drivers/gpu/drm/rcar-du/rcar_lvds.c index 96d749a..caea2c5 100644 --- a/drivers/gpu/drm/rcar-du/rcar_lvds.c +++ b/drivers/gpu/drm/rcar-du/rcar_lvds.c @@ -785,6 +785,7 @@ static const struct rcar_lvds_device_info rcar_lvds_r8a77995_info = {

static const struct of_device_id rcar_lvds_of_table[] = { { .compatible = "renesas,r8a7743-lvds", .data = &rcar_lvds_gen2_info },

• { .compatible = "renesas,r8a7744-lvds", .data = &rcar_lvds_gen2_info }, { .compatible = "renesas,r8a774c0-lvds", .data = &rcar_lvds_r8a77990_info }, { .compatible = "renesas,r8a7790-lvds", .data = &rcar_lvds_r8a7790_info }, { .compatible = "renesas,r8a7791-lvds", .data = &rcar_lvds_gen2_info },

-- 2.7.4

Hi Biju,

Thank you for the patch.

On Tue, Jan 22, 2019 at 03:25:48PM +0000, Biju Das wrote:

Add du node to r8a7744 SoC DT. Boards that want to enable the DU need to specify the output topology.

Signed-off-by: Biju Das biju.das@bp.renesas.com

Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com

I expect Simon to pick this up.

---

arch/arm/boot/dts/r8a7744.dtsi | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index 8d25a0a..83804aa 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -1645,8 +1645,14 @@ };

du: display@feb00000 {

• 	reg = <0 0xfeb00000 0 0x40000>,
  

• 	      <0 0xfeb90000 0 0x1c>;
  

• 	compatible = "renesas,du-r8a7744";
  

• 	reg = <0 0xfeb00000 0 0x40000>;
  

• 	interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
  

• 		     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
  

• 	clocks = <&cpg CPG_MOD 724>,
  

• 		 <&cpg CPG_MOD 723>;
  

• 	clock-names = "du.0", "du.1";
  

• 	status = "disabled";
  
  ports {
  	#address-cells = <1>;
  

@@ -1663,7 +1669,6 @@ }; }; };

• 	/* placeholder */
  

  };

  prr: chipid@ff000044 {