Hi all,
This is yet another approach to submit patches, which enables HDMI support for two Exynos based platforms: UniversalC210 and Odroid X2/U3.
Beside DTS changes, this patchset adds parent domain support for Exynos PM domains. This was the most controversial patch in the previous attempts, but I hope I fixes all reported issues and made it really generic. For more details see individual patches.
The patchset is based on my previous patch: 'ARM: DTS: Exynos: convert to generic power domain bindings' (http://www.spinics.net/lists/linux-samsung-soc/msg40584.html) and 'PM / Domains: Export of_genpd_get_from_provider function' patch merged as commit 7496fcbe8a643097efc061160e1c3b65ee2fa350 to v3.19-rc4.
Thanks to Tobias Jakobi for testing and finding out that the already merged exynos4 clocks hierarchy fixup (commit df019a5c0f7083001cb694f44821ca506425bda2 'clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi') doesn't work in all cases. To finlly solve the power on/off issues I've decided to simply add 'hdmi' clock handling also to mixer module.
Regards Marek Szyprowski
Changelog:
v4: - added patches, which add 'hdmi' clock handling to mixed block, this finally solves the initialization related issues, thanks for Tobias Jakobi for testing - added acks/reviewed/tested by tags
v3: (http://www.spinics.net/lists/linux-samsung-soc/msg41020.html) - added a note on defining subdomains to generic PM domain binding documentation (requested by Ulf Hansson)
v2: (http://www.spinics.net/lists/linux-samsung-soc/msg40980.html) - rewrote subdomains patch according to suggestions from Geert Uytterhoeven and Amit Daniel Kachhap.
v1 resend: (http://www.spinics.net/lists/linux-samsung-soc/msg39428.html) - added handling of generic 'power-domains' binding in subdomains
v1: (http://www.spinics.net/lists/linux-samsung-soc/msg38914.html) - resolved power domain on/off issue with 'clk: samsung: exynos4: set parent of mixer gate clock to hdmi' patch
v0: (http://www.spinics.net/lists/linux-samsung-soc/msg33498.html) - first attempt, used 'always on' power domains hack
Patch summary:
Andrzej Hajda (1): ARM: dts: exynos5250: add display power domain
Marek Szyprowski (7): PM / Domains: Add a note about power domain subdomains ARM: Exynos: add support for sub-power domains ARM: dts: exynos4: add hdmi related nodes ARM: dts: exynos4: add dependency between TV and LCD0 power domains ARM: dts: exynos4412-odroid: enable hdmi support ARM: dts: Exynos: add 'hdmi' clock to mixer nodes drm/exynos: fix mixer start sequence
Tomasz Stanislawski (1): ARM: dts: exynos4210-universal_c210: enable hdmi support
.../bindings/arm/exynos/power_domain.txt | 2 + .../devicetree/bindings/power/power_domain.txt | 29 +++++++++++ arch/arm/boot/dts/exynos4.dtsi | 41 ++++++++++++++++ arch/arm/boot/dts/exynos4210-universal_c210.dts | 57 ++++++++++++++++++++++ arch/arm/boot/dts/exynos4210.dtsi | 8 +++ arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 44 +++++++++++++++++ arch/arm/boot/dts/exynos4x12.dtsi | 11 +++++ arch/arm/boot/dts/exynos5250.dtsi | 15 +++++- arch/arm/boot/dts/exynos5420.dtsi | 5 +- arch/arm/mach-exynos/pm_domains.c | 28 +++++++++++ drivers/gpu/drm/exynos/exynos_mixer.c | 9 ++++ 11 files changed, 245 insertions(+), 4 deletions(-)
This patch adds a note on defining subdomains to generic PM domain binding documentation to let power domain providers use common approach for defining power domain hierarchy.
Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com Acked-by: Geert Uytterhoeven geert+renesas@glider.be Reviewed-by: Ulf Hansson ulf.hansson@linaro.org --- .../devicetree/bindings/power/power_domain.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt index 98c16672ab5f..0f8ed3710c66 100644 --- a/Documentation/devicetree/bindings/power/power_domain.txt +++ b/Documentation/devicetree/bindings/power/power_domain.txt @@ -19,6 +19,16 @@ Required properties: providing multiple PM domains (e.g. power controllers), but can be any value as specified by device tree binding documentation of particular provider.
+Optional properties: + - power-domains : A phandle and PM domain specifier as defined by bindings of + the power controller specified by phandle. + Some power domains might be powered from another power domain (or have + other hardware specific dependencies). For representing such dependency + a standard PM domain consumer binding is used. When provided, all domains + created by the given provider should be subdomains of the domain + specified by this binding. More details about power domain specifier are + available in the next section. + Example:
power: power-controller@12340000 { @@ -30,6 +40,25 @@ Example: The node above defines a power controller that is a PM domain provider and expects one cell as its phandle argument.
+Example 2: + + parent: power-controller@12340000 { + compatible = "foo,power-controller"; + reg = <0x12340000 0x1000>; + #power-domain-cells = <1>; + }; + + child: power-controller@12340000 { + compatible = "foo,power-controller"; + reg = <0x12341000 0x1000>; + power-domains = <&parent 0>; + #power-domain-cells = <1>; + }; + +The nodes above define two power controllers: 'parent' and 'child'. +Domains created by the 'child' power controller are subdomains of '0' power +domain provided by the 'parent' power controller. + ==PM domain consumers==
Required properties:
This patch adds support for making one power domain a sub-domain of other domain. This is useful for modeling power dependences for devices like TV Mixer or Camera ISP, which needs to have more than one power domain enabled to be operational.
Based on previous work by Amit Daniel Kachhap amit.daniel@samsung.com.
Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com Reviewed-by: Ulf Hansson ulf.hansson@linaro.org --- .../bindings/arm/exynos/power_domain.txt | 2 ++ arch/arm/mach-exynos/pm_domains.c | 28 ++++++++++++++++++++++ 2 files changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index f4445e5a2bbb..1e097037349c 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -22,6 +22,8 @@ Optional Properties: - pclkN, clkN: Pairs of parent of input clock and input clock to the devices in this power domain. Maximum of 4 pairs (N = 0 to 3) are supported currently. +- power-domains: phandle pointing to the parent power domain, for more details + see Documentation/devicetree/bindings/power/power_domain.txt
Node of a device using power domains must have a power-domains property defined with a phandle to respective power domain. diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c index 20f267121b3e..37266a826437 100644 --- a/arch/arm/mach-exynos/pm_domains.c +++ b/arch/arm/mach-exynos/pm_domains.c @@ -161,6 +161,34 @@ no_clk: of_genpd_add_provider_simple(np, &pd->pd); }
+ /* Assign the child power domains to their parents */ + for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { + struct generic_pm_domain *child_domain, *parent_domain; + struct of_phandle_args args; + + args.np = np; + args.args_count = 0; + child_domain = of_genpd_get_from_provider(&args); + if (!child_domain) + continue; + + if (of_parse_phandle_with_args(np, "power-domains", + "#power-domain-cells", 0, &args) != 0) + continue; + + parent_domain = of_genpd_get_from_provider(&args); + if (!parent_domain) + continue; + + if (pm_genpd_add_subdomain(parent_domain, child_domain)) + pr_warn("%s failed to add subdomain: %s\n", + parent_domain->name, child_domain->name); + else + pr_info("%s has as child subdomain: %s.\n", + parent_domain->name, child_domain->name); + of_node_put(np); + } + return 0; } arch_initcall(exynos4_pm_init_power_domain);
This patch adds entries for HDMI, Mixer and i2c with hdmi-phy modules found in Exynos 4210 and 4x12 SoCs.
Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- arch/arm/boot/dts/exynos4.dtsi | 40 +++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos4210.dtsi | 8 ++++++++ arch/arm/boot/dts/exynos4x12.dtsi | 11 +++++++++++ 3 files changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index c5dc2efb99ed..d9516471c41e 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -38,6 +38,7 @@ i2c5 = &i2c_5; i2c6 = &i2c_6; i2c7 = &i2c_7; + i2c8 = &i2c_8; csis0 = &csis_0; csis1 = &csis_1; fimc0 = &fimc_0; @@ -544,6 +545,22 @@ status = "disabled"; };
+ i2c_8: i2c@138E0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-hdmiphy-i2c"; + reg = <0x138E0000 0x100>; + interrupts = <0 93 0>; + clocks = <&clock CLK_I2C_HDMI>; + clock-names = "i2c"; + status = "disabled"; + + hdmi_i2c_phy: hdmiphy@38 { + compatible = "exynos4210-hdmiphy"; + reg = <0x38>; + }; + }; + spi_0: spi@13920000 { compatible = "samsung,exynos4210-spi"; reg = <0x13920000 0x100>; @@ -652,4 +669,27 @@ samsung,sysreg = <&sys_reg>; status = "disabled"; }; + + hdmi: hdmi@12D00000 { + compatible = "samsung,exynos4210-hdmi"; + reg = <0x12D00000 0x70000>; + interrupts = <0 92 0>; + clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy", + "mout_hdmi"; + clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, + <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, + <&clock CLK_MOUT_HDMI>; + phy = <&hdmi_i2c_phy>; + power-domains = <&pd_tv>; + samsung,syscon-phandle = <&pmu_system_controller>; + status = "disabled"; + }; + + mixer: mixer@12C10000 { + compatible = "samsung,exynos4210-mixer"; + interrupts = <0 91 0>; + reg = <0x12C10000 0x2100>, <0x12c00000 0x300>; + power-domains = <&pd_tv>; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 6728aaa2af9d..1b410027bbc8 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -193,4 +193,12 @@ samsung,lcd-wb; }; }; + + mixer: mixer@12C10000 { + clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer", + "sclk_mixer"; + clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, + <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>, + <&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>; + }; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index da8734e25f50..a26503826363 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -283,4 +283,15 @@ clock-names = "tmu_apbif"; status = "disabled"; }; + + hdmi: hdmi@12D00000 { + compatible = "samsung,exynos4212-hdmi"; + }; + + mixer: mixer@12C10000 { + compatible = "samsung,exynos4212-mixer"; + clock-names = "mixer", "hdmi", "sclk_hdmi", "vp"; + clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, + <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>; + }; };
TV Mixer needs both TV and LCD0 domains enabled to be fully operational. This dependency is modelled by making TV power domains a sub-domain of LCD0 power domain.
Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- arch/arm/boot/dts/exynos4.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index d9516471c41e..a59b3fae3680 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -101,6 +101,7 @@ compatible = "samsung,exynos4210-pd"; reg = <0x10023C20 0x20>; #power-domain-cells = <0>; + power-domains = <&pd_lcd0>; };
pd_cam: cam-power-domain@10023C00 {
This patch adds nodes specific to Exynos4412 based Odroid X/X2/U2/U3 boards required for enabling HDMI display.
Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 44 +++++++++++++++++++++++++ 1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 3fbf588682b9..e10efa88807a 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -231,6 +231,20 @@ regulator-always-on; };
+ ldo8_reg: ldo@8 { + regulator-compatible = "LDO8"; + regulator-name = "VDD10_HDMI_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + ldo10_reg: ldo@10 { + regulator-compatible = "LDO10"; + regulator-name = "VDDQ_MIPIHSI_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + ldo11_reg: LDO11 { regulator-name = "VDD18_ABB1_1.8V"; regulator-min-microvolt = <1800000>; @@ -389,6 +403,31 @@ ehci: ehci@12580000 { status = "okay"; }; + + mixer: mixer@12C10000 { + status = "okay"; + }; + + hdmi@12D00000 { + hpd-gpio = <&gpx3 7 0>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd>; + vdd-supply = <&ldo8_reg>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; + ddc = <&hdmi_ddc>; + status = "okay"; + }; + + hdmi_ddc: i2c@13880000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_bus>; + }; + + i2c@138E0000 { + status = "okay"; + }; };
&pinctrl_1 { @@ -403,4 +442,9 @@ samsung,pin-pud = <0>; samsung,pin-drv = <0>; }; + + hdmi_hpd: hdmi-hpd { + samsung,pins = "gpx3-7"; + samsung,pin-pud = <1>; + }; };
From: Tomasz Stanislawski t.stanislaws@samsung.com
This patch adds configuration of hw modules required to enable HDMI support on Universal C210 board.
Signed-off-by: Tomasz Stanislawski t.stanislaws@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- arch/arm/boot/dts/exynos4210-universal_c210.dts | 57 +++++++++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index aaf0cae4f5e8..01f7d3cfdd02 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -503,6 +503,63 @@ assigned-clock-rates = <0>, <160000000>; }; }; + + hdmi_en: voltage-regulator-hdmi-5v { + compatible = "regulator-fixed"; + regulator-name = "HDMI_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpe0 1 0>; + enable-active-high; + }; + + hdmi_ddc: i2c-ddc { + compatible = "i2c-gpio"; + gpios = <&gpe4 2 0 &gpe4 3 0>; + i2c-gpio,delay-us = <100>; + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&i2c_ddc_bus>; + pinctrl-names = "default"; + status = "okay"; + }; + + mixer@12C10000 { + status = "okay"; + }; + + hdmi@12D00000 { + hpd-gpio = <&gpx3 7 0>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd>; + hdmi-en-supply = <&hdmi_en>; + vdd-supply = <&ldo3_reg>; + vdd_osc-supply = <&ldo4_reg>; + vdd_pll-supply = <&ldo3_reg>; + ddc = <&hdmi_ddc>; + status = "okay"; + }; + + i2c@138E0000 { + status = "okay"; + }; +}; + +&pinctrl_1 { + hdmi_hpd: hdmi-hpd { + samsung,pins = "gpx3-7"; + samsung,pin-pud = <0>; + }; +}; + +&pinctrl_0 { + i2c_ddc_bus: i2c-ddc-bus { + samsung,pins = "gpe4-2", "gpe4-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; };
&mdma1 {
Mixed block needs to control hdmi clock to properly perform power on/off operation, so add 'hdmi' clock also to mixer nodes.
Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- arch/arm/boot/dts/exynos5250.dtsi | 5 +++-- arch/arm/boot/dts/exynos5420.dtsi | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 9bb1b0b738f5..e8c67fdb69fb 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -732,8 +732,9 @@ compatible = "samsung,exynos5250-mixer"; reg = <0x14450000 0x10000>; interrupts = <0 94 0>; - clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; - clock-names = "mixer", "sclk_hdmi"; + clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, + <&clock CLK_SCLK_HDMI>; + clock-names = "mixer", "hdmi", "sclk_hdmi"; };
dp_phy: video-phy@10040720 { diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index e5cb74d2b9f5..8e464314260c 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -724,8 +724,9 @@ compatible = "samsung,exynos5420-mixer"; reg = <0x14450000 0x10000>; interrupts = <0 94 0>; - clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; - clock-names = "mixer", "sclk_hdmi"; + clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, + <&clock CLK_SCLK_HDMI>; + clock-names = "mixer", "hdmi", "sclk_hdmi"; };
gsc_0: video-scaler@13e00000 {
From: Andrzej Hajda a.hajda@samsung.com
The patch adds domain definition and references to it in appropriate devices.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com [mszyprow: rebased onto generic power domains dt bindings] Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com Tested-by: Javier Martinez Canillas javier.martinez@collabora.co.uk Reviewed-by: Javier Martinez Canillas javier.martinez@collabora.co.uk --- arch/arm/boot/dts/exynos5250.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index e8c67fdb69fb..ae22bd98f956 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -102,6 +102,12 @@ #power-domain-cells = <0>; };
+ pd_disp1: disp1-power-domain@100440A0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x100440A0 0x20>; + #power-domain-cells = <0>; + }; + clock: clock-controller@10010000 { compatible = "samsung,exynos5250-clock"; reg = <0x10010000 0x30000>; @@ -719,6 +725,7 @@ hdmi: hdmi { compatible = "samsung,exynos4212-hdmi"; reg = <0x14530000 0x70000>; + power-domains = <&pd_disp1>; interrupts = <0 95 0>; clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, @@ -731,6 +738,7 @@ mixer { compatible = "samsung,exynos5250-mixer"; reg = <0x14450000 0x10000>; + power-domains = <&pd_disp1>; interrupts = <0 94 0>; clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>; @@ -744,6 +752,7 @@ };
dp: dp-controller@145B0000 { + power-domains = <&pd_disp1>; clocks = <&clock CLK_DP>; clock-names = "dp"; phys = <&dp_phy>; @@ -751,6 +760,7 @@ };
fimd: fimd@14400000 { + power-domains = <&pd_disp1>; clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; clock-names = "sclk_fimd", "fimd"; };
Mixed need to have hdmi clock enabled to properly perform power on/off sequences, so add handling of this clock directly to the mixer driver. Dependency between hdmi clock and mixer module has been observed on Exynos4 based boards.
Suggested-by: Andrzej Hajda a.hajda@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- drivers/gpu/drm/exynos/exynos_mixer.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 820b76234ef4..e5ef1fccd8fb 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -72,6 +72,7 @@ struct mixer_resources { spinlock_t reg_slock; struct clk *mixer; struct clk *vp; + struct clk *hdmi; struct clk *sclk_mixer; struct clk *sclk_hdmi; struct clk *mout_mixer; @@ -774,6 +775,12 @@ static int mixer_resources_init(struct mixer_context *mixer_ctx) return -ENODEV; }
+ mixer_res->hdmi = devm_clk_get(dev, "hdmi"); + if (IS_ERR(mixer_res->hdmi)) { + dev_err(dev, "failed to get clock 'hdmi'\n"); + return -ENODEV; + } + mixer_res->sclk_hdmi = devm_clk_get(dev, "sclk_hdmi"); if (IS_ERR(mixer_res->sclk_hdmi)) { dev_err(dev, "failed to get clock 'sclk_hdmi'\n"); @@ -1095,6 +1102,7 @@ static void mixer_poweron(struct exynos_drm_manager *mgr) pm_runtime_get_sync(ctx->dev);
clk_prepare_enable(res->mixer); + clk_prepare_enable(res->hdmi); if (ctx->vp_enabled) { clk_prepare_enable(res->vp); if (ctx->has_sclk) @@ -1134,6 +1142,7 @@ static void mixer_poweroff(struct exynos_drm_manager *mgr) ctx->powered = false; mutex_unlock(&ctx->mixer_mutex);
+ clk_disable_unprepare(res->hdmi); clk_disable_unprepare(res->mixer); if (ctx->vp_enabled) { clk_disable_unprepare(res->vp);
Hello Marek,
On 01/20/2015 01:16 PM, Marek Szyprowski wrote:
You need to update the Documentation/devicetree/bindings/video/exynos_mixer.txt DT binding docs to also mention the "hdmi" clock in the list of clocks.
But as I mentioned in "[PATCH v2 0/6] Enable HDMI support on Exynos platforms" thread, while this seems to be enough to prevent the issue on Exynos4 is not enough on the Exynos5420/5422/5800 boards I've tested.
So I wonder if $subject is fixing the root cause or just fixing a symptom and the cause is that the exynos_hdmi DPMS handler has to be executed before the exynos_mixer DPMS handler for DRM_MODE_DPMS_ON like is the case for DPMS_OFF after commit 245f98f269714 ("drm/exynos: hdmi: fix power order issue").
Best regards, Javier
Mixed need to have hdmi clock enabled to properly perform power on/off sequences, so add handling of this clock directly to the mixer driver. Dependency between hdmi clock and mixer module has been observed on Exynos4 based boards.
Suggested-by: Andrzej Hajda a.hajda@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- Documentation/devicetree/bindings/video/exynos_mixer.txt | 1 + drivers/gpu/drm/exynos/exynos_mixer.c | 9 +++++++++ 2 files changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/video/exynos_mixer.txt b/Documentation/devicetree/bindings/video/exynos_mixer.txt index 08b394b..3e38128 100644 --- a/Documentation/devicetree/bindings/video/exynos_mixer.txt +++ b/Documentation/devicetree/bindings/video/exynos_mixer.txt @@ -15,6 +15,7 @@ Required properties: a) mixer: Gate of Mixer IP bus clock. b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of mixer mux. + c) hdmi: Gate of HDMI IP bus clock, needed together with sclk_hdmi.
Example:
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 820b762..e5ef1fc 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -72,6 +72,7 @@ struct mixer_resources { spinlock_t reg_slock; struct clk *mixer; struct clk *vp; + struct clk *hdmi; struct clk *sclk_mixer; struct clk *sclk_hdmi; struct clk *mout_mixer; @@ -774,6 +775,12 @@ static int mixer_resources_init(struct mixer_context *mixer_ctx) return -ENODEV; }
+ mixer_res->hdmi = devm_clk_get(dev, "hdmi"); + if (IS_ERR(mixer_res->hdmi)) { + dev_err(dev, "failed to get clock 'hdmi'\n"); + return -ENODEV; + } + mixer_res->sclk_hdmi = devm_clk_get(dev, "sclk_hdmi"); if (IS_ERR(mixer_res->sclk_hdmi)) { dev_err(dev, "failed to get clock 'sclk_hdmi'\n"); @@ -1095,6 +1102,7 @@ static void mixer_poweron(struct exynos_drm_manager *mgr) pm_runtime_get_sync(ctx->dev);
clk_prepare_enable(res->mixer); + clk_prepare_enable(res->hdmi); if (ctx->vp_enabled) { clk_prepare_enable(res->vp); if (ctx->has_sclk) @@ -1134,6 +1142,7 @@ static void mixer_poweroff(struct exynos_drm_manager *mgr) ctx->powered = false; mutex_unlock(&ctx->mixer_mutex);
+ clk_disable_unprepare(res->hdmi); clk_disable_unprepare(res->mixer); if (ctx->vp_enabled) { clk_disable_unprepare(res->vp);
Hello Marek,
On 01/22/2015 01:28 PM, Marek Szyprowski wrote:
The patch looks good to me and I tested that it does not regress HDMI on other platforms (Exynos5420 Peach Pit). I've just a comment below.
Reviewed-by: Javier Martinez Canillas javier.martinez@collabora.co.uk Tested-by: Javier Martinez Canillas javier.martinez@collabora.co.uk
You are adding as a required property which means that this breaks DT backward compatibility. I guess is not a big issue here since HDMI seems to have been broken in mainline on most Exynos platforms anyways.
Best regards, Javier
Hello,
On 2015-01-20 13:52, Javier Martinez Canillas wrote:
Right, I've send an updated version of the patch.
I'm aware of the issues with Exynos542x, I've tested it with Odroid XU3, but I really have no idea how to fix it. The reference manual (both for power domain and mixer/hdmi modules) also doesn't provide any useful information for this case.
The issue with power on/off sequence definitely IS related to clock configuration, but we didn't figure out how to solve it in a generic way. This will be handled in Exynos HDMI and mixer drivers anyway, so the DTS part (at least for Exynos4 SoC) will not change.
We would really like to have HDMI support for Exynos4 merged, especially that the first version of the HDMI patches was posted in v3.16 times and now we are close to v3.20 -next merge window end...
Best regards
Hello Marek,
On 01/22/2015 01:41 PM, Marek Szyprowski wrote:
Great thanks.
Yeah, I'm in the same situation. All the documentation I had access to doesn't now explain what's happening.
Sorry, I didn't mean to imply that $subject should be blocked. I agree with you that the power on/off sequence has to be fixed in the hdmi and mixer drivers and is orthogonal to the DTS changes. That's why I also decided to finally post my "Add HDMI support for Exynos5420 platform" [0] series too.
Best regards
Best regards, Javier
Hello,
On 2015-01-22 13:51, Javier Martinez Canillas wrote:
Just to let you know. The problem with power domain failure to turn off is something orthogonal to 'Unhandled fault: external abort on non-linefetch' issue in drm mixer driver. It looks that even if domains reports that it failed to turn off, it somehow disabled the power, because this 'external abort' issue happens on Odroid XU3 when driver tries to access mixer registers with power domain turned off. It must be something badly broken in Exynos DRM HDMI/Mixer handling of runtime pm, because such scenario can be easily triggered simply by running "libdrm/modetest -M exynos -s 16@13:1920x1080".
It looks that in case of Exynos4 access to mixer registers in case of disabled power domain doesn't have such terrible results and thus the driver is somehow working well.
Thanks. I hope that both series will get merged to v3.20 what will bring more attention to this problem.
Best regards
On Tue, Jan 20, 2015 at 10:16 AM, Marek Szyprowski m.szyprowski@samsung.com wrote:
'return PTR_ERR(mixer_res->hdmi);' would be better.
Better check whether clk_prepare_enable failed.
Hello,
On 2015-01-22 14:00, Fabio Estevam wrote:
ok.
This will be handled by a separate patch, because checking for error values from clk_repare_enable is missing almost all over the Exynos DRM driver.
Best regards
dri-devel@lists.freedesktop.org
-
Fabio Estevam -
Javier Martinez Canillas -
Marek Szyprowski