This resend is just rebased on drm-next as of today (+Daniels Ack).
Dropped the first patch in version 3 since that is already applied in v4.6. Also moved all generic changes (including the changes in panel-simple) to the first, generic patch.
Instead of using struct drm_display_mode to convey the pixel clock polarity information, this patchset introduces a new field called bus_flags stored in struct drm_display_info.
-- Stefan
Changes since v2: - Rebased to v4.6 and dropped ("drm/fsl-dcu: use mode flags for hsync/vsync polarity"), already part of v4.6-rc1 - Moved all generic changes to the first commit
Changes since v1: - Introduce bus_flags to convey the pixel clock polarity from panel-simple.c to the driver.
Stefan Agner (2): drm: introduce bus_flags in drm_display_info drm/fsl-dcu: use bus_flags for pixel clock polarity
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 +++++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h | 4 ++-- drivers/gpu/drm/panel/panel-simple.c | 5 ++++- include/drm/drm_crtc.h | 9 +++++++++ 4 files changed, 20 insertions(+), 3 deletions(-)
Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity.
Suggested-by: Thierry Reding thierry.reding@gmail.com Acked-by: Philipp Zabel p.zabel@pengutronix.de Acked-by: Manfred Schlaegl manfred.schlaegl@gmx.at Acked-by: Daniel Vetter daniel.vetter@ffwll.ch Signed-off-by: Stefan Agner stefan@agner.ch --- drivers/gpu/drm/panel/panel-simple.c | 2 ++ include/drm/drm_crtc.h | 9 +++++++++ 2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ceb2048..77ae07f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -72,6 +72,7 @@ struct panel_desc { } delay;
u32 bus_format; + u32 bus_flags; };
struct panel_simple { @@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1); + connector->display_info.bus_flags = panel->desc->bus_flags;
return num; } diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 4acdaf5..d1559cd 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -118,6 +118,14 @@ enum subpixel_order { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2) + +#define DRM_BUS_FLAG_DE_LOW (1<<0) +#define DRM_BUS_FLAG_DE_HIGH (1<<1) +/* drive data on pos. edge */ +#define DRM_BUS_FLAG_PIXDATA_POSEDGE (1<<2) +/* drive data on neg. edge */ +#define DRM_BUS_FLAG_PIXDATA_NEGEDGE (1<<3) + /* * Describes a given display (e.g. CRT or flat panel) and its limitations. */ @@ -139,6 +147,7 @@ struct drm_display_info {
const u32 *bus_formats; unsigned int num_bus_formats; + u32 bus_flags;
/* Mask of supported hdmi deep color modes */ u8 edid_hdmi_dc_modes;
Hi Stefan
Actually, the pixel clock or data enable polarity are also needed by drm/rockchip,
but I have a question:
why not add these polarity into drm_display_mode->flags. drm_display_mode->flags has hsync and vsync polarity, I think it's cool that add pixel clock or data enable polarity on drm_display_mode->flags.
The polarity seems should be used on crtc, but crtc can't direct get the panel, save polarity on panel_desc means need more work to transmit it to crtc.
Thanks.
On 2016年05月05日 13:08, Stefan Agner wrote:
Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity.
Suggested-by: Thierry Reding thierry.reding@gmail.com Acked-by: Philipp Zabel p.zabel@pengutronix.de Acked-by: Manfred Schlaegl manfred.schlaegl@gmx.at Acked-by: Daniel Vetter daniel.vetter@ffwll.ch Signed-off-by: Stefan Agner stefan@agner.ch
drivers/gpu/drm/panel/panel-simple.c | 2 ++ include/drm/drm_crtc.h | 9 +++++++++ 2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ceb2048..77ae07f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -72,6 +72,7 @@ struct panel_desc { } delay;
u32 bus_format;
u32 bus_flags; };
struct panel_simple {
@@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1);
connector->display_info.bus_flags = panel->desc->bus_flags;
return num; }
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 4acdaf5..d1559cd 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -118,6 +118,14 @@ enum subpixel_order { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2)
+#define DRM_BUS_FLAG_DE_LOW (1<<0) +#define DRM_BUS_FLAG_DE_HIGH (1<<1) +/* drive data on pos. edge */ +#define DRM_BUS_FLAG_PIXDATA_POSEDGE (1<<2) +/* drive data on neg. edge */ +#define DRM_BUS_FLAG_PIXDATA_NEGEDGE (1<<3)
- /*
*/
- Describes a given display (e.g. CRT or flat panel) and its limitations.
@@ -139,6 +147,7 @@ struct drm_display_info {
const u32 *bus_formats; unsigned int num_bus_formats;
u32 bus_flags;
/* Mask of supported hdmi deep color modes */ u8 edid_hdmi_dc_modes;
Hi Mark,
On 2016-05-04 23:18, Mark yao wrote:
Hi Stefan
Actually, the pixel clock or data enable polarity are also needed by drm/rockchip,
but I have a question:
why not add these polarity into drm_display_mode->flags. drm_display_mode->flags has hsync and vsync polarity, I think it's cool that add pixel clock or data enable polarity on drm_display_mode->flags.
This has been proposed several times, including me (v1 of this patchset). However, there are good reasons why this has not been accepted, mainly since mode flags leak to user space and the kernel developer wanted to avoid that (even more) such hardware configuration gets leaked to user space... This is how I understand it, but you might want to read the archives for details.
-- Stefan
The polarity seems should be used on crtc, but crtc can't direct get the panel, save polarity on panel_desc means need more work to transmit it to crtc.
Thanks.
On 2016年05月05日 13:08, Stefan Agner wrote:
Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity.
Suggested-by: Thierry Reding thierry.reding@gmail.com Acked-by: Philipp Zabel p.zabel@pengutronix.de Acked-by: Manfred Schlaegl manfred.schlaegl@gmx.at Acked-by: Daniel Vetter daniel.vetter@ffwll.ch Signed-off-by: Stefan Agner stefan@agner.ch
drivers/gpu/drm/panel/panel-simple.c | 2 ++ include/drm/drm_crtc.h | 9 +++++++++ 2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ceb2048..77ae07f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -72,6 +72,7 @@ struct panel_desc { } delay; u32 bus_format;
- u32 bus_flags; }; struct panel_simple {
@@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1);
- connector->display_info.bus_flags = panel->desc->bus_flags; return num; }
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 4acdaf5..d1559cd 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -118,6 +118,14 @@ enum subpixel_order { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2)
+#define DRM_BUS_FLAG_DE_LOW (1<<0) +#define DRM_BUS_FLAG_DE_HIGH (1<<1) +/* drive data on pos. edge */ +#define DRM_BUS_FLAG_PIXDATA_POSEDGE (1<<2) +/* drive data on neg. edge */ +#define DRM_BUS_FLAG_PIXDATA_NEGEDGE (1<<3)
- /*
*/
- Describes a given display (e.g. CRT or flat panel) and its limitations.
@@ -139,6 +147,7 @@ struct drm_display_info { const u32 *bus_formats; unsigned int num_bus_formats;
- u32 bus_flags; /* Mask of supported hdmi deep color modes */ u8 edid_hdmi_dc_modes;
On Wed, May 04, 2016 at 10:08:59PM -0700, Stefan Agner wrote:
Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity.
Suggested-by: Thierry Reding thierry.reding@gmail.com Acked-by: Philipp Zabel p.zabel@pengutronix.de Acked-by: Manfred Schlaegl manfred.schlaegl@gmx.at Acked-by: Daniel Vetter daniel.vetter@ffwll.ch Signed-off-by: Stefan Agner stefan@agner.ch
In case this wasn't clear: That ack is good enough to just smash this patch into your fsl-dcu tree and send a pull request to Dave for it. No need to resend the patches. Just mention in the pull that you have stuff included outside of your driver, and that it's all acked. -Daniel
drivers/gpu/drm/panel/panel-simple.c | 2 ++ include/drm/drm_crtc.h | 9 +++++++++ 2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ceb2048..77ae07f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -72,6 +72,7 @@ struct panel_desc { } delay;
u32 bus_format;
- u32 bus_flags;
};
struct panel_simple { @@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1);
connector->display_info.bus_flags = panel->desc->bus_flags;
return num;
} diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 4acdaf5..d1559cd 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -118,6 +118,14 @@ enum subpixel_order { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2)
+#define DRM_BUS_FLAG_DE_LOW (1<<0) +#define DRM_BUS_FLAG_DE_HIGH (1<<1) +/* drive data on pos. edge */ +#define DRM_BUS_FLAG_PIXDATA_POSEDGE (1<<2) +/* drive data on neg. edge */ +#define DRM_BUS_FLAG_PIXDATA_NEGEDGE (1<<3)
/*
- Describes a given display (e.g. CRT or flat panel) and its limitations.
*/ @@ -139,6 +147,7 @@ struct drm_display_info {
const u32 *bus_formats; unsigned int num_bus_formats;
u32 bus_flags;
/* Mask of supported hdmi deep color modes */ u8 edid_hdmi_dc_modes;
-- 2.8.2
On 2016-05-05 03:06, Daniel Vetter wrote:
On Wed, May 04, 2016 at 10:08:59PM -0700, Stefan Agner wrote:
Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity.
Suggested-by: Thierry Reding thierry.reding@gmail.com Acked-by: Philipp Zabel p.zabel@pengutronix.de Acked-by: Manfred Schlaegl manfred.schlaegl@gmx.at Acked-by: Daniel Vetter daniel.vetter@ffwll.ch Signed-off-by: Stefan Agner stefan@agner.ch
In case this wasn't clear: That ack is good enough to just smash this patch into your fsl-dcu tree and send a pull request to Dave for it. No need to resend the patches. Just mention in the pull that you have stuff included outside of your driver, and that it's all acked. -Daniel
I almost suspected it, but was not sure whether that would be ok. Thanks for the clarification.
Will create a pull request today.
-- Stefan
drivers/gpu/drm/panel/panel-simple.c | 2 ++ include/drm/drm_crtc.h | 9 +++++++++ 2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ceb2048..77ae07f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -72,6 +72,7 @@ struct panel_desc { } delay;
u32 bus_format;
- u32 bus_flags;
};
struct panel_simple { @@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) if (panel->desc->bus_format) drm_display_info_set_bus_formats(&connector->display_info, &panel->desc->bus_format, 1);
connector->display_info.bus_flags = panel->desc->bus_flags;
return num;
} diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 4acdaf5..d1559cd 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -118,6 +118,14 @@ enum subpixel_order { #define DRM_COLOR_FORMAT_RGB444 (1<<0) #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) #define DRM_COLOR_FORMAT_YCRCB422 (1<<2)
+#define DRM_BUS_FLAG_DE_LOW (1<<0) +#define DRM_BUS_FLAG_DE_HIGH (1<<1) +/* drive data on pos. edge */ +#define DRM_BUS_FLAG_PIXDATA_POSEDGE (1<<2) +/* drive data on neg. edge */ +#define DRM_BUS_FLAG_PIXDATA_NEGEDGE (1<<3)
/*
- Describes a given display (e.g. CRT or flat panel) and its limitations.
*/ @@ -139,6 +147,7 @@ struct drm_display_info {
const u32 *bus_formats; unsigned int num_bus_formats;
u32 bus_flags;
/* Mask of supported hdmi deep color modes */ u8 edid_hdmi_dc_modes;
-- 2.8.2
The drivers current default configuration drives the pixel data on rising edge of the pixel clock. However, most display sample data on rising edge... This leads to color shift artefacts visible especially at edges.
This patch changes the relevant defines to be useful and actually set the bits, and changes pixel clock polarity to drive the pixel data on falling edge by default. The patch also adds an explicit pixel clock polarity flag to the display introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to retain the initial behavior.
Signed-off-by: Stefan Agner stefan@agner.ch --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 +++++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h | 4 ++-- drivers/gpu/drm/panel/panel-simple.c | 3 ++- 3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index 365809e..89c0084 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -66,6 +66,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; + struct drm_connector *con = &fsl_dev->connector.base; struct drm_display_mode *mode = &crtc->state->mode; unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0;
@@ -80,6 +81,10 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) vfp = mode->vsync_start - mode->vdisplay; vsw = mode->vsync_end - mode->vsync_start;
+ /* INV_PXCK as default (most display sample data on rising edge) */ + if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) + pol |= DCU_SYN_POL_INV_PXCK; + if (mode->flags & DRM_MODE_FLAG_NHSYNC) pol |= DCU_SYN_POL_INV_HS_LOW;
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h index 5bb7c26..c275f90 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h @@ -47,8 +47,8 @@ #define DCU_VSYN_PARA_FP(x) (x)
#define DCU_SYN_POL 0x0024 -#define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) -#define DCU_SYN_POL_NEG_REMAIN (0 << 5) +#define DCU_SYN_POL_INV_PXCK BIT(6) +#define DCU_SYN_POL_NEG BIT(5) #define DCU_SYN_POL_INV_VS_LOW BIT(1) #define DCU_SYN_POL_INV_HS_LOW BIT(0)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 77ae07f..b19c88f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1053,7 +1053,8 @@ static const struct panel_desc nec_nl4827hc19_05b = { .width = 95, .height = 54, }, - .bus_format = MEDIA_BUS_FMT_RGB888_1X24 + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, };
static const struct display_timing okaya_rs800480t_7x0gp_timing = {
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