From: Philipp Zabel p.zabel@pengutronix.de
The bus format both specifies the bpc and the way the individual bits get serialized into the 7 LVDS timeslots.
While the is only one standard mapping for 6 bpc and so the driver could infer the bit mapping from the bpc alone, there are more options for the 8 bpc case which makes specifiying the bus format mandatory. To keep things consistent across panels and to set a precedent for new panel additions add the proper bus format.
Signed-off-by: Philipp Zabel p.zabel@pengutronix.de Signed-off-by: Lucas Stach l.stach@pengutronix.de --- v2: lst: added more elaborate commit message --- drivers/gpu/drm/panel/panel-simple.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index f94201b6e882..a1cd431e17a6 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -729,6 +729,7 @@ static const struct panel_desc hannstar_hsd070pww1 = { .width = 151, .height = 94, }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, };
static const struct display_timing hannstar_hsd100pxn1_timing = {
From: Philipp Zabel p.zabel@pengutronix.de
According to the data sheet, the minimum horizontal blanking interval is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the minimum working horizontal blanking interval to be 60 clocks.
Signed-off-by: Philipp Zabel p.zabel@pengutronix.de Signed-off-by: Lucas Stach l.stach@pengutronix.de --- v2: no changes --- drivers/gpu/drm/panel/panel-simple.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index a1cd431e17a6..39e9dffe07d9 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -713,7 +713,12 @@ static const struct display_timing hannstar_hsd070pww1_timing = { .hactive = { 1280, 1280, 1280 }, .hfront_porch = { 1, 1, 10 }, .hback_porch = { 1, 1, 10 }, - .hsync_len = { 52, 158, 661 }, + /* + * According to the data sheet, the minimum horizontal blanking interval + * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the + * minimum working horizontal blanking interval to be 60 clocks. + */ + .hsync_len = { 58, 158, 661 }, .vactive = { 800, 800, 800 }, .vfront_porch = { 1, 1, 10 }, .vback_porch = { 1, 1, 10 },
On Wed, Aug 12, 2015 at 12:32:12PM +0200, Lucas Stach wrote:
From: Philipp Zabel p.zabel@pengutronix.de
The bus format both specifies the bpc and the way the individual bits get serialized into the 7 LVDS timeslots.
While the is only one standard mapping for 6 bpc and so the driver could infer the bit mapping from the bpc alone, there are more options for the 8 bpc case which makes specifiying the bus format mandatory. To keep things consistent across panels and to set a precedent for new panel additions add the proper bus format.
Signed-off-by: Philipp Zabel p.zabel@pengutronix.de Signed-off-by: Lucas Stach l.stach@pengutronix.de
v2: lst: added more elaborate commit message
drivers/gpu/drm/panel/panel-simple.c | 1 + 1 file changed, 1 insertion(+)
Both patches applied, thanks.
Thierry
dri-devel@lists.freedesktop.org
-
Lucas Stach -
Thierry Reding