Hi!
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
I have only tested this series on sama5d3, but I did check the docs for various other chips (sama5d2, sama5d4, sam9n12, sam9g15, sam9g35 and sam9x35) supported by the driver (relevant to patch 4/4).
Cheers, Peter
Peter Rosin (4): drm/atmel-hlcdc: rotate planes counterclockwise drm/atmel-hlcdc: do not swap w/h of the crtc when a plane is rotated drm/atmel-hlcdc: fix clipping of planes drm/atmel-hlcdc: do not immediately disable planes, wait for next frame
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 179 +++++++++--------------- 1 file changed, 67 insertions(+), 112 deletions(-)
Ouch, the driver rotates planes clockwise, which is simply not correct.
Signed-off-by: Peter Rosin peda@axentia.se --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 30 ++++++++++++------------- 1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index 47e0992f3908..ea8fc0deb814 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -691,13 +691,14 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
switch (state->base.rotation & DRM_MODE_ROTATE_MASK) { case DRM_MODE_ROTATE_90: - offset = ((y_offset + state->src_y + patched_src_w - 1) / - ydiv) * fb->pitches[i]; - offset += ((x_offset + state->src_x) / xdiv) * - state->bpp[i]; - state->xstride[i] = ((patched_src_w - 1) / ydiv) * - fb->pitches[i]; - state->pstride[i] = -fb->pitches[i] - state->bpp[i]; + offset = ((y_offset + state->src_y) / ydiv) * + fb->pitches[i]; + offset += ((x_offset + state->src_x + patched_src_h - 1) / + xdiv) * state->bpp[i]; + state->xstride[i] = -(((patched_src_w - 1) / ydiv) * + fb->pitches[i]) - + (2 * state->bpp[i]); + state->pstride[i] = fb->pitches[i] - state->bpp[i]; break; case DRM_MODE_ROTATE_180: offset = ((y_offset + state->src_y + patched_src_h - 1) / @@ -709,14 +710,13 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, state->pstride[i] = -2 * state->bpp[i]; break; case DRM_MODE_ROTATE_270: - offset = ((y_offset + state->src_y) / ydiv) * - fb->pitches[i]; - offset += ((x_offset + state->src_x + patched_src_h - 1) / - xdiv) * state->bpp[i]; - state->xstride[i] = -(((patched_src_w - 1) / ydiv) * - fb->pitches[i]) - - (2 * state->bpp[i]); - state->pstride[i] = fb->pitches[i] - state->bpp[i]; + offset = ((y_offset + state->src_y + patched_src_w - 1) / + ydiv) * fb->pitches[i]; + offset += ((x_offset + state->src_x) / xdiv) * + state->bpp[i]; + state->xstride[i] = ((patched_src_w - 1) / ydiv) * + fb->pitches[i]; + state->pstride[i] = -fb->pitches[i] - state->bpp[i]; break; case DRM_MODE_ROTATE_0: default:
The destination crtc rectangle is independent of source plane rotation.
Signed-off-by: Peter Rosin peda@axentia.se --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 3 --- 1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index ea8fc0deb814..d6f93f029020 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -642,9 +642,6 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, * Swap width and size in case of 90 or 270 degrees rotation */ if (drm_rotation_90_or_270(state->base.rotation)) { - tmp = state->crtc_w; - state->crtc_w = state->crtc_h; - state->crtc_h = tmp; tmp = state->src_w; state->src_w = state->src_h; state->src_h = tmp;
On Thu, 10 Jan 2019 15:10:39 +0000 Peter Rosin peda@axentia.se wrote:
The destination crtc rectangle is independent of source plane rotation.
Signed-off-by: Peter Rosin peda@axentia.se
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 3 --- 1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index ea8fc0deb814..d6f93f029020 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -642,9 +642,6 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, * Swap width and size in case of 90 or 270 degrees rotation */ if (drm_rotation_90_or_270(state->base.rotation)) {
tmp = state->crtc_w;state->crtc_w = state->crtc_h;state->crtc_h = tmp;
Again, I guess I assumed ->crtc_h/w were the width and height before rotation when I initially added rotation support. This change might break users too.
tmp = state->src_w; state->src_w = state->src_h; state->src_h = tmp;
On 2019-01-10 18:48, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:39 +0000 Peter Rosin peda@axentia.se wrote:
The destination crtc rectangle is independent of source plane rotation.
Signed-off-by: Peter Rosin peda@axentia.se
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 3 --- 1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index ea8fc0deb814..d6f93f029020 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -642,9 +642,6 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, * Swap width and size in case of 90 or 270 degrees rotation */ if (drm_rotation_90_or_270(state->base.rotation)) {
tmp = state->crtc_w;state->crtc_w = state->crtc_h;state->crtc_h = tmp;Again, I guess I assumed ->crtc_h/w were the width and height before rotation when I initially added rotation support.
And I thought so too, possibly since I have only been doing drm-stuff with this driver, but I also suspect that the incompleteness of the libdrm modetest program is to blame. I don't think it's possible to specify individual src and dst rectangles with it, and that seems rather limiting when dealing with rotated planes. I can easily see why someone using modetest thinks the crtc rect should be rotated by the driver...
This change might break users too.
Right you are, and the same impossible scenario. Fix things to do the right thing and risk breaking users, or don't and preserve the buggy non-portable issues of the driver making it unusable for others.
I don't care either way, because rotating planes with this stride- method is practically useless here. It simply requires to much memory bandwidth. I might work ok for smaller panels with lower pixel clock frequencies though? I think the LCDC might read the same data more than once when data is not in the "natural" order? (no, I do not need an answer to this question, and I do not have time to dig in this area at the moment...)
However, if you can't do both patch 1 and 2 (because users regress), then patch 3 is no good either. The reason is that drm_atomic_helper_check_plane_state assumes the rotational properties fixed by patch 1 and 2, and the behavior is "odd" if you have that wrong.
Cheers, Peter
tmp = state->src_w; state->src_w = state->src_h; state->src_h = tmp;
On 11/01/2019 at 14:29, Peter Rosin wrote:
On 2019-01-10 18:48, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:39 +0000 Peter Rosin peda@axentia.se wrote:
The destination crtc rectangle is independent of source plane rotation.
Signed-off-by: Peter Rosin peda@axentia.se
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 3 --- 1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index ea8fc0deb814..d6f93f029020 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -642,9 +642,6 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, * Swap width and size in case of 90 or 270 degrees rotation */ if (drm_rotation_90_or_270(state->base.rotation)) {
tmp = state->crtc_w;state->crtc_w = state->crtc_h;state->crtc_h = tmp;Again, I guess I assumed ->crtc_h/w were the width and height before rotation when I initially added rotation support.
And I thought so too, possibly since I have only been doing drm-stuff with this driver, but I also suspect that the incompleteness of the libdrm modetest program is to blame. I don't think it's possible to specify individual src and dst rectangles with it, and that seems rather limiting when dealing with rotated planes. I can easily see why someone using modetest thinks the crtc rect should be rotated by the driver...
This change might break users too.
Right you are, and the same impossible scenario. Fix things to do the right thing and risk breaking users, or don't and preserve the buggy non-portable issues of the driver making it unusable for others.
I understand that we are the only ones to be different here. My colleague Josh also helped me grasp the implications of this issue.
I would say that we mustn't be different. So please consider fixing this. Some users might have started something with rotations but we'll make sure to help them with the issue encountered and our additional DRM libraries (like libplanes) can be fixed easily to make this change transparent.
I don't care either way, because rotating planes with this stride- method is practically useless here. It simply requires to much memory bandwidth. I might work ok for smaller panels with lower pixel clock frequencies though?
Rotation works for our use cases.
I think the LCDC might read the same data more than once when data is not in the "natural" order? (no, I do not need an answer to this question, and I do not have time to dig in this area at the moment...)
However, if you can't do both patch 1 and 2 (because users regress), then patch 3 is no good either. The reason is that drm_atomic_helper_check_plane_state assumes the rotational properties fixed by patch 1 and 2, and the behavior is "odd" if you have that wrong.
Thanks for continuing the discussion Boris and thanks to Peter for this work. You have my opinion: please go-on with the fix.
Best regards, Nicolas
tmp = state->src_w; state->src_w = state->src_h; state->src_h = tmp;
linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
With the help from drm_atomic_helper_check_plane_state function, clipping now handles planes to be partially or totally off-screen. The plane is disabled if it is not visible.
Signed-off-by: Peter Rosin peda@axentia.se --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 162 +++++++++--------------- 1 file changed, 61 insertions(+), 101 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index d6f93f029020..05519e8c6586 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -548,7 +548,8 @@ atmel_hlcdc_plane_prepare_disc_area(struct drm_crtc_state *c_state)
ovl_state = drm_plane_state_to_atmel_hlcdc_plane_state(ovl_s);
- if (!ovl_s->fb || + if (!ovl_s->visible || + !ovl_s->fb || ovl_s->fb->format->has_alpha || ovl_s->alpha != DRM_BLEND_ALPHA_OPAQUE) continue; @@ -600,15 +601,10 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, struct drm_framebuffer *fb = state->base.fb; const struct drm_display_mode *mode; struct drm_crtc_state *crtc_state; - unsigned int patched_crtc_w; - unsigned int patched_crtc_h; - unsigned int patched_src_w; - unsigned int patched_src_h; unsigned int tmp; - int x_offset = 0; - int y_offset = 0; int hsub = 1; int vsub = 1; + int ret; int i;
if (!state->base.crtc || !fb) @@ -617,14 +613,21 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, crtc_state = drm_atomic_get_existing_crtc_state(s->state, s->crtc); mode = &crtc_state->adjusted_mode;
- state->src_x = s->src_x; - state->src_y = s->src_y; - state->src_h = s->src_h; - state->src_w = s->src_w; - state->crtc_x = s->crtc_x; - state->crtc_y = s->crtc_y; - state->crtc_h = s->crtc_h; - state->crtc_w = s->crtc_w; + ret = drm_atomic_helper_check_plane_state(s, crtc_state, + (1 << 16) / 2048, + INT_MAX, true, true); + if (ret || !s->visible) + return ret; + + state->src_x = s->src.x1; + state->src_y = s->src.y1; + state->src_w = drm_rect_width(&s->src); + state->src_h = drm_rect_height(&s->src); + state->crtc_x = s->dst.x1; + state->crtc_y = s->dst.y1; + state->crtc_w = drm_rect_width(&s->dst); + state->crtc_h = drm_rect_height(&s->dst); + if ((state->src_x | state->src_y | state->src_w | state->src_h) & SUBPIXEL_MASK) return -EINVAL; @@ -638,42 +641,6 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, if (state->nplanes > ATMEL_HLCDC_LAYER_MAX_PLANES) return -EINVAL;
- /* - * Swap width and size in case of 90 or 270 degrees rotation - */ - if (drm_rotation_90_or_270(state->base.rotation)) { - tmp = state->src_w; - state->src_w = state->src_h; - state->src_h = tmp; - } - - if (state->crtc_x + state->crtc_w > mode->hdisplay) - patched_crtc_w = mode->hdisplay - state->crtc_x; - else - patched_crtc_w = state->crtc_w; - - if (state->crtc_x < 0) { - patched_crtc_w += state->crtc_x; - x_offset = -state->crtc_x; - state->crtc_x = 0; - } - - if (state->crtc_y + state->crtc_h > mode->vdisplay) - patched_crtc_h = mode->vdisplay - state->crtc_y; - else - patched_crtc_h = state->crtc_h; - - if (state->crtc_y < 0) { - patched_crtc_h += state->crtc_y; - y_offset = -state->crtc_y; - state->crtc_y = 0; - } - - patched_src_w = DIV_ROUND_CLOSEST(patched_crtc_w * state->src_w, - state->crtc_w); - patched_src_h = DIV_ROUND_CLOSEST(patched_crtc_h * state->src_h, - state->crtc_h); - hsub = drm_format_horz_chroma_subsampling(fb->format->format); vsub = drm_format_vert_chroma_subsampling(fb->format->format);
@@ -688,41 +655,38 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
switch (state->base.rotation & DRM_MODE_ROTATE_MASK) { case DRM_MODE_ROTATE_90: - offset = ((y_offset + state->src_y) / ydiv) * + offset = (state->src_y / ydiv) * fb->pitches[i]; - offset += ((x_offset + state->src_x + patched_src_h - 1) / + offset += ((state->src_x + state->src_w - 1) / xdiv) * state->bpp[i]; - state->xstride[i] = -(((patched_src_w - 1) / ydiv) * + state->xstride[i] = -(((state->src_h - 1) / ydiv) * fb->pitches[i]) - (2 * state->bpp[i]); state->pstride[i] = fb->pitches[i] - state->bpp[i]; break; case DRM_MODE_ROTATE_180: - offset = ((y_offset + state->src_y + patched_src_h - 1) / + offset = ((state->src_y + state->src_h - 1) / ydiv) * fb->pitches[i]; - offset += ((x_offset + state->src_x + patched_src_w - 1) / + offset += ((state->src_x + state->src_w - 1) / xdiv) * state->bpp[i]; - state->xstride[i] = ((((patched_src_w - 1) / xdiv) - 1) * + state->xstride[i] = ((((state->src_w - 1) / xdiv) - 1) * state->bpp[i]) - fb->pitches[i]; state->pstride[i] = -2 * state->bpp[i]; break; case DRM_MODE_ROTATE_270: - offset = ((y_offset + state->src_y + patched_src_w - 1) / + offset = ((state->src_y + state->src_h - 1) / ydiv) * fb->pitches[i]; - offset += ((x_offset + state->src_x) / xdiv) * - state->bpp[i]; - state->xstride[i] = ((patched_src_w - 1) / ydiv) * + offset += (state->src_x / xdiv) * state->bpp[i]; + state->xstride[i] = ((state->src_h - 1) / ydiv) * fb->pitches[i]; state->pstride[i] = -fb->pitches[i] - state->bpp[i]; break; case DRM_MODE_ROTATE_0: default: - offset = ((y_offset + state->src_y) / ydiv) * - fb->pitches[i]; - offset += ((x_offset + state->src_x) / xdiv) * - state->bpp[i]; + offset = (state->src_y / ydiv) * fb->pitches[i]; + offset += (state->src_x / xdiv) * state->bpp[i]; state->xstride[i] = fb->pitches[i] - - ((patched_src_w / xdiv) * + ((state->src_w / xdiv) * state->bpp[i]); state->pstride[i] = 0; break; @@ -731,35 +695,45 @@ static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p, state->offsets[i] = offset + fb->offsets[i]; }
- state->src_w = patched_src_w; - state->src_h = patched_src_h; - state->crtc_w = patched_crtc_w; - state->crtc_h = patched_crtc_h; + /* + * Swap width and size in case of 90 or 270 degrees rotation + */ + if (drm_rotation_90_or_270(state->base.rotation)) { + tmp = state->src_w; + state->src_w = state->src_h; + state->src_h = tmp; + }
if (!desc->layout.size && (mode->hdisplay != state->crtc_w || mode->vdisplay != state->crtc_h)) return -EINVAL;
- if (desc->max_height && state->crtc_h > desc->max_height) - return -EINVAL; - - if (desc->max_width && state->crtc_w > desc->max_width) - return -EINVAL; - if ((state->crtc_h != state->src_h || state->crtc_w != state->src_w) && (!desc->layout.memsize || state->base.fb->format->has_alpha)) return -EINVAL;
- if (state->crtc_x < 0 || state->crtc_y < 0) - return -EINVAL; + return 0; +}
- if (state->crtc_w + state->crtc_x > mode->hdisplay || - state->crtc_h + state->crtc_y > mode->vdisplay) - return -EINVAL; +static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p, + struct drm_plane_state *old_state) +{ + struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
- return 0; + /* Disable interrupts */ + atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IDR, + 0xffffffff); + + /* Disable the layer */ + atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR, + ATMEL_HLCDC_LAYER_RST | + ATMEL_HLCDC_LAYER_A2Q | + ATMEL_HLCDC_LAYER_UPDATE); + + /* Clear all pending interrupts */ + atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR); }
static void atmel_hlcdc_plane_atomic_update(struct drm_plane *p, @@ -773,6 +747,11 @@ static void atmel_hlcdc_plane_atomic_update(struct drm_plane *p, if (!p->state->crtc || !p->state->fb) return;
+ if (!state->base.visible) { + atmel_hlcdc_plane_atomic_disable(p, old_s); + return; + } + atmel_hlcdc_plane_update_pos_and_size(plane, state); atmel_hlcdc_plane_update_general_settings(plane, state); atmel_hlcdc_plane_update_format(plane, state); @@ -794,25 +773,6 @@ static void atmel_hlcdc_plane_atomic_update(struct drm_plane *p, ATMEL_HLCDC_LAYER_A2Q : ATMEL_HLCDC_LAYER_EN)); }
-static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p, - struct drm_plane_state *old_state) -{ - struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p); - - /* Disable interrupts */ - atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IDR, - 0xffffffff); - - /* Disable the layer */ - atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR, - ATMEL_HLCDC_LAYER_RST | - ATMEL_HLCDC_LAYER_A2Q | - ATMEL_HLCDC_LAYER_UPDATE); - - /* Clear all pending interrupts */ - atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR); -} - static void atmel_hlcdc_plane_destroy(struct drm_plane *p) { struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
The A2Q and UPDATE bits have no effect in the channel disable registers. However, since they are present, assume that the intention is to disable planes, not immediately as indicated by the RST bit, but on the next frame shift since that is what A2Q and UPDATE means in the channel enable registers.
Disabling the plane on the next frame shift is done with the EN bit, so use that.
Signed-off-by: Peter Rosin peda@axentia.se --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index 05519e8c6586..f2f570642f84 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -728,9 +728,7 @@ static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p,
/* Disable the layer */ atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR, - ATMEL_HLCDC_LAYER_RST | - ATMEL_HLCDC_LAYER_A2Q | - ATMEL_HLCDC_LAYER_UPDATE); + ATMEL_HLCDC_LAYER_EN);
/* Clear all pending interrupts */ atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR);
On Thu, 10 Jan 2019 15:10:48 +0000 Peter Rosin peda@axentia.se wrote:
The A2Q and UPDATE bits have no effect in the channel disable registers. However, since they are present, assume that the intention is to disable planes, not immediately as indicated by the RST bit, but on the next frame shift since that is what A2Q and UPDATE means in the channel enable registers.
Disabling the plane on the next frame shift is done with the EN bit, so use that.
It's been a long time, but I think I had a good reason for forcing a reset. IIRC, when you don't do that and the CRTC is disabled before the plane, the EN bit stays around, and next time you queue a plane update, you'll start with an invalid buf pointer.
Signed-off-by: Peter Rosin peda@axentia.se
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index 05519e8c6586..f2f570642f84 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -728,9 +728,7 @@ static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p,
/* Disable the layer */ atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR,
ATMEL_HLCDC_LAYER_RST |ATMEL_HLCDC_LAYER_A2Q |ATMEL_HLCDC_LAYER_UPDATE);
ATMEL_HLCDC_LAYER_EN);/* Clear all pending interrupts */ atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR);
On 2019-01-10 18:29, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:48 +0000 Peter Rosin peda@axentia.se wrote:
The A2Q and UPDATE bits have no effect in the channel disable registers. However, since they are present, assume that the intention is to disable planes, not immediately as indicated by the RST bit, but on the next frame shift since that is what A2Q and UPDATE means in the channel enable registers.
Disabling the plane on the next frame shift is done with the EN bit, so use that.
It's been a long time, but I think I had a good reason for forcing a reset. IIRC, when you don't do that and the CRTC is disabled before the plane, the EN bit stays around, and next time you queue a plane update, you'll start with an invalid buf pointer.
It might be possible to clear the EN bit in ...CHDR before enabling the plane in ...CHER. Or is that too late? But this patch is not overly important, I just wanted to avoid the resulting "black hole" when the plane DMA is disabled mid-frame. But disabling planes is probably not something that happens frequently and will perhaps not be noticed at all...
Cheers, Peter
Signed-off-by: Peter Rosin peda@axentia.se
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index 05519e8c6586..f2f570642f84 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -728,9 +728,7 @@ static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p,
/* Disable the layer */ atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR,
ATMEL_HLCDC_LAYER_RST |ATMEL_HLCDC_LAYER_A2Q |ATMEL_HLCDC_LAYER_UPDATE);
ATMEL_HLCDC_LAYER_EN);/* Clear all pending interrupts */ atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR);
On Thu, 10 Jan 2019 18:51:21 +0000 Peter Rosin peda@axentia.se wrote:
On 2019-01-10 18:29, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:48 +0000 Peter Rosin peda@axentia.se wrote:
The A2Q and UPDATE bits have no effect in the channel disable registers. However, since they are present, assume that the intention is to disable planes, not immediately as indicated by the RST bit, but on the next frame shift since that is what A2Q and UPDATE means in the channel enable registers.
Disabling the plane on the next frame shift is done with the EN bit, so use that.
It's been a long time, but I think I had a good reason for forcing a reset. IIRC, when you don't do that and the CRTC is disabled before the plane, the EN bit stays around, and next time you queue a plane update, you'll start with an invalid buf pointer.
It might be possible to clear the EN bit in ...CHDR before enabling the plane in ...CHER. Or is that too late?
I think I tried that, but I'm not sure (BTW, this change was done in bd4248bb5e8b ("drm: atmel-hlcdc: reset layer A2Q and UPDATE bits when disabling it")). Anyway, I'm not even sure this is still needed now that atomic updates have a wait_for_flip_done/vblank() in the commit path.
But this patch is not overly important, I just wanted to avoid the resulting "black hole" when the plane DMA is disabled mid-frame. But disabling planes is probably not something that happens frequently and will perhaps not be noticed at all...
Okay. Other patches look good to me, I'm just waiting for Nicolas feedback before applying them.
On 2019-01-10 20:25, Boris Brezillon wrote:
On Thu, 10 Jan 2019 18:51:21 +0000 Peter Rosin peda@axentia.se wrote:
On 2019-01-10 18:29, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:48 +0000 Peter Rosin peda@axentia.se wrote:
The A2Q and UPDATE bits have no effect in the channel disable registers. However, since they are present, assume that the intention is to disable planes, not immediately as indicated by the RST bit, but on the next frame shift since that is what A2Q and UPDATE means in the channel enable registers.
Disabling the plane on the next frame shift is done with the EN bit, so use that.
It's been a long time, but I think I had a good reason for forcing a reset. IIRC, when you don't do that and the CRTC is disabled before the plane, the EN bit stays around, and next time you queue a plane update, you'll start with an invalid buf pointer.
It might be possible to clear the EN bit in ...CHDR before enabling the plane in ...CHER. Or is that too late?
I think I tried that, but I'm not sure (BTW, this change was done in bd4248bb5e8b ("drm: atmel-hlcdc: reset layer A2Q and UPDATE bits when
That patch is a big fat NOP if you read the documentation. Those bits are marked with a '-' for all LCDC channel disable registers, for all supported chips IIUC. Are the effects of those bits mentioned in any errata?
It would be good with a comment that the present undocumented disable method is intentional. That would have kept me from assuming the whole thing was just copy-paste junk from ..._enable that happened to work.
disabling it")). Anyway, I'm not even sure this is still needed now that atomic updates have a wait_for_flip_done/vblank() in the commit path.
The documentation for the RST bit states "Resets the layer immediately. The frame is aborted." which sounds a bit scary and heavy-handed. But again, I don't know what that actually means and what the effects are but that was the reason for me wanting to avoid the RST bit.
Cheers, Peter
But this patch is not overly important, I just wanted to avoid the resulting "black hole" when the plane DMA is disabled mid-frame. But disabling planes is probably not something that happens frequently and will perhaps not be noticed at all...
Okay. Other patches look good to me, I'm just waiting for Nicolas feedback before applying them.
On Fri, 11 Jan 2019 14:29:28 +0000 Peter Rosin peda@axentia.se wrote:
On 2019-01-10 20:25, Boris Brezillon wrote:
On Thu, 10 Jan 2019 18:51:21 +0000 Peter Rosin peda@axentia.se wrote:
On 2019-01-10 18:29, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:48 +0000 Peter Rosin peda@axentia.se wrote:
The A2Q and UPDATE bits have no effect in the channel disable registers. However, since they are present, assume that the intention is to disable planes, not immediately as indicated by the RST bit, but on the next frame shift since that is what A2Q and UPDATE means in the channel enable registers.
Disabling the plane on the next frame shift is done with the EN bit, so use that.
It's been a long time, but I think I had a good reason for forcing a reset. IIRC, when you don't do that and the CRTC is disabled before the plane, the EN bit stays around, and next time you queue a plane update, you'll start with an invalid buf pointer.
It might be possible to clear the EN bit in ...CHDR before enabling the plane in ...CHER. Or is that too late?
I think I tried that, but I'm not sure (BTW, this change was done in bd4248bb5e8b ("drm: atmel-hlcdc: reset layer A2Q and UPDATE bits when
That patch is a big fat NOP if you read the documentation. Those bits are marked with a '-' for all LCDC channel disable registers, for all supported chips IIUC. Are the effects of those bits mentioned in any errata?
IIRC, it was not documented in the datasheet, but this came out during a discussion with the IP designer.
It would be good with a comment that the present undocumented disable method is intentional.
Yes, I should have added a comment about that, my bad.
That would have kept me from assuming the whole thing was just copy-paste junk from ..._enable that happened to work.
disabling it")). Anyway, I'm not even sure this is still needed now that atomic updates have a wait_for_flip_done/vblank() in the commit path.
The documentation for the RST bit states "Resets the layer immediately. The frame is aborted." which sounds a bit scary and heavy-handed. But again, I don't know what that actually means and what the effects are but that was the reason for me wanting to avoid the RST bit.
As I said, I'm not even sure the problem I was trying to fix still exists.
On Thu, 10 Jan 2019 15:10:28 +0000 Peter Rosin peda@axentia.se wrote:
Hi!
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
Hm, rotation support has been added before the standard rotation property was created, and at that time I assumed rotation was clockwise (which apparently was an unwise choice). Anyway, I don't have a solution for this problem, so I'll let Nicolas decide if it's acceptable to change the rotation behavior.
I have only tested this series on sama5d3, but I did check the docs for various other chips (sama5d2, sama5d4, sam9n12, sam9g15, sam9g35 and sam9x35) supported by the driver (relevant to patch 4/4).
Thanks for addressing those problems.
Cheers, Peter
Peter Rosin (4): drm/atmel-hlcdc: rotate planes counterclockwise drm/atmel-hlcdc: do not swap w/h of the crtc when a plane is rotated drm/atmel-hlcdc: fix clipping of planes drm/atmel-hlcdc: do not immediately disable planes, wait for next frame
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 179 +++++++++--------------- 1 file changed, 67 insertions(+), 112 deletions(-)
Hi Peter.
(Hijacking this thread as I lost the orginal mails)
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
Hm, rotation support has been added before the standard rotation property was created, and at that time I assumed rotation was clockwise (which apparently was an unwise choice). Anyway, I don't have a solution for this problem, so I'll let Nicolas decide if it's acceptable to change the rotation behavior.
I have only tested this series on sama5d3, but I did check the docs for various other chips (sama5d2, sama5d4, sam9n12, sam9g15, sam9g35 and sam9x35) supported by the driver (relevant to patch 4/4).
I wonder if, when this code path is anyway touched, could benefit from drm_rect_rotate().
It is obviously not a simple replacement, but could it be used then I hope the resulting code is simpler.
Sam
On 2019-01-10 21:16, Sam Ravnborg wrote:
Hi Peter.
(Hijacking this thread as I lost the orginal mails)
Assuming you wanted to reply to this patch? https://patchwork.kernel.org/patch/10753571/
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
Hm, rotation support has been added before the standard rotation property was created, and at that time I assumed rotation was clockwise (which apparently was an unwise choice). Anyway, I don't have a solution for this problem, so I'll let Nicolas decide if it's acceptable to change the rotation behavior.
I have only tested this series on sama5d3, but I did check the docs for various other chips (sama5d2, sama5d4, sam9n12, sam9g15, sam9g35 and sam9x35) supported by the driver (relevant to patch 4/4).
I wonder if, when this code path is anyway touched, could benefit from drm_rect_rotate().
It is obviously not a simple replacement, but could it be used then I hope the resulting code is simpler.
What are you referring to that goes beyond what is done in patch 3/4 in this series? After setting up the strides, the only use of src_[xywh] are to calculate the scaling factors, and for that the position is irrelevant. I.e. src_x and src_y are not used. Sure, in some theoretical sense it might be good if src_[xy] are also transformed into the rotated coordinate system along with src_[wh], but it seems a bit backwards to switch over to struct drm_rect when the interesting properties are the width and height, not the coordinates of the corners. No strong feelings on the issue though...
Cheers, Peter
On 2019-01-10 18:45, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:28 +0000 Peter Rosin peda@axentia.se wrote:
Hi!
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
Hm, rotation support has been added before the standard rotation property was created, and at that time I assumed rotation was clockwise (which apparently was an unwise choice). Anyway, I don't have a solution for this problem, so I'll let Nicolas decide if it's acceptable to change the rotation behavior.
Speaking of unwise, fbcon rotation is clockwise and drm rotation is counterclockwise. 'nuff said.
Cheers, Peter
On 10/01/2019 at 18:45, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:28 +0000 Peter Rosin peda@axentia.se wrote:
Hi!
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
Hm, rotation support has been added before the standard rotation property was created, and at that time I assumed rotation was clockwise (which apparently was an unwise choice). Anyway, I don't have a solution for this problem, so I'll let Nicolas decide if it's acceptable to change the rotation behavior.
Yes, being consistent with standard DRM sub-system is far more important in my opinion.
Best regards, Nicolas
I have only tested this series on sama5d3, but I did check the docs for various other chips (sama5d2, sama5d4, sam9n12, sam9g15, sam9g35 and sam9x35) supported by the driver (relevant to patch 4/4).
Thanks for addressing those problems.
Cheers, Peter
Peter Rosin (4): drm/atmel-hlcdc: rotate planes counterclockwise drm/atmel-hlcdc: do not swap w/h of the crtc when a plane is rotated drm/atmel-hlcdc: fix clipping of planes drm/atmel-hlcdc: do not immediately disable planes, wait for next frame
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 179 +++++++++--------------- 1 file changed, 67 insertions(+), 112 deletions(-)
On Thu, 10 Jan 2019 15:10:28 +0000 Peter Rosin peda@axentia.se wrote:
Hi!
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
I have only tested this series on sama5d3, but I did check the docs for various other chips (sama5d2, sama5d4, sam9n12, sam9g15, sam9g35 and sam9x35) supported by the driver (relevant to patch 4/4).
Cheers, Peter
Peter Rosin (4): drm/atmel-hlcdc: rotate planes counterclockwise drm/atmel-hlcdc: do not swap w/h of the crtc when a plane is rotated drm/atmel-hlcdc: fix clipping of planes
Queued patches 1-3 to drm-misc-next.
drm/atmel-hlcdc: do not immediately disable planes, wait for next frame
Still waiting for Nicolas feedback on this one.
Thanks,
Boris
On 2019-01-27 09:27, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:28 +0000 Peter Rosin peda@axentia.se wrote:
Hi!
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
I have only tested this series on sama5d3, but I did check the docs for various other chips (sama5d2, sama5d4, sam9n12, sam9g15, sam9g35 and sam9x35) supported by the driver (relevant to patch 4/4).
Cheers, Peter
Peter Rosin (4): drm/atmel-hlcdc: rotate planes counterclockwise drm/atmel-hlcdc: do not swap w/h of the crtc when a plane is rotated drm/atmel-hlcdc: fix clipping of planes
Queued patches 1-3 to drm-misc-next.
Great, thanks.
drm/atmel-hlcdc: do not immediately disable planes, wait for next frame
Still waiting for Nicolas feedback on this one.
[Adding back Nicolas, he seems to have gone missing from the list recipients.]
I have done some testing of that patch and for me it's a definite improvement. The test I did was removing a white plane from a white background. Without the patch, the driver will output black where the plane was for the current frame (since the driver does that disc-area thing for the largest hidden part of the background). With the patch, I get no visual glitches when removing a plane.
I use a plane to scroll a text, and if you know what to look for, the black rectangle that flickers by as the plane with the scrolling text is removed is little bit disturbing. Not a significant problem, and maybe only geeks notice it, but still...
Just wanted to say that the resulting "black hole" mentioned in the other thread really does exist and that the patch may make sense beyond the fact that it removes usage of undocumented features.
I have not seen any bad side effects fro the patch, but admittedly my testing was very limited and I did not try to remove the plane while doing other stuff with the driver. So, there might still be reasons for removing planes immediately...
Cheers, Peter
On Thu, 31 Jan 2019 13:13:22 +0000 Peter Rosin peda@axentia.se wrote:
On 2019-01-27 09:27, Boris Brezillon wrote:
On Thu, 10 Jan 2019 15:10:28 +0000 Peter Rosin peda@axentia.se wrote:
Hi!
I found an unfortunate issue while recoding plane handling to use drm_atomic_helper_check_plane_state(). The driver rotates clockwise, which is not correct. I simply fixed it (patch 1/4), but maybe that will cause regressions for unsuspecting users who simply assumed that the clockwise rotation was correct? I don't know what to do about that? Adding an option to get the old broken behavior seems useless, wouldn't it be just as easy to just fix whatever app to rotate the other way instead of adding an option somewhere?
I have only tested this series on sama5d3, but I did check the docs for various other chips (sama5d2, sama5d4, sam9n12, sam9g15, sam9g35 and sam9x35) supported by the driver (relevant to patch 4/4).
Cheers, Peter
Peter Rosin (4): drm/atmel-hlcdc: rotate planes counterclockwise drm/atmel-hlcdc: do not swap w/h of the crtc when a plane is rotated drm/atmel-hlcdc: fix clipping of planes
Queued patches 1-3 to drm-misc-next.
Great, thanks.
drm/atmel-hlcdc: do not immediately disable planes, wait for next frame
Still waiting for Nicolas feedback on this one.
[Adding back Nicolas, he seems to have gone missing from the list recipients.]
I have done some testing of that patch and for me it's a definite improvement. The test I did was removing a white plane from a white background. Without the patch, the driver will output black where the plane was for the current frame (since the driver does that disc-area thing for the largest hidden part of the background). With the patch, I get no visual glitches when removing a plane.
I use a plane to scroll a text, and if you know what to look for, the black rectangle that flickers by as the plane with the scrolling text is removed is little bit disturbing. Not a significant problem, and maybe only geeks notice it, but still...
Just wanted to say that the resulting "black hole" mentioned in the other thread really does exist and that the patch may make sense beyond the fact that it removes usage of undocumented features.
I have not seen any bad side effects fro the patch, but admittedly my testing was very limited and I did not try to remove the plane while doing other stuff with the driver. So, there might still be reasons for removing planes immediately...
Since everything is now synchronized on vsync events thanks to the atomic modeset infra (including plane/crtc disable requests), I think the problem I was trying to fix at the time no longer exists (might re-appear if we start supporting async plane disable requests which is anyway not supported by the core). So I think I'll just apply your patch.
Thanks,
Boris
dri-devel@lists.freedesktop.org
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