[PATCH 00/12] drm/i915/display: conversion to drm_device based logging macros

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Wambui Karuga

30 Jan 2020 30 Jan '20

8:32 a.m.

This series continues the conversion of the printk based logging macros to the new struct drm_device based logging macros in the drm/i915/display folder. This series was achieved using the following coccinelle script that transforms based on the existence of a struct drm_i915_private instance in the function: @@ identifier fn, T; @@

fn(...) { ... struct drm_i915_private *T = ...; <+... ( -DRM_INFO( +drm_info(&T->drm, ...) | -DRM_ERROR( +drm_err(&T->drm, ...) | -DRM_WARN( +drm_warn(&T->drm, ...) | -DRM_DEBUG( +drm_dbg(&T->drm, ...) | -DRM_DEBUG_KMS( +drm_dbg_kms(&T->drm, ...) | -DRM_DEBUG_DRIVER( +drm_dbg(&T->drm, ...) | -DRM_DEBUG_ATOMIC( +drm_dbg_atomic(&T->drm, ...) ) ...+> }

@@ identifier fn, T; @@

fn(...,struct drm_i915_private *T,...) { <+... ( -DRM_INFO( +drm_info(&T->drm, ...) | -DRM_ERROR( +drm_err(&T->drm, ...) | -DRM_WARN( +drm_warn(&T->drm, ...) | -DRM_DEBUG( +drm_dbg(&T->drm, ...) | -DRM_DEBUG_DRIVER( +drm_dbg(&T->drm, ...) | -DRM_DEBUG_KMS( +drm_dbg_kms(&T->drm, ...) | -DRM_DEBUG_ATOMIC( +drm_dbg_atomic(&T->drm, ...) ) ...+> }

Wambui Karuga (12): drm/i915/vlv_dsi_pll: conversion to struct drm_device logging macros. drm/i915/vlv_dsi: conversion to drm_device based logging macros. drm/i915/vga: conversion to drm_device based logging macros. drm/i915/vdsc: convert to struct drm_device based logging macros. drm/i915/tv: automatic conversion to drm_device based logging macros. drm/i915/tc: automatic conversion to drm_device based logging macros. drm/i915/sprite: automatic conversion to drm_device based logging macros drm/i915/sdvo: automatic conversion to drm_device based logging macros. drm/i915/quirks: automatic conversion to drm_device based logging macros. drm/i915/psr: automatic conversion to drm_device based logging macros. drm/i915/pipe_crc: automatic conversion to drm_device based logging macros. drm/i915/panel: automatic conversion to drm_device based logging macros.

drivers/gpu/drm/i915/display/intel_panel.c | 100 ++++++++------ drivers/gpu/drm/i915/display/intel_pipe_crc.c | 7 +- drivers/gpu/drm/i915/display/intel_psr.c | 128 +++++++++++------- drivers/gpu/drm/i915/display/intel_quirks.c | 10 +- drivers/gpu/drm/i915/display/intel_sdvo.c | 29 ++-- drivers/gpu/drm/i915/display/intel_sprite.c | 60 ++++---- drivers/gpu/drm/i915/display/intel_tc.c | 33 +++-- drivers/gpu/drm/i915/display/intel_tv.c | 26 ++-- drivers/gpu/drm/i915/display/intel_vdsc.c | 28 ++-- drivers/gpu/drm/i915/display/intel_vga.c | 7 +- drivers/gpu/drm/i915/display/vlv_dsi.c | 80 ++++++----- drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 47 ++++--- 12 files changed, 322 insertions(+), 233 deletions(-)

-- 2.25.0

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Wambui Karuga

30 Jan 30 Jan

8:32 a.m.

New subject: [PATCH 01/12] drm/i915/vlv_dsi_pll: conversion to struct drm_device logging macros.

Convert the printk based logging macros to the new struct drm_device based logging macros in i915/display/vlv_dsi_pll.c using the following coccinelle script that matches based on the existence of a drm_i915_private device: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were fixed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 47 ++++++++++++---------- 1 file changed, 26 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c index 8a68a86e2dc8..d0a514301575 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c @@ -64,7 +64,7 @@ static int dsi_calc_mnp(struct drm_i915_private *dev_priv,

/* target_dsi_clk is expected in kHz */ if (target_dsi_clk < 300000 || target_dsi_clk > 1150000) { - DRM_ERROR("DSI CLK Out of Range\n"); + drm_err(&dev_priv->drm, "DSI CLK Out of Range\n"); return -ECHRNG; }

@@ -126,7 +126,7 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder,

ret = dsi_calc_mnp(dev_priv, config, dsi_clk); if (ret) { - DRM_DEBUG_KMS("dsi_calc_mnp failed\n"); + drm_dbg_kms(&dev_priv->drm, "dsi_calc_mnp failed\n"); return ret; }

@@ -138,8 +138,8 @@ int vlv_dsi_pll_compute(struct intel_encoder *encoder,

config->dsi_pll.ctrl |= DSI_PLL_VCO_EN;

- DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n", - config->dsi_pll.div, config->dsi_pll.ctrl); + drm_dbg_kms(&dev_priv->drm, "dsi pll div %08x, ctrl %08x\n", + config->dsi_pll.div, config->dsi_pll.ctrl);

return 0; } @@ -149,7 +149,7 @@ void vlv_dsi_pll_enable(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

vlv_cck_get(dev_priv);

@@ -169,12 +169,12 @@ void vlv_dsi_pll_enable(struct intel_encoder *encoder, DSI_PLL_LOCK, 20)) {

vlv_cck_put(dev_priv); - DRM_ERROR("DSI PLL lock failed\n"); + drm_err(&dev_priv->drm, "DSI PLL lock failed\n"); return; } vlv_cck_put(dev_priv);

- DRM_DEBUG_KMS("DSI PLL locked\n"); + drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n"); }

void vlv_dsi_pll_disable(struct intel_encoder *encoder) @@ -182,7 +182,7 @@ void vlv_dsi_pll_disable(struct intel_encoder *encoder) struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); u32 tmp;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

vlv_cck_get(dev_priv);

@@ -218,12 +218,14 @@ bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv) val = intel_de_read(dev_priv, BXT_DSI_PLL_CTL); if (IS_GEMINILAKE(dev_priv)) { if (!(val & BXT_DSIA_16X_MASK)) { - DRM_DEBUG_DRIVER("Invalid PLL divider (%08x)\n", val); + drm_dbg(&dev_priv->drm, + "Invalid PLL divider (%08x)\n", val); enabled = false; } } else { if (!(val & BXT_DSIA_16X_MASK) || !(val & BXT_DSIC_16X_MASK)) { - DRM_DEBUG_DRIVER("Invalid PLL divider (%08x)\n", val); + drm_dbg(&dev_priv->drm, + "Invalid PLL divider (%08x)\n", val); enabled = false; } } @@ -236,7 +238,7 @@ void bxt_dsi_pll_disable(struct intel_encoder *encoder) struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); u32 val;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

val = intel_de_read(dev_priv, BXT_DSI_PLL_ENABLE); val &= ~BXT_DSI_PLL_DO_ENABLE; @@ -248,7 +250,8 @@ void bxt_dsi_pll_disable(struct intel_encoder *encoder) */ if (intel_de_wait_for_clear(dev_priv, BXT_DSI_PLL_ENABLE, BXT_DSI_PLL_LOCKED, 1)) - DRM_ERROR("Timeout waiting for PLL lock deassertion\n"); + drm_err(&dev_priv->drm, + "Timeout waiting for PLL lock deassertion\n"); }

u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, @@ -263,7 +266,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; int i;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

vlv_cck_get(dev_priv); pll_ctl = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL); @@ -292,7 +295,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, p--;

if (!p) { - DRM_ERROR("wrong P1 divisor\n"); + drm_err(&dev_priv->drm, "wrong P1 divisor\n"); return 0; }

@@ -302,7 +305,7 @@ u32 vlv_dsi_get_pclk(struct intel_encoder *encoder, }

if (i == ARRAY_SIZE(lfsr_converts)) { - DRM_ERROR("wrong m_seed programmed\n"); + drm_err(&dev_priv->drm, "wrong m_seed programmed\n"); return 0; }

@@ -333,7 +336,7 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,

pclk = DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp);

- DRM_DEBUG_DRIVER("Calculated pclk=%u\n", pclk); + drm_dbg(&dev_priv->drm, "Calculated pclk=%u\n", pclk); return pclk; }

@@ -479,10 +482,11 @@ int bxt_dsi_pll_compute(struct intel_encoder *encoder, }

if (dsi_ratio < dsi_ratio_min || dsi_ratio > dsi_ratio_max) { - DRM_ERROR("Cant get a suitable ratio from DSI PLL ratios\n"); + drm_err(&dev_priv->drm, + "Cant get a suitable ratio from DSI PLL ratios\n"); return -ECHRNG; } else - DRM_DEBUG_KMS("DSI PLL calculation is Done!!\n"); + drm_dbg_kms(&dev_priv->drm, "DSI PLL calculation is Done!!\n");

/* * Program DSI ratio and Select MIPIC and MIPIA PLL output as 8x @@ -508,7 +512,7 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder, enum port port; u32 val;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

/* Configure PLL vales */ intel_de_write(dev_priv, BXT_DSI_PLL_CTL, config->dsi_pll.ctrl); @@ -530,11 +534,12 @@ void bxt_dsi_pll_enable(struct intel_encoder *encoder, /* Timeout and fail if PLL not locked */ if (intel_de_wait_for_set(dev_priv, BXT_DSI_PLL_ENABLE, BXT_DSI_PLL_LOCKED, 1)) { - DRM_ERROR("Timed out waiting for DSI PLL to lock\n"); + drm_err(&dev_priv->drm, + "Timed out waiting for DSI PLL to lock\n"); return; }

- DRM_DEBUG_KMS("DSI PLL locked\n"); + drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n"); }

void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port)

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 02/12] drm/i915/vlv_dsi: conversion to drm_device based logging macros.

Converts the printk based logging macros to the struct drm_device based logging macros in i915/display/vlv_dsi.c. This was done using the following coccinelle script that transforms based on the existence of a drm_i915_private device pointer. @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were addressed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/vlv_dsi.c | 80 +++++++++++++++----------- 1 file changed, 46 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c index a101a4513c65..279d426e89da 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c @@ -85,7 +85,7 @@ void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port)

if (intel_de_wait_for_set(dev_priv, MIPI_GEN_FIFO_STAT(port), mask, 100)) - DRM_ERROR("DPI FIFOs are not empty\n"); + drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); }

static void write_data(struct drm_i915_private *dev_priv, @@ -154,7 +154,8 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host, if (packet.payload_length) { if (intel_de_wait_for_clear(dev_priv, MIPI_GEN_FIFO_STAT(port), data_mask, 50)) - DRM_ERROR("Timeout waiting for HS/LP DATA FIFO !full\n"); + drm_err(&dev_priv->drm, + "Timeout waiting for HS/LP DATA FIFO !full\n");

write_data(dev_priv, data_reg, packet.payload, packet.payload_length); @@ -167,7 +168,8 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,

if (intel_de_wait_for_clear(dev_priv, MIPI_GEN_FIFO_STAT(port), ctrl_mask, 50)) { - DRM_ERROR("Timeout waiting for HS/LP CTRL FIFO !full\n"); + drm_err(&dev_priv->drm, + "Timeout waiting for HS/LP CTRL FIFO !full\n"); }

intel_de_write(dev_priv, ctrl_reg, @@ -178,7 +180,8 @@ static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host, data_mask = GEN_READ_DATA_AVAIL; if (intel_de_wait_for_set(dev_priv, MIPI_INTR_STAT(port), data_mask, 50)) - DRM_ERROR("Timeout waiting for read data.\n"); + drm_err(&dev_priv->drm, + "Timeout waiting for read data.\n");

read_data(dev_priv, data_reg, msg->rx_buf, msg->rx_len); } @@ -229,13 +232,15 @@ static int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs,

/* XXX: old code skips write if control unchanged */ if (cmd == intel_de_read(dev_priv, MIPI_DPI_CONTROL(port))) - DRM_DEBUG_KMS("Same special packet %02x twice in a row.\n", cmd); + drm_dbg_kms(&dev_priv->drm, + "Same special packet %02x twice in a row.\n", cmd);

intel_de_write(dev_priv, MIPI_DPI_CONTROL(port), cmd);

mask = SPL_PKT_SENT_INTERRUPT; if (intel_de_wait_for_set(dev_priv, MIPI_INTR_STAT(port), mask, 100)) - DRM_ERROR("Video mode command 0x%08x send failed.\n", cmd); + drm_err(&dev_priv->drm, + "Video mode command 0x%08x send failed.\n", cmd);

return 0; } @@ -267,7 +272,7 @@ static int intel_dsi_compute_config(struct intel_encoder *encoder, struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; int ret;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n"); pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

if (fixed_mode) { @@ -354,7 +359,7 @@ static bool glk_dsi_enable_io(struct intel_encoder *encoder) for_each_dsi_port(port, intel_dsi->ports) { if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port), GLK_MIPIIO_PORT_POWERED, 20)) - DRM_ERROR("MIPIO port is powergated\n"); + drm_err(&dev_priv->drm, "MIPIO port is powergated\n"); }

/* Check for cold boot scenario */ @@ -377,7 +382,7 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder) for_each_dsi_port(port, intel_dsi->ports) { if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port), GLK_PHY_STATUS_PORT_READY, 20)) - DRM_ERROR("PHY is not ON\n"); + drm_err(&dev_priv->drm, "PHY is not ON\n"); }

/* Get IO out of reset */ @@ -403,7 +408,7 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder) /* Wait for ULPS active */ if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port), GLK_ULPS_NOT_ACTIVE, 20)) - DRM_ERROR("ULPS not active\n"); + drm_err(&dev_priv->drm, "ULPS not active\n");

/* Exit ULPS */ val = intel_de_read(dev_priv, MIPI_DEVICE_READY(port)); @@ -427,14 +432,16 @@ static void glk_dsi_device_ready(struct intel_encoder *encoder) for_each_dsi_port(port, intel_dsi->ports) { if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port), GLK_DATA_LANE_STOP_STATE, 20)) - DRM_ERROR("Date lane not in STOP state\n"); + drm_err(&dev_priv->drm, + "Date lane not in STOP state\n"); }

/* Wait for AFE LATCH */ for_each_dsi_port(port, intel_dsi->ports) { if (intel_de_wait_for_set(dev_priv, BXT_MIPI_PORT_CTRL(port), AFE_LATCHOUT, 20)) - DRM_ERROR("D-PHY not entering LP-11 state\n"); + drm_err(&dev_priv->drm, + "D-PHY not entering LP-11 state\n"); } }

@@ -445,7 +452,7 @@ static void bxt_dsi_device_ready(struct intel_encoder *encoder) enum port port; u32 val;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

/* Enable MIPI PHY transparent latch */ for_each_dsi_port(port, intel_dsi->ports) { @@ -473,7 +480,7 @@ static void vlv_dsi_device_ready(struct intel_encoder *encoder) enum port port; u32 val;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

vlv_flisdsi_get(dev_priv); /* program rcomp for compliance, reduce from 50 ohms to 45 ohms @@ -540,14 +547,15 @@ static void glk_dsi_enter_low_power_mode(struct intel_encoder *encoder) for_each_dsi_port(port, intel_dsi->ports) { if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port), GLK_PHY_STATUS_PORT_READY, 20)) - DRM_ERROR("PHY is not turning OFF\n"); + drm_err(&dev_priv->drm, "PHY is not turning OFF\n"); }

/* Wait for Pwr ACK bit to unset */ for_each_dsi_port(port, intel_dsi->ports) { if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port), GLK_MIPIIO_PORT_POWERED, 20)) - DRM_ERROR("MIPI IO Port is not powergated\n"); + drm_err(&dev_priv->drm, + "MIPI IO Port is not powergated\n"); } }

@@ -567,7 +575,7 @@ static void glk_dsi_disable_mipi_io(struct intel_encoder *encoder) for_each_dsi_port(port, intel_dsi->ports) { if (intel_de_wait_for_clear(dev_priv, MIPI_CTRL(port), GLK_PHY_STATUS_PORT_READY, 20)) - DRM_ERROR("PHY is not turning OFF\n"); + drm_err(&dev_priv->drm, "PHY is not turning OFF\n"); }

/* Clear MIPI mode */ @@ -590,7 +598,7 @@ static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder) struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); enum port port;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n"); for_each_dsi_port(port, intel_dsi->ports) { /* Common bit for both MIPI Port A & MIPI Port C on VLV/CHV */ i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ? @@ -616,7 +624,7 @@ static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder) if ((IS_GEN9_LP(dev_priv) || port == PORT_A) && intel_de_wait_for_clear(dev_priv, port_ctrl, AFE_LATCHOUT, 30)) - DRM_ERROR("DSI LP not going Low\n"); + drm_err(&dev_priv->drm, "DSI LP not going Low\n");

/* Disable MIPI PHY transparent latch */ val = intel_de_read(dev_priv, port_ctrl); @@ -764,7 +772,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, u32 val; bool glk_cold_boot = false;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);

@@ -898,7 +906,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder, enum port port; u32 val;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

if (IS_GEN9_LP(dev_priv)) { intel_crtc_vblank_off(old_crtc_state); @@ -973,7 +981,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, enum port port; bool active = false;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

wakeref = intel_display_power_get_if_enabled(dev_priv, encoder->power_domain); @@ -1208,7 +1216,7 @@ static void intel_dsi_get_config(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); u32 pclk; - DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);

@@ -1342,7 +1350,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder, u32 val, tmp; u16 mode_hdisplay;

- DRM_DEBUG_KMS("pipe %c\n", pipe_name(intel_crtc->pipe)); + drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(intel_crtc->pipe));

mode_hdisplay = adjusted_mode->crtc_hdisplay;

@@ -1717,7 +1725,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi) prepare_cnt = DIV_ROUND_UP(ths_prepare_ns * ui_den, ui_num * mul);

if (prepare_cnt > PREPARE_CNT_MAX) { - DRM_DEBUG_KMS("prepare count too high %u\n", prepare_cnt); + drm_dbg_kms(&dev_priv->drm, "prepare count too high %u\n", + prepare_cnt); prepare_cnt = PREPARE_CNT_MAX; }

@@ -1737,7 +1746,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi) exit_zero_cnt += 1;

if (exit_zero_cnt > EXIT_ZERO_CNT_MAX) { - DRM_DEBUG_KMS("exit zero count too high %u\n", exit_zero_cnt); + drm_dbg_kms(&dev_priv->drm, "exit zero count too high %u\n", + exit_zero_cnt); exit_zero_cnt = EXIT_ZERO_CNT_MAX; }

@@ -1747,7 +1757,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi) * ui_den, ui_num * mul);

if (clk_zero_cnt > CLK_ZERO_CNT_MAX) { - DRM_DEBUG_KMS("clock zero count too high %u\n", clk_zero_cnt); + drm_dbg_kms(&dev_priv->drm, "clock zero count too high %u\n", + clk_zero_cnt); clk_zero_cnt = CLK_ZERO_CNT_MAX; }

@@ -1756,7 +1767,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi) trail_cnt = DIV_ROUND_UP(tclk_trail_ns * ui_den, ui_num * mul);

if (trail_cnt > TRAIL_CNT_MAX) { - DRM_DEBUG_KMS("trail count too high %u\n", trail_cnt); + drm_dbg_kms(&dev_priv->drm, "trail count too high %u\n", + trail_cnt); trail_cnt = TRAIL_CNT_MAX; }

@@ -1831,7 +1843,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) enum port port; enum pipe pipe;

- DRM_DEBUG_KMS("\n"); + drm_dbg_kms(&dev_priv->drm, "\n");

/* There is no detection method for MIPI so rely on VBT */ if (!intel_bios_is_dsi_present(dev_priv, &port)) @@ -1908,18 +1920,18 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) }

if (!intel_dsi_vbt_init(intel_dsi, MIPI_DSI_GENERIC_PANEL_ID)) { - DRM_DEBUG_KMS("no device found\n"); + drm_dbg_kms(&dev_priv->drm, "no device found\n"); goto err; }

/* Use clock read-back from current hw-state for fastboot */ current_mode = intel_encoder_current_mode(intel_encoder); if (current_mode) { - DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n", - intel_dsi->pclk, current_mode->clock); + drm_dbg_kms(&dev_priv->drm, "Calculated pclk %d GOP %d\n", + intel_dsi->pclk, current_mode->clock); if (intel_fuzzy_clock_check(intel_dsi->pclk, current_mode->clock)) { - DRM_DEBUG_KMS("Using GOP pclk\n"); + drm_dbg_kms(&dev_priv->drm, "Using GOP pclk\n"); intel_dsi->pclk = current_mode->clock; }

@@ -1947,7 +1959,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) mutex_unlock(&dev->mode_config.mutex);

if (!fixed_mode) { - DRM_DEBUG_KMS("no fixed mode\n"); + drm_dbg_kms(&dev_priv->drm, "no fixed mode\n"); goto err_cleanup_connector; }

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 03/12] drm/i915/vga: conversion to drm_device based logging macros.

Converts the printk based logging macros to the struct drm_device based logging macros in i915/display/intel_vga.c using the following coccinelle script that matches based on the existence of a drm_i915_private device pointer: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were addressed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_vga.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 7eb23f623661..be333699c515 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -46,7 +46,8 @@ void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv) i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);

if (!(intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)) { - DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n"); + drm_dbg_kms(&dev_priv->drm, + "Something enabled VGA plane, disabling it\n"); intel_vga_disable(dev_priv); } } @@ -99,7 +100,7 @@ intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode) u16 gmch_ctrl;

if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) { - DRM_ERROR("failed to read control word\n"); + drm_err(&i915->drm, "failed to read control word\n"); return -EIO; }

@@ -112,7 +113,7 @@ intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode) gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;

if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) { - DRM_ERROR("failed to write control word\n"); + drm_err(&i915->drm, "failed to write control word\n"); return -EIO; }

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 04/12] drm/i915/vdsc: convert to struct drm_device based logging macros.

Converts uses of the printk based drm logging macros to the new struct drm_device based logging macros in i915/display/intel_vdsc.c. This was done using the following coccinelle script that transforms based on the existence of a struct drm_i915_private device: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were fixed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_vdsc.c | 28 +++++++++++------------ 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index a81abadb067f..5571f0442dd0 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -518,7 +518,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, pps_val |= DSC_422_ENABLE; if (vdsc_cfg->vbr_enable) pps_val |= DSC_VBR_ENABLE; - DRM_INFO("PPS0 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS0 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_0, pps_val); @@ -542,7 +542,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, /* Populate PICTURE_PARAMETER_SET_1 registers */ pps_val = 0; pps_val |= DSC_BPP(vdsc_cfg->bits_per_pixel); - DRM_INFO("PPS1 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS1 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_1, pps_val); @@ -567,7 +567,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, pps_val = 0; pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) | DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances); - DRM_INFO("PPS2 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_2, pps_val); @@ -592,7 +592,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, pps_val = 0; pps_val |= DSC_SLICE_HEIGHT(vdsc_cfg->slice_height) | DSC_SLICE_WIDTH(vdsc_cfg->slice_width); - DRM_INFO("PPS3 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_3, pps_val); @@ -617,7 +617,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, pps_val = 0; pps_val |= DSC_INITIAL_XMIT_DELAY(vdsc_cfg->initial_xmit_delay) | DSC_INITIAL_DEC_DELAY(vdsc_cfg->initial_dec_delay); - DRM_INFO("PPS4 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS4 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_4, pps_val); @@ -642,7 +642,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, pps_val = 0; pps_val |= DSC_SCALE_INC_INT(vdsc_cfg->scale_increment_interval) | DSC_SCALE_DEC_INT(vdsc_cfg->scale_decrement_interval); - DRM_INFO("PPS5 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS5 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_5, pps_val); @@ -669,7 +669,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, DSC_FIRST_LINE_BPG_OFFSET(vdsc_cfg->first_line_bpg_offset) | DSC_FLATNESS_MIN_QP(vdsc_cfg->flatness_min_qp) | DSC_FLATNESS_MAX_QP(vdsc_cfg->flatness_max_qp); - DRM_INFO("PPS6 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS6 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_6, pps_val); @@ -694,7 +694,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, pps_val = 0; pps_val |= DSC_SLICE_BPG_OFFSET(vdsc_cfg->slice_bpg_offset) | DSC_NFL_BPG_OFFSET(vdsc_cfg->nfl_bpg_offset); - DRM_INFO("PPS7 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS7 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_7, pps_val); @@ -719,7 +719,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, pps_val = 0; pps_val |= DSC_FINAL_OFFSET(vdsc_cfg->final_offset) | DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset); - DRM_INFO("PPS8 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS8 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_8, pps_val); @@ -744,7 +744,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, pps_val = 0; pps_val |= DSC_RC_MODEL_SIZE(DSC_RC_MODEL_SIZE_CONST) | DSC_RC_EDGE_FACTOR(DSC_RC_EDGE_FACTOR_CONST); - DRM_INFO("PPS9 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS9 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_9, pps_val); @@ -771,7 +771,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, DSC_RC_QUANT_INC_LIMIT1(vdsc_cfg->rc_quant_incr_limit1) | DSC_RC_TARGET_OFF_HIGH(DSC_RC_TGT_OFFSET_HI_CONST) | DSC_RC_TARGET_OFF_LOW(DSC_RC_TGT_OFFSET_LO_CONST); - DRM_INFO("PPS10 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS10 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_10, pps_val); @@ -799,7 +799,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, vdsc_cfg->slice_width) | DSC_SLICE_ROW_PER_FRAME(vdsc_cfg->pic_height / vdsc_cfg->slice_height); - DRM_INFO("PPS16 = 0x%08x\n", pps_val); + drm_info(&dev_priv->drm, "PPS16 = 0x%08x\n", pps_val); if (!is_pipe_dsc(crtc_state)) { intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_16, pps_val); @@ -826,7 +826,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, rc_buf_thresh_dword[i / 4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] << BITS_PER_BYTE * (i % 4)); - DRM_INFO(" RC_BUF_THRESH%d = 0x%08x\n", i, + drm_info(&dev_priv->drm, " RC_BUF_THRESH%d = 0x%08x\n", i, rc_buf_thresh_dword[i / 4]); } if (!is_pipe_dsc(crtc_state)) { @@ -883,7 +883,7 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder, RC_MAX_QP_SHIFT) | (vdsc_cfg->rc_range_params[i].range_min_qp << RC_MIN_QP_SHIFT)) << 16 * (i % 2)); - DRM_INFO(" RC_RANGE_PARAM_%d = 0x%08x\n", i, + drm_info(&dev_priv->drm, " RC_RANGE_PARAM_%d = 0x%08x\n", i, rc_range_params_dword[i / 2]); } if (!is_pipe_dsc(crtc_state)) {

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 05/12] drm/i915/tv: automatic conversion to drm_device based logging macros.

Converts most uses of the printk based logging macros to the struct drm_device based logging macros in i915/display/intel_tv.c using the following coccinelle script that matches based on the existence of a drm_i915_private device pointer: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were fixed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_tv.c | 26 ++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c index fa155a028e2b..4f81ee26b7ab 100644 --- a/drivers/gpu/drm/i915/display/intel_tv.c +++ b/drivers/gpu/drm/i915/display/intel_tv.c @@ -1146,7 +1146,7 @@ intel_tv_get_config(struct intel_encoder *encoder,

intel_tv_mode_to_mode(&mode, &tv_mode);

- DRM_DEBUG_KMS("TV mode:\n"); + drm_dbg_kms(&dev_priv->drm, "TV mode:\n"); drm_mode_debug_printmodeline(&mode);

intel_tv_scale_mode_horiz(&mode, hdisplay, @@ -1202,7 +1202,7 @@ intel_tv_compute_config(struct intel_encoder *encoder,

pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

- DRM_DEBUG_KMS("forcing bpc to 8 for TV\n"); + drm_dbg_kms(&dev_priv->drm, "forcing bpc to 8 for TV\n"); pipe_config->pipe_bpp = 8*3;

pipe_config->port_clock = tv_mode->clock; @@ -1217,7 +1217,8 @@ intel_tv_compute_config(struct intel_encoder *encoder, extra = adjusted_mode->crtc_vdisplay - vdisplay;

if (extra < 0) { - DRM_DEBUG_KMS("No vertical scaling for >1024 pixel wide modes\n"); + drm_dbg_kms(&dev_priv->drm, + "No vertical scaling for >1024 pixel wide modes\n"); return -EINVAL; }

@@ -1250,7 +1251,7 @@ intel_tv_compute_config(struct intel_encoder *encoder, tv_conn_state->bypass_vfilter = false; }

- DRM_DEBUG_KMS("TV mode:\n"); + drm_dbg_kms(&dev_priv->drm, "TV mode:\n"); drm_mode_debug_printmodeline(adjusted_mode);

/* @@ -1622,7 +1623,7 @@ intel_tv_detect_type(struct intel_tv *intel_tv,

type = -1; tv_dac = intel_de_read(dev_priv, TV_DAC); - DRM_DEBUG_KMS("TV detected: %x, %x\n", tv_ctl, tv_dac); + drm_dbg_kms(&dev_priv->drm, "TV detected: %x, %x\n", tv_ctl, tv_dac); /* * A B C * 0 1 1 Composite @@ -1630,16 +1631,19 @@ intel_tv_detect_type(struct intel_tv *intel_tv, * 0 0 0 Component */ if ((tv_dac & TVDAC_SENSE_MASK) == (TVDAC_B_SENSE | TVDAC_C_SENSE)) { - DRM_DEBUG_KMS("Detected Composite TV connection\n"); + drm_dbg_kms(&dev_priv->drm, + "Detected Composite TV connection\n"); type = DRM_MODE_CONNECTOR_Composite; } else if ((tv_dac & (TVDAC_A_SENSE|TVDAC_B_SENSE)) == TVDAC_A_SENSE) { - DRM_DEBUG_KMS("Detected S-Video TV connection\n"); + drm_dbg_kms(&dev_priv->drm, + "Detected S-Video TV connection\n"); type = DRM_MODE_CONNECTOR_SVIDEO; } else if ((tv_dac & TVDAC_SENSE_MASK) == 0) { - DRM_DEBUG_KMS("Detected Component TV connection\n"); + drm_dbg_kms(&dev_priv->drm, + "Detected Component TV connection\n"); type = DRM_MODE_CONNECTOR_Component; } else { - DRM_DEBUG_KMS("Unrecognised TV connection\n"); + drm_dbg_kms(&dev_priv->drm, "Unrecognised TV connection\n"); type = -1; }

@@ -1800,7 +1804,7 @@ intel_tv_get_modes(struct drm_connector *connector) */ intel_tv_mode_to_mode(mode, tv_mode); if (count == 0) { - DRM_DEBUG_KMS("TV mode:\n"); + drm_dbg_kms(&dev_priv->drm, "TV mode:\n"); drm_mode_debug_printmodeline(mode); } intel_tv_scale_mode_horiz(mode, input->w, 0, 0); @@ -1880,7 +1884,7 @@ intel_tv_init(struct drm_i915_private *dev_priv) return;

if (!intel_bios_is_tv_present(dev_priv)) { - DRM_DEBUG_KMS("Integrated TV is not present.\n"); + drm_dbg_kms(&dev_priv->drm, "Integrated TV is not present.\n"); return; }

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 06/12] drm/i915/tc: automatic conversion to drm_device based logging macros.

Converts most uses of the printk based logging macros to the struct drm_device based logging macros in i915/display/intel_tc.c using the following coccinelle script that matches based on the existence of a struct drm_i915_private device: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were addressed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_tc.c | 33 ++++++++++++++----------- 1 file changed, 19 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 7773169b7331..01508e447836 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -181,8 +181,9 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port) PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));

if (val == 0xffffffff) { - DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, nothing connected\n", - dig_port->tc_port_name); + drm_dbg_kms(&i915->drm, + "Port %s: PHY in TCCOLD, nothing connected\n", + dig_port->tc_port_name); return mask; }

@@ -210,8 +211,9 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port) val = intel_uncore_read(uncore, PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia)); if (val == 0xffffffff) { - DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, assuming not complete\n", - dig_port->tc_port_name); + drm_dbg_kms(&i915->drm, + "Port %s: PHY in TCCOLD, assuming not complete\n", + dig_port->tc_port_name); return false; }

@@ -228,8 +230,9 @@ static bool icl_tc_phy_set_safe_mode(struct intel_digital_port *dig_port, val = intel_uncore_read(uncore, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia)); if (val == 0xffffffff) { - DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, can't set safe-mode to %s\n", - dig_port->tc_port_name, + drm_dbg_kms(&i915->drm, + "Port %s: PHY in TCCOLD, can't set safe-mode to %s\n", + dig_port->tc_port_name, enableddisabled(enable));

return false; @@ -243,8 +246,9 @@ static bool icl_tc_phy_set_safe_mode(struct intel_digital_port *dig_port, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);

if (enable && wait_for(!icl_tc_phy_status_complete(dig_port), 10)) - DRM_DEBUG_KMS("Port %s: PHY complete clear timed out\n", - dig_port->tc_port_name); + drm_dbg_kms(&i915->drm, + "Port %s: PHY complete clear timed out\n", + dig_port->tc_port_name);

return true; } @@ -258,8 +262,9 @@ static bool icl_tc_phy_is_in_safe_mode(struct intel_digital_port *dig_port) val = intel_uncore_read(uncore, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia)); if (val == 0xffffffff) { - DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, assume safe mode\n", - dig_port->tc_port_name); + drm_dbg_kms(&i915->drm, + "Port %s: PHY in TCCOLD, assume safe mode\n", + dig_port->tc_port_name); return true; }

@@ -415,10 +420,10 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port, icl_tc_phy_disconnect(dig_port); icl_tc_phy_connect(dig_port, required_lanes);

- DRM_DEBUG_KMS("Port %s: TC port mode reset (%s -> %s)\n", - dig_port->tc_port_name, - tc_port_mode_name(old_tc_mode), - tc_port_mode_name(dig_port->tc_mode)); + drm_dbg_kms(&i915->drm, "Port %s: TC port mode reset (%s -> %s)\n", + dig_port->tc_port_name, + tc_port_mode_name(old_tc_mode), + tc_port_mode_name(dig_port->tc_mode)); }

static void

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 08/12] drm/i915/sdvo: automatic conversion to drm_device based logging macros.

Converts instances of the printk based drm logging macros to the new struct drm_device based logging macros in i915/display/intel_sdvo.c This was done automatically using the following coccinelle script that matches based on the existence of a drm_i915_private device pointer: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were fixed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_sdvo.c | 29 +++++++++++++---------- 1 file changed, 17 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c index 225b6402718e..4ddb81428cab 100644 --- a/drivers/gpu/drm/i915/display/intel_sdvo.c +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c @@ -1477,7 +1477,8 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, else intel_sdvo_get_dtd_from_mode(&output_dtd, mode); if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) - DRM_INFO("Setting output timings on %s failed\n", + drm_info(&dev_priv->drm, + "Setting output timings on %s failed\n", SDVO_NAME(intel_sdvo));

/* Set the input timing to the screen. Assume always input 0. */ @@ -1501,7 +1502,8 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector)) input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) - DRM_INFO("Setting input timings on %s failed\n", + drm_info(&dev_priv->drm, + "Setting input timings on %s failed\n", SDVO_NAME(intel_sdvo));

switch (crtc_state->pixel_multiplier) { @@ -1622,7 +1624,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder, * Some sdvo encoders are not spec compliant and don't * implement the mandatory get_timings function. */ - DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); + drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n"); pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; } else { if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) @@ -1813,8 +1815,9 @@ static void intel_enable_sdvo(struct intel_encoder *encoder, * a given it the status is a success, we succeeded. */ if (success && !input1) { - DRM_DEBUG_KMS("First %s output reported failure to " - "sync\n", SDVO_NAME(intel_sdvo)); + drm_dbg_kms(&dev_priv->drm, + "First %s output reported failure to " + "sync\n", SDVO_NAME(intel_sdvo)); }

if (0) @@ -2226,8 +2229,8 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) struct drm_i915_private *dev_priv = to_i915(connector->dev); struct drm_display_mode *newmode;

- DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", - connector->base.id, connector->name); + drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n", + connector->base.id, connector->name);

/* * Fetch modes from VBT. For SDVO prefer the VBT mode since some @@ -3276,8 +3279,9 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv, u8 byte;

if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { - DRM_DEBUG_KMS("No SDVO device found on %s\n", - SDVO_NAME(intel_sdvo)); + drm_dbg_kms(&dev_priv->drm, + "No SDVO device found on %s\n", + SDVO_NAME(intel_sdvo)); goto err; } } @@ -3300,8 +3304,9 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,

if (intel_sdvo_output_setup(intel_sdvo, intel_sdvo->caps.output_flags) != true) { - DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", - SDVO_NAME(intel_sdvo)); + drm_dbg_kms(&dev_priv->drm, + "SDVO output failed to setup on %s\n", + SDVO_NAME(intel_sdvo)); /* Output_setup can leave behind connectors! */ goto err_output; } @@ -3338,7 +3343,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv, &intel_sdvo->pixel_clock_max)) goto err_output;

- DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " + drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, " "clock range %dMHz - %dMHz, " "input 1: %c, input 2: %c, " "output 1: %c, output 2: %c\n",

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 09/12] drm/i915/quirks: automatic conversion to drm_device based logging macros.

Converts instances of the printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_quirks.c using the following coccinelle script that transforms based on the existence of a struct drm_i915_private device: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were fixed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_quirks.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c b/drivers/gpu/drm/i915/display/intel_quirks.c index 399b1542509f..9d235d270dac 100644 --- a/drivers/gpu/drm/i915/display/intel_quirks.c +++ b/drivers/gpu/drm/i915/display/intel_quirks.c @@ -14,7 +14,7 @@ static void quirk_ssc_force_disable(struct drm_i915_private *i915) { i915->quirks |= QUIRK_LVDS_SSC_DISABLE; - DRM_INFO("applying lvds SSC disable quirk\n"); + drm_info(&i915->drm, "applying lvds SSC disable quirk\n"); }

/* @@ -24,14 +24,14 @@ static void quirk_ssc_force_disable(struct drm_i915_private *i915) static void quirk_invert_brightness(struct drm_i915_private *i915) { i915->quirks |= QUIRK_INVERT_BRIGHTNESS; - DRM_INFO("applying inverted panel brightness quirk\n"); + drm_info(&i915->drm, "applying inverted panel brightness quirk\n"); }

/* Some VBT's incorrectly indicate no backlight is present */ static void quirk_backlight_present(struct drm_i915_private *i915) { i915->quirks |= QUIRK_BACKLIGHT_PRESENT; - DRM_INFO("applying backlight present quirk\n"); + drm_info(&i915->drm, "applying backlight present quirk\n"); }

/* Toshiba Satellite P50-C-18C requires T12 delay to be min 800ms @@ -40,7 +40,7 @@ static void quirk_backlight_present(struct drm_i915_private *i915) static void quirk_increase_t12_delay(struct drm_i915_private *i915) { i915->quirks |= QUIRK_INCREASE_T12_DELAY; - DRM_INFO("Applying T12 delay quirk\n"); + drm_info(&i915->drm, "Applying T12 delay quirk\n"); }

/* @@ -50,7 +50,7 @@ static void quirk_increase_t12_delay(struct drm_i915_private *i915) static void quirk_increase_ddi_disabled_time(struct drm_i915_private *i915) { i915->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME; - DRM_INFO("Applying Increase DDI Disabled quirk\n"); + drm_info(&i915->drm, "Applying Increase DDI Disabled quirk\n"); }

struct intel_quirk {

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 10/12] drm/i915/psr: automatic conversion to drm_device based logging macros.

Converts instances of the printk based logging macros to the struct drm_device based logging macros in i915/display/intel_psr.c using the following coccinelle script that transforms based on the existence of a drm_i915_private device pointer: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were addressed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_psr.c | 128 ++++++++++++++--------- 1 file changed, 77 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e41ed962aa80..97d22448c6a7 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -174,14 +174,16 @@ void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir)

if (psr_iir & EDP_PSR_PRE_ENTRY(trans_shift)) { dev_priv->psr.last_entry_attempt = time_ns; - DRM_DEBUG_KMS("[transcoder %s] PSR entry attempt in 2 vblanks\n", - transcoder_name(cpu_transcoder)); + drm_dbg_kms(&dev_priv->drm, + "[transcoder %s] PSR entry attempt in 2 vblanks\n", + transcoder_name(cpu_transcoder)); }

if (psr_iir & EDP_PSR_POST_EXIT(trans_shift)) { dev_priv->psr.last_exit = time_ns; - DRM_DEBUG_KMS("[transcoder %s] PSR exit completed\n", - transcoder_name(cpu_transcoder)); + drm_dbg_kms(&dev_priv->drm, + "[transcoder %s] PSR exit completed\n", + transcoder_name(cpu_transcoder));

if (INTEL_GEN(dev_priv) >= 9) { u32 val = intel_de_read(dev_priv, @@ -197,7 +199,7 @@ void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir) if (psr_iir & EDP_PSR_ERROR(trans_shift)) { u32 val;

- DRM_WARN("[transcoder %s] PSR aux error\n", + drm_warn(&dev_priv->drm, "[transcoder %s] PSR aux error\n", transcoder_name(cpu_transcoder));

dev_priv->psr.irq_aux_error = true; @@ -272,7 +274,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) to_i915(dp_to_dig_port(intel_dp)->base.base.dev);

if (dev_priv->psr.dp) { - DRM_WARN("More than one eDP panel found, PSR support should be extended\n"); + drm_warn(&dev_priv->drm, + "More than one eDP panel found, PSR support should be extended\n"); return; }

@@ -281,16 +284,18 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)

if (!intel_dp->psr_dpcd[0]) return; - DRM_DEBUG_KMS("eDP panel supports PSR version %x\n", - intel_dp->psr_dpcd[0]); + drm_dbg_kms(&dev_priv->drm, "eDP panel supports PSR version %x\n", + intel_dp->psr_dpcd[0]);

if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) { - DRM_DEBUG_KMS("PSR support not currently available for this panel\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR support not currently available for this panel\n"); return; }

if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) { - DRM_DEBUG_KMS("Panel lacks power state control, PSR cannot be enabled\n"); + drm_dbg_kms(&dev_priv->drm, + "Panel lacks power state control, PSR cannot be enabled\n"); return; }

@@ -318,8 +323,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) * GTC first. */ dev_priv->psr.sink_psr2_support = y_req && alpm; - DRM_DEBUG_KMS("PSR2 %ssupported\n", - dev_priv->psr.sink_psr2_support ? "" : "not "); + drm_dbg_kms(&dev_priv->drm, "PSR2 %ssupported\n", + dev_priv->psr.sink_psr2_support ? "" : "not ");

if (dev_priv->psr.sink_psr2_support) { dev_priv->psr.colorimetry_support = @@ -588,7 +593,7 @@ static void tgl_dc5_idle_thread(struct work_struct *work) if (delayed_work_pending(&dev_priv->psr.idle_work)) goto unlock;

- DRM_DEBUG_KMS("DC5/6 idle thread\n"); + drm_dbg_kms(&dev_priv->drm, "DC5/6 idle thread\n"); tgl_psr2_disable_dc3co(dev_priv); unlock: mutex_unlock(&dev_priv->psr.lock); @@ -646,8 +651,9 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false;

if (!transcoder_has_psr2(dev_priv, crtc_state->cpu_transcoder)) { - DRM_DEBUG_KMS("PSR2 not supported in transcoder %s\n", - transcoder_name(crtc_state->cpu_transcoder)); + drm_dbg_kms(&dev_priv->drm, + "PSR2 not supported in transcoder %s\n", + transcoder_name(crtc_state->cpu_transcoder)); return false; }

@@ -657,7 +663,8 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, * over PSR2. */ if (crtc_state->dsc.compression_enable) { - DRM_DEBUG_KMS("PSR2 cannot be enabled since DSC is enabled\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR2 cannot be enabled since DSC is enabled\n"); return false; }

@@ -676,15 +683,17 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, }

if (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v) { - DRM_DEBUG_KMS("PSR2 not enabled, resolution %dx%d > max supported %dx%d\n", - crtc_hdisplay, crtc_vdisplay, - psr_max_h, psr_max_v); + drm_dbg_kms(&dev_priv->drm, + "PSR2 not enabled, resolution %dx%d > max supported %dx%d\n", + crtc_hdisplay, crtc_vdisplay, + psr_max_h, psr_max_v); return false; }

if (crtc_state->pipe_bpp > max_bpp) { - DRM_DEBUG_KMS("PSR2 not enabled, pipe bpp %d > max supported %d\n", - crtc_state->pipe_bpp, max_bpp); + drm_dbg_kms(&dev_priv->drm, + "PSR2 not enabled, pipe bpp %d > max supported %d\n", + crtc_state->pipe_bpp, max_bpp); return false; }

@@ -695,13 +704,15 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, * x granularity. */ if (crtc_hdisplay % dev_priv->psr.su_x_granularity) { - DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not multiple of %d\n", - crtc_hdisplay, dev_priv->psr.su_x_granularity); + drm_dbg_kms(&dev_priv->drm, + "PSR2 not enabled, hdisplay(%d) not multiple of %d\n", + crtc_hdisplay, dev_priv->psr.su_x_granularity); return false; }

if (crtc_state->crc_enabled) { - DRM_DEBUG_KMS("PSR2 not enabled because it would inhibit pipe CRC calculation\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR2 not enabled because it would inhibit pipe CRC calculation\n"); return false; }

@@ -731,31 +742,36 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, * hardcoded to PORT_A */ if (dig_port->base.port != PORT_A) { - DRM_DEBUG_KMS("PSR condition failed: Port not supported\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR condition failed: Port not supported\n"); return; }

if (dev_priv->psr.sink_not_reliable) { - DRM_DEBUG_KMS("PSR sink implementation is not reliable\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR sink implementation is not reliable\n"); return; }

if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) { - DRM_DEBUG_KMS("PSR condition failed: Interlaced mode enabled\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR condition failed: Interlaced mode enabled\n"); return; }

psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd); if (psr_setup_time < 0) { - DRM_DEBUG_KMS("PSR condition failed: Invalid PSR setup time (0x%02x)\n", - intel_dp->psr_dpcd[1]); + drm_dbg_kms(&dev_priv->drm, + "PSR condition failed: Invalid PSR setup time (0x%02x)\n", + intel_dp->psr_dpcd[1]); return; }

if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) > adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) { - DRM_DEBUG_KMS("PSR condition failed: PSR setup time (%d us) too long\n", - psr_setup_time); + drm_dbg_kms(&dev_priv->drm, + "PSR condition failed: PSR setup time (%d us) too long\n", + psr_setup_time); return; }

@@ -875,12 +891,13 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv, } if (val) { dev_priv->psr.sink_not_reliable = true; - DRM_DEBUG_KMS("PSR interruption error set, not enabling PSR\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR interruption error set, not enabling PSR\n"); return; }

- DRM_DEBUG_KMS("Enabling PSR%s\n", - dev_priv->psr.psr2_enabled ? "2" : "1"); + drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n", + dev_priv->psr.psr2_enabled ? "2" : "1"); intel_psr_setup_vsc(intel_dp, crtc_state); intel_psr_enable_sink(intel_dp); intel_psr_enable_source(intel_dp, crtc_state); @@ -912,7 +929,7 @@ void intel_psr_enable(struct intel_dp *intel_dp, mutex_lock(&dev_priv->psr.lock);

if (!psr_global_enabled(dev_priv->psr.debug)) { - DRM_DEBUG_KMS("PSR disabled by flag\n"); + drm_dbg_kms(&dev_priv->drm, "PSR disabled by flag\n"); goto unlock; }

@@ -970,8 +987,8 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) if (!dev_priv->psr.enabled) return;

- DRM_DEBUG_KMS("Disabling PSR%s\n", - dev_priv->psr.psr2_enabled ? "2" : "1"); + drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n", + dev_priv->psr.psr2_enabled ? "2" : "1");

intel_psr_exit(dev_priv);

@@ -986,7 +1003,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) /* Wait till PSR is idle */ if (intel_de_wait_for_clear(dev_priv, psr_status, psr_status_mask, 2000)) - DRM_ERROR("Timed out waiting PSR idle state\n"); + drm_err(&dev_priv->drm, "Timed out waiting PSR idle state\n");

/* Disable PSR on Sink */ drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); @@ -1154,7 +1171,8 @@ static bool __psr_wait_for_idle_locked(struct drm_i915_private *dev_priv)

err = intel_de_wait_for_clear(dev_priv, reg, mask, 50); if (err) - DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n"); + drm_err(&dev_priv->drm, + "Timed out waiting for PSR Idle for re-enable\n");

/* After the unlocked wait, verify that PSR is still wanted! */ mutex_lock(&dev_priv->psr.lock); @@ -1218,7 +1236,7 @@ int intel_psr_debug_set(struct drm_i915_private *dev_priv, u64 val)

if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_MODE_MASK) || mode > I915_PSR_DEBUG_FORCE_PSR1) { - DRM_DEBUG_KMS("Invalid debug mask %llx\n", val); + drm_dbg_kms(&dev_priv->drm, "Invalid debug mask %llx\n", val); return -EINVAL; }

@@ -1474,14 +1492,15 @@ static void psr_alpm_check(struct intel_dp *intel_dp)

r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val); if (r != 1) { - DRM_ERROR("Error reading ALPM status\n"); + drm_err(&dev_priv->drm, "Error reading ALPM status\n"); return; }

if (val & DP_ALPM_LOCK_TIMEOUT_ERROR) { intel_psr_disable_locked(intel_dp); psr->sink_not_reliable = true; - DRM_DEBUG_KMS("ALPM lock timeout error, disabling PSR\n"); + drm_dbg_kms(&dev_priv->drm, + "ALPM lock timeout error, disabling PSR\n");

/* Clearing error */ drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val); @@ -1497,14 +1516,15 @@ static void psr_capability_changed_check(struct intel_dp *intel_dp)

r = drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_ESI, &val); if (r != 1) { - DRM_ERROR("Error reading DP_PSR_ESI\n"); + drm_err(&dev_priv->drm, "Error reading DP_PSR_ESI\n"); return; }

if (val & DP_PSR_CAPS_CHANGE) { intel_psr_disable_locked(intel_dp); psr->sink_not_reliable = true; - DRM_DEBUG_KMS("Sink PSR capability changed, disabling PSR\n"); + drm_dbg_kms(&dev_priv->drm, + "Sink PSR capability changed, disabling PSR\n");

/* Clearing it */ drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ESI, val); @@ -1529,7 +1549,8 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp) goto exit;

if (psr_get_status_and_error_status(intel_dp, &status, &error_status)) { - DRM_ERROR("Error reading PSR status or error status\n"); + drm_err(&dev_priv->drm, + "Error reading PSR status or error status\n"); goto exit; }

@@ -1539,17 +1560,22 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp) }

if (status == DP_PSR_SINK_INTERNAL_ERROR && !error_status) - DRM_DEBUG_KMS("PSR sink internal error, disabling PSR\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR sink internal error, disabling PSR\n"); if (error_status & DP_PSR_RFB_STORAGE_ERROR) - DRM_DEBUG_KMS("PSR RFB storage error, disabling PSR\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR RFB storage error, disabling PSR\n"); if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR) - DRM_DEBUG_KMS("PSR VSC SDP uncorrectable error, disabling PSR\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR VSC SDP uncorrectable error, disabling PSR\n"); if (error_status & DP_PSR_LINK_CRC_ERROR) - DRM_DEBUG_KMS("PSR Link CRC error, disabling PSR\n"); + drm_dbg_kms(&dev_priv->drm, + "PSR Link CRC error, disabling PSR\n");

if (error_status & ~errors) - DRM_ERROR("PSR_ERROR_STATUS unhandled errors %x\n", - error_status & ~errors); + drm_err(&dev_priv->drm, + "PSR_ERROR_STATUS unhandled errors %x\n", + error_status & ~errors); /* clear status register */ drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, error_status);

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 11/12] drm/i915/pipe_crc: automatic conversion to drm_device based logging macros.

Conversion of various instances of the printk based logging macros to the new struct drm_device based logging macros in i915/display/intel_pipe_crc.c using the following coccinelle script that transforms based on the existence of a drm_i915_private device pointer: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were addressed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_pipe_crc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c index b83062201212..d071a1604590 100644 --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c @@ -570,7 +570,7 @@ int intel_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name, enum intel_pipe_crc_source source;

if (display_crc_ctl_parse_source(source_name, &source) < 0) { - DRM_DEBUG_DRIVER("unknown source %s\n", source_name); + drm_dbg(&dev_priv->drm, "unknown source %s\n", source_name); return -EINVAL; }

@@ -595,14 +595,15 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name) bool enable;

if (display_crc_ctl_parse_source(source_name, &source) < 0) { - DRM_DEBUG_DRIVER("unknown source %s\n", source_name); + drm_dbg(&dev_priv->drm, "unknown source %s\n", source_name); return -EINVAL; }

power_domain = POWER_DOMAIN_PIPE(crtc->index); wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain); if (!wakeref) { - DRM_DEBUG_KMS("Trying to capture CRC while pipe is off\n"); + drm_dbg_kms(&dev_priv->drm, + "Trying to capture CRC while pipe is off\n"); return -EIO; }

-- 2.25.0

Wambui Karuga

8:32 a.m.

New subject: [PATCH 12/12] drm/i915/panel: automatic conversion to drm_device based logging macros.

Converts various instances of the printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_panel.c using the following coccinelle script that transforms based on the existence of a struct drm_i915_private device pointer: @@ identifier fn, T; @@

@@ identifier fn, T; @@

Checkpatch warnings were addressed manually.

Signed-off-by: Wambui Karuga wambui.karugax@gmail.com --- drivers/gpu/drm/i915/display/intel_panel.c | 100 ++++++++++++--------- 1 file changed, 59 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c index c03afcef85ae..1acefaf5ed1e 100644 --- a/drivers/gpu/drm/i915/display/intel_panel.c +++ b/drivers/gpu/drm/i915/display/intel_panel.c @@ -96,8 +96,9 @@ intel_panel_edid_downclock_mode(struct intel_connector *connector, if (!downclock_mode) return NULL;

- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using downclock mode from EDID: ", - connector->base.base.id, connector->base.name); + drm_dbg_kms(&dev_priv->drm, + "[CONNECTOR:%d:%s] using downclock mode from EDID: ", + connector->base.base.id, connector->base.name); drm_mode_debug_printmodeline(downclock_mode);

return downclock_mode; @@ -122,8 +123,9 @@ intel_panel_edid_fixed_mode(struct intel_connector *connector) if (!fixed_mode) return NULL;

- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using preferred mode from EDID: ", - connector->base.base.id, connector->base.name); + drm_dbg_kms(&dev_priv->drm, + "[CONNECTOR:%d:%s] using preferred mode from EDID: ", + connector->base.base.id, connector->base.name); drm_mode_debug_printmodeline(fixed_mode);

return fixed_mode; @@ -138,8 +140,9 @@ intel_panel_edid_fixed_mode(struct intel_connector *connector)

fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;

- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using first mode from EDID: ", - connector->base.base.id, connector->base.name); + drm_dbg_kms(&dev_priv->drm, + "[CONNECTOR:%d:%s] using first mode from EDID: ", + connector->base.base.id, connector->base.name); drm_mode_debug_printmodeline(fixed_mode);

return fixed_mode; @@ -162,8 +165,8 @@ intel_panel_vbt_fixed_mode(struct intel_connector *connector)

fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;

- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using mode from VBT: ", - connector->base.base.id, connector->base.name); + drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ", + connector->base.base.id, connector->base.name); drm_mode_debug_printmodeline(fixed_mode);

info->width_mm = fixed_mode->width_mm; @@ -746,7 +749,8 @@ static void lpt_disable_backlight(const struct drm_connector_state *old_conn_sta */ tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); if (tmp & BLM_PWM_ENABLE) { - DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n"); + drm_dbg_kms(&dev_priv->drm, + "cpu backlight was enabled, disabling\n"); intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); } @@ -863,7 +867,8 @@ void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_st * another client is not activated. */ if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { - DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); + drm_dbg(&dev_priv->drm, + "Skipping backlight disable on vga switch\n"); return; }

@@ -887,7 +892,7 @@ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,

pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { - DRM_DEBUG_KMS("pch backlight already enabled\n"); + drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); } @@ -939,14 +944,14 @@ static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,

cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); if (cpu_ctl2 & BLM_PWM_ENABLE) { - DRM_DEBUG_KMS("cpu backlight already enabled\n"); + drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); cpu_ctl2 &= ~BLM_PWM_ENABLE; intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); }

pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { - DRM_DEBUG_KMS("pch backlight already enabled\n"); + drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); } @@ -985,7 +990,7 @@ static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,

ctl = intel_de_read(dev_priv, BLC_PWM_CTL); if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { - DRM_DEBUG_KMS("backlight already enabled\n"); + drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); intel_de_write(dev_priv, BLC_PWM_CTL, 0); }

@@ -1025,7 +1030,7 @@ static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,

ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); if (ctl2 & BLM_PWM_ENABLE) { - DRM_DEBUG_KMS("backlight already enabled\n"); + drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); ctl2 &= ~BLM_PWM_ENABLE; intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); } @@ -1060,7 +1065,7 @@ static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,

ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); if (ctl2 & BLM_PWM_ENABLE) { - DRM_DEBUG_KMS("backlight already enabled\n"); + drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); ctl2 &= ~BLM_PWM_ENABLE; intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); } @@ -1093,7 +1098,8 @@ static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, if (panel->backlight.controller == 1) { val = intel_de_read(dev_priv, UTIL_PIN_CTL); if (val & UTIL_PIN_ENABLE) { - DRM_DEBUG_KMS("util pin already enabled\n"); + drm_dbg_kms(&dev_priv->drm, + "util pin already enabled\n"); val &= ~UTIL_PIN_ENABLE; intel_de_write(dev_priv, UTIL_PIN_CTL, val); } @@ -1108,7 +1114,7 @@ static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, pwm_ctl = intel_de_read(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller)); if (pwm_ctl & BXT_BLC_PWM_ENABLE) { - DRM_DEBUG_KMS("backlight already enabled\n"); + drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); pwm_ctl &= ~BXT_BLC_PWM_ENABLE; intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), @@ -1144,7 +1150,7 @@ static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, pwm_ctl = intel_de_read(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller)); if (pwm_ctl & BXT_BLC_PWM_ENABLE) { - DRM_DEBUG_KMS("backlight already enabled\n"); + drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); pwm_ctl &= ~BXT_BLC_PWM_ENABLE; intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), @@ -1213,7 +1219,7 @@ void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, if (!panel->backlight.present) return;

- DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); + drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe));

mutex_lock(&dev_priv->backlight_lock);

@@ -1238,7 +1244,7 @@ static u32 intel_panel_get_backlight(struct intel_connector *connector)

mutex_unlock(&dev_priv->backlight_lock);

- DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); + drm_dbg(&dev_priv->drm, "get backlight PWM = %d\n", val); return val; }

@@ -1534,22 +1540,26 @@ static u32 get_backlight_max_vbt(struct intel_connector *connector) u32 pwm;

if (!panel->backlight.hz_to_pwm) { - DRM_DEBUG_KMS("backlight frequency conversion not supported\n"); + drm_dbg_kms(&dev_priv->drm, + "backlight frequency conversion not supported\n"); return 0; }

if (pwm_freq_hz) { - DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", - pwm_freq_hz); + drm_dbg_kms(&dev_priv->drm, + "VBT defined backlight frequency %u Hz\n", + pwm_freq_hz); } else { pwm_freq_hz = 200; - DRM_DEBUG_KMS("default backlight frequency %u Hz\n", - pwm_freq_hz); + drm_dbg_kms(&dev_priv->drm, + "default backlight frequency %u Hz\n", + pwm_freq_hz); }

pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz); if (!pwm) { - DRM_DEBUG_KMS("backlight frequency conversion failed\n"); + drm_dbg_kms(&dev_priv->drm, + "backlight frequency conversion failed\n"); return 0; }

@@ -1576,8 +1586,9 @@ static u32 get_backlight_min_vbt(struct intel_connector *connector) */ min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); if (min != dev_priv->vbt.backlight.min_brightness) { - DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n", - dev_priv->vbt.backlight.min_brightness, min); + drm_dbg_kms(&dev_priv->drm, + "clamping VBT min backlight %d/255 to %d/255\n", + dev_priv->vbt.backlight.min_brightness, min); }

/* vbt value is a coefficient in range [0..255] */ @@ -1627,7 +1638,8 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus panel->backlight.max);

if (cpu_mode) { - DRM_DEBUG_KMS("CPU backlight register was enabled, switching to PCH override\n"); + drm_dbg_kms(&dev_priv->drm, + "CPU backlight register was enabled, switching to PCH override\n");

/* Write converted CPU PWM value to PCH override register */ lpt_set_backlight(connector->base.state, panel->backlight.level); @@ -1880,7 +1892,8 @@ static int pwm_setup_backlight(struct intel_connector *connector, }

if (IS_ERR(panel->backlight.pwm)) { - DRM_ERROR("Failed to get the %s PWM chip\n", desc); + drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n", + desc); panel->backlight.pwm = NULL; return -ENODEV; } @@ -1894,7 +1907,7 @@ static int pwm_setup_backlight(struct intel_connector *connector, retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS, CRC_PMIC_PWM_PERIOD_NS); if (retval < 0) { - DRM_ERROR("Failed to configure the pwm chip\n"); + drm_err(&dev_priv->drm, "Failed to configure the pwm chip\n"); pwm_put(panel->backlight.pwm); panel->backlight.pwm = NULL; return retval; @@ -1907,7 +1920,8 @@ static int pwm_setup_backlight(struct intel_connector *connector, CRC_PMIC_PWM_PERIOD_NS); panel->backlight.enabled = panel->backlight.level != 0;

- DRM_INFO("Using %s PWM for LCD backlight control\n", desc); + drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n", + desc); return 0; }

@@ -1938,9 +1952,11 @@ int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)

if (!dev_priv->vbt.backlight.present) { if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { - DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); + drm_dbg_kms(&dev_priv->drm, + "no backlight present per VBT, but present per quirk\n"); } else { - DRM_DEBUG_KMS("no backlight present per VBT\n"); + drm_dbg_kms(&dev_priv->drm, + "no backlight present per VBT\n"); return 0; } } @@ -1955,17 +1971,19 @@ int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) mutex_unlock(&dev_priv->backlight_lock);

if (ret) { - DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", - connector->name); + drm_dbg_kms(&dev_priv->drm, + "failed to setup backlight for connector %s\n", + connector->name); return ret; }

panel->backlight.present = true;

- DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n", - connector->name, - enableddisabled(panel->backlight.enabled), - panel->backlight.level, panel->backlight.max); + drm_dbg_kms(&dev_priv->drm, + "Connector %s backlight initialized, %s, brightness %u/%u\n", + connector->name, + enableddisabled(panel->backlight.enabled), + panel->backlight.level, panel->backlight.max);

return 0; }

-- 2.25.0

Jani Nikula

4 Feb 4 Feb

9:28 a.m.

On Thu, 30 Jan 2020, Wambui Karuga wambui.karugax@gmail.com wrote:

...

This series continues the conversion of the printk based logging macros to the new struct drm_device based logging macros in the drm/i915/display folder.

Thanks for the patches, series pushed to drm-intel-next-queued.

BR, Jani.

-- Jani Nikula, Intel Open Source Graphics Center

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Jani Nikula
Wambui Karuga