This series mainly ports existining functionality to older SoCs - most importantly enables alpha blending for RK3036, RK3066, RK3126 and RK3188. Besides that, it also changes the window type from DRM_PLANE_TYPE_CURSOR to DRM_PLANE_TYPE_OVERLAY for VOPs that have only one overlay window.
Alex Bee (5): drm: rockchip: add scaling for RK3036 win1 drm: rockchip: add missing registers for RK3188 drm: rockchip: add alpha support for RK3036, RK3066, RK3126 and RK3188 drm: rockchip: set alpha_en to 0 if it is not used drm: rockchip: use overlay windows as such
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 1 + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 43 ++++++++++++++++++--- drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 1 + 3 files changed, 39 insertions(+), 6 deletions(-)
This patch adds register definitions needed to make scaling work on RK3036's win1.
Signed-off-by: Alex Bee knaerzche@gmail.com --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 80053d91a301..b046910129fb 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -77,15 +77,20 @@ static const uint64_t format_modifiers_win_lite[] = { DRM_FORMAT_MOD_INVALID, };
-static const struct vop_scl_regs rk3036_win_scl = { +static const struct vop_scl_regs rk3036_win0_scl = { .scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), .scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), .scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), .scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16), };
+static const struct vop_scl_regs rk3036_win1_scl = { + .scale_yrgb_x = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 0x0), + .scale_yrgb_y = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 16), +}; + static const struct vop_win_phy rk3036_win0_data = { - .scl = &rk3036_win_scl, + .scl = &rk3036_win0_scl, .data_formats = formats_win_full, .nformats = ARRAY_SIZE(formats_win_full), .format_modifiers = format_modifiers_win_full, @@ -102,6 +107,7 @@ static const struct vop_win_phy rk3036_win0_data = { };
static const struct vop_win_phy rk3036_win1_data = { + .scl = &rk3036_win1_scl, .data_formats = formats_win_lite, .nformats = ARRAY_SIZE(formats_win_lite), .format_modifiers = format_modifiers_win_lite,
This patch adds dither_up, dsp_lut_en, data_blank and dsp_data_swap registers to enable their respective functionality for RK3188's VOP.
Signed-off-by: Alex Bee knaerzche@gmail.com --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index b046910129fb..971a6bda7458 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -512,6 +512,10 @@ static const struct vop_common rk3188_common = { .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11), .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10), .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x3, 24), + .dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9), + .dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28), + .data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25), + .dsp_data_swap = VOP_REG(RK3188_DSP_CTRL1, 0x1f, 26), };
static const struct vop_win_data rk3188_vop_win_data[] = {
Hi Alex:
On 7/19/20 4:03 AM, Alex Bee wrote:
This patch adds dither_up, dsp_lut_en, data_blank and dsp_data_swap registers to enable their respective functionality for RK3188's VOP.
Signed-off-by: Alex Bee knaerzche@gmail.com
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index b046910129fb..971a6bda7458 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -512,6 +512,10 @@ static const struct vop_common rk3188_common = { .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11), .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10), .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x3, 24),
- .dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9),
- .dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28),
- .data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25),
- .dsp_data_swap = VOP_REG(RK3188_DSP_CTRL1, 0x1f, 26),
I can't find the definition of dsp_data_swap, or I missed something?
};
static const struct vop_win_data rk3188_vop_win_data[] = {
Hi Andy,
Am 20.07.20 um 10:22 schrieb Andy Yan:
Hi Alex:
On 7/19/20 4:03 AM, Alex Bee wrote:
This patch adds dither_up, dsp_lut_en, data_blank and dsp_data_swap registers to enable their respective functionality for RK3188's VOP.
Signed-off-by: Alex Bee knaerzche@gmail.com
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index b046910129fb..971a6bda7458 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -512,6 +512,10 @@ static const struct vop_common rk3188_common = { .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11), .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10), .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x3, 24), + .dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9), + .dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28), + .data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25), + .dsp_data_swap = VOP_REG(RK3188_DSP_CTRL1, 0x1f, 26),
I can't find the definition of dsp_data_swap, or I missed something?
Note that .dsp_data_swap is not defined with that name in TRM (as it is not in RK3288/RK3328), since potentially more the one bit would have to be set for this (currently only RB_SWAP (0x2) is implemented in the VOP driver).
To be some kind of future proof (if BG_SWAP, RG_SWAP, DELTA_SWAP or DUMMY_SWAP ever get implemented) it should be aligned with what is defined for RK3288/RK3328 now to automatically benefit from that additions. And it would, since RK3288_DSP_CTRL0 BIT12, BIT13, BIT14, BIT15, BIT16 exactly matches with RK3188_DSP_CTRL1 BIT26, BIT27, BIT28, BIT29, BIT30.
Current implementation sets BIT13 for RK3288 and with this patch BIT27 for RK3188 to enable RB_SWAP.
}; static const struct vop_win_data rk3188_vop_win_data[] = {
Regards,
Alex
Hi Alex:
On 7/20/20 10:46 PM, Alex Bee wrote:
Hi Andy,
Am 20.07.20 um 10:22 schrieb Andy Yan:
Hi Alex:
On 7/19/20 4:03 AM, Alex Bee wrote:
This patch adds dither_up, dsp_lut_en, data_blank and dsp_data_swap registers to enable their respective functionality for RK3188's VOP.
Signed-off-by: Alex Bee knaerzche@gmail.com
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index b046910129fb..971a6bda7458 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -512,6 +512,10 @@ static const struct vop_common rk3188_common = { .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11), .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10), .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x3, 24), + .dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9), + .dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28), + .data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25), + .dsp_data_swap = VOP_REG(RK3188_DSP_CTRL1, 0x1f, 26),
I can't find the definition of dsp_data_swap, or I missed something?
Note that .dsp_data_swap is not defined with that name in TRM (as it is not in RK3288/RK3328), since potentially more the one bit would have to be set for this (currently only RB_SWAP (0x2) is implemented in the VOP driver).
I mean I didn't find the definition of dsp_data_swap in struct vop_comm, I even search drm-misc-next tree.
To be some kind of future proof (if BG_SWAP, RG_SWAP, DELTA_SWAP or DUMMY_SWAP ever get implemented) it should be aligned with what is defined for RK3288/RK3328 now to automatically benefit from that additions. And it would, since RK3288_DSP_CTRL0 BIT12, BIT13, BIT14, BIT15, BIT16 exactly matches with RK3188_DSP_CTRL1 BIT26, BIT27, BIT28, BIT29, BIT30.
Current implementation sets BIT13 for RK3288 and with this patch BIT27 for RK3188 to enable RB_SWAP.
}; static const struct vop_win_data rk3188_vop_win_data[] = {
Regards,
Alex
Hi Andy,
Am 21.07.20 um 03:17 schrieb Andy Yan:
Hi Alex:
On 7/20/20 10:46 PM, Alex Bee wrote:
Hi Andy,
Am 20.07.20 um 10:22 schrieb Andy Yan:
Hi Alex:
On 7/19/20 4:03 AM, Alex Bee wrote:
This patch adds dither_up, dsp_lut_en, data_blank and dsp_data_swap registers to enable their respective functionality for RK3188's VOP.
Signed-off-by: Alex Bee knaerzche@gmail.com
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index b046910129fb..971a6bda7458 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -512,6 +512,10 @@ static const struct vop_common rk3188_common = { .dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11), .dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10), .dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x3, 24), + .dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9), + .dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28), + .data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25), + .dsp_data_swap = VOP_REG(RK3188_DSP_CTRL1, 0x1f, 26),
I can't find the definition of dsp_data_swap, or I missed something?
Note that .dsp_data_swap is not defined with that name in TRM (as it is not in RK3288/RK3328), since potentially more the one bit would have to be set for this (currently only RB_SWAP (0x2) is implemented in the VOP driver).
I mean I didn't find the definition of dsp_data_swap in struct vop_comm, I even search drm-misc-next tree.
Sorry, misunderstanding. You're right: I had something which isn't upstreamed/merged yet in my tree. I'll remove this reg in V2.
To be some kind of future proof (if BG_SWAP, RG_SWAP, DELTA_SWAP or DUMMY_SWAP ever get implemented) it should be aligned with what is defined for RK3288/RK3328 now to automatically benefit from that additions. And it would, since RK3288_DSP_CTRL0 BIT12, BIT13, BIT14, BIT15, BIT16 exactly matches with RK3188_DSP_CTRL1 BIT26, BIT27, BIT28, BIT29, BIT30.
Current implementation sets BIT13 for RK3288 and with this patch BIT27 for RK3188 to enable RB_SWAP.
}; static const struct vop_win_data rk3188_vop_win_data[] = {
Regards,
Alex
With commit 2aae8ed1f390 ("drm/rockchip: Add per-pixel alpha support for the PX30 VOP") alpha support was introduced for PX30's VOP. RK3036, RK3066, RK3126 and RK3188 VOPs support alpha blending in the same manner. With the exception of RK3066 all of them support pre-multiplied alpha.
This patch adds the respective registers to make this work for those VOPs as well.
Signed-off-by: Alex Bee knaerzche@gmail.com --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 21 +++++++++++++++++++++ drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 1 + 2 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 971a6bda7458..f2f9a9af39e3 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -104,6 +104,9 @@ static const struct vop_win_phy rk3036_win0_data = { .uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0), .yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0), .uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16), + .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18), + .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0), + .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29), };
static const struct vop_win_phy rk3036_win1_data = { @@ -119,6 +122,9 @@ static const struct vop_win_phy rk3036_win1_data = { .dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0), .yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0), .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0), + .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19), + .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1), + .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29), };
static const struct vop_win_data rk3036_vop_win_data[] = { @@ -185,6 +191,9 @@ static const struct vop_win_phy rk3126_win1_data = { .dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0), .yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0), .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0), + .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19), + .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1), + .alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29), };
static const struct vop_win_data rk3126_vop_win_data[] = { @@ -364,6 +373,8 @@ static const struct vop_win_phy rk3066_win0_data = { .uv_mst = VOP_REG(RK3066_WIN0_CBR_MST0, 0xffffffff, 0), .yrgb_vir = VOP_REG(RK3066_WIN0_VIR, 0xffff, 0), .uv_vir = VOP_REG(RK3066_WIN0_VIR, 0x1fff, 16), + .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 21), + .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 0), };
static const struct vop_win_phy rk3066_win1_data = { @@ -381,6 +392,8 @@ static const struct vop_win_phy rk3066_win1_data = { .uv_mst = VOP_REG(RK3066_WIN1_CBR_MST, 0xffffffff, 0), .yrgb_vir = VOP_REG(RK3066_WIN1_VIR, 0xffff, 0), .uv_vir = VOP_REG(RK3066_WIN1_VIR, 0x1fff, 16), + .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 22), + .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 1), };
static const struct vop_win_phy rk3066_win2_data = { @@ -394,6 +407,8 @@ static const struct vop_win_phy rk3066_win2_data = { .dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0), .yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0), .yrgb_vir = VOP_REG(RK3066_WIN2_VIR, 0xffff, 0), + .alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 23), + .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 2), };
static const struct vop_modeset rk3066_modeset = { @@ -476,6 +491,9 @@ static const struct vop_win_phy rk3188_win0_data = { .yrgb_mst = VOP_REG(RK3188_WIN0_YRGB_MST0, 0xffffffff, 0), .uv_mst = VOP_REG(RK3188_WIN0_CBR_MST0, 0xffffffff, 0), .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 0), + .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 18), + .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 0), + .alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29), };
static const struct vop_win_phy rk3188_win1_data = { @@ -490,6 +508,9 @@ static const struct vop_win_phy rk3188_win1_data = { .dsp_st = VOP_REG(RK3188_WIN1_DSP_ST, 0x0fff0fff, 0), .yrgb_mst = VOP_REG(RK3188_WIN1_MST, 0xffffffff, 0), .yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 16), + .alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 19), + .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 1), + .alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29), };
static const struct vop_modeset rk3188_modeset = { diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h index 6e9fa5815d4d..0b3cd65ba5c1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h @@ -955,6 +955,7 @@ #define RK3188_DSP_CTRL0 0x04 #define RK3188_DSP_CTRL1 0x08 #define RK3188_INT_STATUS 0x10 +#define RK3188_ALPHA_CTRL 0x14 #define RK3188_WIN0_YRGB_MST0 0x20 #define RK3188_WIN0_CBR_MST0 0x24 #define RK3188_WIN0_YRGB_MST1 0x28
alpha_en should be set to 0 if it is not used, i.e. to disable alpha blending if it was enabled before and should be disabled now.
fixes: 2aae8ed1f390 ("drm/rockchip: Add per-pixel alpha support for the PX30 VOP")
Signed-off-by: Alex Bee knaerzche@gmail.com --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index c80f7d9fd13f..0f23144491e4 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1013,6 +1013,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, VOP_WIN_SET(vop, win, alpha_en, 1); } else { VOP_WIN_SET(vop, win, src_alpha_ctl, SRC_ALPHA_EN(0)); + VOP_WIN_SET(vop, win, alpha_en, 0); }
VOP_WIN_SET(vop, win, enable, 1);
As stated in the comment for rk3288_vop_win_data windows that are supposed to be an overlay window are missused as HWC windows due to the missing implementation of that window type in VOP driver.
This is also true for RK3036, RK3126, RK3188 and RK3228 VOPs which all have at least one dedicated HWC window (which are currently not definded in the driver). Since all of the mentioned VOPs have only one overlay window and all of them support alpha blending now it should be used as such, since this gives a much wider usage-perspective for them.
Signed-off-by: Alex Bee knaerzche@gmail.com --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index f2f9a9af39e3..756c580f206a 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -131,7 +131,7 @@ static const struct vop_win_data rk3036_vop_win_data[] = { { .base = 0x00, .phy = &rk3036_win0_data, .type = DRM_PLANE_TYPE_PRIMARY }, { .base = 0x00, .phy = &rk3036_win1_data, - .type = DRM_PLANE_TYPE_CURSOR }, + .type = DRM_PLANE_TYPE_OVERLAY }, };
static const int rk3036_vop_intrs[] = { @@ -200,7 +200,7 @@ static const struct vop_win_data rk3126_vop_win_data[] = { { .base = 0x00, .phy = &rk3036_win0_data, .type = DRM_PLANE_TYPE_PRIMARY }, { .base = 0x00, .phy = &rk3126_win1_data, - .type = DRM_PLANE_TYPE_CURSOR }, + .type = DRM_PLANE_TYPE_OVERLAY }, };
static const struct vop_data rk3126_vop = { @@ -543,7 +543,7 @@ static const struct vop_win_data rk3188_vop_win_data[] = { { .base = 0x00, .phy = &rk3188_win0_data, .type = DRM_PLANE_TYPE_PRIMARY }, { .base = 0x00, .phy = &rk3188_win1_data, - .type = DRM_PLANE_TYPE_CURSOR }, + .type = DRM_PLANE_TYPE_OVERLAY }, };
static const int rk3188_vop_intrs[] = { @@ -980,7 +980,7 @@ static const struct vop_win_data rk3228_vop_win_data[] = { { .base = 0x00, .phy = &rk3288_win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, { .base = 0x40, .phy = &rk3288_win01_data, - .type = DRM_PLANE_TYPE_CURSOR }, + .type = DRM_PLANE_TYPE_OVERLAY }, };
static const struct vop_data rk3228_vop = {
On 18/07/20 22:03, Alex Bee wrote:
static const int rk3188_vop_intrs[] = { @@ -980,7 +980,7 @@ static const struct vop_win_data rk3228_vop_win_data[] = { { .base = 0x00, .phy = &rk3288_win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, { .base = 0x40, .phy = &rk3288_win01_data,
.type = DRM_PLANE_TYPE_CURSOR },
.type = DRM_PLANE_TYPE_OVERLAY },};
static const struct vop_data rk3228_vop = {
Tried on several rk322x boards, it worked fine.
Tested-by: Paolo Sabatino paolo.sabatino@gmail.com
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