Cc: stable@vger.kernel.org Signed-off-by: Rafał Miłecki zajec5@gmail.com --- I'd like to propose taking this patch into older releases. It's really trivial while it fixes important feature.
This change was verified to fix both issues with no video I've investigated. I've also checked checksum calculation with fglrx on: RV620, HD54xx, HD5450, HD6310, HD6320. --- drivers/gpu/drm/radeon/r600_hdmi.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index 5021372..3db76ac 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -196,6 +196,13 @@ static void r600_hdmi_videoinfoframe( frame[0xD] = (right_bar >> 8);
r600_hdmi_infoframe_checksum(0x82, 0x02, 0x0D, frame); + /* Our header values (type, version, length) should be alright, Intel + * is using the same. Checksum function also seems to be OK, it works + * fine for audio infoframe. However calculated value is always lower + * by 2 in comparison to fglrx. It breaks displaying anything in case + * of TVs that strictly check the checksum. Hack it manually here to + * workaround this issue. */ + frame[0x0] += 2;
WREG32(offset+R600_HDMI_VIDEOINFOFRAME_0, frame[0x0] | (frame[0x1] << 8) | (frame[0x2] << 16) | (frame[0x3] << 24));
W dniu 23 grudnia 2011 20:32 użytkownik Rafał Miłecki zajec5@gmail.com napisał:
Cc: stable@vger.kernel.org Signed-off-by: Rafał Miłecki zajec5@gmail.com
I'd like to propose taking this patch into older releases. It's really trivial while it fixes important feature.
This change was verified to fix both issues with no video I've investigated. I've also checked checksum calculation with fglrx on: RV620, HD54xx, HD5450, HD6310, HD6320.
My cases I've used to check fglrx behavior:
[Rafał Miłecki][RV620] fglrx: 0x7454: 00 A8 5E 79 R600_HDMI_VIDEOINFOFRAME_0 0x7458: 00 28 00 10 R600_HDMI_VIDEOINFOFRAME_1 0x745C: 00 48 00 28 R600_HDMI_VIDEOINFOFRAME_2 0x7460: 02 00 00 48 R600_HDMI_VIDEOINFOFRAME_3 =================== (0x82 + 0x2 + 0xD) + 0x1F8 = 0x289 -0x289 = 0x77
[Rafał Miłecki][HD6320] fglrx: 0x7c84: 00 A8 5E FE R600_HDMI_VIDEOINFOFRAME_0 0x7c88: 00 1C 00 04 R600_HDMI_VIDEOINFOFRAME_1 0x7c8c: 00 32 02 D2 R600_HDMI_VIDEOINFOFRAME_2 0x7c90: 02 00 06 3F R600_HDMI_VIDEOINFOFRAME_3 =================== (0x82 + 0x2 + 0xD) + 0x273 = 0x304 -0x304 = 0xFC
[Nirbheek C.][HD5450] fglrx: 0x10884 00 a8 5e 4f R600_HDMI_VIDEOINFOFRAME_0 0x10888 00 2b 00 10 R600_HDMI_VIDEOINFOFRAME_1 0x1088c 00 4c 04 3b R600_HDMI_VIDEOINFOFRAME_2 0x10890 02 00 08 4c R600_HDMI_VIDEOINFOFRAME_3 =================== (0x82 + 0x2 + 0xD) + 0x222 = 0x2B3 -0x2B3 = 0x4D
[Radu A.][HD5400] fglrx: 0x10884 00 08 1e 22 R600_HDMI_VIDEOINFOFRAME_0 0x10888 00 00 00 00 R600_HDMI_VIDEOINFOFRAME_1 0x1088c 00 00 03 1c R600_HDMI_VIDEOINFOFRAME_2 0x10890 02 00 07 01 R600_HDMI_VIDEOINFOFRAME_3 =================== (0x82 + 0x2 + 0xD) + 0x4F = 0xE0 -0xE0 = 0x20
[Zveroy][HD6310] fglrx: 0x7c84 00 08 1e 30 R600_HDMI_VIDEOINFOFRAME_0 0x7c88 00 00 00 00 R600_HDMI_VIDEOINFOFRAME_1 0x7c8c 00 00 03 1f R600_HDMI_VIDEOINFOFRAME_2 0x7c90 02 00 06 f1 R600_HDMI_VIDEOINFOFRAME_3 =================== (0x82 + 0x2 + 0xD) + 0x141= 0x1D2 -0x1D2 = 0x2E
As you can see, the checksum we calculate is always too low by 0x2 in comparison to fglrx.
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