Register GPU as a devfreq cooling device so that it can be passively cooled by the thermal framework.
Signed-off-by: Akhil P Oommen akhilpo@codeaurora.org --- Changes in v2: 1. Update the dt bindings documentation
drivers/gpu/drm/msm/msm_gpu.c | 12 ++++++++++++ drivers/gpu/drm/msm/msm_gpu.h | 2 ++ 2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 55d1648..9f9db46 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -14,6 +14,7 @@ #include <generated/utsrelease.h> #include <linux/string_helpers.h> #include <linux/devfreq.h> +#include <linux/devfreq_cooling.h> #include <linux/devcoredump.h> #include <linux/sched/task.h>
@@ -107,9 +108,18 @@ static void msm_devfreq_init(struct msm_gpu *gpu) if (IS_ERR(gpu->devfreq.devfreq)) { DRM_DEV_ERROR(&gpu->pdev->dev, "Couldn't initialize GPU devfreq\n"); gpu->devfreq.devfreq = NULL; + return; }
devfreq_suspend_device(gpu->devfreq.devfreq); + + gpu->cooling = of_devfreq_cooling_register(gpu->pdev->dev.of_node, + gpu->devfreq.devfreq); + if (IS_ERR(gpu->cooling)) { + DRM_DEV_ERROR(&gpu->pdev->dev, + "Couldn't register GPU cooling device\n"); + gpu->cooling = NULL; + } }
static int enable_pwrrail(struct msm_gpu *gpu) @@ -1005,4 +1015,6 @@ void msm_gpu_cleanup(struct msm_gpu *gpu) gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu); msm_gem_address_space_put(gpu->aspace); } + + devfreq_cooling_unregister(gpu->cooling); } diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 6c9e1fd..9a8f20d 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -147,6 +147,8 @@ struct msm_gpu { struct msm_gpu_state *crashstate; /* True if the hardware supports expanded apriv (a650 and newer) */ bool hw_apriv; + + struct thermal_cooling_device *cooling; };
static inline struct msm_gpu *dev_to_gpu(struct device *dev)
Add cooling-cells property and the cooling maps for the gpu tzones to support GPU cooling.
Signed-off-by: Akhil P Oommen akhilpo@codeaurora.org --- The thermal policy should be set as 'step_wise' for gpu tzones from the userspace during boot up.
arch/arm64/boot/dts/qcom/sc7180.dtsi | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index d46b383..a7ea029 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2,7 +2,7 @@ /* * SC7180 SoC device tree source * - * Copyright (c) 2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2019-20, The Linux Foundation. All rights reserved. */
#include <dt-bindings/clock/qcom,dispcc-sc7180.h> @@ -1886,6 +1886,8 @@ operating-points-v2 = <&gpu_opp_table>; qcom,gmu = <&gmu>;
+ #cooling-cells = <2>; + interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>; interconnect-names = "gfx-mem";
@@ -3825,16 +3827,16 @@ };
gpuss0-thermal { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>;
thermal-sensors = <&tsens0 13>;
trips { gpuss0_alert0: trip-point0 { - temperature = <90000>; + temperature = <95000>; hysteresis = <2000>; - type = "hot"; + type = "passive"; };
gpuss0_crit: gpuss0_crit { @@ -3843,19 +3845,26 @@ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&gpuss0_alert0>; + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; };
gpuss1-thermal { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>;
thermal-sensors = <&tsens0 14>;
trips { gpuss1_alert0: trip-point0 { - temperature = <90000>; + temperature = <95000>; hysteresis = <2000>; - type = "hot"; + type = "passive"; };
gpuss1_crit: gpuss1_crit { @@ -3864,6 +3873,13 @@ type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&gpuss0_alert0>; + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; };
aoss1-thermal {
Add cooling device support to gpu. A cooling device is bound to a thermal zone to allow thermal mitigation.
Signed-off-by: Akhil P Oommen akhilpo@codeaurora.org --- Documentation/devicetree/bindings/display/msm/gpu.txt | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index 1af0ff1..a496381 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -39,6 +39,10 @@ Required properties: a4xx Snapdragon SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml.
+Optional properties: +- #cooling-cells: The value must be 2. Please refer + Documentation/devicetree/bindings/thermal/thermal.txt for detail. + Example 3xx/4xx:
/ { @@ -61,6 +65,7 @@ Example 3xx/4xx: power-domains = <&mmcc OXILICX_GDSC>; operating-points-v2 = <&gpu_opp_table>; iommus = <&gpu_iommu 0>; + #cooling-cells = <2>; };
gpu_sram: ocmem@fdd00000 { @@ -98,6 +103,8 @@ Example a6xx (with GMU): reg = <0x5000000 0x40000>, <0x509e000 0x10>; reg-names = "kgsl_3d0_reg_memory", "cx_mem";
+ #cooling-cells = <2>; + /* * Look ma, no clocks! The GPU clocks and power are * controlled entirely by the GMU
On Mon, Oct 19, 2020 at 06:44:28PM +0530, Akhil P Oommen wrote:
Add cooling device support to gpu. A cooling device is bound to a thermal zone to allow thermal mitigation.
Signed-off-by: Akhil P Oommen akhilpo@codeaurora.org
Documentation/devicetree/bindings/display/msm/gpu.txt | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index 1af0ff1..a496381 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -39,6 +39,10 @@ Required properties: a4xx Snapdragon SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml.
+Optional properties: +- #cooling-cells: The value must be 2. Please refer
- Documentation/devicetree/bindings/thermal/thermal.txt for detail.
This file doesn't exist anymore.
Example 3xx/4xx:
/ { @@ -61,6 +65,7 @@ Example 3xx/4xx: power-domains = <&mmcc OXILICX_GDSC>; operating-points-v2 = <&gpu_opp_table>; iommus = <&gpu_iommu 0>;
#cooling-cells = <2>;};
gpu_sram: ocmem@fdd00000 {
@@ -98,6 +103,8 @@ Example a6xx (with GMU): reg = <0x5000000 0x40000>, <0x509e000 0x10>; reg-names = "kgsl_3d0_reg_memory", "cx_mem";
#cooling-cells = <2>;- /*
- Look ma, no clocks! The GPU clocks and power are
- controlled entirely by the GMU
-- 2.7.4
dri-devel@lists.freedesktop.org
-
Akhil P Oommen -
Rob Herring