We missed this setting in the initial device info patch's definition of XE_HPC_FEATURES.
Signed-off-by: Matt Roper matthew.d.roper@intel.com --- drivers/gpu/drm/i915/i915_pci.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 047a6e326031..a5a1a7647320 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -1089,6 +1089,7 @@ static const struct intel_device_info ats_m_info = { XE_HP_FEATURES, \ .dma_mask_size = 52, \ .has_3d_pipeline = 0, \ + .has_guc_deprivilege = 1, \ .has_l3_ccs_read = 1, \ .has_one_eu_per_fuse_bit = 1
On Thu, 2022-06-02 at 16:30 -0700, Matt Roper wrote:
We missed this setting in the initial device info patch's definition of XE_HPC_FEATURES.
Reviewed-by: José Roberto de Souza jose.souza@intel.com
Signed-off-by: Matt Roper matthew.d.roper@intel.com
drivers/gpu/drm/i915/i915_pci.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 047a6e326031..a5a1a7647320 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -1089,6 +1089,7 @@ static const struct intel_device_info ats_m_info = { XE_HP_FEATURES, \ .dma_mask_size = 52, \ .has_3d_pipeline = 0, \
- .has_guc_deprivilege = 1, \ .has_l3_ccs_read = 1, \ .has_one_eu_per_fuse_bit = 1
dri-devel@lists.freedesktop.org
-
Matt Roper -
Souza, Jose