From: Alex Deucher alexander.deucher@amd.com

It was only used for dynpm, but has been replaced with a better implementation using fences. Remove it.

Signed-off-by: Alex Deucher alexander.deucher@amd.com --- drivers/gpu/drm/radeon/evergreen.c | 5 ---- drivers/gpu/drm/radeon/r100.c | 19 ----------------- drivers/gpu/drm/radeon/r600.c | 5 ---- drivers/gpu/drm/radeon/radeon.h | 4 --- drivers/gpu/drm/radeon/radeon_device.c | 1 - drivers/gpu/drm/radeon/radeon_irq_kms.c | 33 ------------------------------- drivers/gpu/drm/radeon/rs600.c | 19 ----------------- drivers/gpu/drm/radeon/si.c | 5 ---- 8 files changed, 0 insertions(+), 91 deletions(-)

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index e93b80a..90293c1 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -2541,10 +2541,6 @@ int evergreen_irq_set(struct radeon_device *rdev) DRM_DEBUG("evergreen_irq_set: hdmi 5\n"); afmt6 |= AFMT_AZ_FORMAT_WTRIG_MASK; } - if (rdev->irq.gui_idle) { - DRM_DEBUG("gui idle\n"); - grbm_int_cntl |= GUI_IDLE_INT_ENABLE; - }

if (rdev->family >= CHIP_CAYMAN) { cayman_cp_int_cntl_setup(rdev, 0, cp_int_cntl); @@ -3079,7 +3075,6 @@ restart_ih: break; case 233: /* GUI IDLE */ DRM_DEBUG("IH: GUI idle\n"); - wake_up(&rdev->irq.idle_queue); break; default: DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 8acb34f..4774e50 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -698,9 +698,6 @@ int r100_irq_set(struct radeon_device *rdev) if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { tmp |= RADEON_SW_INT_ENABLE; } - if (rdev->irq.gui_idle) { - tmp |= RADEON_GUI_IDLE_MASK; - } if (rdev->irq.crtc_vblank_int[0] || atomic_read(&rdev->irq.pflip[0])) { tmp |= RADEON_CRTC_VBLANK_MASK; @@ -737,12 +734,6 @@ static uint32_t r100_irq_ack(struct radeon_device *rdev) RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT | RADEON_FP_DETECT_STAT | RADEON_FP2_DETECT_STAT;

- /* the interrupt works, but the status bit is permanently asserted */ - if (rdev->irq.gui_idle && radeon_gui_idle(rdev)) { - if (!rdev->irq.gui_idle_acked) - irq_mask |= RADEON_GUI_IDLE_STAT; - } - if (irqs) { WREG32(RADEON_GEN_INT_STATUS, irqs); } @@ -754,9 +745,6 @@ int r100_irq_process(struct radeon_device *rdev) uint32_t status, msi_rearm; bool queue_hotplug = false;

- /* reset gui idle ack. the status bit is broken */ - rdev->irq.gui_idle_acked = false; - status = r100_irq_ack(rdev); if (!status) { return IRQ_NONE; @@ -769,11 +757,6 @@ int r100_irq_process(struct radeon_device *rdev) if (status & RADEON_SW_INT_TEST) { radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); } - /* gui idle interrupt */ - if (status & RADEON_GUI_IDLE_STAT) { - rdev->irq.gui_idle_acked = true; - wake_up(&rdev->irq.idle_queue); - } /* Vertical blank interrupts */ if (status & RADEON_CRTC_VBLANK_STAT) { if (rdev->irq.crtc_vblank_int[0]) { @@ -803,8 +786,6 @@ int r100_irq_process(struct radeon_device *rdev) } status = r100_irq_ack(rdev); } - /* reset gui idle ack. the status bit is broken */ - rdev->irq.gui_idle_acked = false; if (queue_hotplug) schedule_work(&rdev->hotplug_work); if (rdev->msi_enabled) { diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index d79c639..459c251 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -3088,10 +3088,6 @@ int r600_irq_set(struct radeon_device *rdev) DRM_DEBUG("r600_irq_set: hdmi 0\n"); hdmi1 |= HDMI0_AZ_FORMAT_WTRIG_MASK; } - if (rdev->irq.gui_idle) { - DRM_DEBUG("gui idle\n"); - grbm_int_cntl |= GUI_IDLE_INT_ENABLE; - }

WREG32(CP_INT_CNTL, cp_int_cntl); WREG32(DxMODE_INT_MASK, mode_int); @@ -3475,7 +3471,6 @@ restart_ih: break; case 233: /* GUI IDLE */ DRM_DEBUG("IH: GUI idle\n"); - wake_up(&rdev->irq.idle_queue); break; default: DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 9930419..b70ec30 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -581,9 +581,6 @@ struct radeon_irq { atomic_t pflip[RADEON_MAX_CRTCS]; wait_queue_head_t vblank_queue; bool hpd[RADEON_MAX_HPD_PINS]; - bool gui_idle; - bool gui_idle_acked; - wait_queue_head_t idle_queue; bool afmt[RADEON_MAX_AFMT_BLOCKS]; union radeon_irq_stat_regs stat_regs; }; @@ -598,7 +595,6 @@ void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block); void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block); void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask); void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask); -int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev);

/* * CP & rings. diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index d2e2438..3a06d71 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1013,7 +1013,6 @@ int radeon_device_init(struct radeon_device *rdev, init_rwsem(&rdev->pm.mclk_lock); init_rwsem(&rdev->exclusive_lock); init_waitqueue_head(&rdev->irq.vblank_queue); - init_waitqueue_head(&rdev->irq.idle_queue); r = radeon_gem_init(rdev); if (r) return r; diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c index afaa172..c4e638d 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c @@ -99,7 +99,6 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev) /* Disable *all* interrupts */ for (i = 0; i < RADEON_NUM_RINGS; i++) atomic_set(&rdev->irq.ring_int[i], 0); - rdev->irq.gui_idle = false; for (i = 0; i < RADEON_MAX_HPD_PINS; i++) rdev->irq.hpd[i] = false; for (i = 0; i < RADEON_MAX_CRTCS; i++) { @@ -147,7 +146,6 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev) /* Disable *all* interrupts */ for (i = 0; i < RADEON_NUM_RINGS; i++) atomic_set(&rdev->irq.ring_int[i], 0); - rdev->irq.gui_idle = false; for (i = 0; i < RADEON_MAX_HPD_PINS; i++) rdev->irq.hpd[i] = false; for (i = 0; i < RADEON_MAX_CRTCS; i++) { @@ -457,34 +455,3 @@ void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) spin_unlock_irqrestore(&rdev->irq.lock, irqflags); }

-/** - * radeon_irq_kms_wait_gui_idle - waits for drawing engine to be idle - * - * @rdev: radeon device pointer - * - * Enabled the GUI idle interrupt and waits for it to fire (r6xx+). - * This is currently used to make sure the 3D engine is idle for power - * management, but should be replaces with proper fence waits. - * GUI idle interrupts don't work very well on pre-r6xx hw and it also - * does not take into account other aspects of the chip that may be busy. - * DO NOT USE GOING FORWARD. - */ -int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev) -{ - unsigned long irqflags; - int r; - - spin_lock_irqsave(&rdev->irq.lock, irqflags); - rdev->irq.gui_idle = true; - radeon_irq_set(rdev); - spin_unlock_irqrestore(&rdev->irq.lock, irqflags); - - r = wait_event_timeout(rdev->irq.idle_queue, radeon_gui_idle(rdev), - msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT)); - - spin_lock_irqsave(&rdev->irq.lock, irqflags); - rdev->irq.gui_idle = false; - radeon_irq_set(rdev); - spin_unlock_irqrestore(&rdev->irq.lock, irqflags); - return r; -} diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 5301b3d..c048ac5 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -567,9 +567,6 @@ int rs600_irq_set(struct radeon_device *rdev) if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { tmp |= S_000040_SW_INT_EN(1); } - if (rdev->irq.gui_idle) { - tmp |= S_000040_GUI_IDLE(1); - } if (rdev->irq.crtc_vblank_int[0] || atomic_read(&rdev->irq.pflip[0])) { mode_int |= S_006540_D1MODE_VBLANK_INT_MASK(1); @@ -602,12 +599,6 @@ static inline u32 rs600_irq_ack(struct radeon_device *rdev) uint32_t irq_mask = S_000044_SW_INT(1); u32 tmp;

- /* the interrupt works, but the status bit is permanently asserted */ - if (rdev->irq.gui_idle && radeon_gui_idle(rdev)) { - if (!rdev->irq.gui_idle_acked) - irq_mask |= S_000044_GUI_IDLE_STAT(1); - } - if (G_000044_DISPLAY_INT_STAT(irqs)) { rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { @@ -667,9 +658,6 @@ int rs600_irq_process(struct radeon_device *rdev) bool queue_hotplug = false; bool queue_hdmi = false;

- /* reset gui idle ack. the status bit is broken */ - rdev->irq.gui_idle_acked = false; - status = rs600_irq_ack(rdev); if (!status && !rdev->irq.stat_regs.r500.disp_int && @@ -683,11 +671,6 @@ int rs600_irq_process(struct radeon_device *rdev) if (G_000044_SW_INT(status)) { radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); } - /* GUI idle */ - if (G_000040_GUI_IDLE(status)) { - rdev->irq.gui_idle_acked = true; - wake_up(&rdev->irq.idle_queue); - } /* Vertical blank interrupts */ if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { if (rdev->irq.crtc_vblank_int[0]) { @@ -721,8 +704,6 @@ int rs600_irq_process(struct radeon_device *rdev) } status = rs600_irq_ack(rdev); } - /* reset gui idle ack. the status bit is broken */ - rdev->irq.gui_idle_acked = false; if (queue_hotplug) schedule_work(&rdev->hotplug_work); if (queue_hdmi) diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 0139e22..3feff33 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -3199,10 +3199,6 @@ int si_irq_set(struct radeon_device *rdev) DRM_DEBUG("si_irq_set: hpd 6\n"); hpd6 |= DC_HPDx_INT_EN; } - if (rdev->irq.gui_idle) { - DRM_DEBUG("gui idle\n"); - grbm_int_cntl |= GUI_IDLE_INT_ENABLE; - }

WREG32(CP_INT_CNTL_RING0, cp_int_cntl); WREG32(CP_INT_CNTL_RING1, cp_int_cntl1); @@ -3658,7 +3654,6 @@ restart_ih: break; case 233: /* GUI IDLE */ DRM_DEBUG("IH: GUI idle\n"); - wake_up(&rdev->irq.idle_queue); break; default: DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);

On Fri, Aug 10, 2012 at 1:29 PM, alexdeucher@gmail.com wrote:

From: Alex Deucher alexander.deucher@amd.com

1. Drop gui idle stuff, it's not as reliable as fences and only

covers the 3D engine. 2. Wait for fences on all rings. This makes sure all rings are idle when reclocking.

Signed-off-by: Alex Deucher alexander.deucher@amd.com

Reviewed-by: Jerome Glisse jglisse@redhat.com

---

drivers/gpu/drm/radeon/radeon_pm.c | 17 ++++++----------- 1 files changed, 6 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 7ae6066..2c2c901 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c @@ -253,18 +253,13 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev) down_write(&rdev->pm.mclk_lock); mutex_lock(&rdev->ring_lock);

•   /* gui idle int has issues on older chips it seems */
  

•   if (rdev->family >= CHIP_R600) {
  

•           if (rdev->irq.installed) {
  

•                   /* wait for GPU to become idle */
  

•                   radeon_irq_kms_wait_gui_idle(rdev);
  

•           }
  

•   } else {
  

•           struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
  

•           if (ring->ready) {
  

•                   radeon_fence_wait_empty_locked(rdev, RADEON_RING_TYPE_GFX_INDEX);
  

•           }
  

•   /* wait for the rings to drain */
  

•   for (i = 0; i < RADEON_NUM_RINGS; i++) {
  

•           struct radeon_ring *ring = &rdev->ring[i];
  

•           if (ring->ready)
  

•                   radeon_fence_wait_empty_locked(rdev, i);
    }
  

•   radeon_unmap_vram_bos(rdev);
  
    if (rdev->irq.installed) {
  

-- 1.7.7.5

---

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