[PATCH 00/13] drm/kms/mode: using helper func drm_display_mode_to/from_videomode for calculating timing parameters
1.There is a function in drm-core to calculate display timing parameters: horizontal front porch, back porch, sync length, vertical front porch, back porch, sync length and clock in Hz. However, some drivers are still calculating these parameters themselves. Therefore, there is a duplication of the code. This patch series replaces this redundant code with the function drm_display_mode_to_videomode. This removes nearly 100 redundant lines from the related drivers. 2.For some drivers (sun4i) the reverse helper drm_display_mode_from_videomode is used. 3.For some drivers it replaces arithmatic operators (*, /) with shifting operators (>>, <<). 4.For some drivers DRM_MODE_FLAG_* are replaced with DISPLAY_FLAGS_* flags. 5.These changes apply to following crtc and encoder drivers: atmel-hlcdc bridge-tc358767 exynos-dsi fsl-dcu gma500-mdfld_dsi_dpi hisilicon-kirin_dsi, ade meson-encoder pl111-display sun4i-tv ti lcdc tegra dc mediatek dpi dsi bridge-adv7533
Satendra Singh Thakur (13): drm/kms/mode/atmel-hlcdc: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/bridge-tc358767: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/exynos-dsi: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/fsl-dcu: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/gma500-mdfld_dsi_dpi: using helper function drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/hisilicon-kirin-dsi-ade: using helper function drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/meson-encoder: using helper function drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/pl111-display: using helper function drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/sun4i-tv: using helper func drm_display_mode_from_videomode for calculating timing parameters drm/kms/mode/ti-lcdc: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/tegra: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/mtk_dpi_dsi: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/bridge-adv7533: using helper func drm_display_mode_to_videomode for calculating timing parameters
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 28 +++-- drivers/gpu/drm/bridge/adv7511/adv7533.c | 35 +++--- drivers/gpu/drm/bridge/tc358767.c | 42 +++---- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 9 +- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 29 ++--- drivers/gpu/drm/gma500/mdfld_dsi_dpi.c | 28 ++--- drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 42 ++++--- drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 52 +++------ drivers/gpu/drm/mediatek/mtk_dpi.c | 60 +++++----- drivers/gpu/drm/mediatek/mtk_dsi.c | 14 +-- drivers/gpu/drm/meson/meson_venc.c | 149 +++++++++++------------- drivers/gpu/drm/pl111/pl111_display.c | 40 +++---- drivers/gpu/drm/sun4i/sun4i_tv.c | 67 ++++------- drivers/gpu/drm/tegra/dc.c | 15 ++- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 60 +++++----- 15 files changed, 280 insertions(+), 390 deletions(-)
To avoid duplicate logic for the same: There is a function in drm-core to calculate display timing parameters: horizontal front porch, back porch, sync length, vertical front porch, back porch, sync length and clock in Hz. However, some drivers are still calculating these parameters themselves. Therefore, there is a duplication of the code. This patch series replaces this redundant code with the function drm_display_mode_to_videomode. This removes nearly 100 redundant lines from the related drivers.
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c index c1ea5c3..3dfeef0 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c @@ -26,6 +26,7 @@ #include <linux/pm_runtime.h>
#include "atmel_hlcdc_dc.h" +#include <video/videomode.h>
#define ATMEL_HLCDC_LAYER_IRQS_OFFSET 8
@@ -393,27 +394,24 @@ enum drm_mode_status atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc, const struct drm_display_mode *mode) { - int vfront_porch = mode->vsync_start - mode->vdisplay; - int vback_porch = mode->vtotal - mode->vsync_end; - int vsync_len = mode->vsync_end - mode->vsync_start; - int hfront_porch = mode->hsync_start - mode->hdisplay; - int hback_porch = mode->htotal - mode->hsync_end; - int hsync_len = mode->hsync_end - mode->hsync_start; - - if (hsync_len > dc->desc->max_spw + 1 || hsync_len < 1) + struct videomode vm; + + drm_display_mode_to_videomode(mode, &vm); + + if (vm.hsync_len > dc->desc->max_spw + 1 || vm.hsync_len < 1) return MODE_HSYNC;
- if (vsync_len > dc->desc->max_spw + 1 || vsync_len < 1) + if (vm.vsync_len > dc->desc->max_spw + 1 || vm.vsync_len < 1) return MODE_VSYNC;
- if (hfront_porch > dc->desc->max_hpw + 1 || hfront_porch < 1 || - hback_porch > dc->desc->max_hpw + 1 || hback_porch < 1 || - mode->hdisplay < 1) + if (vm.hfront_porch > dc->desc->max_hpw + 1 || vm.hfront_porch < 1 || + vm.hback_porch > dc->desc->max_hpw + 1 || vm.hback_porch < 1 || + vm.hactive < 1) return MODE_H_ILLEGAL;
- if (vfront_porch > dc->desc->max_vpw + 1 || vfront_porch < 1 || - vback_porch > dc->desc->max_vpw || vback_porch < 0 || - mode->vdisplay < 1) + if (vm.vfront_porch > dc->desc->max_vpw + 1 || vm.vfront_porch < 1 || + vm.vback_porch > dc->desc->max_vpw || vm.vback_porch < 0 || + vm.vactive < 1) return MODE_V_ILLEGAL;
return MODE_OK;
To avoid duplicate logic for timing parameters
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/bridge/tc358767.c | 42 ++++++++++++++++++--------------------- 1 file changed, 19 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 08ab7d6a..d90ac27 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -39,6 +39,7 @@ #include <drm/drm_edid.h> #include <drm/drm_of.h> #include <drm/drm_panel.h> +#include <video/videomode.h>
/* Registers */
@@ -653,14 +654,9 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode) int ret; int vid_sync_dly; int max_tu_symbol; + struct videomode vm;
- int left_margin = mode->htotal - mode->hsync_end; - int right_margin = mode->hsync_start - mode->hdisplay; - int hsync_len = mode->hsync_end - mode->hsync_start; - int upper_margin = mode->vtotal - mode->vsync_end; - int lower_margin = mode->vsync_start - mode->vdisplay; - int vsync_len = mode->vsync_end - mode->vsync_start; - + drm_display_mode_to_videomode(mode, &vm); /* * Recommended maximum number of symbols transferred in a transfer unit: * DIV_ROUND_UP((input active video bandwidth in bytes) * tu_size, @@ -670,11 +666,11 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode) max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
dev_dbg(tc->dev, "set mode %dx%d\n", - mode->hdisplay, mode->vdisplay); + vm.hactive, vm.vactive); dev_dbg(tc->dev, "H margin %d,%d sync %d\n", - left_margin, right_margin, hsync_len); + vm.hback_porch, vm.hfront_porch, vm.hsync_len); dev_dbg(tc->dev, "V margin %d,%d sync %d\n", - upper_margin, lower_margin, vsync_len); + vm.vback_porch, vm.vfront_porch, vm.vsync_len); dev_dbg(tc->dev, "total: %dx%d\n", mode->htotal, mode->vtotal);
@@ -686,14 +682,14 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode) */ tc_write(VPCTRL0, (0 << 20) /* VSDELAY */ | OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED); - tc_write(HTIM01, (ALIGN(left_margin, 2) << 16) | /* H back porch */ - (ALIGN(hsync_len, 2) << 0)); /* Hsync */ - tc_write(HTIM02, (ALIGN(right_margin, 2) << 16) | /* H front porch */ - (ALIGN(mode->hdisplay, 2) << 0)); /* width */ - tc_write(VTIM01, (upper_margin << 16) | /* V back porch */ - (vsync_len << 0)); /* Vsync */ - tc_write(VTIM02, (lower_margin << 16) | /* V front porch */ - (mode->vdisplay << 0)); /* height */ + tc_write(HTIM01, (ALIGN(vm.hback_porch, 2) << 16) | /* H back porch */ + (ALIGN(vm.hsync_len, 2) << 0)); /* Hsync */ + tc_write(HTIM02, (ALIGN(vm.hfront_porch, 2) << 16) | /* H front porch */ + (ALIGN(vm.hactive, 2) << 0)); /* width */ + tc_write(VTIM01, (vm.vback_porch << 16) | /* V back porch */ + (vm.vsync_len << 0)); /* Vsync */ + tc_write(VTIM02, (vm.vfront_porch << 16) | /* V front porch */ + (vm.vactive << 0)); /* height */ tc_write(VFUEN0, VFUEN); /* update settings */
/* Test pattern settings */ @@ -706,7 +702,7 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode) 0);
/* DP Main Stream Attributes */ - vid_sync_dly = hsync_len + left_margin + mode->hdisplay; + vid_sync_dly = vm.hsync_len + vm.hback_porch + vm.hactive; tc_write(DP0_VIDSYNCDELAY, (max_tu_symbol << 16) | /* thresh_dly */ (vid_sync_dly << 0)); @@ -714,12 +710,12 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode) tc_write(DP0_TOTALVAL, (mode->vtotal << 16) | (mode->htotal));
tc_write(DP0_STARTVAL, - ((upper_margin + vsync_len) << 16) | - ((left_margin + hsync_len) << 0)); + ((vm.vback_porch + vm.vsync_len) << 16) | + ((vm.hback_porch + vm.hsync_len) << 0));
- tc_write(DP0_ACTIVEVAL, (mode->vdisplay << 16) | (mode->hdisplay)); + tc_write(DP0_ACTIVEVAL, (vm.vactive << 16) | (vm.hactive));
- tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0)); + tc_write(DP0_SYNCVAL, (vm.vsync_len << 16) | (vm.hsync_len << 0));
tc_write(DPIPXLFMT, VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW | DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | DPI_BPP_RGB888);
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7904ffa..9397e5c 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1493,14 +1493,7 @@ static void exynos_dsi_mode_set(struct drm_encoder *encoder, struct videomode *vm = &dsi->vm; struct drm_display_mode *m = adjusted_mode;
- vm->hactive = m->hdisplay; - vm->vactive = m->vdisplay; - vm->vfront_porch = m->vsync_start - m->vdisplay; - vm->vback_porch = m->vtotal - m->vsync_end; - vm->vsync_len = m->vsync_end - m->vsync_start; - vm->hfront_porch = m->hsync_start - m->hdisplay; - vm->hback_porch = m->htotal - m->hsync_end; - vm->hsync_len = m->hsync_end - m->hsync_start; + drm_display_mode_to_videomode(m, vm); }
static const struct drm_encoder_helper_funcs exynos_dsi_encoder_helper_funcs = {
On 03/05/18 09:39, Satendra Singh Thakur wrote:
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7904ffa..9397e5c 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1493,14 +1493,7 @@ static void exynos_dsi_mode_set(struct drm_encoder *encoder, struct videomode *vm = &dsi->vm; struct drm_display_mode *m = adjusted_mode;
FWIW you could just pass &dsi->vm and adjusted_mode directly to the helper and get rid of these locals too.
Robin.
- vm->hactive = m->hdisplay;
- vm->vactive = m->vdisplay;
- vm->vfront_porch = m->vsync_start - m->vdisplay;
- vm->vback_porch = m->vtotal - m->vsync_end;
- vm->vsync_len = m->vsync_end - m->vsync_start;
- vm->hfront_porch = m->hsync_start - m->hdisplay;
- vm->hback_porch = m->htotal - m->hsync_end;
- vm->hsync_len = m->hsync_end - m->hsync_start;
drm_display_mode_to_videomode(m, vm); }
static const struct drm_encoder_helper_funcs exynos_dsi_encoder_helper_funcs = {
To avoid duplicate logic for the same
Reviewed-by: Robin Murphy robin.murphy@arm.com Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Acked-by: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7904ffa..7fe84fd 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1490,17 +1490,8 @@ static void exynos_dsi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *adjusted_mode) { struct exynos_dsi *dsi = encoder_to_dsi(encoder); - struct videomode *vm = &dsi->vm; - struct drm_display_mode *m = adjusted_mode; - - vm->hactive = m->hdisplay; - vm->vactive = m->vdisplay; - vm->vfront_porch = m->vsync_start - m->vdisplay; - vm->vback_porch = m->vtotal - m->vsync_end; - vm->vsync_len = m->vsync_end - m->vsync_start; - vm->hfront_porch = m->hsync_start - m->hdisplay; - vm->hback_porch = m->htotal - m->hsync_end; - vm->hsync_len = m->hsync_end - m->hsync_start; + + drm_display_mode_to_videomode(adjusted_mode, &dsi->vm); }
static const struct drm_encoder_helper_funcs exynos_dsi_encoder_helper_funcs = {
On 04/05/18 09:15, Satendra Singh Thakur wrote:
To avoid duplicate logic for the same
Reviewed-by: Robin Murphy robin.murphy@arm.com
Please read section 13 of Documentation/process/submitting-patches.rst for what this tag means; specifically, it is definitely not "this guy read my patch".
FWIW, in my case the patches I give trivial coding style comments on tend to be the ones I'm specifically *not* in a position to review in a technical capacity - the reason I'm looking at them in the first place is out of interest to learn more about how the relevant subsystems work.
Robin.
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Acked-by: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7904ffa..7fe84fd 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1490,17 +1490,8 @@ static void exynos_dsi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *adjusted_mode) { struct exynos_dsi *dsi = encoder_to_dsi(encoder);
- struct videomode *vm = &dsi->vm;
- struct drm_display_mode *m = adjusted_mode;
- vm->hactive = m->hdisplay;
- vm->vactive = m->vdisplay;
- vm->vfront_porch = m->vsync_start - m->vdisplay;
- vm->vback_porch = m->vtotal - m->vsync_end;
- vm->vsync_len = m->vsync_end - m->vsync_start;
- vm->hfront_porch = m->hsync_start - m->hdisplay;
- vm->hback_porch = m->htotal - m->hsync_end;
- vm->hsync_len = m->hsync_end - m->hsync_start;
drm_display_mode_to_videomode(adjusted_mode, &dsi->vm); }
static const struct drm_encoder_helper_funcs exynos_dsi_encoder_helper_funcs = {
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Acked-by: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com ---
v2: Removed Mr Robin from reviewed-by field
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7904ffa..7fe84fd 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1490,17 +1490,8 @@ static void exynos_dsi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *adjusted_mode) { struct exynos_dsi *dsi = encoder_to_dsi(encoder); - struct videomode *vm = &dsi->vm; - struct drm_display_mode *m = adjusted_mode; - - vm->hactive = m->hdisplay; - vm->vactive = m->vdisplay; - vm->vfront_porch = m->vsync_start - m->vdisplay; - vm->vback_porch = m->vtotal - m->vsync_end; - vm->vsync_len = m->vsync_end - m->vsync_start; - vm->hfront_porch = m->hsync_start - m->hdisplay; - vm->hback_porch = m->htotal - m->hsync_end; - vm->hsync_len = m->hsync_end - m->hsync_start; + + drm_display_mode_to_videomode(adjusted_mode, &dsi->vm); }
static const struct drm_encoder_helper_funcs exynos_dsi_encoder_helper_funcs = {
Hi Satendra Singh Thakur,
On 07.05.2018 05:32, Satendra Singh Thakur wrote:
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Acked-by: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com
Whole exynos_dsi_mode_set callback is redundant, so I have posted patch removing it [1], so this patch can be dropped.
[1]: https://marc.info/?l=dri-devel&m=152568538400712
Regards Andrzej
v2: Removed Mr Robin from reviewed-by field
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 7904ffa..7fe84fd 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1490,17 +1490,8 @@ static void exynos_dsi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *adjusted_mode) { struct exynos_dsi *dsi = encoder_to_dsi(encoder);
- struct videomode *vm = &dsi->vm;
- struct drm_display_mode *m = adjusted_mode;
- vm->hactive = m->hdisplay;
- vm->vactive = m->vdisplay;
- vm->vfront_porch = m->vsync_start - m->vdisplay;
- vm->vback_porch = m->vtotal - m->vsync_end;
- vm->vsync_len = m->vsync_end - m->vsync_start;
- vm->hfront_porch = m->hsync_start - m->hdisplay;
- vm->hback_porch = m->htotal - m->hsync_end;
- vm->hsync_len = m->hsync_end - m->hsync_start;
- drm_display_mode_to_videomode(adjusted_mode, &dsi->vm);
}
static const struct drm_encoder_helper_funcs exynos_dsi_encoder_helper_funcs = {
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 29 ++++++++++++----------------- 1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index 0e37524..3c651f8 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -17,6 +17,7 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> #include <drm/drm_crtc_helper.h> +#include <video/videomode.h>
#include "fsl_dcu_drm_crtc.h" #include "fsl_dcu_drm_drv.h" @@ -85,19 +86,13 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; struct drm_connector *con = &fsl_dev->connector.base; struct drm_display_mode *mode = &crtc->state->mode; - unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0; + unsigned int index, pol = 0; + struct videomode vm;
index = drm_crtc_index(crtc); - clk_set_rate(fsl_dev->pix_clk, mode->clock * 1000); - - /* Configure timings: */ - hbp = mode->htotal - mode->hsync_end; - hfp = mode->hsync_start - mode->hdisplay; - hsw = mode->hsync_end - mode->hsync_start; - vbp = mode->vtotal - mode->vsync_end; - vfp = mode->vsync_start - mode->vdisplay; - vsw = mode->vsync_end - mode->vsync_start; - + /* Configure timings:*/ + drm_display_mode_to_videomode(mode, &vm); + clk_set_rate(fsl_dev->pix_clk, vm.pixelclock); /* INV_PXCK as default (most display sample data on rising edge) */ if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) pol |= DCU_SYN_POL_INV_PXCK; @@ -109,13 +104,13 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) pol |= DCU_SYN_POL_INV_VS_LOW;
regmap_write(fsl_dev->regmap, DCU_HSYN_PARA, - DCU_HSYN_PARA_BP(hbp) | - DCU_HSYN_PARA_PW(hsw) | - DCU_HSYN_PARA_FP(hfp)); + DCU_HSYN_PARA_BP(vm.hback_porch) | + DCU_HSYN_PARA_PW(vm.hsync_len) | + DCU_HSYN_PARA_FP(vm.hfront_porch)); regmap_write(fsl_dev->regmap, DCU_VSYN_PARA, - DCU_VSYN_PARA_BP(vbp) | - DCU_VSYN_PARA_PW(vsw) | - DCU_VSYN_PARA_FP(vfp)); + DCU_VSYN_PARA_BP(vm.vback_porch) | + DCU_VSYN_PARA_PW(vm.vsync_len) | + DCU_VSYN_PARA_FP(vm.vfront_porch)); regmap_write(fsl_dev->regmap, DCU_DISP_SIZE, DCU_DISP_SIZE_DELTA_Y(mode->vdisplay) | DCU_DISP_SIZE_DELTA_X(mode->hdisplay));
On 03.05.2018 10:44, Satendra Singh Thakur wrote:
To avoid duplicate logic for the same
How about:
Use drm_display_mode_to_videomode to avoid duplicate logic.
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 29 ++++++++++++----------------- 1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index 0e37524..3c651f8 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -17,6 +17,7 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> #include <drm/drm_crtc_helper.h> +#include <video/videomode.h>
I don't think this is needed here.
But probably drm/drm_modes.h is, since that is where drm_display_mode_to_videomode is declared...
#include "fsl_dcu_drm_crtc.h" #include "fsl_dcu_drm_drv.h" @@ -85,19 +86,13 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; struct drm_connector *con = &fsl_dev->connector.base; struct drm_display_mode *mode = &crtc->state->mode;
- unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0;
- unsigned int index, pol = 0;
Remove space between int and index.
struct videomode vm;
index = drm_crtc_index(crtc);
- clk_set_rate(fsl_dev->pix_clk, mode->clock * 1000);
- /* Configure timings: */
- hbp = mode->htotal - mode->hsync_end;
- hfp = mode->hsync_start - mode->hdisplay;
- hsw = mode->hsync_end - mode->hsync_start;
- vbp = mode->vtotal - mode->vsync_end;
- vfp = mode->vsync_start - mode->vdisplay;
- vsw = mode->vsync_end - mode->vsync_start;
- /* Configure timings:*/
Drop that comment, it is not really helpful.
- drm_display_mode_to_videomode(mode, &vm);
- clk_set_rate(fsl_dev->pix_clk, vm.pixelclock);
Add newline here.
I like the patch! Thanks!
-- Stefan
/* INV_PXCK as default (most display sample data on rising edge) */ if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) pol |= DCU_SYN_POL_INV_PXCK; @@ -109,13 +104,13 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) pol |= DCU_SYN_POL_INV_VS_LOW;
regmap_write(fsl_dev->regmap, DCU_HSYN_PARA,
DCU_HSYN_PARA_BP(hbp) |DCU_HSYN_PARA_PW(hsw) |DCU_HSYN_PARA_FP(hfp));
DCU_HSYN_PARA_BP(vm.hback_porch) |DCU_HSYN_PARA_PW(vm.hsync_len) |DCU_HSYN_PARA_FP(vm.hfront_porch));
DCU_VSYN_PARA_BP(vbp) |DCU_VSYN_PARA_PW(vsw) |DCU_VSYN_PARA_FP(vfp));
DCU_VSYN_PARA_BP(vm.vback_porch) |DCU_VSYN_PARA_PW(vm.vsync_len) |DCU_VSYN_PARA_FP(vm.vfront_porch));
-Using drm_display_mode_to_videomode to avoid duplicate logic -Removed index = drm_crtc_index(crtc) as it is unused -Replaced DRM_MODE_FLAG_* flags with DISPLAY_FLAGS_* flags -Replaced mode->h/vdisplay with vm.h/vactive
Acked-by: Stefan Agner stefan@agner.ch Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com ---
v1: Thanks for the comments Mr Stefan. I fixed most of them, other ones can't be fixed as explained below: Header <video/videomode.h> defines struct vm, therefore we can't remove it. Tried to add new line below clk_set_rate but checkpatch gave error.
Other changes in the patch: Removed index = drm_crtc_index(crtc) line as it is unused Replaced DRM_MODE_FLAG_* flags with DISPLAY_FLAGS_* flags Replaced mode->h/vdisplay with vm.h/vactive Added acked-by field
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 37 ++++++++++++------------------ 1 file changed, 15 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index 0e37524..d6ea667 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -17,6 +17,7 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> #include <drm/drm_crtc_helper.h> +#include <video/videomode.h>
#include "fsl_dcu_drm_crtc.h" #include "fsl_dcu_drm_drv.h" @@ -85,40 +86,32 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; struct drm_connector *con = &fsl_dev->connector.base; struct drm_display_mode *mode = &crtc->state->mode; - unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0; - - index = drm_crtc_index(crtc); - clk_set_rate(fsl_dev->pix_clk, mode->clock * 1000); - - /* Configure timings: */ - hbp = mode->htotal - mode->hsync_end; - hfp = mode->hsync_start - mode->hdisplay; - hsw = mode->hsync_end - mode->hsync_start; - vbp = mode->vtotal - mode->vsync_end; - vfp = mode->vsync_start - mode->vdisplay; - vsw = mode->vsync_end - mode->vsync_start; + unsigned int pol = 0; + struct videomode vm;
+ drm_display_mode_to_videomode(mode, &vm); + clk_set_rate(fsl_dev->pix_clk, vm.pixelclock); /* INV_PXCK as default (most display sample data on rising edge) */ if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) pol |= DCU_SYN_POL_INV_PXCK;
- if (mode->flags & DRM_MODE_FLAG_NHSYNC) + if (vm.flags & DISPLAY_FLAGS_HSYNC_LOW) pol |= DCU_SYN_POL_INV_HS_LOW;
- if (mode->flags & DRM_MODE_FLAG_NVSYNC) + if (vm.flags & DISPLAY_FLAGS_VSYNC_LOW) pol |= DCU_SYN_POL_INV_VS_LOW;
regmap_write(fsl_dev->regmap, DCU_HSYN_PARA, - DCU_HSYN_PARA_BP(hbp) | - DCU_HSYN_PARA_PW(hsw) | - DCU_HSYN_PARA_FP(hfp)); + DCU_HSYN_PARA_BP(vm.hback_porch) | + DCU_HSYN_PARA_PW(vm.hsync_len) | + DCU_HSYN_PARA_FP(vm.hfront_porch)); regmap_write(fsl_dev->regmap, DCU_VSYN_PARA, - DCU_VSYN_PARA_BP(vbp) | - DCU_VSYN_PARA_PW(vsw) | - DCU_VSYN_PARA_FP(vfp)); + DCU_VSYN_PARA_BP(vm.vback_porch) | + DCU_VSYN_PARA_PW(vm.vsync_len) | + DCU_VSYN_PARA_FP(vm.vfront_porch)); regmap_write(fsl_dev->regmap, DCU_DISP_SIZE, - DCU_DISP_SIZE_DELTA_Y(mode->vdisplay) | - DCU_DISP_SIZE_DELTA_X(mode->hdisplay)); + DCU_DISP_SIZE_DELTA_Y(vm.vactive) | + DCU_DISP_SIZE_DELTA_X(vm.hactive)); regmap_write(fsl_dev->regmap, DCU_SYN_POL, pol); regmap_write(fsl_dev->regmap, DCU_BGND, DCU_BGND_R(0) | DCU_BGND_G(0) | DCU_BGND_B(0));
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/gma500/mdfld_dsi_dpi.c | 28 ++++++++++------------------ 1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c index a05c0206..0ac3e1f 100644 --- a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c +++ b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c @@ -24,7 +24,7 @@ * jim liu jim.liu@intel.com * Jackie Liyaodong.li@intel.com */ - +#include <video/videomode.h> #include "mdfld_dsi_dpi.h" #include "mdfld_output.h" #include "mdfld_dsi_pkg_sender.h" @@ -429,36 +429,28 @@ int mdfld_dsi_dpi_timing_calculation(struct drm_display_mode *mode, struct mdfld_dsi_dpi_timing *dpi_timing, int num_lane, int bpp) { - int pclk_hsync, pclk_hfp, pclk_hbp, pclk_hactive; - int pclk_vsync, pclk_vfp, pclk_vbp; - - pclk_hactive = mode->hdisplay; - pclk_hfp = mode->hsync_start - mode->hdisplay; - pclk_hsync = mode->hsync_end - mode->hsync_start; - pclk_hbp = mode->htotal - mode->hsync_end; + struct videomode vm;
- pclk_vfp = mode->vsync_start - mode->vdisplay; - pclk_vsync = mode->vsync_end - mode->vsync_start; - pclk_vbp = mode->vtotal - mode->vsync_end; + drm_display_mode_to_videomode(mode, &vm);
/* * byte clock counts were calculated by following formula * bclock_count = pclk_count * bpp / num_lane / 8 */ dpi_timing->hsync_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_hsync, num_lane, bpp); + vm.hsync_len, num_lane, bpp); dpi_timing->hbp_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_hbp, num_lane, bpp); + vm.hback_porch, num_lane, bpp); dpi_timing->hfp_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_hfp, num_lane, bpp); + vm.hfront_porch, num_lane, bpp); dpi_timing->hactive_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_hactive, num_lane, bpp); + vm.hactive, num_lane, bpp); dpi_timing->vsync_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_vsync, num_lane, bpp); + vm.vsync_len, num_lane, bpp); dpi_timing->vbp_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_vbp, num_lane, bpp); + vm.vback_porch, num_lane, bpp); dpi_timing->vfp_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_vfp, num_lane, bpp); + vm.vfront_porch, num_lane, bpp);
return 0; }
-Avoidded duplicate logic for the timing calculations -Removed func ade_set_pix_clk and combined it with func ade_ldi_set_mode
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 42 ++++++++++---------- drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 52 +++++++++---------------- 2 files changed, 39 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c index b4c7af3..902f63f 100644 --- a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c +++ b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c @@ -23,6 +23,7 @@ #include <drm/drm_mipi_dsi.h> #include <drm/drm_encoder_slave.h> #include <drm/drm_atomic_helper.h> +#include <video/videomode.h>
#include "dw_dsi_reg.h"
@@ -447,7 +448,7 @@ static void dsi_set_mode_timing(void __iomem *base, struct drm_display_mode *mode, enum mipi_dsi_pixel_format format) { - u32 hfp, hbp, hsw, vfp, vbp, vsw; + struct videomode vm; u32 hline_time; u32 hsa_time; u32 hbp_time; @@ -467,25 +468,22 @@ static void dsi_set_mode_timing(void __iomem *base, * The DSI IP accepts vertical timing using lines as normal, * but horizontal timing is a mixture of pixel-clocks for the * active region and byte-lane clocks for the blanking-related - * timings. hfp is specified as the total hline_time in byte- - * lane clocks minus hsa, hbp and active. + * timings. vm.hfront_porch is specified as the total hline_time + * in byte-lane clocks minus hsa, vm.hback_porch and active. */ pixel_clk_kHz = mode->clock; htot = mode->htotal; vtot = mode->vtotal; - hfp = mode->hsync_start - mode->hdisplay; - hbp = mode->htotal - mode->hsync_end; - hsw = mode->hsync_end - mode->hsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; - vsw = mode->vsync_end - mode->vsync_start; - if (vsw > 15) { - DRM_DEBUG_DRIVER("vsw exceeded 15\n"); - vsw = 15; + + drm_display_mode_to_videomode(mode, &vm); + + if (vm.vsync_len > 15) { + DRM_DEBUG_DRIVER("vm.vsync_len exceeded 15\n"); + vm.vsync_len = 15; }
- hsa_time = (hsw * lane_byte_clk_kHz) / pixel_clk_kHz; - hbp_time = (hbp * lane_byte_clk_kHz) / pixel_clk_kHz; + hsa_time = (vm.hsync_len * lane_byte_clk_kHz) / pixel_clk_kHz; + hbp_time = (vm.hback_porch * lane_byte_clk_kHz) / pixel_clk_kHz; tmp = (u64)htot * (u64)lane_byte_clk_kHz; hline_time = DIV_ROUND_UP(tmp, pixel_clk_kHz);
@@ -494,17 +492,17 @@ static void dsi_set_mode_timing(void __iomem *base, writel(hbp_time, base + VID_HBP_TIME); writel(hline_time, base + VID_HLINE_TIME);
- writel(vsw, base + VID_VSA_LINES); - writel(vbp, base + VID_VBP_LINES); - writel(vfp, base + VID_VFP_LINES); + writel(vm.vsync_len, base + VID_VSA_LINES); + writel(vm.vback_porch, base + VID_VBP_LINES); + writel(vm.vfront_porch, base + VID_VFP_LINES); writel(mode->vdisplay, base + VID_VACTIVE_LINES); writel(mode->hdisplay, base + VID_PKT_SIZE);
- DRM_DEBUG_DRIVER("htot=%d, hfp=%d, hbp=%d, hsw=%d\n", - htot, hfp, hbp, hsw); - DRM_DEBUG_DRIVER("vtol=%d, vfp=%d, vbp=%d, vsw=%d\n", - vtot, vfp, vbp, vsw); - DRM_DEBUG_DRIVER("hsa_time=%d, hbp_time=%d, hline_time=%d\n", + DRM_DEBUG_DRIVER("htot=%d, vm.hfront_porch=%d, vm.hback_porch=%d, vm.hsync_len=%d\n", + htot, vm.hfront_porch, vm.hback_porch, vm.hsync_len); + DRM_DEBUG_DRIVER("vtol=%d, vm.vfront_porch=%d, vm.vback_porch=%d, vm.vsync_len=%d\n", + vtot, vm.vfront_porch, vm.vback_porch, vm.vsync_len); + DRM_DEBUG_DRIVER("hsa_time=%d, vm.hback_porch_time=%d, hline_time=%d\n", hsa_time, hbp_time, hline_time); }
diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c index 2269be9..c3eea17 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c @@ -30,6 +30,7 @@ #include <drm/drm_plane_helper.h> #include <drm/drm_gem_cma_helper.h> #include <drm/drm_fb_cma_helper.h> +#include <video/videomode.h>
#include "kirin_drm_drv.h" #include "kirin_ade_reg.h" @@ -190,24 +191,6 @@ static bool ade_crtc_mode_fixup(struct drm_crtc *crtc, return true; }
- -static void ade_set_pix_clk(struct ade_hw_ctx *ctx, - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) -{ - u32 clk_Hz = mode->clock * 1000; - int ret; - - /* - * Success should be guaranteed in mode_valid call back, - * so failure shouldn't happen here - */ - ret = clk_set_rate(ctx->ade_pix_clk, clk_Hz); - if (ret) - DRM_ERROR("failed to set pixel clk %dHz (%d)\n", clk_Hz, ret); - adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000; -} - static void ade_ldi_set_mode(struct ade_crtc *acrtc, struct drm_display_mode *mode, struct drm_display_mode *adj_mode) @@ -216,28 +199,24 @@ static void ade_ldi_set_mode(struct ade_crtc *acrtc, void __iomem *base = ctx->base; u32 width = mode->hdisplay; u32 height = mode->vdisplay; - u32 hfp, hbp, hsw, vfp, vbp, vsw; + struct videomode vm; u32 plr_flags; + int ret;
plr_flags = (mode->flags & DRM_MODE_FLAG_NVSYNC) ? FLAG_NVSYNC : 0; plr_flags |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? FLAG_NHSYNC : 0; - hfp = mode->hsync_start - mode->hdisplay; - hbp = mode->htotal - mode->hsync_end; - hsw = mode->hsync_end - mode->hsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; - vsw = mode->vsync_end - mode->vsync_start; - if (vsw > 15) { - DRM_DEBUG_DRIVER("vsw exceeded 15\n"); - vsw = 15; + drm_display_mode_to_videomode(mode, &vm); + if (vm.vsync_len > 15) { + DRM_DEBUG_DRIVER("vm.vsync_len exceeded 15\n"); + vm.vsync_len = 15; }
- writel((hbp << HBP_OFST) | hfp, base + LDI_HRZ_CTRL0); + writel((vm.hback_porch << HBP_OFST) | vm.hfront_porch, + base + LDI_HRZ_CTRL0); /* the configured value is actual value - 1 */ - writel(hsw - 1, base + LDI_HRZ_CTRL1); - writel((vbp << VBP_OFST) | vfp, base + LDI_VRT_CTRL0); + writel(vm.hsync_len - 1, base + LDI_HRZ_CTRL1); + writel((vm.vback_porch << VBP_OFST) | vm.vfront_porch, + base + LDI_VRT_CTRL0); /* the configured value is actual value - 1 */ - writel(vsw - 1, base + LDI_VRT_CTRL1); + writel(vm.vsync_len - 1, base + LDI_VRT_CTRL1); /* the configured value is actual value - 1 */ writel(((height - 1) << VSIZE_OFST) | (width - 1), base + LDI_DSP_SIZE); @@ -253,7 +232,14 @@ static void ade_ldi_set_mode(struct ade_crtc *acrtc, writel(width * height - 1, base + ADE_CTRAN_IMAGE_SIZE(ADE_CTRAN6)); ade_update_reload_bit(base, CTRAN_OFST + ADE_CTRAN6, 0);
- ade_set_pix_clk(ctx, mode, adj_mode); + /* + * Success should be guaranteed in mode_valid call back, + * so failure shouldn't happen here + */ + ret = clk_set_rate(ctx->ade_pix_clk, vm.pixelclock); + if (ret) + DRM_ERROR("failed to set pixel clk %dHz (%d)\n", + vm.pixelclock, ret); + adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000;
DRM_DEBUG_DRIVER("set mode: %dx%d\n", width, height); }
-Duplicate logic for the timing params is avoided -Arithmatic operator *,/ are replaced by logical >>, << operators -The flags DRM_MODE_FLAG_* are replaced with DISPLAY_FLAGS_* flags -Combined similar if statements
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/meson/meson_venc.c | 149 ++++++++++++++++--------------------- 1 file changed, 65 insertions(+), 84 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c index 6e27013..dddf914 100644 --- a/drivers/gpu/drm/meson/meson_venc.c +++ b/drivers/gpu/drm/meson/meson_venc.c @@ -25,7 +25,7 @@ #include "meson_vpp.h" #include "meson_vclk.h" #include "meson_registers.h" - +#include <video/videomode.h> /** * DOC: Video Encoder * @@ -1125,9 +1125,6 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, bool hdmi_repeat = false; unsigned int venc_hdmi_latency = 2; unsigned long total_pixels_venc = 0; - unsigned long active_pixels_venc = 0; - unsigned long front_porch_venc = 0; - unsigned long hsync_pixels_venc = 0; unsigned long de_h_begin = 0; unsigned long de_h_end = 0; unsigned long de_v_begin_even = 0; @@ -1143,9 +1140,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, unsigned long vs_eline_odd = 0; unsigned long vso_begin_evn = 0; unsigned long vso_begin_odd = 0; - unsigned int eof_lines; - unsigned int sof_lines; - unsigned int vsync_lines; + struct videomode vm = {};
if (meson_venc_hdmi_supported_vic(vic)) vmode = meson_venc_hdmi_get_vic_vmode(vic); @@ -1156,9 +1151,9 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, DRM_MODE_FMT "\n", __func__, DRM_MODE_ARG(mode)); return; } - + drm_display_mode_to_videomode(mode, &vm); /* Use VENCI for 480i and 576i and double HDMI pixels */ - if (mode->flags & DRM_MODE_FLAG_DBLCLK) { + if (vm.flags & DISPLAY_FLAGS_DOUBLECLK) { hdmi_repeat = true; use_enci = true; venc_hdmi_latency = 1; @@ -1167,40 +1162,25 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, /* Repeat VENC pixels for 480/576i/p, 720p50/60 and 1080p50/60 */ if (meson_venc_hdmi_venc_repeat(vic)) venc_repeat = true; - - eof_lines = mode->vsync_start - mode->vdisplay; - if (mode->flags & DRM_MODE_FLAG_INTERLACE) - eof_lines /= 2; - sof_lines = mode->vtotal - mode->vsync_end; - if (mode->flags & DRM_MODE_FLAG_INTERLACE) - sof_lines /= 2; - vsync_lines = mode->vsync_end - mode->vsync_start; - if (mode->flags & DRM_MODE_FLAG_INTERLACE) - vsync_lines /= 2; + if (vm.flags & DISPLAY_FLAGS_INTERLACED) { + vm.vfront_porch >>= 1; + vm.vback_porch >>= 1; + vm.vsync_len >>= 1; + }
total_pixels_venc = mode->htotal; - if (hdmi_repeat) - total_pixels_venc /= 2; - if (venc_repeat) - total_pixels_venc *= 2; - - active_pixels_venc = mode->hdisplay; - if (hdmi_repeat) - active_pixels_venc /= 2; - if (venc_repeat) - active_pixels_venc *= 2; - - front_porch_venc = (mode->hsync_start - mode->hdisplay); - if (hdmi_repeat) - front_porch_venc /= 2; - if (venc_repeat) - front_porch_venc *= 2; - - hsync_pixels_venc = (mode->hsync_end - mode->hsync_start); - if (hdmi_repeat) - hsync_pixels_venc /= 2; - if (venc_repeat) - hsync_pixels_venc *= 2; + if (hdmi_repeat) { + total_pixels_venc >>= 1; + vm.hactive >>= 1; + vm.hfront_porch >>= 1; + vm.hsync_len >>= 1; + } + if (venc_repeat) { + total_pixels_venc <<= 1; + vm.hactive <<= 1; + vm.hfront_porch <<= 1; + vm.hsync_len <<= 1; + }
/* Disable VDACs */ writel_bits_relaxed(0xff, 0xff, @@ -1302,7 +1282,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, _REG(ENCI_VFIFO2VD_PIXEL_START)) + venc_hdmi_latency, total_pixels_venc); - de_h_end = modulo(de_h_begin + active_pixels_venc, + de_h_end = modulo(de_h_begin + vm.hactive, total_pixels_venc);
writel_relaxed(de_h_begin, @@ -1312,10 +1292,10 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic,
de_v_begin_even = readl_relaxed(priv->io_base + _REG(ENCI_VFIFO2VD_LINE_TOP_START)); - de_v_end_even = de_v_begin_even + mode->vdisplay; + de_v_end_even = de_v_begin_even + vm.vactive; de_v_begin_odd = readl_relaxed(priv->io_base + _REG(ENCI_VFIFO2VD_LINE_BOT_START)); - de_v_end_odd = de_v_begin_odd + mode->vdisplay; + de_v_end_odd = de_v_begin_odd + vm.vactive;
writel_relaxed(de_v_begin_even, priv->io_base + _REG(ENCI_DE_V_BEGIN_EVEN)); @@ -1327,16 +1307,16 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, priv->io_base + _REG(ENCI_DE_V_END_ODD));
/* Program Hsync timing */ - hs_begin = de_h_end + front_porch_venc; - if (de_h_end + front_porch_venc >= total_pixels_venc) { + hs_begin = de_h_end + vm.hfront_porch; + if (de_h_end + vm.hfront_porch >= total_pixels_venc) { hs_begin -= total_pixels_venc; vs_adjust = 1; } else { - hs_begin = de_h_end + front_porch_venc; + hs_begin = de_h_end + vm.hfront_porch; vs_adjust = 0; }
- hs_end = modulo(hs_begin + hsync_pixels_venc, + hs_end = modulo(hs_begin + vm.hsync_len, total_pixels_venc); writel_relaxed(hs_begin, priv->io_base + _REG(ENCI_DVI_HSO_BEGIN)); @@ -1344,12 +1324,13 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, priv->io_base + _REG(ENCI_DVI_HSO_END));
/* Program Vsync timing for even field */ - if (((de_v_end_odd - 1) + eof_lines + vs_adjust) >= lines_f1) { + if (((de_v_end_odd - 1) + vm.vfront_porch + vs_adjust) + >= lines_f1) { vs_bline_evn = (de_v_end_odd - 1) - + eof_lines + + vm.vfront_porch + vs_adjust - lines_f1; - vs_eline_evn = vs_bline_evn + vsync_lines; + vs_eline_evn = vs_bline_evn + vm.vsync_len;
writel_relaxed(vs_bline_evn, priv->io_base + _REG(ENCI_DVI_VSO_BLINE_EVN)); @@ -1363,7 +1344,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, priv->io_base + _REG(ENCI_DVI_VSO_END_EVN)); } else { vs_bline_odd = (de_v_end_odd - 1) - + eof_lines + + vm.vfront_porch + vs_adjust;
writel_relaxed(vs_bline_odd, @@ -1372,9 +1353,9 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, writel_relaxed(hs_begin, priv->io_base + _REG(ENCI_DVI_VSO_BEGIN_ODD));
- if ((vs_bline_odd + vsync_lines) >= lines_f1) { + if ((vs_bline_odd + vm.vsync_len) >= lines_f1) { vs_eline_evn = vs_bline_odd - + vsync_lines + + vm.vsync_len - lines_f1;
writel_relaxed(vs_eline_evn, priv->io_base @@ -1384,7 +1365,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, + _REG(ENCI_DVI_VSO_END_EVN)); } else { vs_eline_odd = vs_bline_odd - + vsync_lines; + + vm.vsync_len;
writel_relaxed(vs_eline_odd, priv->io_base + _REG(ENCI_DVI_VSO_ELINE_ODD)); @@ -1395,11 +1376,11 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, }
/* Program Vsync timing for odd field */ - if (((de_v_end_even - 1) + (eof_lines + 1)) >= lines_f0) { + if (((de_v_end_even - 1) + (vm.vfront_porch + 1)) >= lines_f0) { vs_bline_odd = (de_v_end_even - 1) - + (eof_lines + 1) + + (vm.vfront_porch + 1) - lines_f0; - vs_eline_odd = vs_bline_odd + vsync_lines; + vs_eline_odd = vs_bline_odd + vm.vsync_len;
writel_relaxed(vs_bline_odd, priv->io_base + _REG(ENCI_DVI_VSO_BLINE_ODD)); @@ -1417,7 +1398,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, priv->io_base + _REG(ENCI_DVI_VSO_END_ODD)); } else { vs_bline_evn = (de_v_end_even - 1) - + (eof_lines + 1); + + (vm.vfront_porch + 1);
writel_relaxed(vs_bline_evn, priv->io_base + _REG(ENCI_DVI_VSO_BLINE_EVN)); @@ -1429,9 +1410,9 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, writel_relaxed(vso_begin_evn, priv->io_base + _REG(ENCI_DVI_VSO_BEGIN_EVN));
- if (vs_bline_evn + vsync_lines >= lines_f0) { + if (vs_bline_evn + vm.vsync_len >= lines_f0) { vs_eline_odd = vs_bline_evn - + vsync_lines + + vm.vsync_len - lines_f0;
writel_relaxed(vs_eline_odd, priv->io_base @@ -1440,7 +1421,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, writel_relaxed(vso_begin_evn, priv->io_base + _REG(ENCI_DVI_VSO_END_ODD)); } else { - vs_eline_evn = vs_bline_evn + vsync_lines; + vs_eline_evn = vs_bline_evn + vm.vsync_len;
writel_relaxed(vs_eline_evn, priv->io_base + _REG(ENCI_DVI_VSO_ELINE_EVN)); @@ -1548,7 +1529,7 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, _REG(ENCP_VIDEO_HAVON_BEGIN)) + venc_hdmi_latency, total_pixels_venc); - de_h_end = modulo(de_h_begin + active_pixels_venc, + de_h_end = modulo(de_h_begin + vm.hactive, total_pixels_venc);
writel_relaxed(de_h_begin, @@ -1559,11 +1540,11 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, /* Program DE timing for even field */ de_v_begin_even = readl_relaxed(priv->io_base + _REG(ENCP_VIDEO_VAVON_BLINE)); - if (mode->flags & DRM_MODE_FLAG_INTERLACE) + if (vm.flags & DISPLAY_FLAGS_INTERLACED) de_v_end_even = de_v_begin_even + - (mode->vdisplay / 2); + (vm.vactive >> 1); else - de_v_end_even = de_v_begin_even + mode->vdisplay; + de_v_end_even = de_v_begin_even + vm.vactive;
writel_relaxed(de_v_begin_even, priv->io_base + _REG(ENCP_DE_V_BEGIN_EVEN)); @@ -1571,14 +1552,14 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, priv->io_base + _REG(ENCP_DE_V_END_EVEN));
/* Program DE timing for odd field if needed */ - if (mode->flags & DRM_MODE_FLAG_INTERLACE) { + if (vm.flags & DISPLAY_FLAGS_INTERLACED) { unsigned int ofld_voav_ofst = readl_relaxed(priv->io_base + _REG(ENCP_VIDEO_OFLD_VOAV_OFST)); de_v_begin_odd = to_signed((ofld_voav_ofst & 0xf0) >> 4) + de_v_begin_even + ((mode->vtotal - 1) / 2); - de_v_end_odd = de_v_begin_odd + (mode->vdisplay / 2); + de_v_end_odd = de_v_begin_odd + (vm.vactive >> 1);
writel_relaxed(de_v_begin_odd, priv->io_base + _REG(ENCP_DE_V_BEGIN_ODD)); @@ -1587,18 +1568,18 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, }
/* Program Hsync timing */ - if ((de_h_end + front_porch_venc) >= total_pixels_venc) { + if ((de_h_end + vm.hfront_porch) >= total_pixels_venc) { hs_begin = de_h_end - + front_porch_venc + + vm.hfront_porch - total_pixels_venc; vs_adjust = 1; } else { hs_begin = de_h_end - + front_porch_venc; + + vm.hfront_porch; vs_adjust = 0; }
- hs_end = modulo(hs_begin + hsync_pixels_venc, + hs_end = modulo(hs_begin + vm.hsync_len, total_pixels_venc);
writel_relaxed(hs_begin, @@ -1608,19 +1589,19 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic,
/* Program Vsync timing for even field */ if (de_v_begin_even >= - (sof_lines + vsync_lines + (1 - vs_adjust))) + (vm.vback_porch + vm.vsync_len + (1 - vs_adjust))) vs_bline_evn = de_v_begin_even - - sof_lines - - vsync_lines + - vm.vback_porch + - vm.vsync_len - (1 - vs_adjust); else vs_bline_evn = mode->vtotal + de_v_begin_even - - sof_lines - - vsync_lines + - vm.vback_porch + - vm.vsync_len - (1 - vs_adjust);
- vs_eline_evn = modulo(vs_bline_evn + vsync_lines, + vs_eline_evn = modulo(vs_bline_evn + vm.vsync_len, mode->vtotal);
writel_relaxed(vs_bline_evn, @@ -1635,12 +1616,12 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, priv->io_base + _REG(ENCP_DVI_VSO_END_EVN));
/* Program Vsync timing for odd field if needed */ - if (mode->flags & DRM_MODE_FLAG_INTERLACE) { + if (vm.flags & DISPLAY_FLAGS_INTERLACED) { vs_bline_odd = (de_v_begin_odd - 1) - - sof_lines - - vsync_lines; + - vm.vback_porch + - vm.vsync_len; vs_eline_odd = (de_v_begin_odd - 1) - - vsync_lines; + - vm.vsync_len; vso_begin_odd = modulo(hs_begin + (total_pixels_venc >> 1), total_pixels_venc); @@ -1660,8 +1641,8 @@ void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, }
writel_relaxed((use_enci ? 1 : 2) | - (mode->flags & DRM_MODE_FLAG_PHSYNC ? 1 << 2 : 0) | - (mode->flags & DRM_MODE_FLAG_PVSYNC ? 1 << 3 : 0) | + (vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? 1 << 2 : 0) | + (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ? 1 << 3 : 0) | 4 << 5 | (venc_repeat ? 1 << 8 : 0) | (hdmi_repeat ? 1 << 12 : 0),
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/pl111/pl111_display.c | 40 +++++++++++++---------------------- 1 file changed, 15 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 3106464..104f318 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -24,6 +24,7 @@ #include <drm/drm_gem_cma_helper.h> #include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_fb_cma_helper.h> +#include <video/videomode.h>
#include "pl111_drm.h"
@@ -130,13 +131,14 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, struct drm_framebuffer *fb = plane->state->fb; struct drm_connector *connector = priv->connector; struct drm_bridge *bridge = priv->bridge; + struct videomode vm; u32 cntl; - u32 ppl, hsw, hfp, hbp; - u32 lpp, vsw, vfp, vbp; - u32 cpl, tim2; + u32 tim2; int ret;
- ret = clk_set_rate(priv->clk, mode->clock * 1000); + drm_display_mode_to_videomode(mode, &vm); + + ret = clk_set_rate(priv->clk, vm.pixelclock); if (ret) { dev_err(drm->dev, "Failed to set pixel clock rate to %d: %d\n", @@ -145,27 +147,15 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe,
clk_prepare_enable(priv->clk);
- ppl = (mode->hdisplay / 16) - 1; - hsw = mode->hsync_end - mode->hsync_start - 1; - hfp = mode->hsync_start - mode->hdisplay - 1; - hbp = mode->htotal - mode->hsync_end - 1; - - lpp = mode->vdisplay - 1; - vsw = mode->vsync_end - mode->vsync_start - 1; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; - - cpl = mode->hdisplay - 1; - - writel((ppl << 2) | - (hsw << 8) | - (hfp << 16) | - (hbp << 24), + writel((((vm.hactive >> 4) - 1) << 2) | + ((vm.hsync_len - 1) << 8) | + ((vm.hfront_porch - 1) << 16) | + ((vm.hback_porch - 1) << 24), priv->regs + CLCD_TIM0); - writel(lpp | - (vsw << 10) | - (vfp << 16) | - (vbp << 24), + writel((vm.vactive - 1) | + ((vm.vsync_len - 1) << 10) | + ((vm.vfront_porch) << 16) | + ((vm.vback_porch) << 24), priv->regs + CLCD_TIM1);
spin_lock(&priv->tim2_lock); @@ -214,7 +204,7 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, tim2 ^= TIM2_IPC; }
- tim2 |= cpl << 16; + tim2 |= (vm.hactive - 1) << 16; writel(tim2, priv->regs + CLCD_TIM2); spin_unlock(&priv->tim2_lock);
To avoid duplicate logic for horizonal/vertical sync_start/end helper func drm_display_mode_from_videomode is used
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/sun4i/sun4i_tv.c | 67 +++++++++++++++------------------------- 1 file changed, 25 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index b070d52..7ffa930 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -21,6 +21,7 @@ #include <drm/drm_crtc_helper.h> #include <drm/drm_of.h> #include <drm/drm_panel.h> +#include <video/videomode.h>
#include "sun4i_crtc.h" #include "sun4i_drv.h" @@ -147,16 +148,7 @@ struct tv_mode { u16 front_porch; u16 line_number; u16 vblank_level; - - u32 hdisplay; - u16 hfront_porch; - u16 hsync_len; - u16 hback_porch; - - u32 vdisplay; - u16 vfront_porch; - u16 vsync_len; - u16 vback_porch; + struct videomode vm;
bool yc_en; bool dac3_en; @@ -223,16 +215,16 @@ static const struct tv_mode tv_modes[] = { .back_porch = 118, .front_porch = 32, .line_number = 525, - - .hdisplay = 720, - .hfront_porch = 18, - .hsync_len = 2, - .hback_porch = 118, - - .vdisplay = 480, - .vfront_porch = 26, - .vsync_len = 2, - .vback_porch = 17, + .vm = { + .hactive = 720, + .hfront_porch = 18, + .hsync_len = 2, + .hback_porch = 118, + .vactive = 480, + .vfront_porch = 26, + .vsync_len = 2, + .vback_porch = 17, + },
.vblank_level = 240,
@@ -249,16 +241,16 @@ static const struct tv_mode tv_modes[] = { .back_porch = 138, .front_porch = 24, .line_number = 625, - - .hdisplay = 720, - .hfront_porch = 3, - .hsync_len = 2, - .hback_porch = 139, - - .vdisplay = 576, - .vfront_porch = 28, - .vsync_len = 2, - .vback_porch = 19, + .vm = { + .hactive = 720, + .hfront_porch = 3, + .hsync_len = 2, + .hback_porch = 139, + .vactive = 576, + .vfront_porch = 28, + .vsync_len = 2, + .vback_porch = 19, + },
.vblank_level = 252,
@@ -311,9 +303,9 @@ static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct drm_display_m
DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)", mode->name, tv_mode->name, - mode->vdisplay, tv_mode->vdisplay); + mode->vdisplay, tv_mode->vm.vactive);
- if (mode->vdisplay == tv_mode->vdisplay) + if (mode->vdisplay == tv_mode->vm.vactive) return tv_mode; }
@@ -325,19 +317,10 @@ static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode, { DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name);
+ drm_display_mode_from_videomode(&tv_mode->vm, mode); mode->type = DRM_MODE_TYPE_DRIVER; mode->clock = 13500; mode->flags = DRM_MODE_FLAG_INTERLACE; - - mode->hdisplay = tv_mode->hdisplay; - mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch; - mode->hsync_end = mode->hsync_start + tv_mode->hsync_len; - mode->htotal = mode->hsync_end + tv_mode->hback_porch; - - mode->vdisplay = tv_mode->vdisplay; - mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch; - mode->vsync_end = mode->vsync_start + tv_mode->vsync_len; - mode->vtotal = mode->vsync_end + tv_mode->vback_porch; }
static void sun4i_tv_disable(struct drm_encoder *encoder)
On Thu, May 03, 2018 at 04:28:06PM +0530, Satendra Singh Thakur wrote:
To avoid duplicate logic for horizonal/vertical sync_start/end helper func drm_display_mode_from_videomode is used
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Thanks! Maxime
To avoid duplicate logic for horizonal/vertical sync_start/end helper func drm_display_mode_from_videomode is used
Acked-by: Maxime Ripard maxime.ripard@bootlin.com Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Acked-by: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com ---
v1: Added acked-by fields
drivers/gpu/drm/sun4i/sun4i_tv.c | 67 +++++++++++++++------------------------- 1 file changed, 25 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index b070d52..7ffa930 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -21,6 +21,7 @@ #include <drm/drm_crtc_helper.h> #include <drm/drm_of.h> #include <drm/drm_panel.h> +#include <video/videomode.h>
#include "sun4i_crtc.h" #include "sun4i_drv.h" @@ -147,16 +148,7 @@ struct tv_mode { u16 front_porch; u16 line_number; u16 vblank_level; - - u32 hdisplay; - u16 hfront_porch; - u16 hsync_len; - u16 hback_porch; - - u32 vdisplay; - u16 vfront_porch; - u16 vsync_len; - u16 vback_porch; + struct videomode vm;
bool yc_en; bool dac3_en; @@ -223,16 +215,16 @@ static const struct tv_mode tv_modes[] = { .back_porch = 118, .front_porch = 32, .line_number = 525, - - .hdisplay = 720, - .hfront_porch = 18, - .hsync_len = 2, - .hback_porch = 118, - - .vdisplay = 480, - .vfront_porch = 26, - .vsync_len = 2, - .vback_porch = 17, + .vm = { + .hactive = 720, + .hfront_porch = 18, + .hsync_len = 2, + .hback_porch = 118, + .vactive = 480, + .vfront_porch = 26, + .vsync_len = 2, + .vback_porch = 17, + },
.vblank_level = 240,
@@ -249,16 +241,16 @@ static const struct tv_mode tv_modes[] = { .back_porch = 138, .front_porch = 24, .line_number = 625, - - .hdisplay = 720, - .hfront_porch = 3, - .hsync_len = 2, - .hback_porch = 139, - - .vdisplay = 576, - .vfront_porch = 28, - .vsync_len = 2, - .vback_porch = 19, + .vm = { + .hactive = 720, + .hfront_porch = 3, + .hsync_len = 2, + .hback_porch = 139, + .vactive = 576, + .vfront_porch = 28, + .vsync_len = 2, + .vback_porch = 19, + },
.vblank_level = 252,
@@ -311,9 +303,9 @@ static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct drm_display_m
DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)", mode->name, tv_mode->name, - mode->vdisplay, tv_mode->vdisplay); + mode->vdisplay, tv_mode->vm.vactive);
- if (mode->vdisplay == tv_mode->vdisplay) + if (mode->vdisplay == tv_mode->vm.vactive) return tv_mode; }
@@ -325,19 +317,10 @@ static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode, { DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name);
+ drm_display_mode_from_videomode(&tv_mode->vm, mode); mode->type = DRM_MODE_TYPE_DRIVER; mode->clock = 13500; mode->flags = DRM_MODE_FLAG_INTERLACE; - - mode->hdisplay = tv_mode->hdisplay; - mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch; - mode->hsync_end = mode->hsync_start + tv_mode->hsync_len; - mode->htotal = mode->hsync_end + tv_mode->hback_porch; - - mode->vdisplay = tv_mode->vdisplay; - mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch; - mode->vsync_end = mode->vsync_start + tv_mode->vsync_len; - mode->vtotal = mode->vsync_end + tv_mode->vback_porch; }
static void sun4i_tv_disable(struct drm_encoder *encoder)
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 60 ++++++++++++++++-------------------- 1 file changed, 27 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 1b278a2..6becdaf 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -25,6 +25,7 @@ #include <linux/dma-mapping.h> #include <linux/of_graph.h> #include <linux/math64.h> +#include <video/videomode.h>
#include "tilcdc_drv.h" #include "tilcdc_regs.h" @@ -284,9 +285,10 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; const struct tilcdc_panel_info *info = tilcdc_crtc->info; - uint32_t reg, hbp, hfp, hsw, vbp, vfp, vsw; + uint32_t reg; struct drm_display_mode *mode = &crtc->state->adjusted_mode; struct drm_framebuffer *fb = crtc->primary->state->fb; + struct videomode vm;
if (WARN_ON(!info)) return; @@ -320,15 +322,12 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg);
/* Configure timings: */ - hbp = mode->htotal - mode->hsync_end; - hfp = mode->hsync_start - mode->hdisplay; - hsw = mode->hsync_end - mode->hsync_start; - vbp = mode->vtotal - mode->vsync_end; - vfp = mode->vsync_start - mode->vdisplay; - vsw = mode->vsync_end - mode->vsync_start; + drm_display_mode_to_videomode(mode, &vm);
- DBG("%dx%d, hbp=%u, hfp=%u, hsw=%u, vbp=%u, vfp=%u, vsw=%u", - mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw); + DBG("%dx%d, vm.hback_porch=%u, vm.hfront_porch=%u, vm.hsync_len=%u," + " vm.vback_porch=%u, vm.vfront_porch=%u, vm.vsync_len=%u", + vm.hactive, vm.vactive, vm.hback_porch, vm.hfront_porch, + vm.hsync_len, vm.vback_porch, vm.vfront_porch, vm.vsync_len);
/* Set AC Bias Period and Number of Transitions per Interrupt: */ reg = tilcdc_read(dev, LCDC_RASTER_TIMING_2_REG) & ~0x000fff00; @@ -336,30 +335,30 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) LCDC_AC_BIAS_TRANSITIONS_PER_INT(info->ac_bias_intrpt);
/* - * subtract one from hfp, hbp, hsw because the hardware uses - * a value of 0 as 1 + * subtract one from vm.hfront_porch, vm.hback_porch, vm.hsync_len + * because the hardware uses a value of 0 as 1 */ if (priv->rev == 2) { /* clear bits we're going to set */ reg &= ~0x78000033; - reg |= ((hfp-1) & 0x300) >> 8; - reg |= ((hbp-1) & 0x300) >> 4; - reg |= ((hsw-1) & 0x3c0) << 21; + reg |= ((vm.hfront_porch-1) & 0x300) >> 8; + reg |= ((vm.hback_porch-1) & 0x300) >> 4; + reg |= ((vm.hsync_len-1) & 0x3c0) << 21; } tilcdc_write(dev, LCDC_RASTER_TIMING_2_REG, reg);
reg = (((mode->hdisplay >> 4) - 1) << 4) | - (((hbp-1) & 0xff) << 24) | - (((hfp-1) & 0xff) << 16) | - (((hsw-1) & 0x3f) << 10); + (((vm.hback_porch-1) & 0xff) << 24) | + (((vm.hfront_porch-1) & 0xff) << 16) | + (((vm.hsync_len-1) & 0x3f) << 10); if (priv->rev == 2) reg |= (((mode->hdisplay >> 4) - 1) & 0x40) >> 3; tilcdc_write(dev, LCDC_RASTER_TIMING_0_REG, reg);
reg = ((mode->vdisplay - 1) & 0x3ff) | - ((vbp & 0xff) << 24) | - ((vfp & 0xff) << 16) | - (((vsw-1) & 0x3f) << 10); + ((vm.vback_porch & 0xff) << 24) | + ((vm.vfront_porch & 0xff) << 16) | + (((vm.vsync_len-1) & 0x3f) << 10); tilcdc_write(dev, LCDC_RASTER_TIMING_1_REG, reg);
/* @@ -753,7 +752,7 @@ int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode) { struct tilcdc_drm_private *priv = crtc->dev->dev_private; unsigned int bandwidth; - uint32_t hbp, hfp, hsw, vbp, vfp, vsw; + struct videomode vm;
/* * check to see if the width is within the range that @@ -773,39 +772,34 @@ int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode) mode->hdisplay, mode->vdisplay, drm_mode_vrefresh(mode), mode->clock);
- hbp = mode->htotal - mode->hsync_end; - hfp = mode->hsync_start - mode->hdisplay; - hsw = mode->hsync_end - mode->hsync_start; - vbp = mode->vtotal - mode->vsync_end; - vfp = mode->vsync_start - mode->vdisplay; - vsw = mode->vsync_end - mode->vsync_start; + drm_display_mode_to_videomode(mode, &vm);
- if ((hbp-1) & ~0x3ff) { + if ((vm.hback_porch-1) & ~0x3ff) { DBG("Pruning mode: Horizontal Back Porch out of range"); return MODE_HBLANK_WIDE; }
- if ((hfp-1) & ~0x3ff) { + if ((vm.hfront_porch-1) & ~0x3ff) { DBG("Pruning mode: Horizontal Front Porch out of range"); return MODE_HBLANK_WIDE; }
- if ((hsw-1) & ~0x3ff) { + if ((vm.hsync_len-1) & ~0x3ff) { DBG("Pruning mode: Horizontal Sync Width out of range"); return MODE_HSYNC_WIDE; }
- if (vbp & ~0xff) { + if (vm.vback_porch & ~0xff) { DBG("Pruning mode: Vertical Back Porch out of range"); return MODE_VBLANK_WIDE; }
- if (vfp & ~0xff) { + if (vm.vfront_porch & ~0xff) { DBG("Pruning mode: Vertical Front Porch out of range"); return MODE_VBLANK_WIDE; }
- if ((vsw-1) & ~0x3f) { + if ((vm.vsync_len-1) & ~0x3f) { DBG("Pruning mode: Vertical Sync Width out of range"); return MODE_VSYNC_WIDE; }
To avoid duplicate logic for the same
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/tegra/dc.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 9f83a65..f1d6f65 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -25,6 +25,7 @@ #include <drm/drm_atomic.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_plane_helper.h> +#include <video/videomode.h>
static void tegra_dc_stats_reset(struct tegra_dc_stats *stats) { @@ -1436,6 +1437,7 @@ static int tegra_dc_set_timings(struct tegra_dc *dc, unsigned int h_ref_to_sync = 1; unsigned int v_ref_to_sync = 1; unsigned long value; + struct videomode vm;
if (!dc->soc->has_nvdisplay) { tegra_dc_writel(dc, 0x0, DC_DISP_DISP_TIMING_OPTIONS); @@ -1443,20 +1445,17 @@ static int tegra_dc_set_timings(struct tegra_dc *dc, value = (v_ref_to_sync << 16) | h_ref_to_sync; tegra_dc_writel(dc, value, DC_DISP_REF_TO_SYNC); } - - value = ((mode->vsync_end - mode->vsync_start) << 16) | - ((mode->hsync_end - mode->hsync_start) << 0); + drm_display_mode_to_videomode(mode, &vm); + value = (vm.vsync_len << 16) | vm.hsync_len; tegra_dc_writel(dc, value, DC_DISP_SYNC_WIDTH);
- value = ((mode->vtotal - mode->vsync_end) << 16) | - ((mode->htotal - mode->hsync_end) << 0); + value = (vm.vback_porch << 16) | vm.hback_porch; tegra_dc_writel(dc, value, DC_DISP_BACK_PORCH);
- value = ((mode->vsync_start - mode->vdisplay) << 16) | - ((mode->hsync_start - mode->hdisplay) << 0); + value = (vm.vfront_porch << 16) | vm.hfront_porch; tegra_dc_writel(dc, value, DC_DISP_FRONT_PORCH);
- value = (mode->vdisplay << 16) | mode->hdisplay; + value = (vm.vactive << 16) | vm.hactive; tegra_dc_writel(dc, value, DC_DISP_ACTIVE);
return 0;
-Duplicate logic for the timing params is avoided -Arithmatic operator *,/ are replaced by logical >>, << operators -The flags DRM_MODE_FLAG_* are replaced with DISPLAY_FLAGS_* flags
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/mediatek/mtk_dpi.c | 60 +++++++++++++++++++------------------- drivers/gpu/drm/mediatek/mtk_dsi.c | 14 ++------- 2 files changed, 32 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index e80a603..76dd3b9 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -22,6 +22,7 @@ #include <linux/interrupt.h> #include <linux/types.h> #include <linux/clk.h> +#include <video/videomode.h>
#include "mtk_dpi_regs.h" #include "mtk_drm_ddp_comp.h" @@ -429,34 +430,35 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, struct mtk_dpi_sync_param vsync_leven = { 0 }; struct mtk_dpi_sync_param vsync_rodd = { 0 }; struct mtk_dpi_sync_param vsync_reven = { 0 }; - unsigned long pix_rate; + struct videomode vm; unsigned long pll_rate; unsigned int factor;
/* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */ - pix_rate = 1000UL * mode->clock; + if (mode->clock <= 27000) - factor = 16 * 3; + factor = 3 << 4; else if (mode->clock <= 84000) - factor = 8 * 3; + factor = 3 << 3; else if (mode->clock <= 167000) - factor = 4 * 3; + factor = 3 << 2; else - factor = 2 * 3; - pll_rate = pix_rate * factor; + factor = 3 << 1; + drm_display_mode_to_videomode(mode, &vm); + pll_rate = vm.pixelclock * factor;
dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n", - pll_rate, pix_rate); + pll_rate, vm.pixelclock);
clk_set_rate(dpi->tvd_clk, pll_rate); pll_rate = clk_get_rate(dpi->tvd_clk);
- pix_rate = pll_rate / factor; - clk_set_rate(dpi->pixel_clk, pix_rate); - pix_rate = clk_get_rate(dpi->pixel_clk); + vm.pixelclock = pll_rate / factor; + clk_set_rate(dpi->pixel_clk, vm.pixelclock); + vm.pixelclock = clk_get_rate(dpi->pixel_clk);
dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n", - pll_rate, pix_rate); + pll_rate, vm.pixelclock);
limit.c_bottom = 0x0010; limit.c_top = 0x0FE0; @@ -465,33 +467,31 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING; dpi_pol.de_pol = MTK_DPI_POLARITY_RISING; - dpi_pol.hsync_pol = mode->flags & DRM_MODE_FLAG_PHSYNC ? + dpi_pol.hsync_pol = vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING; - dpi_pol.vsync_pol = mode->flags & DRM_MODE_FLAG_PVSYNC ? + dpi_pol.vsync_pol = vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ? MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING; - - hsync.sync_width = mode->hsync_end - mode->hsync_start; - hsync.back_porch = mode->htotal - mode->hsync_end; - hsync.front_porch = mode->hsync_start - mode->hdisplay; + hsync.sync_width = vm.hsync_len; + hsync.back_porch = vm.hback_porch; + hsync.front_porch = vm.hfront_porch; hsync.shift_half_line = false; - - vsync_lodd.sync_width = mode->vsync_end - mode->vsync_start; - vsync_lodd.back_porch = mode->vtotal - mode->vsync_end; - vsync_lodd.front_porch = mode->vsync_start - mode->vdisplay; + vsync_lodd.sync_width = vm.vsync_len; + vsync_lodd.back_porch = vm.vback_porch; + vsync_lodd.front_porch = vm.vfront_porch; vsync_lodd.shift_half_line = false;
- if (mode->flags & DRM_MODE_FLAG_INTERLACE && + if (vm.flags & DISPLAY_FLAGS_INTERLACED && mode->flags & DRM_MODE_FLAG_3D_MASK) { vsync_leven = vsync_lodd; vsync_rodd = vsync_lodd; vsync_reven = vsync_lodd; vsync_leven.shift_half_line = true; vsync_reven.shift_half_line = true; - } else if (mode->flags & DRM_MODE_FLAG_INTERLACE && + } else if (vm.flags & DISPLAY_FLAGS_INTERLACED && !(mode->flags & DRM_MODE_FLAG_3D_MASK)) { vsync_leven = vsync_lodd; vsync_leven.shift_half_line = true; - } else if (!(mode->flags & DRM_MODE_FLAG_INTERLACE) && + } else if (!(vm.flags & DISPLAY_FLAGS_INTERLACED) && mode->flags & DRM_MODE_FLAG_3D_MASK) { vsync_rodd = vsync_lodd; } @@ -505,12 +505,12 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, mtk_dpi_config_vsync_reven(dpi, &vsync_reven);
mtk_dpi_config_3d(dpi, !!(mode->flags & DRM_MODE_FLAG_3D_MASK)); - mtk_dpi_config_interface(dpi, !!(mode->flags & - DRM_MODE_FLAG_INTERLACE)); - if (mode->flags & DRM_MODE_FLAG_INTERLACE) - mtk_dpi_config_fb_size(dpi, mode->hdisplay, mode->vdisplay / 2); + mtk_dpi_config_interface(dpi, !!(vm.flags & + DISPLAY_FLAGS_INTERLACED)); + if (vm.flags & DISPLAY_FLAGS_INTERLACED) + mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive >> 1); else - mtk_dpi_config_fb_size(dpi, mode->hdisplay, mode->vdisplay); + mtk_dpi_config_fb_size(dpi, vm.hactive, vm.vactive);
mtk_dpi_config_channel_limit(dpi, &limit); mtk_dpi_config_bit_num(dpi, dpi->bit_num); diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 7e5e24c..aa0943e 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -551,13 +551,12 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) }
/** - * vm.pixelclock is in kHz, pixel_clock unit is Hz, so multiply by 1000 * htotal_time = htotal * byte_per_pixel / num_lanes * overhead_time = lpx + hs_prepare + hs_zero + hs_trail + hs_exit * mipi_ratio = (htotal_time + overhead_time) / htotal_time * data_rate = pixel_clock * bit_per_pixel * mipi_ratio / num_lanes; */ - pixel_clock = dsi->vm.pixelclock * 1000; + pixel_clock = dsi->vm.pixelclock; htotal = dsi->vm.hactive + dsi->vm.hback_porch + dsi->vm.hfront_porch + dsi->vm.hsync_len; htotal_bits = htotal * bit_per_pixel; @@ -725,16 +724,7 @@ static void mtk_dsi_encoder_mode_set(struct drm_encoder *encoder, { struct mtk_dsi *dsi = encoder_to_dsi(encoder);
- dsi->vm.pixelclock = adjusted->clock; - dsi->vm.hactive = adjusted->hdisplay; - dsi->vm.hback_porch = adjusted->htotal - adjusted->hsync_end; - dsi->vm.hfront_porch = adjusted->hsync_start - adjusted->hdisplay; - dsi->vm.hsync_len = adjusted->hsync_end - adjusted->hsync_start; - - dsi->vm.vactive = adjusted->vdisplay; - dsi->vm.vback_porch = adjusted->vtotal - adjusted->vsync_end; - dsi->vm.vfront_porch = adjusted->vsync_start - adjusted->vdisplay; - dsi->vm.vsync_len = adjusted->vsync_end - adjusted->vsync_start; + drm_display_mode_to_videomode(adjusted, &dsi->vm); }
static void mtk_dsi_encoder_disable(struct drm_encoder *encoder)
To avoid duplicate logic for the same: There is a function in drm-core to calculate display timing parameters: horizontal front porch, back porch, sync length, vertical front porch, back porch, sync length and clock in Hz. However, some drivers are still calculating these parameters themselves. Therefore, there is a duplication of the code. This patch series replaces this redundant code with the function drm_display_mode_to_videomode. This removes nearly 100 redundant lines from the related drivers.
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/bridge/adv7511/adv7533.c | 35 ++++++++++++++------------------ 1 file changed, 15 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7533.c b/drivers/gpu/drm/bridge/adv7511/adv7533.c index 185b6d8..881a703 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7533.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c @@ -14,6 +14,7 @@ #include <linux/of_graph.h>
#include "adv7511.h" +#include <video/videomode.h>
static const struct reg_sequence adv7533_fixed_registers[] = { { 0x16, 0x20 }, @@ -36,15 +37,9 @@ static void adv7511_dsi_config_timing_gen(struct adv7511 *adv) { struct mipi_dsi_device *dsi = adv->dsi; struct drm_display_mode *mode = &adv->curr_mode; - unsigned int hsw, hfp, hbp, vsw, vfp, vbp; + struct videomode vm; u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */ - - hsw = mode->hsync_end - mode->hsync_start; - hfp = mode->hsync_start - mode->hdisplay; - hbp = mode->htotal - mode->hsync_end; - vsw = mode->vsync_end - mode->vsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; + drm_display_mode_to_videomode(mode, &vm);
/* set pixel clock divider mode */ regmap_write(adv->regmap_cec, 0x16, @@ -53,22 +48,22 @@ static void adv7511_dsi_config_timing_gen(struct adv7511 *adv) /* horizontal porch params */ regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4); regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x2a, hsw >> 4); - regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x2c, hfp >> 4); - regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x2e, hbp >> 4); - regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x2a, vm.hsync_len >> 4); + regmap_write(adv->regmap_cec, 0x2b, (vm.hsync_len << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x2c, vm.hfront_porch >> 4); + regmap_write(adv->regmap_cec, 0x2d, (vm.hfront_porch << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x2e, vm.hback_porch >> 4); + regmap_write(adv->regmap_cec, 0x2f, (vm.hback_porch << 4) & 0xff);
/* vertical porch params */ regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4); regmap_write(adv->regmap_cec, 0x31, (mode->vtotal << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x32, vsw >> 4); - regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x34, vfp >> 4); - regmap_write(adv->regmap_cec, 0x35, (vfp << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x36, vbp >> 4); - regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x32, vm.vsync_len >> 4); + regmap_write(adv->regmap_cec, 0x33, (vm.vsync_len << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x34, vm.vfront_porch >> 4); + regmap_write(adv->regmap_cec, 0x35, (vm.vfront_porch << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x36, vm.vback_porch >> 4); + regmap_write(adv->regmap_cec, 0x37, (vm.vback_porch << 4) & 0xff); }
void adv7533_dsi_power_on(struct adv7511 *adv)
On Thu, May 03, 2018 at 01:53:55PM +0530, Satendra Singh Thakur wrote:
1.There is a function in drm-core to calculate display timing parameters: horizontal front porch, back porch, sync length, vertical front porch, back porch, sync length and clock in Hz. However, some drivers are still calculating these parameters themselves. Therefore, there is a duplication of the code. This patch series replaces this redundant code with the function drm_display_mode_to_videomode. This removes nearly 100 redundant lines from the related drivers. 2.For some drivers (sun4i) the reverse helper drm_display_mode_from_videomode is used. 3.For some drivers it replaces arithmatic operators (*, /) with shifting operators (>>, <<). 4.For some drivers DRM_MODE_FLAG_* are replaced with DISPLAY_FLAGS_* flags. 5.These changes apply to following crtc and encoder drivers: atmel-hlcdc bridge-tc358767 exynos-dsi fsl-dcu gma500-mdfld_dsi_dpi hisilicon-kirin_dsi, ade meson-encoder pl111-display sun4i-tv ti lcdc tegra dc mediatek dpi dsi bridge-adv7533
The drm_mode_to_videomode helper is meant for interop between drm and v4l, which have different internal structures to represent modes.
For drivers that only use drm I think the better option would be to add these fields to struct drm_display_mode as another set of crtc_* values (the computed values are stored in crtc_ prefixed members). And compute front/back porch in drm_mode_set_crtcinfo.
Then we can use these new drm_display_mode->crtc_h|vfront|back_porch fields in all the drivers you're changing. This way you avoid having to change all the drm drivers to use v4l #defines.
Thanks, Daniel
Satendra Singh Thakur (13): drm/kms/mode/atmel-hlcdc: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/bridge-tc358767: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/exynos-dsi: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/fsl-dcu: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/gma500-mdfld_dsi_dpi: using helper function drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/hisilicon-kirin-dsi-ade: using helper function drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/meson-encoder: using helper function drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/pl111-display: using helper function drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/sun4i-tv: using helper func drm_display_mode_from_videomode for calculating timing parameters drm/kms/mode/ti-lcdc: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/tegra: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/mtk_dpi_dsi: using helper func drm_display_mode_to_videomode for calculating timing parameters drm/kms/mode/bridge-adv7533: using helper func drm_display_mode_to_videomode for calculating timing parameters
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 28 +++-- drivers/gpu/drm/bridge/adv7511/adv7533.c | 35 +++--- drivers/gpu/drm/bridge/tc358767.c | 42 +++---- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 9 +- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 29 ++--- drivers/gpu/drm/gma500/mdfld_dsi_dpi.c | 28 ++--- drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 42 ++++--- drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 52 +++------ drivers/gpu/drm/mediatek/mtk_dpi.c | 60 +++++----- drivers/gpu/drm/mediatek/mtk_dsi.c | 14 +-- drivers/gpu/drm/meson/meson_venc.c | 149 +++++++++++------------- drivers/gpu/drm/pl111/pl111_display.c | 40 +++---- drivers/gpu/drm/sun4i/sun4i_tv.c | 67 ++++------- drivers/gpu/drm/tegra/dc.c | 15 ++- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 60 +++++----- 15 files changed, 280 insertions(+), 390 deletions(-)
-- 2.7.4
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Thu, May 07, 2018 at 15:46:02 +0200, Daniel Vetter wrote:
On Thu, May 03, 2018 at 01:53:55PM +0530, Satendra Singh Thakur wrote:
1.There is a function in drm-core to calculate display timing parameters: horizontal front porch, back porch, sync length, vertical front porch, back porch, sync length and clock in Hz. However, some drivers are still calculating these parameters themselves. Therefore, there is a duplication of the code. This patch series replaces this redundant code with the function drm_display_mode_to_videomode. This removes nearly 100 redundant lines from the related drivers. 2.For some drivers (sun4i) the reverse helper drm_display_mode_from_videomode is used. 3.For some drivers it replaces arithmatic operators (*, /) with shifting operators (>>, <<). 4.For some drivers DRM_MODE_FLAG_* are replaced with DISPLAY_FLAGS_* flags. 5.These changes apply to following crtc and encoder drivers: atmel-hlcdc bridge-tc358767 exynos-dsi fsl-dcu gma500-mdfld_dsi_dpi hisilicon-kirin_dsi, ade meson-encoder pl111-display sun4i-tv ti lcdc tegra dc mediatek dpi dsi bridge-adv7533
The drm_mode_to_videomode helper is meant for interop between drm and v4l, which have different internal structures to represent modes.
For drivers that only use drm I think the better option would be to add these fields to struct drm_display_mode as another set of crtc_* values (the computed values are stored in crtc_ prefixed members). And compute front/back porch in drm_mode_set_crtcinfo.
Then we can use these new drm_display_mode->crtc_h|vfront|back_porch fields in all the drivers you're changing. This way you avoid having to change all the drm drivers to use v4l #defines.
Thanks, Daniel
Hi Daniel, Thanks for the comments. I will look into it.
Thanks -Satendra
On Thu, May 08, 2018 at 16:28:30 +0530, Satendra Singh Thakur wrote:
On Thu, May 07, 2018 at 15:46:02 +0200, Daniel Vetter wrote:
On Thu, May 03, 2018 at 01:53:55PM +0530, Satendra Singh Thakur wrote:
1.There is a function in drm-core to calculate display timing parameters: horizontal front porch, back porch, sync length, vertical front porch, back porch, sync length and clock in Hz. However, some drivers are still calculating these parameters themselves. Therefore, there is a duplication of the code. This patch series replaces this redundant code with the function drm_display_mode_to_videomode. This removes nearly 100 redundant lines from the related drivers. 2.For some drivers (sun4i) the reverse helper drm_display_mode_from_videomode is used. 3.For some drivers it replaces arithmatic operators (*, /) with shifting operators (>>, <<). 4.For some drivers DRM_MODE_FLAG_* are replaced with DISPLAY_FLAGS_* flags. 5.These changes apply to following crtc and encoder drivers: atmel-hlcdc bridge-tc358767 exynos-dsi fsl-dcu gma500-mdfld_dsi_dpi hisilicon-kirin_dsi, ade meson-encoder pl111-display sun4i-tv ti lcdc tegra dc mediatek dpi dsi bridge-adv7533
The drm_mode_to_videomode helper is meant for interop between drm and v4l, which have different internal structures to represent modes.
For drivers that only use drm I think the better option would be to add these fields to struct drm_display_mode as another set of crtc_* values (the computed values are stored in crtc_ prefixed members). And compute front/back porch in drm_mode_set_crtcinfo.
Then we can use these new drm_display_mode->crtc_h|vfront|back_porch fields in all the drivers you're changing. This way you avoid having to change all the drm drivers to use v4l #defines.
Thanks, Daniel
Hi Daniel, Thanks for the comments. I will look into it.
Thanks -Satendra
Hi Daniel, Thanks for the comments. Please find below my understanding in this direction.
1. Currently struct videomode is being used in 50 drm drivers and 14 fbdev drivers. Since, it's already being used by so many drm drivers, that is the reason these fbdev objects (struct videmode and func drm_display_mode_to_videomode) were used in this patch series.
2. Anyway, if fbdev related objects (struct/func) are not encouraged in drm drivers, then we may add h/v front/back porches in struct drm_display_mode as adviced by you.
3. We can calculate these params in func drm_mode_set_crtcinfo at the end of it. int drm_mode_set_crtcinfo () { . . crtc_hfront_porch = crtc_hsync_start - crtc_hdisplay; crtc_vfront_porch = crtc_vsync_start - crtc_vdisplay; . . crtc_clock_hz = crtc_clock*1000; };
4. Normally mode is programmed in HW in following callbacks of crtc and encoder drivers -mode_set -mode_set_nofb -atomic_enable
Normally drm_mode_set_crtcinfo is used in -mode_fixup callbacks (CBs) of encoder and crtc drivers.
if mode_fixup CBs are called before mode_set CBs then drm_mode_set_crtcinfo is right place to calculate sync/porch params. We can use crtc_hfront/back_porches directly and program them to HW in above mentioned callbacks.
int my_mode_set () { REG_WRITE(crtc_hfront_porch); REG_WRITE(crtc_hback_porch); . . }
6. However, if these params are being modified after calling drm_set_crtcinfo as mentioned below:
bool amdgpu_atombios_encoder_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
/* set the active encoder to connector routing */ amdgpu_encoder_set_active_device(encoder); ***drm_mode_set_crtcinfo(adjusted_mode, 0);****
/* hw bug */ if ((mode->flags & DRM_MODE_FLAG_INTERLACE) && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2))) adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
Then we may need to define new func like
void drm_calc_hv_porches_sync() { crtc_hfront_porch = crtc_hsync_start - crtc_hdisplay; crtc_vfront_porch = crtc_vsync_start - crtc_vdisplay; . . crtc_clock_hz = crtc_clock*1000; } and call this func in mode_set*, atomic_enable CBS before programming the HW with this mode.
Should I create patches around this idea ? Please let me know your comments.
Thanks -Satendra
On Wed, May 9, 2018 at 1:52 PM, Satendra Singh Thakur satendra.t@samsung.com wrote:
On Thu, May 08, 2018 at 16:28:30 +0530, Satendra Singh Thakur wrote:
On Thu, May 07, 2018 at 15:46:02 +0200, Daniel Vetter wrote:
On Thu, May 03, 2018 at 01:53:55PM +0530, Satendra Singh Thakur wrote:
1.There is a function in drm-core to calculate display timing parameters: horizontal front porch, back porch, sync length, vertical front porch, back porch, sync length and clock in Hz. However, some drivers are still calculating these parameters themselves. Therefore, there is a duplication of the code. This patch series replaces this redundant code with the function drm_display_mode_to_videomode. This removes nearly 100 redundant lines from the related drivers. 2.For some drivers (sun4i) the reverse helper drm_display_mode_from_videomode is used. 3.For some drivers it replaces arithmatic operators (*, /) with shifting operators (>>, <<). 4.For some drivers DRM_MODE_FLAG_* are replaced with DISPLAY_FLAGS_* flags. 5.These changes apply to following crtc and encoder drivers: atmel-hlcdc bridge-tc358767 exynos-dsi fsl-dcu gma500-mdfld_dsi_dpi hisilicon-kirin_dsi, ade meson-encoder pl111-display sun4i-tv ti lcdc tegra dc mediatek dpi dsi bridge-adv7533
The drm_mode_to_videomode helper is meant for interop between drm and v4l, which have different internal structures to represent modes.
For drivers that only use drm I think the better option would be to add these fields to struct drm_display_mode as another set of crtc_* values (the computed values are stored in crtc_ prefixed members). And compute front/back porch in drm_mode_set_crtcinfo.
Then we can use these new drm_display_mode->crtc_h|vfront|back_porch fields in all the drivers you're changing. This way you avoid having to change all the drm drivers to use v4l #defines.
Thanks, Daniel
Hi Daniel, Thanks for the comments. I will look into it.
Thanks -Satendra
Hi Daniel, Thanks for the comments. Please find below my understanding in this direction.
- Currently struct videomode is being used in 50 drm drivers and 14 fbdev drivers. Since, it's already being used by so many drm drivers, that is the reason these fbdev objects (struct videmode and func drm_display_mode_to_videomode) were used in this patch series.
The biggest contributor for that seems to be of_get_videomode. We should probably have a of_drm_get_display_mode helper, which automatically converts the of/dt video description into the drm display mode structure.
And I found way less than 50 drm drivers using videomode, much less if we ignore of.
Anyway, if fbdev related objects (struct/func) are not encouraged in drm drivers, then we may add h/v front/back porches in struct drm_display_mode as adviced by you.
We can calculate these params in func drm_mode_set_crtcinfo at the end of it. int drm_mode_set_crtcinfo () { . . crtc_hfront_porch = crtc_hsync_start - crtc_hdisplay; crtc_vfront_porch = crtc_vsync_start - crtc_vdisplay; . . crtc_clock_hz = crtc_clock*1000; };
Normally mode is programmed in HW in following callbacks of crtc and encoder drivers -mode_set -mode_set_nofb -atomic_enable
Normally drm_mode_set_crtcinfo is used in -mode_fixup callbacks (CBs) of encoder and crtc drivers.
if mode_fixup CBs are called before mode_set CBs then drm_mode_set_crtcinfo is right place to calculate sync/porch params. We can use crtc_hfront/back_porches directly and program them to HW in above mentioned callbacks.
int my_mode_set () { REG_WRITE(crtc_hfront_porch); REG_WRITE(crtc_hback_porch); . . }
Agreed with your plan up to point 5 here.
- However, if these params are being modified after calling drm_set_crtcinfo as mentioned below:
bool amdgpu_atombios_encoder_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
/* set the active encoder to connector routing */ amdgpu_encoder_set_active_device(encoder); ***drm_mode_set_crtcinfo(adjusted_mode, 0);**** /* hw bug */ if ((mode->flags & DRM_MODE_FLAG_INTERLACE) && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2))) adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;Then we may need to define new func like
void drm_calc_hv_porches_sync() { crtc_hfront_porch = crtc_hsync_start - crtc_hdisplay; crtc_vfront_porch = crtc_vsync_start - crtc_vdisplay; . . crtc_clock_hz = crtc_clock*1000; } and call this func in mode_set*, atomic_enable CBS before programming the HW with this mode.
Should I create patches around this idea ? Please let me know your comments.
I'm not sure about point 6. I think we should wait with coming up with a solution to this problem once there's a clear need for it. Most likely I think drivers who both need to adjust computed timings and who need v/hfront/back porch just need to adjust everything on their own. And we won't provide any additional helpers.
Cheers, Daniel
dri-devel@lists.freedesktop.org
-
Andrzej Hajda -
Daniel Vetter -
Maxime Ripard -
Robin Murphy -
Satendra Singh Thakur -
Stefan Agner