drm: panel-simple: Problems to use Seiko 43WVF1G panel and DRM_MXS driver on the i.MX6SX SabreSD.
Hi,
I'm trying to use the Seiko 43WVF1G panel (Datasheet link: http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf) and the DRM_MXS driver on the i.MX6SX SabreSD. Applying the patch below removes the old timing configuration on the dtsi and adds it to the panel-simple.c I can get the display working, but the image is out of place. Another point to note is that it's necessary to set the reg_lcd_3v3 to regulator-always-on otherwise the gpio3 27 does not get enabled.
The main two problems that I'm having at the moment are:
- Gpio3 27 is not being set by the driver, function panel_simple_prepare(struct drm_panel *panel) is not being called. - The image is displaced even when using the same timing values in the datasheet.
I would like to know if I'm doing something wrong on my dtsi, or if something is missing on the panel-simple.c. I would appreciate any help.
Thanks!
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi index da81552..13fcce9 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi @@ -24,7 +24,7 @@ reg = <0x80000000 0x40000000>; };
- backlight { + backlight_display: backlight-display { compatible = "pwm-backlight"; pwms = <&pwm3 0 5000000>; brightness-levels = <0 4 8 16 32 64 128 255>; @@ -104,6 +104,7 @@ regulator-name = "lcd-3v3"; gpio = <&gpio3 27 0>; enable-active-high; + regulator-always-on; };
reg_peri_3v3: regulator@5 { @@ -146,6 +147,19 @@ mux-int-port = <2>; mux-ext-port = <6>; }; + + panel { + compatible = "seiko,43wvf1g", "simple-panel"; + backlight = <&backlight_display>; + + power-supply = <®_lcd_3v3>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; };
&audmux { @@ -215,33 +229,14 @@ &lcdif1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd>; - lcd-supply = <®_lcd_3v3>; - display = <&display0>; status = "okay";
- display0: display0 { - bits-per-pixel = <16>; - bus-width = <24>; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <33500000>; - hactive = <800>; - vactive = <480>; - hback-porch = <89>; - hfront-porch = <164>; - vback-porch = <23>; - vfront-porch = <10>; - hsync-len = <10>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <0>; - }; + port{ + display_out: endpoint { + remote-endpoint = <&panel_in>; }; }; + };
&pwm3 { diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 06aaf79..8faefee 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -863,6 +863,31 @@ static const struct panel_desc hannstar_hsd070pww1 = { .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, };
+static const struct display_timing seiko_43wvf1g_timing = { + .pixelclock = { 33500000, 33500000, 33500000 }, + .hactive = { 800, 800, 800 }, + .hfront_porch = { 164, 164, 164 }, + .hback_porch = { 89, 89, 89 }, + .hsync_len = { 10, 10, 10 }, + .vactive = { 480, 480, 480 }, + .vfront_porch = { 10, 10, 10 }, + .vback_porch = { 23, 23, 23 }, + .vsync_len = { 10, 10, 10 }, + .flags = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE | + DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW, +}; + +static const struct panel_desc seiko_43wvf1g = { + .timings = &seiko_43wvf1g_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 93, + .height = 57, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, +}; + static const struct display_timing hannstar_hsd100pxn1_timing = { .pixelclock = { 55000000, 65000000, 75000000 }, .hactive = { 1024, 1024, 1024 }, @@ -1853,6 +1878,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "samsung,ltn140at29-301", .data = &samsung_ltn140at29_301, }, { + .compatible = "seiko,43wvf1g", + .data = &seiko_43wvf1g, + }, { .compatible = "sharp,lq101k1ly04", .data = &sharp_lq101k1ly04, }, { -- 2.7.4
-- Breno Matheus Lima
On Wed, Feb 1, 2017 at 2:04 PM, Breno Matheus Lima brenomatheus@gmail.com wrote:
Hi,
I'm trying to use the Seiko 43WVF1G panel (Datasheet link: http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf) and the DRM_MXS driver on the i.MX6SX SabreSD. Applying the patch below removes the old timing configuration on the dtsi and adds it to the panel-simple.c I can get the display working, but the image is out of place. Another point to note is that it's necessary to set the reg_lcd_3v3 to regulator-always-on otherwise the gpio3 27 does not get enabled.
The main two problems that I'm having at the moment are:
- Gpio3 27 is not being set by the driver, function
panel_simple_prepare(struct drm_panel *panel) is not being called.
With the change below the regulator can be properly turned on:
--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -103,12 +103,16 @@ static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe, struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
mxsfb_crtc_enable(mxsfb); + drm_panel_prepare(mxsfb->panel); + drm_panel_enable(mxsfb->panel); }
static void mxsfb_pipe_disable(struct drm_simple_display_pipe *pipe) { struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
+ drm_panel_disable(mxsfb->panel); + drm_panel_unprepare(mxsfb->panel); mxsfb_crtc_disable(mxsfb); }
Marek, not sure if this is the correct place to call drm_panel_prepare/enable.
Any comments, please?
Thanks
On Wed, Feb 01, 2017 at 02:48:55PM -0200, Fabio Estevam wrote:
On Wed, Feb 1, 2017 at 2:04 PM, Breno Matheus Lima brenomatheus@gmail.com wrote:
Hi,
I'm trying to use the Seiko 43WVF1G panel (Datasheet link: http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf) and the DRM_MXS driver on the i.MX6SX SabreSD. Applying the patch below removes the old timing configuration on the dtsi and adds it to the panel-simple.c I can get the display working, but the image is out of place. Another point to note is that it's necessary to set the reg_lcd_3v3 to regulator-always-on otherwise the gpio3 27 does not get enabled.
The main two problems that I'm having at the moment are:
- Gpio3 27 is not being set by the driver, function
panel_simple_prepare(struct drm_panel *panel) is not being called.
With the change below the regulator can be properly turned on:
--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -103,12 +103,16 @@ static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe, struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
mxsfb_crtc_enable(mxsfb);
drm_panel_prepare(mxsfb->panel);drm_panel_enable(mxsfb->panel);
Typically the sequence would be:
drm_panel_prepare(); mxsfb_crtc_enable(); drm_panel_enable();
}
static void mxsfb_pipe_disable(struct drm_simple_display_pipe *pipe) { struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
drm_panel_disable(mxsfb->panel);drm_panel_unprepare(mxsfb->panel); mxsfb_crtc_disable(mxsfb);}
And this would probably have to be:
drm_panel_disable(); mxsfb_crtc_disable(); drm_panel_unprepare();
See the kerneldoc for struct drm_panel_funcs (include/drm/drm_panel.h) for more details.
Thierry
On Wed, Feb 01, 2017 at 02:04:29PM -0200, Breno Matheus Lima wrote:
Hi,
I'm trying to use the Seiko 43WVF1G panel (Datasheet link: http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf) and the DRM_MXS driver on the i.MX6SX SabreSD. Applying the patch below removes the old timing configuration on the dtsi and adds it to the panel-simple.c I can get the display working, but the image is out of place. Another point to note is that it's necessary to set the reg_lcd_3v3 to regulator-always-on otherwise the gpio3 27 does not get enabled.
The main two problems that I'm having at the moment are:
- Gpio3 27 is not being set by the driver, function
panel_simple_prepare(struct drm_panel *panel) is not being called.
From a quick look the mxsfb driver is not fully implementing panel handling. It should really call drm_panel_prepare() and drm_panel_enable() while switching on the display pipeline and drm_panel_disable(), followed by drm_panel_unprepare() while switching off the display pipeline.
That should take care of setting that GPIO.
- The image is displaced even when using the same timing values in
the datasheet.
I would like to know if I'm doing something wrong on my dtsi, or if something is missing on the panel-simple.c. I would appreciate any help.
I was going to say that you could try and add debug output to the driver to see if the same values end up being programmed into the CRTC, but the driver currently doesn't seem to work with the existing bindings either, it relies entirely on DRM panel to get the modes, but evidently there is a lack of proper support for that.
I wonder how this has been tested in the first place. Maybe Marek can help answer these questions.
Thierry
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi index da81552..13fcce9 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi @@ -24,7 +24,7 @@ reg = <0x80000000 0x40000000>; };
- backlight {
- backlight_display: backlight-display { compatible = "pwm-backlight"; pwms = <&pwm3 0 5000000>; brightness-levels = <0 4 8 16 32 64 128 255>;
@@ -104,6 +104,7 @@ regulator-name = "lcd-3v3"; gpio = <&gpio3 27 0>; enable-active-high;
regulator-always-on; }; reg_peri_3v3: regulator@5 {@@ -146,6 +147,19 @@ mux-int-port = <2>; mux-ext-port = <6>; };
- panel {
compatible = "seiko,43wvf1g", "simple-panel";backlight = <&backlight_display>;power-supply = <®_lcd_3v3>;port {panel_in: endpoint {remote-endpoint = <&display_out>;};};- };
};
&audmux { @@ -215,33 +229,14 @@ &lcdif1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lcd>;
lcd-supply = <®_lcd_3v3>;
display = <&display0>; status = "okay";
display0: display0 {
bits-per-pixel = <16>;bus-width = <24>;display-timings {native-mode = <&timing0>;timing0: timing0 {clock-frequency = <33500000>;hactive = <800>;vactive = <480>;hback-porch = <89>;hfront-porch = <164>;vback-porch = <23>;vfront-porch = <10>;hsync-len = <10>;vsync-len = <10>;hsync-active = <0>;vsync-active = <0>;de-active = <1>;pixelclk-active = <0>;};
- port{
display_out: endpoint {remote-endpoint = <&panel_in>; };};
&pwm3 { diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 06aaf79..8faefee 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -863,6 +863,31 @@ static const struct panel_desc hannstar_hsd070pww1 = { .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, };
+static const struct display_timing seiko_43wvf1g_timing = {
- .pixelclock = { 33500000, 33500000, 33500000 },
- .hactive = { 800, 800, 800 },
- .hfront_porch = { 164, 164, 164 },
- .hback_porch = { 89, 89, 89 },
- .hsync_len = { 10, 10, 10 },
- .vactive = { 480, 480, 480 },
- .vfront_porch = { 10, 10, 10 },
- .vback_porch = { 23, 23, 23 },
- .vsync_len = { 10, 10, 10 },
- .flags = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE |
DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,+};
+static const struct panel_desc seiko_43wvf1g = {
- .timings = &seiko_43wvf1g_timing,
- .num_timings = 1,
- .bpc = 8,
- .size = {
.width = 93,.height = 57,- },
- .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+};
static const struct display_timing hannstar_hsd100pxn1_timing = { .pixelclock = { 55000000, 65000000, 75000000 }, .hactive = { 1024, 1024, 1024 }, @@ -1853,6 +1878,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "samsung,ltn140at29-301", .data = &samsung_ltn140at29_301, }, {
.compatible = "seiko,43wvf1g",.data = &seiko_43wvf1g,- }, { .compatible = "sharp,lq101k1ly04", .data = &sharp_lq101k1ly04, }, {
-- 2.7.4
-- Breno Matheus Lima
On 02/01/2017 05:52 PM, Thierry Reding wrote:
On Wed, Feb 01, 2017 at 02:04:29PM -0200, Breno Matheus Lima wrote:
Hi,
I'm trying to use the Seiko 43WVF1G panel (Datasheet link: http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf) and the DRM_MXS driver on the i.MX6SX SabreSD. Applying the patch below removes the old timing configuration on the dtsi and adds it to the panel-simple.c I can get the display working, but the image is out of place. Another point to note is that it's necessary to set the reg_lcd_3v3 to regulator-always-on otherwise the gpio3 27 does not get enabled.
The main two problems that I'm having at the moment are:
- Gpio3 27 is not being set by the driver, function
panel_simple_prepare(struct drm_panel *panel) is not being called.
From a quick look the mxsfb driver is not fully implementing panel handling. It should really call drm_panel_prepare() and drm_panel_enable() while switching on the display pipeline and drm_panel_disable(), followed by drm_panel_unprepare() while switching off the display pipeline.
That should take care of setting that GPIO.
- The image is displaced even when using the same timing values in
the datasheet.
I would like to know if I'm doing something wrong on my dtsi, or if something is missing on the panel-simple.c. I would appreciate any help.
I was going to say that you could try and add debug output to the driver to see if the same values end up being programmed into the CRTC, but the driver currently doesn't seem to work with the existing bindings either, it relies entirely on DRM panel to get the modes, but evidently there is a lack of proper support for that.
I wonder how this has been tested in the first place. Maybe Marek can help answer these questions.
I didn't use the simple-panel stuff, I used a custom panel driver, but didn't post that one yet. It's still in the pipeline.
On Wed, Feb 1, 2017 at 2:04 PM, Breno Matheus Lima brenomatheus@gmail.com wrote:
- The image is displaced even when using the same timing values in
the datasheet.
Managed to fix this framebuffer displacement problem. Will submit a patch soon.
dri-devel@lists.freedesktop.org
-
Breno Matheus Lima -
Fabio Estevam -
Marek Vasut -
Thierry Reding