Applied. Thanks!

Alex

On Fri, Sep 3, 2021 at 2:31 AM Christian König christian.koenig@amd.com wrote:

Am 02.09.21 um 23:51 schrieb Colin King:

...

From: Colin Ian King colin.king@canonical.com

There is a statement that is indented incorrectly. Clean it up.

Signed-off-by: Colin Ian King colin.king@canonical.com

Reviewed-by: Christian König christian.koenig@amd.com

...

---

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index 779f5c911e11..e4a96e7e386d 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -375,10 +375,10 @@ static void sdma_v5_2_ring_emit_ib(struct amdgpu_ring *ring, */ static void sdma_v5_2_ring_emit_mem_sync(struct amdgpu_ring *ring) {

• uint32_t gcr_cntl =

•             SDMA_GCR_GL2_INV | SDMA_GCR_GL2_WB | SDMA_GCR_GLM_INV |
  

•                 SDMA_GCR_GL1_INV | SDMA_GCR_GLV_INV | SDMA_GCR_GLK_INV |
  

•                 SDMA_GCR_GLI_INV(1);
  

• uint32_t gcr_cntl = SDMA_GCR_GL2_INV | SDMA_GCR_GL2_WB |
  

•                     SDMA_GCR_GLM_INV | SDMA_GCR_GL1_INV |
  

•                     SDMA_GCR_GLV_INV | SDMA_GCR_GLK_INV |
  

•                     SDMA_GCR_GLI_INV(1);
  
  /* flush entire cache L0/L1/L2, this can be optimized by performance requirement */
  amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ));