From: Claudiu Beznea claudiu.beznea@microchip.com
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed. Second patch avoid a variable initialization in atmel_hlcdc_crtc_mode_set_nofb(). The 3rd add compatibles in pwm-atmel-hlcdc driver. The 4th patch enables sys_clk in probe since SAM9X60 needs this. Specific support was added also in suspend/resume hooks. The 5th patch adds SAM9X60's LCD configuration and enabled it.
I took the changes of this series and introduced also a fix (this is the 6th patch in this series) - if you want to send it separately I would gladly do it.
I resend this to also include Lee Jones for pwm-atmel-hlcdc changes.
Thank you, Claudiu Beznea
Changes in v3: - keep compatible string on patch 3/6 on a single line (I keep here a tab in front of ".compatible" to be aligned with the rest of the code in atmel_hlcdc_dt_ids[]) - patches 4/7 and 3/7 from v2 were applied so remove them from this version - add a fix for atmel_hlcdc (patch 6/6)
Changes in v2: - use "|" operator in patch 1/7 to set ATMEL_HLCDC_CLKSEL on cfg - collect Acked-by, Reviewed-by tags
Claudiu Beznea (4): drm: atmel-hlcdc: add config option for clock selection drm: atmel-hlcdc: avoid initializing cfg with zero pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM drm/atmel-hclcdc: revert shift by 8
Sandeep Sheriker Mallikarjun (2): drm: atmel-hlcdc: enable sys_clk during initalization. drm: atmel-hlcdc: add sam9x60 LCD controller
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 18 ++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 120 +++++++++++++++++++++++- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 + drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- drivers/pwm/pwm-atmel-hlcdc.c | 1 + 5 files changed, 132 insertions(+), 11 deletions(-)
From: Claudiu Beznea claudiu.beznea@microchip.com
SAM9x60 LCD Controller has no option to select clock source as previous controllers have. To be able to use the same driver even for this LCD controller add a config option to know if controller supports this.
Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com Reviewed-by: Sam Ravnborg sam@ravnborg.org --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 12 +++++++----- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 ++ 2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index 8070a558d7b1..957e6d2fb00f 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -78,7 +78,8 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) unsigned long mode_rate; struct videomode vm; unsigned long prate; - unsigned int cfg; + unsigned int mask = ATMEL_HLCDC_CLKDIV_MASK | ATMEL_HLCDC_CLKPOL; + unsigned int cfg = 0; int div;
vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay; @@ -101,7 +102,10 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) (adj->crtc_hdisplay - 1) | ((adj->crtc_vdisplay - 1) << 16));
- cfg = ATMEL_HLCDC_CLKSEL; + if (!crtc->dc->desc->fixed_clksrc) { + cfg |= ATMEL_HLCDC_CLKSEL; + mask |= ATMEL_HLCDC_CLKSEL; + }
prate = 2 * clk_get_rate(crtc->dc->hlcdc->sys_clk); mode_rate = adj->crtc_clock * 1000; @@ -132,9 +136,7 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
cfg |= ATMEL_HLCDC_CLKDIV(div);
- regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0), - ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK | - ATMEL_HLCDC_CLKPOL, cfg); + regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0), mask, cfg);
cfg = 0;
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h index 70bd540d644e..0155efb9c443 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h @@ -328,6 +328,7 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *layer) * @max_hpw: maximum horizontal back/front porch width * @conflicting_output_formats: true if RGBXXX output formats conflict with * each other. + * @fixed_clksrc: true if clock source is fixed * @layers: a layer description table describing available layers * @nlayers: layer description table size */ @@ -340,6 +341,7 @@ struct atmel_hlcdc_dc_desc { int max_vpw; int max_hpw; bool conflicting_output_formats; + bool fixed_clksrc; const struct atmel_hlcdc_layer_desc *layers; int nlayers; };
From: Claudiu Beznea claudiu.beznea@microchip.com
Remove cfg initialization with zero and read state with drm_crtc_state_to_atmel_hlcdc_crtc_state() so that cfg to be initialized with state's output_mode.
Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com Reviewed-by: Sam Ravnborg sam@ravnborg.org --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index 957e6d2fb00f..81c50772df05 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -138,7 +138,8 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0), mask, cfg);
- cfg = 0; + state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state); + cfg = state->output_mode << 8;
if (adj->flags & DRM_MODE_FLAG_NVSYNC) cfg |= ATMEL_HLCDC_VSPOL; @@ -146,9 +147,6 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) if (adj->flags & DRM_MODE_FLAG_NHSYNC) cfg |= ATMEL_HLCDC_HSPOL;
- state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state); - cfg |= state->output_mode << 8; - regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5), ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL | ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
From: Claudiu Beznea claudiu.beznea@microchip.com
Add compatible string for SAM9X60 HLCDC's PWM.
Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com Acked-by: Thierry Reding thierry.reding@gmail.com --- drivers/pwm/pwm-atmel-hlcdc.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/pwm/pwm-atmel-hlcdc.c b/drivers/pwm/pwm-atmel-hlcdc.c index 54c6633d9b5d..6bfbe1a902fc 100644 --- a/drivers/pwm/pwm-atmel-hlcdc.c +++ b/drivers/pwm/pwm-atmel-hlcdc.c @@ -246,6 +246,7 @@ static const struct of_device_id atmel_hlcdc_dt_ids[] = { .compatible = "atmel,sama5d4-hlcdc", .data = &atmel_hlcdc_pwm_sama5d3_errata, }, + { .compatible = "microchip,sam9x60-hlcdc", }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, atmel_hlcdc_dt_ids);
From: Sandeep Sheriker Mallikarjun sandeepsheriker.mallikarjun@microchip.com
For SAM9X60 SoC, sys_clk is through lcd_gclk clock source and this needs to be enabled before enabling lcd_clk.
Signed-off-by: Sandeep Sheriker Mallikarjun sandeepsheriker.mallikarjun@microchip.com [claudiu.beznea@microchip.com: add fixed_clksrc checks] Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c index 0be13eceedba..8bf51f853721 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c @@ -625,10 +625,18 @@ static int atmel_hlcdc_dc_load(struct drm_device *dev) dc->hlcdc = dev_get_drvdata(dev->dev->parent); dev->dev_private = dc;
+ if (dc->desc->fixed_clksrc) { + ret = clk_prepare_enable(dc->hlcdc->sys_clk); + if (ret) { + dev_err(dev->dev, "failed to enable sys_clk\n"); + goto err_destroy_wq; + } + } + ret = clk_prepare_enable(dc->hlcdc->periph_clk); if (ret) { dev_err(dev->dev, "failed to enable periph_clk\n"); - goto err_destroy_wq; + goto err_sys_clk_disable; }
pm_runtime_enable(dev->dev); @@ -664,6 +672,9 @@ static int atmel_hlcdc_dc_load(struct drm_device *dev) err_periph_clk_disable: pm_runtime_disable(dev->dev); clk_disable_unprepare(dc->hlcdc->periph_clk); +err_sys_clk_disable: + if (dc->desc->fixed_clksrc) + clk_disable_unprepare(dc->hlcdc->sys_clk);
err_destroy_wq: destroy_workqueue(dc->wq); @@ -688,6 +699,8 @@ static void atmel_hlcdc_dc_unload(struct drm_device *dev)
pm_runtime_disable(dev->dev); clk_disable_unprepare(dc->hlcdc->periph_clk); + if (dc->desc->fixed_clksrc) + clk_disable_unprepare(dc->hlcdc->sys_clk); destroy_workqueue(dc->wq); }
@@ -805,6 +818,8 @@ static int atmel_hlcdc_dc_drm_suspend(struct device *dev) regmap_read(regmap, ATMEL_HLCDC_IMR, &dc->suspend.imr); regmap_write(regmap, ATMEL_HLCDC_IDR, dc->suspend.imr); clk_disable_unprepare(dc->hlcdc->periph_clk); + if (dc->desc->fixed_clksrc) + clk_disable_unprepare(dc->hlcdc->sys_clk);
return 0; } @@ -814,6 +829,8 @@ static int atmel_hlcdc_dc_drm_resume(struct device *dev) struct drm_device *drm_dev = dev_get_drvdata(dev); struct atmel_hlcdc_dc *dc = drm_dev->dev_private;
+ if (dc->desc->fixed_clksrc) + clk_prepare_enable(dc->hlcdc->sys_clk); clk_prepare_enable(dc->hlcdc->periph_clk); regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, dc->suspend.imr);
From: Sandeep Sheriker Mallikarjun sandeepsheriker.mallikarjun@microchip.com
Add the LCD controller for SAM9X60.
Signed-off-by: Sandeep Sheriker Mallikarjun sandeepsheriker.mallikarjun@microchip.com [claudiu.beznea@microchip.com: add fixed_clksrc option to atmel_hlcdc_dc_sam9x60] Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 101 +++++++++++++++++++++++++++ 1 file changed, 101 insertions(+)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c index 8bf51f853721..fb2e7646daeb 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c @@ -364,6 +364,103 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d4 = { .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d4_layers), .layers = atmel_hlcdc_sama5d4_layers, }; + +static const struct atmel_hlcdc_layer_desc atmel_hlcdc_sam9x60_layers[] = { + { + .name = "base", + .formats = &atmel_hlcdc_plane_rgb_formats, + .regs_offset = 0x60, + .id = 0, + .type = ATMEL_HLCDC_BASE_LAYER, + .cfgs_offset = 0x2c, + .layout = { + .xstride = { 2 }, + .default_color = 3, + .general_config = 4, + .disc_pos = 5, + .disc_size = 6, + }, + .clut_offset = 0x600, + }, + { + .name = "overlay1", + .formats = &atmel_hlcdc_plane_rgb_formats, + .regs_offset = 0x160, + .id = 1, + .type = ATMEL_HLCDC_OVERLAY_LAYER, + .cfgs_offset = 0x2c, + .layout = { + .pos = 2, + .size = 3, + .xstride = { 4 }, + .pstride = { 5 }, + .default_color = 6, + .chroma_key = 7, + .chroma_key_mask = 8, + .general_config = 9, + }, + .clut_offset = 0xa00, + }, + { + .name = "overlay2", + .formats = &atmel_hlcdc_plane_rgb_formats, + .regs_offset = 0x260, + .id = 2, + .type = ATMEL_HLCDC_OVERLAY_LAYER, + .cfgs_offset = 0x2c, + .layout = { + .pos = 2, + .size = 3, + .xstride = { 4 }, + .pstride = { 5 }, + .default_color = 6, + .chroma_key = 7, + .chroma_key_mask = 8, + .general_config = 9, + }, + .clut_offset = 0xe00, + }, + { + .name = "high-end-overlay", + .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats, + .regs_offset = 0x360, + .id = 3, + .type = ATMEL_HLCDC_OVERLAY_LAYER, + .cfgs_offset = 0x4c, + .layout = { + .pos = 2, + .size = 3, + .memsize = 4, + .xstride = { 5, 7 }, + .pstride = { 6, 8 }, + .default_color = 9, + .chroma_key = 10, + .chroma_key_mask = 11, + .general_config = 12, + .scaler_config = 13, + .phicoeffs = { + .x = 17, + .y = 33, + }, + .csc = 14, + }, + .clut_offset = 0x1200, + }, +}; + +static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sam9x60 = { + .min_width = 0, + .min_height = 0, + .max_width = 2048, + .max_height = 2048, + .max_spw = 0xff, + .max_vpw = 0xff, + .max_hpw = 0x3ff, + .fixed_clksrc = true, + .nlayers = ARRAY_SIZE(atmel_hlcdc_sam9x60_layers), + .layers = atmel_hlcdc_sam9x60_layers, +}; + static const struct of_device_id atmel_hlcdc_of_match[] = { { .compatible = "atmel,at91sam9n12-hlcdc", @@ -385,6 +482,10 @@ static const struct of_device_id atmel_hlcdc_of_match[] = { .compatible = "atmel,sama5d4-hlcdc", .data = &atmel_hlcdc_dc_sama5d4, }, + { + .compatible = "microchip,sam9x60-hlcdc", + .data = &atmel_hlcdc_dc_sam9x60, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, atmel_hlcdc_of_match);
From: Claudiu Beznea claudiu.beznea@microchip.com
Revert shift by 8 of state->base.alpha. This introduced regresion on planes.
Fixes: 7f73c10b256b ("drm/atmel-hclcdc: Convert to the new generic alpha property") Cc: Maxime Ripard maxime.ripard@bootlin.com Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index e836e2de35ce..cc8301352384 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -382,7 +382,7 @@ atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane, cfg |= ATMEL_HLCDC_LAYER_LAEN; else cfg |= ATMEL_HLCDC_LAYER_GAEN | - ATMEL_HLCDC_LAYER_GA(state->base.alpha >> 8); + ATMEL_HLCDC_LAYER_GA(state->base.alpha); }
if (state->disc_h && state->disc_w)
On Thu, Apr 25, 2019 at 12:36:39PM +0000, Claudiu.Beznea@microchip.com wrote:
From: Claudiu Beznea claudiu.beznea@microchip.com
Revert shift by 8 of state->base.alpha. This introduced regresion on planes.
Fixes: 7f73c10b256b ("drm/atmel-hclcdc: Convert to the new generic alpha property") Cc: Maxime Ripard maxime.ripard@bootlin.com Signed-off-by: Claudiu Beznea claudiu.beznea@microchip.com
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Hi Thierry.
pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM
OK to add the "pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM" patch via drm-misc? Then we can add all 6 patches in one go.
Sam
(Kept remaining of mail for reference)
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed. Second patch avoid a variable initialization in atmel_hlcdc_crtc_mode_set_nofb(). The 3rd add compatibles in pwm-atmel-hlcdc driver. The 4th patch enables sys_clk in probe since SAM9X60 needs this. Specific support was added also in suspend/resume hooks. The 5th patch adds SAM9X60's LCD configuration and enabled it.
I took the changes of this series and introduced also a fix (this is the 6th patch in this series) - if you want to send it separately I would gladly do it.
I resend this to also include Lee Jones for pwm-atmel-hlcdc changes.
Thank you, Claudiu Beznea
Changes in v3:
- keep compatible string on patch 3/6 on a single line (I keep here a tab in front of ".compatible" to be aligned with the rest of the code in atmel_hlcdc_dt_ids[])
- patches 4/7 and 3/7 from v2 were applied so remove them from this version
- add a fix for atmel_hlcdc (patch 6/6)
Changes in v2:
- use "|" operator in patch 1/7 to set ATMEL_HLCDC_CLKSEL on cfg
- collect Acked-by, Reviewed-by tags
Claudiu Beznea (4): drm: atmel-hlcdc: add config option for clock selection drm: atmel-hlcdc: avoid initializing cfg with zero pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM drm/atmel-hclcdc: revert shift by 8
Sandeep Sheriker Mallikarjun (2): drm: atmel-hlcdc: enable sys_clk during initalization. drm: atmel-hlcdc: add sam9x60 LCD controller
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 18 ++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 120 +++++++++++++++++++++++- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 + drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- drivers/pwm/pwm-atmel-hlcdc.c | 1 + 5 files changed, 132 insertions(+), 11 deletions(-)
-- 2.7.4
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Hi Sam,
On 07.05.2019 21:27, Sam Ravnborg wrote:
External E-Mail
Hi Thierry.
pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM
OK to add the "pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM" patch via drm-misc? Then we can add all 6 patches in one go.
Since we don't have an answer from Thierry till now, do you think it could be feasible to take the rest of the patches in this series? After that I will re-send the PWM patch to PWM list.
Thank you, Claudiu Beznea
Sam
(Kept remaining of mail for reference)
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed. Second patch avoid a variable initialization in atmel_hlcdc_crtc_mode_set_nofb(). The 3rd add compatibles in pwm-atmel-hlcdc driver. The 4th patch enables sys_clk in probe since SAM9X60 needs this. Specific support was added also in suspend/resume hooks. The 5th patch adds SAM9X60's LCD configuration and enabled it.
I took the changes of this series and introduced also a fix (this is the 6th patch in this series) - if you want to send it separately I would gladly do it.
I resend this to also include Lee Jones for pwm-atmel-hlcdc changes.
Thank you, Claudiu Beznea
Changes in v3:
- keep compatible string on patch 3/6 on a single line (I keep here a tab in front of ".compatible" to be aligned with the rest of the code in atmel_hlcdc_dt_ids[])
- patches 4/7 and 3/7 from v2 were applied so remove them from this version
- add a fix for atmel_hlcdc (patch 6/6)
Changes in v2:
- use "|" operator in patch 1/7 to set ATMEL_HLCDC_CLKSEL on cfg
- collect Acked-by, Reviewed-by tags
Claudiu Beznea (4): drm: atmel-hlcdc: add config option for clock selection drm: atmel-hlcdc: avoid initializing cfg with zero pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM drm/atmel-hclcdc: revert shift by 8
Sandeep Sheriker Mallikarjun (2): drm: atmel-hlcdc: enable sys_clk during initalization. drm: atmel-hlcdc: add sam9x60 LCD controller
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 18 ++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 120 +++++++++++++++++++++++- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 + drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- drivers/pwm/pwm-atmel-hlcdc.c | 1 + 5 files changed, 132 insertions(+), 11 deletions(-)
-- 2.7.4
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Hi Claudiu.
On Tue, Jun 04, 2019 at 04:18:33PM +0000, Claudiu.Beznea@microchip.com wrote:
Hi Sam,
On 07.05.2019 21:27, Sam Ravnborg wrote:
External E-Mail
Hi Thierry.
pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM
OK to add the "pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM" patch via drm-misc? Then we can add all 6 patches in one go.
Since we don't have an answer from Thierry till now, do you think it could be feasible to take the rest of the patches in this series? After that I will re-send the PWM patch to PWM list.
Thanks for the reminder.
Patches 1,2 and 4,5,6 applied to drm-misc-next.
Reworded changelog a bit in patch 6.
Sam
On 05.06.2019 00:54, Sam Ravnborg wrote:
Hi Claudiu.
On Tue, Jun 04, 2019 at 04:18:33PM +0000, Claudiu.Beznea@microchip.com wrote:
Hi Sam,
On 07.05.2019 21:27, Sam Ravnborg wrote:
External E-Mail
Hi Thierry.
pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM
OK to add the "pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM" patch via drm-misc? Then we can add all 6 patches in one go.
Since we don't have an answer from Thierry till now, do you think it could be feasible to take the rest of the patches in this series? After that I will re-send the PWM patch to PWM list.
Thanks for the reminder.
Patches 1,2 and 4,5,6 applied to drm-misc-next.
Reworded changelog a bit in patch 6.
Thank you, Claudiu
Sam
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 18 ++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 120 +++++++++++++++++++++++- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 + drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- drivers/pwm/pwm-atmel-hlcdc.c | 1 + 5 files changed, 132 insertions(+), 11 deletions(-)
Not sure why I am receiving this set.
Could you please drop me from future submissions.
On 08.05.2019 09:23, Lee Jones wrote:
External E-Mail
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 18 ++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 120 +++++++++++++++++++++++- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 + drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- drivers/pwm/pwm-atmel-hlcdc.c | 1 + 5 files changed, 132 insertions(+), 11 deletions(-)
Not sure why I am receiving this set.
Thierry suggested in v1 of this series to take pwm-atmel-hlcdc.c changes though MFD tree [1]. Then, in v2 you ask me to do update a bit the changes in pwm-atmel-hlcdc.c [2]. I send all the patches in one shot so that the context to be more obvious. Sorry for the noise, if any.
[1] https://lore.kernel.org/lkml/20190304110517.GB5121@ulmo/ [2] https://lore.kernel.org/lkml/20190425083132.GD14758@dell/
Could you please drop me from future submissions.
On Thu, 25 Apr 2019, Claudiu.Beznea@microchip.com wrote:
From: Claudiu Beznea claudiu.beznea@microchip.com
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed. Second patch avoid a variable initialization in atmel_hlcdc_crtc_mode_set_nofb(). The 3rd add compatibles in pwm-atmel-hlcdc driver. The 4th patch enables sys_clk in probe since SAM9X60 needs this. Specific support was added also in suspend/resume hooks. The 5th patch adds SAM9X60's LCD configuration and enabled it.
I took the changes of this series and introduced also a fix (this is the 6th patch in this series) - if you want to send it separately I would gladly do it.
I resend this to also include Lee Jones for pwm-atmel-hlcdc changes.
Thank you, Claudiu Beznea
Changes in v3:
- keep compatible string on patch 3/6 on a single line (I keep here a tab in front of ".compatible" to be aligned with the rest of the code in atmel_hlcdc_dt_ids[])
- patches 4/7 and 3/7 from v2 were applied so remove them from this version
- add a fix for atmel_hlcdc (patch 6/6)
Changes in v2:
- use "|" operator in patch 1/7 to set ATMEL_HLCDC_CLKSEL on cfg
- collect Acked-by, Reviewed-by tags
Claudiu Beznea (4): drm: atmel-hlcdc: add config option for clock selection drm: atmel-hlcdc: avoid initializing cfg with zero pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM drm/atmel-hclcdc: revert shift by 8
Sandeep Sheriker Mallikarjun (2): drm: atmel-hlcdc: enable sys_clk during initalization. drm: atmel-hlcdc: add sam9x60 LCD controller
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 18 ++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 120 +++++++++++++++++++++++- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 + drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- drivers/pwm/pwm-atmel-hlcdc.c | 1 + 5 files changed, 132 insertions(+), 11 deletions(-)
Why is this being sent to me?
On 05.06.2019 09:49, Lee Jones wrote:
External E-Mail
On Thu, 25 Apr 2019, Claudiu.Beznea@microchip.com wrote:
From: Claudiu Beznea claudiu.beznea@microchip.com
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed. Second patch avoid a variable initialization in atmel_hlcdc_crtc_mode_set_nofb(). The 3rd add compatibles in pwm-atmel-hlcdc driver. The 4th patch enables sys_clk in probe since SAM9X60 needs this. Specific support was added also in suspend/resume hooks. The 5th patch adds SAM9X60's LCD configuration and enabled it.
I took the changes of this series and introduced also a fix (this is the 6th patch in this series) - if you want to send it separately I would gladly do it.
I resend this to also include Lee Jones for pwm-atmel-hlcdc changes.
Thank you, Claudiu Beznea
Changes in v3:
- keep compatible string on patch 3/6 on a single line (I keep here a tab in front of ".compatible" to be aligned with the rest of the code in atmel_hlcdc_dt_ids[])
- patches 4/7 and 3/7 from v2 were applied so remove them from this version
- add a fix for atmel_hlcdc (patch 6/6)
Changes in v2:
- use "|" operator in patch 1/7 to set ATMEL_HLCDC_CLKSEL on cfg
- collect Acked-by, Reviewed-by tags
Claudiu Beznea (4): drm: atmel-hlcdc: add config option for clock selection drm: atmel-hlcdc: avoid initializing cfg with zero pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM drm/atmel-hclcdc: revert shift by 8
Sandeep Sheriker Mallikarjun (2): drm: atmel-hlcdc: enable sys_clk during initalization. drm: atmel-hlcdc: add sam9x60 LCD controller
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 18 ++-- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 120 +++++++++++++++++++++++- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 2 + drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- drivers/pwm/pwm-atmel-hlcdc.c | 1 + 5 files changed, 132 insertions(+), 11 deletions(-)
Why is this being sent to me?
Sorry, you were in the original "to" list due to changes that you asked for in v2 on mfd part.
Thierry suggested in v1 of this series to take pwm-atmel-hlcdc.c changes though MFD tree [1]. Then, in v2 you ask me to do update a bit the changes in pwm-atmel-hlcdc.c [2].
And in this reply I forgot to remove your email as you previously suggested. My bad!
Thank you, Claudiu Beznea
[1] https://lore.kernel.org/lkml/20190304110517.GB5121@ulmo/ [2] https://lore.kernel.org/lkml/20190425083132.GD14758@dell/
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