This Patch-Series adds missing Patches/Bugfixes to get hdmi working on BPI-R2 This is v2 of series https://patchwork.kernel.org/cover/10903309/ after getting mmsys done
v1->v2: - using get_possible_crtc API instead of hardcoded - drop unused dts-nodes - refine commit-messages as far as i can :) "config component output by device node port" is needed to fix a WARN_ON() "fix boot up for 720 and 480 but 1080" fixes flickering, which may cause also some resolutions not working on some TFT (had some problems on my smaller TFT)
2 Patches were already posted, but not yet merged into mainline - config component output by device node port https://patchwork.kernel.org/patch/10609007/ - add display subsystem related device nodes (resend) https://patchwork.kernel.org/patch/10588951/
Bibby Hsieh (1): drm/mediatek: config component output by device node port
Jitao Shi (1): drm/mediatek: dpi/dsi: change the getting possible_crtc way
Ryder Lee (1): arm: dts: mt7623: add display subsystem related device nodes
Stu Hsieh (1): drm: Add get_possible_crtc API for dpi, dsi
chunhui dai (1): drm/mediatek: fix boot up for 720 and 480 but 1080
arch/arm/boot/dts/mt7623.dtsi | 177 ++++++++++++++++++ arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 85 +++++++++ arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 85 +++++++++ drivers/gpu/drm/mediatek/mtk_dpi.c | 3 +- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 42 +++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 46 ++++- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 4 +- drivers/gpu/drm/mediatek/mtk_dsi.c | 3 +- drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 + drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 + .../gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 + 12 files changed, 442 insertions(+), 10 deletions(-)
-- 2.25.1
From: Bibby Hsieh bibby.hsieh@mediatek.com
We can select output component by decive node port. Main path default output component is DSI. External path default output component is DPI.
without this Patch i get this warning:
WARNING: CPU: 3 PID: 70 at drivers/gpu/drm/drm_mode_config.c:621 drm_mode_config_validate+0x1d8/0x258
Signed-off-by: Bibby Hsieh bibby.hsieh@mediatek.com
added small fixes for warnings
Signed-off-by: Frank Wunderlich frank-w@public-files.de Tested-by: Frank Wunderlich frank-w@public-files.de --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 46 ++++++++++++++++++++++---- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 4 +-- 2 files changed, 42 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 6bd369434d9d..ce7abf2743d9 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -24,6 +24,13 @@ #include <drm/drm_of.h> #include <drm/drm_probe_helper.h> #include <drm/drm_vblank.h> +#include <linux/component.h> +#include <linux/iommu.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_graph.h> +#include <linux/of_platform.h> +#include <linux/pm_runtime.h>
#include "mtk_drm_crtc.h" #include "mtk_drm_ddp.h" @@ -61,7 +68,7 @@ static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = { .atomic_commit = drm_atomic_helper_commit, };
-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { +static enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0, @@ -69,12 +76,12 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { DDP_COMPONENT_DSI0, };
-static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { +static enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0, };
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { +static enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0, DDP_COMPONENT_AAL0, @@ -84,7 +91,7 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = { DDP_COMPONENT_PWM0, };
-static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = { +static enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = { DDP_COMPONENT_OVL1, DDP_COMPONENT_COLOR1, DDP_COMPONENT_AAL1, @@ -100,7 +107,7 @@ static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = { DDP_COMPONENT_PWM2, };
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { +static enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0, DDP_COMPONENT_AAL0, @@ -111,7 +118,7 @@ static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = { DDP_COMPONENT_PWM0, };
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { +static enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { DDP_COMPONENT_OVL1, DDP_COMPONENT_COLOR1, DDP_COMPONENT_GAMMA, @@ -459,6 +466,7 @@ static int mtk_drm_probe(struct platform_device *pdev)
/* Iterate over sibling DISP function blocks */ for_each_child_of_node(phandle->parent, node) { + struct device_node *port, *ep, *remote; const struct of_device_id *of_id; enum mtk_ddp_comp_type comp_type; int comp_id; @@ -522,6 +530,32 @@ static int mtk_drm_probe(struct platform_device *pdev)
private->ddp_comp[comp_id] = comp; } + + if (comp_type != MTK_DSI && comp_type != MTK_DPI) { + port = of_graph_get_port_by_id(node, 0); + if (!port) + continue; + ep = of_get_child_by_name(port, "endpoint"); + of_node_put(port); + if (!ep) + continue; + remote = of_graph_get_remote_port_parent(ep); + of_node_put(ep); + if (!remote) + continue; + of_id = of_match_node(mtk_ddp_comp_dt_ids, remote); + if (!of_id) + continue; + comp_type = (enum mtk_ddp_comp_type)of_id->data; + for (i = 0; i < private->data->main_len - 1; i++) + if (private->data->main_path[i] == comp_id) + private->data->main_path[i + 1] = + mtk_ddp_comp_get_id(node, comp_type); + for (i = 0; i < private->data->ext_len - 1; i++) + if (private->data->ext_path[i] == comp_id) + private->data->ext_path[i + 1] = + mtk_ddp_comp_get_id(node, comp_type); + } }
if (!private->mutex_node) { diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index b5be63e53176..7fcaab648bf1 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -21,9 +21,9 @@ struct drm_property; struct regmap;
struct mtk_mmsys_driver_data { - const enum mtk_ddp_comp_id *main_path; + enum mtk_ddp_comp_id *main_path; unsigned int main_len; - const enum mtk_ddp_comp_id *ext_path; + enum mtk_ddp_comp_id *ext_path; unsigned int ext_len; const enum mtk_ddp_comp_id *third_path; unsigned int third_len; -- 2.25.1
Hi, Frank:
Frank Wunderlich frank-w@public-files.de 於 2020年7月28日 週二 下午7:18寫道:
From: Bibby Hsieh bibby.hsieh@mediatek.com
We can select output component by decive node port. Main path default output component is DSI. External path default output component is DPI.
without this Patch i get this warning:
WARNING: CPU: 3 PID: 70 at drivers/gpu/drm/drm_mode_config.c:621 drm_mode_config_validate+0x1d8/0x258
Signed-off-by: Bibby Hsieh bibby.hsieh@mediatek.com
added small fixes for warnings
Signed-off-by: Frank Wunderlich frank-w@public-files.de Tested-by: Frank Wunderlich frank-w@public-files.de
[snip]
-static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { +static enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = { DDP_COMPONENT_OVL1, DDP_COMPONENT_COLOR1, DDP_COMPONENT_GAMMA, @@ -459,6 +466,7 @@ static int mtk_drm_probe(struct platform_device *pdev)
/* Iterate over sibling DISP function blocks */ for_each_child_of_node(phandle->parent, node) {
struct device_node *port, *ep, *remote; const struct of_device_id *of_id; enum mtk_ddp_comp_type comp_type; int comp_id;
@@ -522,6 +530,32 @@ static int mtk_drm_probe(struct platform_device *pdev)
private->ddp_comp[comp_id] = comp; }
if (comp_type != MTK_DSI && comp_type != MTK_DPI) {
port = of_graph_get_port_by_id(node, 0);
if (!port)
continue;
ep = of_get_child_by_name(port, "endpoint");
of_node_put(port);
if (!ep)
continue;
remote = of_graph_get_remote_port_parent(ep);
of_node_put(ep);
if (!remote)
continue;
of_id = of_match_node(mtk_ddp_comp_dt_ids, remote);
if (!of_id)
continue;
comp_type = (enum mtk_ddp_comp_type)of_id->data;
for (i = 0; i < private->data->main_len - 1; i++)
if (private->data->main_path[i] == comp_id)
private->data->main_path[i + 1] =
mtk_ddp_comp_get_id(node, comp_type);
for (i = 0; i < private->data->ext_len - 1; i++)
if (private->data->ext_path[i] == comp_id)
private->data->ext_path[i + 1] =
mtk_ddp_comp_get_id(node, comp_type);
}
The port property is not defined in binding document [1], so define it in binding document first.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Docu...
Regards, Chun-Kuang.
} if (!private->mutex_node) {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index b5be63e53176..7fcaab648bf1 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -21,9 +21,9 @@ struct drm_property; struct regmap;
struct mtk_mmsys_driver_data {
const enum mtk_ddp_comp_id *main_path;
enum mtk_ddp_comp_id *main_path; unsigned int main_len;
const enum mtk_ddp_comp_id *ext_path;
enum mtk_ddp_comp_id *ext_path; unsigned int ext_len; const enum mtk_ddp_comp_id *third_path; unsigned int third_len;
-- 2.25.1
Gesendet: Sonntag, 02. August 2020 um 02:03 Uhr Von: "Chun-Kuang Hu" chunkuang.hu@kernel.org An: "Frank Wunderlich" frank-w@public-files.de Cc: "Chun-Kuang Hu" chunkuang.hu@kernel.org, "Philipp Zabel" p.zabel@pengutronix.de, "David Airlie" airlied@linux.ie, "linux-kernel" linux-kernel@vger.kernel.org, "DRI Development" dri-devel@lists.freedesktop.org, "moderated list:ARM/Mediatek SoC support" linux-mediatek@lists.infradead.org, "Daniel Vetter" daniel@ffwll.ch, "Matthias Brugger" matthias.bgg@gmail.com, "Bibby Hsieh" bibby.hsieh@mediatek.com, "Linux ARM" linux-arm-kernel@lists.infradead.org Betreff: Re: [PATCH v2 1/5] drm/mediatek: config component output by device node port
if (comp_type != MTK_DSI && comp_type != MTK_DPI) {
port = of_graph_get_port_by_id(node, 0);
if (!port)
continue;
ep = of_get_child_by_name(port, "endpoint");
of_node_put(port);
if (!ep)
continue;
remote = of_graph_get_remote_port_parent(ep);
of_node_put(ep);
if (!remote)
continue;
of_id = of_match_node(mtk_ddp_comp_dt_ids, remote);
if (!of_id)
continue;
comp_type = (enum mtk_ddp_comp_type)of_id->data;
for (i = 0; i < private->data->main_len - 1; i++)
if (private->data->main_path[i] == comp_id)
private->data->main_path[i + 1] =
mtk_ddp_comp_get_id(node, comp_type);
for (i = 0; i < private->data->ext_len - 1; i++)
if (private->data->ext_path[i] == comp_id)
private->data->ext_path[i + 1] =
mtk_ddp_comp_get_id(node, comp_type);
}
The port property is not defined in binding document [1], so define it in binding document first.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Docu...
hi, would be the following enough for describing the ports?
Port binding =============
some nodes like
- connector (e.g. hdmi-connector) - bls (mediatek,mt7623-disp-pwm) - hdmix (mediatek,mt7623-hdmi)
can have port bindings to connect each other. Each port can have only 1 endpoint
more detail about ports/endpoints in ../../media/video-interfaces.txt hdmi-connector is described here: ../connector/hdmi-connector.txt
example:
connector { compatible = "hdmi-connector";
port { hdmi_connector_in: endpoint { remote-endpoint = <&hdmi0_out>; }; }; };
&bls { status = "okay";
port { bls_out: endpoint { remote-endpoint = <&dpi0_in>; }; }; };
&dpi0 { status = "okay";
ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dpi0_out: endpoint { remote-endpoint = <&hdmi0_in>; }; };
port@1 { reg = <1>; dpi0_in: endpoint { remote-endpoint = <&bls_out>; }; }; }; };
&hdmi0 {
ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; hdmi0_in: endpoint { remote-endpoint = <&dpi0_out>; }; };
port@1 { reg = <1>; hdmi0_out: endpoint { remote-endpoint = <&hdmi_connector_in>; }; }; }; };
regards Frank
Hi, Frank:
Frank Wunderlich frank-w@public-files.de 於 2020年8月2日 週日 下午4:06寫道:
Gesendet: Sonntag, 02. August 2020 um 02:03 Uhr Von: "Chun-Kuang Hu" chunkuang.hu@kernel.org An: "Frank Wunderlich" frank-w@public-files.de Cc: "Chun-Kuang Hu" chunkuang.hu@kernel.org, "Philipp Zabel" p.zabel@pengutronix.de, "David Airlie" airlied@linux.ie, "linux-kernel" linux-kernel@vger.kernel.org, "DRI Development" dri-devel@lists.freedesktop.org, "moderated list:ARM/Mediatek SoC support" linux-mediatek@lists.infradead.org, "Daniel Vetter" daniel@ffwll.ch, "Matthias Brugger" matthias.bgg@gmail.com, "Bibby Hsieh" bibby.hsieh@mediatek.com, "Linux ARM" linux-arm-kernel@lists.infradead.org Betreff: Re: [PATCH v2 1/5] drm/mediatek: config component output by device node port
if (comp_type != MTK_DSI && comp_type != MTK_DPI) {
port = of_graph_get_port_by_id(node, 0);
if (!port)
continue;
ep = of_get_child_by_name(port, "endpoint");
of_node_put(port);
if (!ep)
continue;
remote = of_graph_get_remote_port_parent(ep);
of_node_put(ep);
if (!remote)
continue;
of_id = of_match_node(mtk_ddp_comp_dt_ids, remote);
if (!of_id)
continue;
comp_type = (enum mtk_ddp_comp_type)of_id->data;
for (i = 0; i < private->data->main_len - 1; i++)
if (private->data->main_path[i] == comp_id)
private->data->main_path[i + 1] =
mtk_ddp_comp_get_id(node, comp_type);
for (i = 0; i < private->data->ext_len - 1; i++)
if (private->data->ext_path[i] == comp_id)
private->data->ext_path[i + 1] =
mtk_ddp_comp_get_id(node, comp_type);
}
The port property is not defined in binding document [1], so define it in binding document first.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Docu...
hi, would be the following enough for describing the ports?
Port binding
some nodes like
- connector (e.g. hdmi-connector)
- bls (mediatek,mt7623-disp-pwm)
- hdmix (mediatek,mt7623-hdmi)
Now I just care about the bls to dpi. So in mediatek,disp.txt, you just need to add a Optional properties - port (input and output), and modify mediatek,dpi.txt for its input port.
Regards, Chun-Kuang.
can have port bindings to connect each other. Each port can have only 1 endpoint
more detail about ports/endpoints in ../../media/video-interfaces.txt hdmi-connector is described here: ../connector/hdmi-connector.txt
example:
connector { compatible = "hdmi-connector";
port { hdmi_connector_in: endpoint { remote-endpoint = <&hdmi0_out>; }; };
};
&bls { status = "okay";
port { bls_out: endpoint { remote-endpoint = <&dpi0_in>; }; };
};
&dpi0 { status = "okay";
ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dpi0_out: endpoint { remote-endpoint = <&hdmi0_in>; }; }; port@1 { reg = <1>; dpi0_in: endpoint { remote-endpoint = <&bls_out>; }; }; };
};
&hdmi0 {
ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; hdmi0_in: endpoint { remote-endpoint = <&dpi0_out>; }; }; port@1 { reg = <1>; hdmi0_out: endpoint { remote-endpoint = <&hdmi_connector_in>; }; }; };
};
regards Frank
Hi
Gesendet: Montag, 03. August 2020 um 01:47 Uhr Von: "Chun-Kuang Hu" chunkuang.hu@kernel.org
Now I just care about the bls to dpi. So in mediatek,disp.txt, you just need to add a Optional properties - port (input and output), and modify mediatek,dpi.txt for its input port.
you mean something like this is enough:
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details.
+Optional properties: +- port (input and output) see ../../media/video-interfaces.txt + Examples:
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt:
Optional properties: - pinctrl-names: Contain "default" and "sleep". +- port: Input port node with endpoint definition, this can be connected to <chipid>-disp-pwm
Example:
should i link to pwm/pwm-mtk-disp.txt in doc?
regards Frank
Hi, Frank:
Frank Wunderlich frank-w@public-files.de 於 2020年8月3日 週一 下午6:43寫道:
Hi
Gesendet: Montag, 03. August 2020 um 01:47 Uhr Von: "Chun-Kuang Hu" chunkuang.hu@kernel.org
Now I just care about the bls to dpi. So in mediatek,disp.txt, you just need to add a Optional properties - port (input and output), and modify mediatek,dpi.txt for its input port.
you mean something like this is enough:
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details.
+Optional properties: +- port (input and output) see ../../media/video-interfaces.txt
Examples:
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt:
Optional properties:
- pinctrl-names: Contain "default" and "sleep".
+- port: Input port node with endpoint definition, this can be connected to <chipid>-disp-pwm
Example:
should i link to pwm/pwm-mtk-disp.txt in doc?
regards Frank
Yes, this is what I mean, but I think it need not output to pmw. But now I have a solution that you need not to modify binding document. Because now mt7623 has a different routing than mt2701, and this patch's approach is to use different port setting in each device tree. My solution is that these two SoC has different compatible string: "mediatek,mt7623-mmsys" and "mediatek,mt2701-mmsys". For now, "mediatek,mt2701-mmsys" has its data as
static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .main_path = mt2701_mtk_ddp_main, .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), .ext_path = mt2701_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), .shadow_register = true, };
I think you could create a data for "mediatek,mt7623-mmsys" which has a different routing.
Regards, Chun-Kuang.
Am 3. August 2020 18:27:02 MESZ schrieb Chun-Kuang Hu chunkuang.hu@kernel.org:
But now I have a solution that you need not to modify binding document. Because now mt7623 has a different routing than mt2701, and this patch's approach is to use different port setting in each device tree. My solution is that these two SoC has different compatible string: "mediatek,mt7623-mmsys" and "mediatek,mt2701-mmsys". For now, "mediatek,mt2701-mmsys" has its data as
static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .main_path = mt2701_mtk_ddp_main, .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), .ext_path = mt2701_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), .shadow_register = true, };
I think you could create a data for "mediatek,mt7623-mmsys" which has a different routing.
The paths are defined as this:
static enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = { DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0, DDP_COMPONENT_BLS, DDP_COMPONENT_DSI0,};
static enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,};
First thing i notice is that main=dsi and ext=dpi (hdmi). I guess dpi should be main,right? And bls is actually routed to dpi...how about the other components?
The 2 loops are not really clear to me (except 1st overwrites mt2701 main-path and second ext_path based on ports/endpoints) but this only applies from bls-dpi-hdmi-connector,not xdma/color or similar. Or should be main-path (or external) only bls and dpi? It looks like it only swappes dpi and dsi in my case.
@Ryder Lee can you explain it? regards Frank
Hi,
i've printed the mtk_comp_id after the modification-loops...
[ 5.480848] main: [ 5.480851] DDP_COMPONENT_OVL0 [ 5.482776] DDP_COMPONENT_RDMA0 [ 5.485827] DDP_COMPONENT_COLOR0 [ 5.488978] DDP_COMPONENT_BLS [ 5.492206] DDP_COMPONENT_DPI0 [ 5.495170] ext: [ 5.498233] DDP_COMPONENT_RDMA1 [ 5.500068] DDP_COMPONENT_DPI0
so only the main-path was replaced with DPI at the end. so currently the DSI is not connected (or i move it to ext). have now added new structs for mt7623 with swapped DPI0/DSI0 and commented out the code from Patch 1...compatible was already mt7623 with 2701 as fallback, so no dts-change needed...
now i need to look which changes in dts can be dropped...at least the bls=>dpi, right?
regards Frank
Gesendet: Montag, 03. August 2020 um 18:27 Uhr Von: "Chun-Kuang Hu" chunkuang.hu@kernel.org
Yes, this is what I mean, but I think it need not output to pmw. But now I have a solution that you need not to modify binding document. Because now mt7623 has a different routing than mt2701, and this patch's approach is to use different port setting in each device tree. My solution is that these two SoC has different compatible string: "mediatek,mt7623-mmsys" and "mediatek,mt2701-mmsys". For now, "mediatek,mt2701-mmsys" has its data as
static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .main_path = mt2701_mtk_ddp_main, .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main), .ext_path = mt2701_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), .shadow_register = true, };
I think you could create a data for "mediatek,mt7623-mmsys" which has a different routing.
From: chunhui dai chunhui.dai@mediatek.com
- disable tmds on phy on mt2701 - support other resolutions like 1280x1024
without this Patch i see flickering on my TFT (1280x1024), so i guess clock is wrong.
Signed-off-by: chunhui dai chunhui.dai@mediatek.com Signed-off-by: Frank Wunderlich frank-w@public-files.de Tested-by: Frank Wunderlich frank-w@public-files.de --- drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 +++ drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 + drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 + 3 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c index 5223498502c4..edadb7a700f1 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c @@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev) return PTR_ERR(phy_provider); }
+ if (hdmi_phy->conf->pll_default_off) + hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy); + return of_clk_add_provider(dev->of_node, of_clk_src_simple_get, hdmi_phy->pll); } diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h index 2d8b3182470d..f472fdeb63dc 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h @@ -22,6 +22,7 @@ struct mtk_hdmi_phy; struct mtk_hdmi_phy_conf { bool tz_disabled; unsigned long flags; + bool pll_default_off; const struct clk_ops *hdmi_phy_clk_ops; void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy); void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy); diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c index d3cc4022e988..6fbedacfc1e8 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c @@ -239,6 +239,7 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy) struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = { .tz_disabled = true, .flags = CLK_SET_RATE_GATE, + .pll_default_off = true, .hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops, .hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds, .hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds, -- 2.25.1
Hi, Frank:
Frank Wunderlich frank-w@public-files.de 於 2020年7月28日 週二 下午7:19寫道:
From: chunhui dai chunhui.dai@mediatek.com
- disable tmds on phy on mt2701
- support other resolutions like 1280x1024
If this patch does two things, it should be broken into two patches.
without this Patch i see flickering on my TFT (1280x1024), so i guess clock is wrong.
Signed-off-by: chunhui dai chunhui.dai@mediatek.com Signed-off-by: Frank Wunderlich frank-w@public-files.de Tested-by: Frank Wunderlich frank-w@public-files.de
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 +++ drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 + drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 + 3 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c index 5223498502c4..edadb7a700f1 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c @@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev) return PTR_ERR(phy_provider); }
if (hdmi_phy->conf->pll_default_off)
hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
I think every pll is default off, so you should turn on pll rather than disable tmds.
Regards, Chun-Kuang.
return of_clk_add_provider(dev->of_node, of_clk_src_simple_get, hdmi_phy->pll);
} diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h index 2d8b3182470d..f472fdeb63dc 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h @@ -22,6 +22,7 @@ struct mtk_hdmi_phy; struct mtk_hdmi_phy_conf { bool tz_disabled; unsigned long flags;
bool pll_default_off; const struct clk_ops *hdmi_phy_clk_ops; void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy); void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c index d3cc4022e988..6fbedacfc1e8 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c @@ -239,6 +239,7 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy) struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = { .tz_disabled = true, .flags = CLK_SET_RATE_GATE,
.pll_default_off = true, .hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops, .hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds, .hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
-- 2.25.1
Hi,
Am 2. August 2020 02:08:44 MESZ schrieb Chun-Kuang Hu chunkuang.hu@kernel.org:
Hi, Frank:
- disable tmds on phy on mt2701
- support other resolutions like 1280x1024
If this patch does two things, it should be broken into two patches.
As far as i see,it only disable tmds and so fix specific resolutions like the the one below.some other (like 1080p) does not have this Problem.
I think every pll is default off, so you should turn on pll rather than disable tmds
Is disabling tmds wrong here? Which pll is needed here? What does tmds? I got only the Patches for testing....
without this Patch i see flickering on my TFT (1280x1024), so i guess clock is wrong.
regards Frank
Hi, Frank:
Frank Wunderlich frank-w@public-files.de 於 2020年8月2日 週日 下午12:44寫道:
Hi,
Am 2. August 2020 02:08:44 MESZ schrieb Chun-Kuang Hu chunkuang.hu@kernel.org:
Hi, Frank:
- disable tmds on phy on mt2701
- support other resolutions like 1280x1024
If this patch does two things, it should be broken into two patches.
As far as i see,it only disable tmds and so fix specific resolutions like the the one below.some other (like 1080p) does not have this Problem.
OK, this is one thing, "disable tmds on phy on mt2701 to support other resolutions like 1280x1024"
I think every pll is default off, so you should turn on pll rather than disable tmds
Is disabling tmds wrong here? Which pll is needed here? What does tmds? I got only the Patches for testing....
I don't know how does this pll and tmds work. I think you and me are both not familiar with this hdmi phy. I agree this modification could fix some problem, but does this patch have side effect which trigger another problem? I need some reasonable description so I could have confidence on this patch. tmds is a function in mt2701 but you disable it. This mean you disable some function of this hardware. Why mt2701 does not need it?
Regards, Chun-Kuang.
without this Patch i see flickering on my TFT (1280x1024), so i guess clock is wrong.
regards Frank
From: Stu Hsieh stu.hsieh@mediatek.com
Test: build pass and run ok
Signed-off-by: Stu Hsieh stu.hsieh@mediatek.com --- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 42 +++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 + 2 files changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 57c88de9a329..a5f2ff6bea93 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -13,6 +13,8 @@ #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/soc/mediatek/mtk-cmdq.h> +#include <drm/drm_print.h> + #include "mtk_drm_drv.h" #include "mtk_drm_plane.h" #include "mtk_drm_ddp_comp.h" @@ -412,6 +414,22 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL }, };
+static bool mtk_drm_find_comp_in_ddp(struct mtk_ddp_comp ddp_comp, + const enum mtk_ddp_comp_id *path, + unsigned int path_len) +{ + unsigned int i; + + if (path == NULL) + return false; + + for (i = 0U; i < path_len; i++) + if (ddp_comp.id == path[i]) + return true; + + return false; +} + int mtk_ddp_comp_get_id(struct device_node *node, enum mtk_ddp_comp_type comp_type) { @@ -427,6 +445,30 @@ int mtk_ddp_comp_get_id(struct device_node *node, return -EINVAL; }
+unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm, + struct mtk_ddp_comp ddp_comp) +{ + struct mtk_drm_private *private = drm->dev_private; + unsigned int ret; + + if (mtk_drm_find_comp_in_ddp(ddp_comp, private->data->main_path, + private->data->main_len) == true) { + ret = BIT(0); + } else if (mtk_drm_find_comp_in_ddp(ddp_comp, + private->data->ext_path, + private->data->ext_len) == true) { + ret = BIT(1); + } else if (mtk_drm_find_comp_in_ddp(ddp_comp, + private->data->third_path, + private->data->third_len) == true) { + ret = BIT(2); + } else { + DRM_INFO("Failed to find comp in ddp table\n"); + ret = 0; + } + return ret; +} + int mtk_ddp_comp_init(struct device *dev, struct device_node *node, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, const struct mtk_ddp_comp_funcs *funcs) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h index debe36395fe7..1d9e00b69462 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -202,6 +202,8 @@ static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,
int mtk_ddp_comp_get_id(struct device_node *node, enum mtk_ddp_comp_type comp_type); +unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm, + struct mtk_ddp_comp ddp_comp); int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, const struct mtk_ddp_comp_funcs *funcs); -- 2.25.1
Hi, Frank:
Frank Wunderlich frank-w@public-files.de 於 2020年7月28日 週二 下午7:18寫道:
Describe why need this patch. I think the reason is:
For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so search pipeline information to find out the correct possible crtc.
From: Stu Hsieh stu.hsieh@mediatek.com
Test: build pass and run ok
Signed-off-by: Stu Hsieh stu.hsieh@mediatek.com
Need your signed-off-by tag.
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 42 +++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 + 2 files changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 57c88de9a329..a5f2ff6bea93 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -13,6 +13,8 @@ #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/soc/mediatek/mtk-cmdq.h> +#include <drm/drm_print.h>
#include "mtk_drm_drv.h" #include "mtk_drm_plane.h" #include "mtk_drm_ddp_comp.h" @@ -412,6 +414,22 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL }, };
+static bool mtk_drm_find_comp_in_ddp(struct mtk_ddp_comp ddp_comp,
const enum mtk_ddp_comp_id *path,
unsigned int path_len)
+{
unsigned int i;
if (path == NULL)
return false;
This checking is redundant, so remove it.
for (i = 0U; i < path_len; i++)
if (ddp_comp.id == path[i])
return true;
return false;
+}
int mtk_ddp_comp_get_id(struct device_node *node, enum mtk_ddp_comp_type comp_type) { @@ -427,6 +445,30 @@ int mtk_ddp_comp_get_id(struct device_node *node, return -EINVAL; }
+unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
struct mtk_ddp_comp ddp_comp)
+{
struct mtk_drm_private *private = drm->dev_private;
unsigned int ret;
if (mtk_drm_find_comp_in_ddp(ddp_comp, private->data->main_path,
private->data->main_len) == true) {
' == true' is redundant, so remove it.
ret = BIT(0);
} else if (mtk_drm_find_comp_in_ddp(ddp_comp,
private->data->ext_path,
private->data->ext_len) == true) {
Ditto.
ret = BIT(1);
} else if (mtk_drm_find_comp_in_ddp(ddp_comp,
private->data->third_path,
private->data->third_len) == true) {
Ditto.
ret = BIT(2);
} else {
DRM_INFO("Failed to find comp in ddp table\n");
ret = 0;
}
return ret;
+}
int mtk_ddp_comp_init(struct device *dev, struct device_node *node, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, const struct mtk_ddp_comp_funcs *funcs) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h index debe36395fe7..1d9e00b69462 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -202,6 +202,8 @@ static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,
int mtk_ddp_comp_get_id(struct device_node *node, enum mtk_ddp_comp_type comp_type); +unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm,
struct mtk_ddp_comp ddp_comp);
int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id, const struct mtk_ddp_comp_funcs *funcs); -- 2.25.1
From: Jitao Shi jitao.shi@mediatek.com
[Detail] dpi/dsi get the possible_crtc by mtk_drm_find_possible_crtc_by_comp(*drm_dev, ddp_comp)
Test: build pass and boot to logo
Signed-off-by: Jitao Shi jitao.shi@mediatek.com --- drivers/gpu/drm/mediatek/mtk_dpi.c | 3 ++- drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index d4f0fb7ad312..e43977015843 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -608,7 +608,8 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data) drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
/* Currently DPI0 is fixed to be driven by OVL1 */ - dpi->encoder.possible_crtcs = BIT(1); + dpi->encoder.possible_crtcs = + mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp);
ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL, 0); if (ret) { diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 270bf22c98fe..c31d9c12d4a9 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -892,7 +892,8 @@ static int mtk_dsi_create_conn_enc(struct drm_device *drm, struct mtk_dsi *dsi) * Currently display data paths are statically assigned to a crtc each. * crtc 0 is OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 */ - dsi->encoder.possible_crtcs = 1; + dsi->encoder.possible_crtcs = + mtk_drm_find_possible_crtc_by_comp(drm, dsi->ddp_comp);
/* If there's a bridge, attach to it and let it create the connector */ if (dsi->bridge) { -- 2.25.1
Hi, Frank:
Frank Wunderlich frank-w@public-files.de 於 2020年7月28日 週二 下午7:18寫道:
From: Jitao Shi jitao.shi@mediatek.com
[Detail] dpi/dsi get the possible_crtc by mtk_drm_find_possible_crtc_by_comp(*drm_dev, ddp_comp)
I would like more information of why do this patch. For example:
For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so call mtk_drm_find_possible_crtc_by_comp() to find out the correct possible crtc.
Regards, Chun-Kuang.
Test: build pass and boot to logo
Signed-off-by: Jitao Shi jitao.shi@mediatek.com
drivers/gpu/drm/mediatek/mtk_dpi.c | 3 ++- drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index d4f0fb7ad312..e43977015843 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -608,7 +608,8 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data) drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
/* Currently DPI0 is fixed to be driven by OVL1 */
dpi->encoder.possible_crtcs = BIT(1);
dpi->encoder.possible_crtcs =
mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp); ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL, 0); if (ret) {
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 270bf22c98fe..c31d9c12d4a9 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -892,7 +892,8 @@ static int mtk_dsi_create_conn_enc(struct drm_device *drm, struct mtk_dsi *dsi) * Currently display data paths are statically assigned to a crtc each. * crtc 0 is OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 */
dsi->encoder.possible_crtcs = 1;
dsi->encoder.possible_crtcs =
mtk_drm_find_possible_crtc_by_comp(drm, dsi->ddp_comp); /* If there's a bridge, attach to it and let it create the connector */ if (dsi->bridge) {
-- 2.25.1
Am 2. August 2020 05:07:41 MESZ schrieb Chun-Kuang Hu chunkuang.hu@kernel.org:
I would like more information of why do this patch. For example:
For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so call mtk_drm_find_possible_crtc_by_comp() to find out the correct possible crtc.
sounds good (and you have much more knowledge about drm subsystem than i). I will take this for next version regards Frank
From: Ryder Lee ryder.lee@mediatek.com
Add display subsystem related device nodes for MT7623.
Cc: CK Hu ck.hu@mediatek.com Signed-off-by: chunhui dai chunhui.dai@mediatek.com Signed-off-by: Bibby Hsieh bibby.hsieh@mediatek.com Signed-off-by: Ryder Lee ryder.lee@mediatek.com Signed-off-by: Frank Wunderlich frank-w@public-files.de Tested-by: Frank Wunderlich frank-w@public-files.de --- arch/arm/boot/dts/mt7623.dtsi | 177 ++++++++++++++++++ arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 85 +++++++++ arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 85 +++++++++ 3 files changed, 347 insertions(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index a106c0d90a52..d584a3d678ba 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -24,6 +24,11 @@ / { #address-cells = <2>; #size-cells = <2>;
+ aliases { + rdma0 = &rdma0; + rdma1 = &rdma1; + }; + cpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared; @@ -321,6 +326,25 @@ pwrap: pwrap@1000d000 { clock-names = "spi", "wrap"; };
+ mipi_tx0: mipi-dphy@10010000 { + compatible = "mediatek,mt7623-mipi-tx", + "mediatek,mt2701-mipi-tx"; + reg = <0 0x10010000 0 0x90>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + + cec: cec@10012000 { + compatible = "mediatek,mt7623-cec", + "mediatek,mt8173-cec"; + reg = <0 0x10012000 0 0xbc>; + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_LOW>; + clocks = <&infracfg CLK_INFRA_CEC>; + status = "disabled"; + }; + cir: cir@10013000 { compatible = "mediatek,mt7623-cir"; reg = <0 0x10013000 0 0x1000>; @@ -369,6 +393,18 @@ apmixedsys: syscon@10209000 { #clock-cells = <1>; };
+ hdmi_phy: phy@10209100 { + compatible = "mediatek,mt7623-hdmi-phy", + "mediatek,mt2701-hdmi-phy"; + reg = <0 0x10209100 0 0x24>; + clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>; + clock-names = "pll_ref"; + clock-output-names = "hdmitx_dig_cts"; + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + }; + rng: rng@1020f000 { compatible = "mediatek,mt7623-rng"; reg = <0 0x1020f000 0 0x1000>; @@ -568,6 +604,16 @@ bch: ecc@1100e000 { status = "disabled"; };
+ hdmiddc0: i2c@11013000 { + compatible = "mediatek,mt7623-hdmi-ddc", + "mediatek,mt8173-hdmi-ddc"; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>; + reg = <0 0x11013000 0 0x1C>; + clocks = <&pericfg CLK_PERI_I2C3>; + clock-names = "ddc-i2c"; + status = "disabled"; + }; + nor_flash: spi@11014000 { compatible = "mediatek,mt7623-nor", "mediatek,mt8173-nor"; @@ -766,6 +812,84 @@ mmsys: syscon@14000000 { #clock-cells = <1>; };
+ display_components: dispsys@14000000 { + compatible = "mediatek,mt7623-mmsys", + "mediatek,mt2701-mmsys"; + reg = <0 0x14000000 0 0x1000>; + power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; + }; + + ovl@14007000 { + compatible = "mediatek,mt7623-disp-ovl", + "mediatek,mt2701-disp-ovl"; + reg = <0 0x14007000 0 0x1000>; + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_OVL>; + iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>; + mediatek,larb = <&larb0>; + }; + + rdma0: rdma@14008000 { + compatible = "mediatek,mt7623-disp-rdma", + "mediatek,mt2701-disp-rdma"; + reg = <0 0x14008000 0 0x1000>; + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_RDMA>; + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>; + mediatek,larb = <&larb0>; + }; + + wdma@14009000 { + compatible = "mediatek,mt7623-disp-wdma", + "mediatek,mt2701-disp-wdma"; + reg = <0 0x14009000 0 0x1000>; + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_WDMA>; + iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>; + mediatek,larb = <&larb0>; + }; + + bls: pwm@1400a000 { + compatible = "mediatek,mt7623-disp-pwm", + "mediatek,mt2701-disp-pwm"; + reg = <0 0x1400a000 0 0x1000>; + #pwm-cells = <2>; + clocks = <&mmsys CLK_MM_MDP_BLS_26M>, + <&mmsys CLK_MM_DISP_BLS>; + clock-names = "main", "mm"; + status = "disabled"; + }; + + color@1400b000 { + compatible = "mediatek,mt7623-disp-color", + "mediatek,mt2701-disp-color"; + reg = <0 0x1400b000 0 0x1000>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_COLOR>; + }; + + dsi: dsi@1400c000 { + compatible = "mediatek,mt7623-dsi", + "mediatek,mt2701-dsi"; + reg = <0 0x1400c000 0 0x1000>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DSI_ENGINE>, + <&mmsys CLK_MM_DSI_DIG>, + <&mipi_tx0>; + clock-names = "engine", "digital", "hs"; + phys = <&mipi_tx0>; + phy-names = "dphy"; + status = "disabled"; + }; + + mutex: mutex@1400e000 { + compatible = "mediatek,mt7623-disp-mutex", + "mediatek,mt2701-disp-mutex"; + reg = <0 0x1400e000 0 0x1000>; + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_MUTEX_32K>; + }; + larb0: larb@14010000 { compatible = "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb"; @@ -778,6 +902,44 @@ larb0: larb@14010000 { power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; };
+ rdma1: rdma@14012000 { + compatible = "mediatek,mt7623-disp-rdma", + "mediatek,mt2701-disp-rdma"; + reg = <0 0x14012000 0 0x1000>; + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_RDMA1>; + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>; + mediatek,larb = <&larb0>; + }; + + dpi0: dpi@14014000 { + compatible = "mediatek,mt7623-dpi", + "mediatek,mt2701-dpi"; + reg = <0 0x14014000 0 0x1000>; + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DPI1_DIGL>, + <&mmsys CLK_MM_DPI1_ENGINE>, + <&apmixedsys CLK_APMIXED_TVDPLL>; + clock-names = "pixel", "engine", "pll"; + status = "disabled"; + }; + + hdmi0: hdmi@14015000 { + compatible = "mediatek,mt7623-hdmi", + "mediatek,mt8173-hdmi"; + reg = <0 0x14015000 0 0x400>; + clocks = <&mmsys CLK_MM_HDMI_PIXEL>, + <&mmsys CLK_MM_HDMI_PLL>, + <&mmsys CLK_MM_HDMI_AUDIO>, + <&mmsys CLK_MM_HDMI_SPDIF>; + clock-names = "pixel", "pll", "bclk", "spdif"; + phys = <&hdmi_phy>; + phy-names = "hdmi"; + mediatek,syscon-hdmi = <&mmsys 0x900>; + cec = <&cec>; + status = "disabled"; + }; + imgsys: syscon@15000000 { compatible = "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", @@ -1102,6 +1264,21 @@ pins-cir { }; };
+ hdmi_pins_a: hdmi-default { + pins-hdmi { + pinmux = <MT7623_PIN_123_HTPLG_FUNC_HTPLG>; + input-enable; + bias-pull-down; + }; + }; + + hdmi_ddc_pins_a: hdmi_ddc-default { + pins-hdmi-ddc { + pinmux = <MT7623_PIN_124_GPIO124_FUNC_HDMISCK>, + <MT7623_PIN_125_GPIO125_FUNC_HDMISD>; + }; + }; + i2c0_pins_a: i2c0-default { pins-i2c0 { pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>, diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts index 2b760f90f38c..7a1763472018 100644 --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts @@ -21,6 +21,19 @@ chosen { stdout-path = "serial2:115200n8"; };
+ connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "d"; + ddc-i2c-bus = <&hdmiddc0>; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi0_out>; + }; + }; + }; + cpus { cpu@0 { proc-supply = <&mt6323_vproc_reg>; @@ -114,10 +127,24 @@ memory@80000000 { }; };
+&bls { + status = "okay"; + + port { + bls_out: endpoint { + remote-endpoint = <&dpi0_in>; + }; + }; +}; + &btif { status = "okay"; };
+&cec { + status = "okay"; +}; + &cir { pinctrl-names = "default"; pinctrl-0 = <&cir_pins_a>; @@ -128,6 +155,28 @@ &crypto { status = "okay"; };
+&dpi0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dpi0_out: endpoint { + remote-endpoint = <&hdmi0_in>; + }; + }; + + port@1 { + reg = <1>; + dpi0_in: endpoint { + remote-endpoint = <&bls_out>; + }; + }; + }; +}; + ð { status = "okay";
@@ -199,6 +248,42 @@ fixed-link { }; };
+&hdmi0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_pins_a>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hdmi0_in: endpoint { + remote-endpoint = <&dpi0_out>; + }; + }; + + port@1 { + reg = <1>; + hdmi0_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; +}; + +&hdmiddc0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_ddc_pins_a>; + status = "okay"; +}; + +&hdmi_phy { + mediatek,ibias = <0xa>; + mediatek,ibias_up = <0x1c>; + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts index 0447748f9fa0..c86807a676fc 100644 --- a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts +++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts @@ -24,6 +24,19 @@ chosen { stdout-path = "serial2:115200n8"; };
+ connector { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "d"; + ddc-i2c-bus = <&hdmiddc0>; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi0_out>; + }; + }; + }; + cpus { cpu@0 { proc-supply = <&mt6323_vproc_reg>; @@ -106,10 +119,24 @@ sound { }; };
+&bls { + status = "okay"; + + port { + bls_out: endpoint { + remote-endpoint = <&dpi0_in>; + }; + }; +}; + &btif { status = "okay"; };
+&cec { + status = "okay"; +}; + &cir { pinctrl-names = "default"; pinctrl-0 = <&cir_pins_a>; @@ -120,6 +147,28 @@ &crypto { status = "okay"; };
+&dpi0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dpi0_out: endpoint { + remote-endpoint = <&hdmi0_in>; + }; + }; + + port@1 { + reg = <1>; + dpi0_in: endpoint { + remote-endpoint = <&bls_out>; + }; + }; + }; +}; + ð { status = "okay";
@@ -203,6 +252,42 @@ fixed-link { }; };
+&hdmi0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_pins_a>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hdmi0_in: endpoint { + remote-endpoint = <&dpi0_out>; + }; + }; + + port@1 { + reg = <1>; + hdmi0_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; +}; + +&hdmiddc0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_ddc_pins_a>; + status = "okay"; +}; + +&hdmi_phy { + mediatek,ibias = <0xa>; + mediatek,ibias_up = <0x1c>; + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; -- 2.25.1
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