Hi Thierry,

dim: d65e338027e7 ("gpu: host1x: Fix an error handling path in 'host1x_probe()'"): SHA1 in fixes line not found: dim: e3166698a8a0 ("drm/tegra: Implement buffer object cache")

not the same as

1f39b1dfa53c84b56d7ad37fed44afda7004959d Author: Thierry Reding treding@nvidia.com Date: Fri Feb 7 16:50:52 2020 +0100

drm/tegra: Implement buffer object cache

Please fix that up.

Dave.

On Sat, 26 Feb 2022 at 02:32, Thierry Reding thierry.reding@gmail.com wrote:

Hi Dave, Daniel,

The following changes since commit 8913e1aea4b32a866343b14e565c62cec54f3f78:

drm/tegra: dpaux: Populate AUX bus (2022-02-23 13:00:37 +0100)

are available in the Git repository at:

https://gitlab.freedesktop.org/drm/tegra.git tags/drm/tegra/for-5.18-rc1

for you to fetch changes up to b53c24f69199b88671293de503f1f999a762f4f9:

drm/tegra: Support YVYU, VYUY and YU24 formats (2022-02-25 16:37:40 +0100)

Thanks, Thierry

---

drm/tegra: Changes for v5.18-rc1

This contains a couple more minor fixes that didn't seem urgent enough for v5.17. On top of that this improves YUV format support on older chips.

---

Christophe JAILLET (2): gpu: host1x: Fix an error handling path in 'host1x_probe()' gpu: host1x: Fix a memory leak in 'host1x_remove()'

Dmitry Osipenko (1): drm/tegra: Use dev_err_probe()

Miaoqian Lin (1): drm/tegra: Fix reference leak in tegra_dsi_ganged_probe

Thierry Reding (3): drm/tegra: Fix planar formats on Tegra186 and later drm/tegra: Support semi-planar formats on Tegra114+ drm/tegra: Support YVYU, VYUY and YU24 formats

chiminghao (1): drm/tegra: dpaux: Remove unneeded variable

drivers/gpu/drm/tegra/dc.c | 50 ++++++++++++++++++----------- drivers/gpu/drm/tegra/dc.h | 7 +++++ drivers/gpu/drm/tegra/dpaux.c | 3 +- drivers/gpu/drm/tegra/dsi.c | 4 ++- drivers/gpu/drm/tegra/hdmi.c | 34 ++++++-------------- drivers/gpu/drm/tegra/hub.c | 24 ++++++++------ drivers/gpu/drm/tegra/plane.c | 73 ++++++++++++++++++++++++++++++++++++++----- drivers/gpu/drm/tegra/plane.h | 2 +- drivers/gpu/host1x/dev.c | 8 +++-- 9 files changed, 140 insertions(+), 65 deletions(-)

Hi Dave, Daniel,

The following changes since commit 8913e1aea4b32a866343b14e565c62cec54f3f78:

drm/tegra: dpaux: Populate AUX bus (2022-02-23 13:00:37 +0100)

are available in the Git repository at:

https://gitlab.freedesktop.org/drm/tegra.git tags/drm/tegra/for-5.18-rc1

for you to fetch changes up to cf5086d35d8c7c2b9cb1ca34590097a5f2f8b588:

drm/tegra: Support YVYU, VYUY and YU24 formats (2022-03-01 11:13:09 +0100)

Thanks, Thierry

---------------------------------------------------------------- drm/tegra: Changes for v5.18-rc1

This contains a couple more minor fixes that didn't seem urgent enough for v5.17. On top of that this improves YUV format support on older chips.

---------------------------------------------------------------- Christophe JAILLET (2): gpu: host1x: Fix an error handling path in 'host1x_probe()' gpu: host1x: Fix a memory leak in 'host1x_remove()'

Dmitry Osipenko (1): drm/tegra: Use dev_err_probe()

Miaoqian Lin (1): drm/tegra: Fix reference leak in tegra_dsi_ganged_probe

Thierry Reding (3): drm/tegra: Fix planar formats on Tegra186 and later drm/tegra: Support semi-planar formats on Tegra114+ drm/tegra: Support YVYU, VYUY and YU24 formats

chiminghao (1): drm/tegra: dpaux: Remove unneeded variable

drivers/gpu/drm/tegra/dc.c | 50 ++++++++++++++++++----------- drivers/gpu/drm/tegra/dc.h | 7 +++++ drivers/gpu/drm/tegra/dpaux.c | 3 +- drivers/gpu/drm/tegra/dsi.c | 4 ++- drivers/gpu/drm/tegra/hdmi.c | 34 ++++++-------------- drivers/gpu/drm/tegra/hub.c | 24 ++++++++------ drivers/gpu/drm/tegra/plane.c | 73 ++++++++++++++++++++++++++++++++++++++----- drivers/gpu/drm/tegra/plane.h | 2 +- drivers/gpu/host1x/dev.c | 8 +++-- 9 files changed, 140 insertions(+), 65 deletions(-)