Quoting Sankeerth Billakanti (2022-05-05 11:02:36)

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Quoting Douglas Anderson (2022-04-25 14:06:42)

Having 'a' in 'vdda' typically means 'analog' for 'analog' circuits, so I'd expect this to only matter for the phy that contains the analog circuitry. It would be great to remove the regulator code from drivers/gpu/drm/msm/dp/dp_power.c and move the regulator_set_load() call to the phy driver if possible. Hopefully qcom folks can help clarify here.

Interesting. Oddly enough, the sc7280 datasheet doesn't list the "_A". It calls these "VDD_VREF_0P9" and "VDD_VREF_1P2". However, on the schematic in front of me someone labeled these pins on the sc7280 with the "A". ...and the driver looks for a supply with the "a". :-/

It would be good to get clarification from someone with better information.

-Doug

Our internal power grid documents list the regulators as VDD_A_*_1P2 and VDD_A_*_0P9 for all the platforms.

Do your internal power grid documents indicate what these supplies are powering? The question is if these supplies power any of the logic inside the eDP controller or if they only supply power to the analog circuits in the eDP phy. If it's the eDP phy only then the regulator usage in the eDP driver should be removed. I would suspect this is the case because the controller is probably all digital logic and runs at the typical 1.8V that the rest of the SoC uses. Similarly, these are voltage references which sound like a PLL reference voltage.

Please clarify this further.

So, as a practice, we put the same name in the DT files. Hence,

Reviewed-by: Sankeerth Billakanti quic_sbillaka@quicinc.com

Quoting Sankeerth Billakanti (QUIC) (2022-05-05 11:47:20)

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Quoting Sankeerth Billakanti (2022-05-05 11:02:36)

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Our internal power grid documents list the regulators as VDD_A_*_1P2 and VDD_A_*_0P9 for all the platforms.

Do your internal power grid documents indicate what these supplies are powering? The question is if these supplies power any of the logic inside the eDP controller or if they only supply power to the analog circuits in the eDP phy. If it's the eDP phy only then the regulator usage in the eDP driver should be removed. I would suspect this is the case because the controller is probably all digital logic and runs at the typical 1.8V that the rest of the SoC uses. Similarly, these are voltage references which sound like a PLL reference voltage.

Please clarify this further.

For the DP driver using the usb-dp combo phy, there were cases where the usb driver was turning off the phy and pll regulators whenever usb-dp concurrent mode need not be supported. This caused phy and pll to be powered down causing aux transaction failures and display blankouts. From then on, it became a practice for the controller driver to vote for the phy and pll regulators also.

That sounds like USB-DP combo phy driver had improper regulator power management where aux transactions from DP didn't keep the power on to the phy. Where does the power physically go? If the power isn't physically going to the DP controller it shouldn't be controlled from the DP controller driver. If the aux bus needs the DP phy enabled, the DP controller driver should enable the phy power (via phy_power_on()?).

Hi,

On Fri, May 6, 2022 at 6:36 AM Sankeerth Billakanti (QUIC) quic_sbillaka@quicinc.com wrote:

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Our internal power grid documents list the regulators as VDD_A_*_1P2 and VDD_A_*_0P9 for all the platforms.

Do your internal power grid documents indicate what these supplies are powering? The question is if these supplies power any of the logic inside the eDP controller or if they only supply power to the analog circuits in the eDP phy. If it's the eDP phy only then the regulator usage in the eDP driver should be removed. I would suspect this is the case because the controller is probably all digital logic and runs at the typical 1.8V that the rest of the SoC uses. Similarly, these are voltage references which sound like a PLL reference

voltage.

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Please clarify this further.

For the DP driver using the usb-dp combo phy, there were cases where the usb driver was turning off the phy and pll regulators whenever usb-dp

concurrent mode need not be supported.

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This caused phy and pll to be powered down causing aux transaction failures

and display blankouts.

...

From then on, it became a practice for the controller driver to vote for the

phy and pll regulators also.

...

That sounds like USB-DP combo phy driver had improper regulator power management where aux transactions from DP didn't keep the power on to the phy. Where does the power physically go? If the power isn't physically going to the DP controller it shouldn't be controlled from the DP controller driver. If the aux bus needs the DP phy enabled, the DP controller driver should enable the phy power (via phy_power_on()?).

Yes, it was limitation earlier when we did not have proper interface to interact with the combo phy.

In this case, the power from the regulators go to the combo phy.

Now that there is an interface for the controller to interact with the combo phy, the proposal to drop the phy regulator voting from the controller driver seems reasonable to me.

The phy_power_on() is used for getting the phy out of low power state or getting it ready for data transfer.

The controller driver needs to enable the phy power via the phy_init() before any interaction with the sink like the aux transactions or before sending the data. The controller can disable the regulators via the phy_exit() call.

I can confirm that if I stop providing these regulators to the DP controller that the screen still comes up. ...but also there are lots of other things (including the PHY) that power these regulators up...

From offline discussion with folks:

1. It sounds like maybe the code for handling the regulators in the DP controller leaked in from downstream where the DP driver itself controls more stuff.

2. We should probably remove these regulators from the DP controller.

3. When we remove this from the DP controller, we'll have to make sure that the PHY driver calls regulator_set_load() as needed.

Kuogee has volunteered to own this issue and send out patches fixing the stuff up. So for now, please consider ${SUBJECT} patch abandoned.

-Doug

On 16-06-22, 08:35, Doug Anderson wrote:

Hi,

On Mon, Apr 25, 2022 at 2:07 PM Douglas Anderson dianders@chromium.org wrote:

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We're supposed to list the supplies in the dt bindings but there are none in the eDP PHY bindings.

Looking at the driver in Linux, I can see that there seem to be two relevant supplies: "vdda-phy" and "vdda-pll". Let's add those to the bindings.

NOTE: from looking at the Qualcomm datasheet for sc7280, it's not immediately clear how to figure out how to fill in these supplies. The only two eDP related supplies are simply described as "power for eDP 0.9V circuits" and "power for eDP 1.2V circuits". From guessing and from comparing how a similar PHY is hooked up on other similar Qualcomm boards, I'll make the educated guess that the 1.2V supply goes to "vdda-phy" and the 0.9V supply goes to "vdda-pll" and I'll use that in the example here.

Signed-off-by: Douglas Anderson dianders@chromium.org

Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml | 6 ++++++ 1 file changed, 6 insertions(+)

Even though patch #1 in this series should be dropped, this patch (patch #2) is still valid. Vinod: I assume this would land in your tree along with the first two patches in Kuogee's series [1], which are related. Please let me know if you need me to re-send or anything.

I have applied this patch, thanks

[1] https://lore.kernel.org/r/1653507433-22585-1-git-send-email-quic_khsieh@quic...

This needs rebase on phy split which I have picked