Share with upcoming CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- tests/amdgpu/basic_tests.c | 58 ++++++++++++++++++++++++++++------------------ 1 file changed, 35 insertions(+), 23 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index fa0ed12..1bcc835 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -49,6 +49,13 @@ static void amdgpu_command_submission_sdma(void); static void amdgpu_userptr_test(void); static void amdgpu_semaphore_test(void);
+static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, + unsigned ip_type, + int instance, int pm4_dw, uint32_t *pm4_src, + int res_cnt, amdgpu_bo_handle *resources, + struct amdgpu_cs_ib_info *ib_info, + struct amdgpu_cs_request *ibs_request); + CU_TestInfo basic_tests[] = { { "Query Info Test", amdgpu_query_info_test }, { "Memory alloc Test", amdgpu_memory_alloc }, @@ -542,11 +549,12 @@ static void amdgpu_command_submission_compute(void) * pm4_src, resources, ib_info, and ibs_request * submit command stream described in ibs_request and wait for this IB accomplished */ -static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, - int instance, int pm4_dw, uint32_t *pm4_src, - int res_cnt, amdgpu_bo_handle *resources, - struct amdgpu_cs_ib_info *ib_info, - struct amdgpu_cs_request *ibs_request) +static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, + unsigned ip_type, + int instance, int pm4_dw, uint32_t *pm4_src, + int res_cnt, amdgpu_bo_handle *resources, + struct amdgpu_cs_ib_info *ib_info, + struct amdgpu_cs_request *ibs_request) { int r; uint32_t expired; @@ -579,7 +587,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, ib_info->ib_mc_address = ib_result_mc_address; ib_info->size = pm4_dw;
- ibs_request->ip_type = AMDGPU_HW_IP_DMA; + ibs_request->ip_type = ip_type; ibs_request->ring = instance; ibs_request->number_of_ibs = 1; ibs_request->ibs = ib_info; @@ -601,7 +609,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, r = amdgpu_bo_list_destroy(ibs_request->resources); CU_ASSERT_EQUAL(r, 0);
- fence_status.ip_type = AMDGPU_HW_IP_DMA; + fence_status.ip_type = ip_type; fence_status.ring = ibs_request->ring; fence_status.context = context_handle; fence_status.fence = ibs_request->seq_no; @@ -676,10 +684,11 @@ static void amdgpu_command_submission_sdma_write_linear(void) while(j++ < sdma_write_length) pm4[i++] = 0xdeadbeaf;
- amdgpu_sdma_test_exec_cs(context_handle, 0, - i, pm4, - 1, resources, - ib_info, ibs_request); + amdgpu_test_exec_cs_helper(context_handle, + AMDGPU_HW_IP_DMA, 0, + i, pm4, + 1, resources, + ib_info, ibs_request);
/* verify if SDMA test result meets with expected */ i = 0; @@ -759,10 +768,11 @@ static void amdgpu_command_submission_sdma_const_fill(void) pm4[i++] = 0xdeadbeaf; pm4[i++] = sdma_write_length;
- amdgpu_sdma_test_exec_cs(context_handle, 0, - i, pm4, - 1, resources, - ib_info, ibs_request); + amdgpu_test_exec_cs_helper(context_handle, + AMDGPU_HW_IP_DMA, 0, + i, pm4, + 1, resources, + ib_info, ibs_request);
/* verify if SDMA test result meets with expected */ i = 0; @@ -860,10 +870,11 @@ static void amdgpu_command_submission_sdma_copy_linear(void) pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32;
- amdgpu_sdma_test_exec_cs(context_handle, 0, - i, pm4, - 2, resources, - ib_info, ibs_request); + amdgpu_test_exec_cs_helper(context_handle, + AMDGPU_HW_IP_DMA, 0, + i, pm4, + 2, resources, + ib_info, ibs_request);
/* verify if SDMA test result meets with expected */ i = 0; @@ -954,10 +965,11 @@ static void amdgpu_userptr_test(void) while (j++ < sdma_write_length) pm4[i++] = 0xdeadbeaf;
- amdgpu_sdma_test_exec_cs(context_handle, 0, - i, pm4, - 1, &handle, - ib_info, ibs_request); + amdgpu_test_exec_cs_helper(context_handle, + AMDGPU_HW_IP_DMA, 0, + i, pm4, + 1, &handle, + ib_info, ibs_request); i = 0; while (i < sdma_write_length) { CU_ASSERT_EQUAL(((int*)ptr)[i++], 0xdeadbeaf);
So it can be shared for CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- tests/amdgpu/basic_tests.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 1bcc835..5804503 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -55,6 +55,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, int res_cnt, amdgpu_bo_handle *resources, struct amdgpu_cs_ib_info *ib_info, struct amdgpu_cs_request *ibs_request); +static void amdgpu_command_submission_write_linear_helper(unsigned ip_type);
CU_TestInfo basic_tests[] = { { "Query Info Test", amdgpu_query_info_test }, @@ -626,7 +627,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, CU_ASSERT_EQUAL(r, 0); }
-static void amdgpu_command_submission_sdma_write_linear(void) +static void amdgpu_command_submission_write_linear_helper(unsigned ip_type) { const int sdma_write_length = 128; const int pm4_dw = 256; @@ -676,16 +677,18 @@ static void amdgpu_command_submission_sdma_write_linear(void)
/* fullfill PM4: test DMA write-linear */ i = j = 0; - pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, - SDMA_WRITE_SUB_OPCODE_LINEAR, 0); - pm4[i++] = 0xffffffff & bo_mc; - pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; - pm4[i++] = sdma_write_length; - while(j++ < sdma_write_length) - pm4[i++] = 0xdeadbeaf; + if (ip_type == AMDGPU_HW_IP_DMA) { + pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, + SDMA_WRITE_SUB_OPCODE_LINEAR, 0); + pm4[i++] = 0xffffffff & bo_mc; + pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; + pm4[i++] = sdma_write_length; + while(j++ < sdma_write_length) + pm4[i++] = 0xdeadbeaf; + }
amdgpu_test_exec_cs_helper(context_handle, - AMDGPU_HW_IP_DMA, 0, + ip_type, 0, i, pm4, 1, resources, ib_info, ibs_request); @@ -712,6 +715,11 @@ static void amdgpu_command_submission_sdma_write_linear(void) CU_ASSERT_EQUAL(r, 0); }
+static void amdgpu_command_submission_sdma_write_linear(void) +{ + amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_DMA); +} + static void amdgpu_command_submission_sdma_const_fill(void) { const int sdma_write_length = 1024 * 1024;
Use the CP to write data to memory.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- tests/amdgpu/basic_tests.c | 125 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 125 insertions(+)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 5804503..5c9debe 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -90,6 +90,117 @@ CU_TestInfo basic_tests[] = { #define GFX_COMPUTE_NOP 0xffff1000 #define SDMA_NOP 0x0
+/* PM4 */ +#define PACKET_TYPE0 0 +#define PACKET_TYPE1 1 +#define PACKET_TYPE2 2 +#define PACKET_TYPE3 3 + +#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3) +#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF) +#define CP_PACKET0_GET_REG(h) ((h) & 0xFFFF) +#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF) +#define PACKET0(reg, n) ((PACKET_TYPE0 << 30) | \ + ((reg) & 0xFFFF) | \ + ((n) & 0x3FFF) << 16) +#define CP_PACKET2 0x80000000 +#define PACKET2_PAD_SHIFT 0 +#define PACKET2_PAD_MASK (0x3fffffff << 0) + +#define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) + +#define PACKET3(op, n) ((PACKET_TYPE3 << 30) | \ + (((op) & 0xFF) << 8) | \ + ((n) & 0x3FFF) << 16) + +/* Packet 3 types */ +#define PACKET3_NOP 0x10 + +#define PACKET3_WRITE_DATA 0x37 +#define WRITE_DATA_DST_SEL(x) ((x) << 8) + /* 0 - register + * 1 - memory (sync - via GRBM) + * 2 - gl2 + * 3 - gds + * 4 - reserved + * 5 - memory (async - direct) + */ +#define WR_ONE_ADDR (1 << 16) +#define WR_CONFIRM (1 << 20) +#define WRITE_DATA_CACHE_POLICY(x) ((x) << 25) + /* 0 - LRU + * 1 - Stream + */ +#define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) + /* 0 - me + * 1 - pfp + * 2 - ce + */ + +#define PACKET3_DMA_DATA 0x50 +/* 1. header + * 2. CONTROL + * 3. SRC_ADDR_LO or DATA [31:0] + * 4. SRC_ADDR_HI [31:0] + * 5. DST_ADDR_LO [31:0] + * 6. DST_ADDR_HI [7:0] + * 7. COMMAND [30:21] | BYTE_COUNT [20:0] + */ +/* CONTROL */ +# define PACKET3_DMA_DATA_ENGINE(x) ((x) << 0) + /* 0 - ME + * 1 - PFP + */ +# define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13) + /* 0 - LRU + * 1 - Stream + * 2 - Bypass + */ +# define PACKET3_DMA_DATA_SRC_VOLATILE (1 << 15) +# define PACKET3_DMA_DATA_DST_SEL(x) ((x) << 20) + /* 0 - DST_ADDR using DAS + * 1 - GDS + * 3 - DST_ADDR using L2 + */ +# define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25) + /* 0 - LRU + * 1 - Stream + * 2 - Bypass + */ +# define PACKET3_DMA_DATA_DST_VOLATILE (1 << 27) +# define PACKET3_DMA_DATA_SRC_SEL(x) ((x) << 29) + /* 0 - SRC_ADDR using SAS + * 1 - GDS + * 2 - DATA + * 3 - SRC_ADDR using L2 + */ +# define PACKET3_DMA_DATA_CP_SYNC (1 << 31) +/* COMMAND */ +# define PACKET3_DMA_DATA_DIS_WC (1 << 21) +# define PACKET3_DMA_DATA_CMD_SRC_SWAP(x) ((x) << 22) + /* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 + * 3 - 8 in 64 + */ +# define PACKET3_DMA_DATA_CMD_DST_SWAP(x) ((x) << 24) + /* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 + * 3 - 8 in 64 + */ +# define PACKET3_DMA_DATA_CMD_SAS (1 << 26) + /* 0 - memory + * 1 - register + */ +# define PACKET3_DMA_DATA_CMD_DAS (1 << 27) + /* 0 - memory + * 1 - register + */ +# define PACKET3_DMA_DATA_CMD_SAIC (1 << 28) +# define PACKET3_DMA_DATA_CMD_DAIC (1 << 29) +# define PACKET3_DMA_DATA_CMD_RAW_WAIT (1 << 30) + int suite_basic_tests_init(void) { int r; @@ -338,8 +449,15 @@ static void amdgpu_command_submission_gfx_shared_ib(void) CU_ASSERT_EQUAL(r, 0); }
+static void amdgpu_command_submission_cp_write_data(void) +{ + amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_GFX); +} + static void amdgpu_command_submission_gfx(void) { + /* write data using the CP */ + amdgpu_command_submission_cp_write_data(); /* separate IB buffers for multi-IB submission */ amdgpu_command_submission_gfx_separate_ibs(); /* shared IB buffer for multi-IB submission */ @@ -685,6 +803,13 @@ static void amdgpu_command_submission_write_linear_helper(unsigned ip_type) pm4[i++] = sdma_write_length; while(j++ < sdma_write_length) pm4[i++] = 0xdeadbeaf; + } else if (ip_type == AMDGPU_HW_IP_GFX) { + pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 + sdma_write_length); + pm4[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; + pm4[i++] = 0xfffffffc & bo_mc; + pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; + while(j++ < sdma_write_length) + pm4[i++] = 0xdeadbeaf; }
amdgpu_test_exec_cs_helper(context_handle,
So it can be shared for CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- tests/amdgpu/basic_tests.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 5c9debe..4d382e6 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -56,6 +56,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, struct amdgpu_cs_ib_info *ib_info, struct amdgpu_cs_request *ibs_request); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); +static void amdgpu_command_submission_const_fill_helper(unsigned ip_type);
CU_TestInfo basic_tests[] = { { "Query Info Test", amdgpu_query_info_test }, @@ -845,7 +846,7 @@ static void amdgpu_command_submission_sdma_write_linear(void) amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_DMA); }
-static void amdgpu_command_submission_sdma_const_fill(void) +static void amdgpu_command_submission_const_fill_helper(unsigned ip_type) { const int sdma_write_length = 1024 * 1024; const int pm4_dw = 256; @@ -894,15 +895,17 @@ static void amdgpu_command_submission_sdma_const_fill(void)
/* fullfill PM4: test DMA const fill */ i = j = 0; - pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, - SDMA_CONSTANT_FILL_EXTRA_SIZE(2)); - pm4[i++] = 0xffffffff & bo_mc; - pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; - pm4[i++] = 0xdeadbeaf; - pm4[i++] = sdma_write_length; + if (ip_type == AMDGPU_HW_IP_DMA) { + pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, + SDMA_CONSTANT_FILL_EXTRA_SIZE(2)); + pm4[i++] = 0xffffffff & bo_mc; + pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; + pm4[i++] = 0xdeadbeaf; + pm4[i++] = sdma_write_length; + }
amdgpu_test_exec_cs_helper(context_handle, - AMDGPU_HW_IP_DMA, 0, + ip_type, 0, i, pm4, 1, resources, ib_info, ibs_request); @@ -929,6 +932,11 @@ static void amdgpu_command_submission_sdma_const_fill(void) CU_ASSERT_EQUAL(r, 0); }
+static void amdgpu_command_submission_sdma_const_fill(void) +{ + amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_DMA); +} + static void amdgpu_command_submission_sdma_copy_linear(void) { const int sdma_write_length = 1024;
Use the CP to fill to memory.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- tests/amdgpu/basic_tests.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 4d382e6..7806be7 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -455,10 +455,17 @@ static void amdgpu_command_submission_cp_write_data(void) amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_GFX); }
+static void amdgpu_command_submission_cp_const_fill(void) +{ + amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_GFX); +} + static void amdgpu_command_submission_gfx(void) { /* write data using the CP */ amdgpu_command_submission_cp_write_data(); + /* const fill using the CP */ + amdgpu_command_submission_cp_const_fill(); /* separate IB buffers for multi-IB submission */ amdgpu_command_submission_gfx_separate_ibs(); /* shared IB buffer for multi-IB submission */ @@ -902,6 +909,17 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type) pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; pm4[i++] = 0xdeadbeaf; pm4[i++] = sdma_write_length; + } else if (ip_type == AMDGPU_HW_IP_GFX) { + pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); + pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) | + PACKET3_DMA_DATA_DST_SEL(0) | + PACKET3_DMA_DATA_SRC_SEL(2) | + PACKET3_DMA_DATA_CP_SYNC; + pm4[i++] = 0xdeadbeaf; + pm4[i++] = 0; + pm4[i++] = 0xfffffffc & bo_mc; + pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; + pm4[i++] = sdma_write_length; }
amdgpu_test_exec_cs_helper(context_handle,
So it can be shared for CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- tests/amdgpu/basic_tests.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 7806be7..701ccf1 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -57,6 +57,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, struct amdgpu_cs_request *ibs_request); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); static void amdgpu_command_submission_const_fill_helper(unsigned ip_type); +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type);
CU_TestInfo basic_tests[] = { { "Query Info Test", amdgpu_query_info_test }, @@ -955,7 +956,7 @@ static void amdgpu_command_submission_sdma_const_fill(void) amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_DMA); }
-static void amdgpu_command_submission_sdma_copy_linear(void) +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type) { const int sdma_write_length = 1024; const int pm4_dw = 256; @@ -1020,17 +1021,18 @@ static void amdgpu_command_submission_sdma_copy_linear(void)
/* fullfill PM4: test DMA copy linear */ i = j = 0; - pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); - pm4[i++] = sdma_write_length; - pm4[i++] = 0; - pm4[i++] = 0xffffffff & bo1_mc; - pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; - pm4[i++] = 0xffffffff & bo2_mc; - pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; - + if (ip_type == AMDGPU_HW_IP_DMA) { + pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); + pm4[i++] = sdma_write_length; + pm4[i++] = 0; + pm4[i++] = 0xffffffff & bo1_mc; + pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; + pm4[i++] = 0xffffffff & bo2_mc; + pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; + }
amdgpu_test_exec_cs_helper(context_handle, - AMDGPU_HW_IP_DMA, 0, + ip_type, 0, i, pm4, 2, resources, ib_info, ibs_request); @@ -1061,6 +1063,11 @@ static void amdgpu_command_submission_sdma_copy_linear(void) CU_ASSERT_EQUAL(r, 0); }
+static void amdgpu_command_submission_sdma_copy_linear(void) +{ + amdgpu_command_submission_copy_linear_helper(AMDGPU_HW_IP_DMA); +} + static void amdgpu_command_submission_sdma(void) { amdgpu_command_submission_sdma_write_linear();
On 4 February 2016 at 14:59, Alex Deucher alexdeucher@gmail.com wrote:
So it can be shared for CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
tests/amdgpu/basic_tests.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 7806be7..701ccf1 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -57,6 +57,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, struct amdgpu_cs_request *ibs_request); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); static void amdgpu_command_submission_const_fill_helper(unsigned ip_type); +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type);
Unless I'm missing something we don't need these three ?
-Emil
On Thu, Feb 4, 2016 at 10:47 AM, Emil Velikov emil.l.velikov@gmail.com wrote:
On 4 February 2016 at 14:59, Alex Deucher alexdeucher@gmail.com wrote:
So it can be shared for CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
tests/amdgpu/basic_tests.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 7806be7..701ccf1 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -57,6 +57,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, struct amdgpu_cs_request *ibs_request); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); static void amdgpu_command_submission_const_fill_helper(unsigned ip_type); +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type);
Unless I'm missing something we don't need these three ?
They are used by patches 3, 5, and 7.
Alex
On 4 February 2016 at 15:51, Alex Deucher alexdeucher@gmail.com wrote:
On Thu, Feb 4, 2016 at 10:47 AM, Emil Velikov emil.l.velikov@gmail.com wrote:
On 4 February 2016 at 14:59, Alex Deucher alexdeucher@gmail.com wrote:
So it can be shared for CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
tests/amdgpu/basic_tests.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 7806be7..701ccf1 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -57,6 +57,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, struct amdgpu_cs_request *ibs_request); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); static void amdgpu_command_submission_const_fill_helper(unsigned ip_type); +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type);
Unless I'm missing something we don't need these three ?
They are used by patches 3, 5, and 7.
You're absolutely correct. I forgot that the amdgpu tests keep the brief functions at the top (one-online wrappers, test list). Sorry about the noise.
Glad to see that there are tests sent out as the kernel bits get implemented. Keep it up :-)
-Emil
On Thu, Feb 4, 2016 at 4:38 PM, Emil Velikov emil.l.velikov@gmail.com wrote:
On 4 February 2016 at 15:51, Alex Deucher alexdeucher@gmail.com wrote:
On Thu, Feb 4, 2016 at 10:47 AM, Emil Velikov emil.l.velikov@gmail.com wrote:
On 4 February 2016 at 14:59, Alex Deucher alexdeucher@gmail.com wrote:
So it can be shared for CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
tests/amdgpu/basic_tests.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 7806be7..701ccf1 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -57,6 +57,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle, struct amdgpu_cs_request *ibs_request); static void amdgpu_command_submission_write_linear_helper(unsigned ip_type); static void amdgpu_command_submission_const_fill_helper(unsigned ip_type); +static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type);
Unless I'm missing something we don't need these three ?
They are used by patches 3, 5, and 7.
You're absolutely correct. I forgot that the amdgpu tests keep the brief functions at the top (one-online wrappers, test list). Sorry about the noise.
No worries. I thought about moving the implementations up, but this was less code churn.
Alex
Use the CP to copy data between buffers
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- tests/amdgpu/basic_tests.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 701ccf1..aac5615 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -461,12 +461,19 @@ static void amdgpu_command_submission_cp_const_fill(void) amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_GFX); }
+static void amdgpu_command_submission_cp_copy_data(void) +{ + amdgpu_command_submission_copy_linear_helper(AMDGPU_HW_IP_GFX); +} + static void amdgpu_command_submission_gfx(void) { /* write data using the CP */ amdgpu_command_submission_cp_write_data(); /* const fill using the CP */ amdgpu_command_submission_cp_const_fill(); + /* copy data using the CP */ + amdgpu_command_submission_cp_copy_data(); /* separate IB buffers for multi-IB submission */ amdgpu_command_submission_gfx_separate_ibs(); /* shared IB buffer for multi-IB submission */ @@ -1029,6 +1036,17 @@ static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type) pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; pm4[i++] = 0xffffffff & bo2_mc; pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; + } else if (ip_type == AMDGPU_HW_IP_GFX) { + pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); + pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) | + PACKET3_DMA_DATA_DST_SEL(0) | + PACKET3_DMA_DATA_SRC_SEL(0) | + PACKET3_DMA_DATA_CP_SYNC; + pm4[i++] = 0xfffffffc & bo1_mc; + pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; + pm4[i++] = 0xfffffffc & bo2_mc; + pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; + pm4[i++] = sdma_write_length; }
amdgpu_test_exec_cs_helper(context_handle,
On 4 February 2016 at 14:59, Alex Deucher alexdeucher@gmail.com wrote:
Share with upcoming CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
tests/amdgpu/basic_tests.c | 58 ++++++++++++++++++++++++++++------------------ 1 file changed, 35 insertions(+), 23 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index fa0ed12..1bcc835 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -49,6 +49,13 @@ static void amdgpu_command_submission_sdma(void); static void amdgpu_userptr_test(void); static void amdgpu_semaphore_test(void);
+static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle,
unsigned ip_type,int instance, int pm4_dw, uint32_t *pm4_src,int res_cnt, amdgpu_bo_handle *resources,struct amdgpu_cs_ib_info *ib_info,struct amdgpu_cs_request *ibs_request);
We don't need the forward declaration, do we ?
-Emil
On Thu, Feb 4, 2016 at 10:43 AM, Emil Velikov emil.l.velikov@gmail.com wrote:
On 4 February 2016 at 14:59, Alex Deucher alexdeucher@gmail.com wrote:
Share with upcoming CP tests.
Reviewed-by: Ken Wang Qingqing.Wang@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
tests/amdgpu/basic_tests.c | 58 ++++++++++++++++++++++++++++------------------ 1 file changed, 35 insertions(+), 23 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index fa0ed12..1bcc835 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -49,6 +49,13 @@ static void amdgpu_command_submission_sdma(void); static void amdgpu_userptr_test(void); static void amdgpu_semaphore_test(void);
+static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle,
unsigned ip_type,int instance, int pm4_dw, uint32_t *pm4_src,int res_cnt, amdgpu_bo_handle *resources,struct amdgpu_cs_ib_info *ib_info,struct amdgpu_cs_request *ibs_request);We don't need the forward declaration, do we ?
Nope. Leftover from an earlier version of this patch set. I'll drop it.
Alex
dri-devel@lists.freedesktop.org
-
Alex Deucher -
Emil Velikov