Hi, Yongqiang:

Yongqiang Niu yongqiang.niu@mediatek.com 於 2021年7月16日 週五 下午2:58寫道：

add time-out cycle setting to make sure time-out interrupt irq will happened when instruction time-out for wait and poll

Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com

drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++ 1 file changed, 11 insertions(+)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index de4793e..9a76bcd 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -35,6 +35,7 @@ #define CMDQ_THR_END_ADDR 0x24 #define CMDQ_THR_WAIT_TOKEN 0x30 #define CMDQ_THR_PRIORITY 0x40 +#define CMDQ_THR_INSTN_TIMEOUT_CYCLES 0x50

#define GCE_GCTL_VALUE 0x48

@@ -53,6 +54,15 @@ #define CMDQ_JUMP_BY_OFFSET 0x10000000 #define CMDQ_JUMP_BY_PA 0x10000001

+/*

• • instruction time-out
• • cycles to issue instruction time-out interrupt for wait and poll instructions
• • GCE axi_clock 156MHz
• • 1 cycle = 6.41ns
• • instruction time out 2^22*2*6.41ns = 53ms

I think every client has different timeout value, so it's not a good idea to have a unique timeout value in mailbox controller. Client could use timer or something similar to detect timeout.

Regards, Chun-Kuang.

• */

+#define CMDQ_INSTN_TIMEOUT_CYCLES 22

struct cmdq_thread { struct mbox_chan *chan; void __iomem *base; @@ -368,6 +378,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa, thread->base + CMDQ_THR_END_ADDR);

•           writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
            writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
            writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
            writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
  

-- 1.8.1.1.dirty