Compared to v5, squash this with patch #3 in the series in drm/panel: boe-tv101wum-nl6
yangcong (4): drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail dt-bindings: drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail drm/panel: support for BOE and INX video mode panel dt-bindings: boe, tv101wum-n16: Add compatible for boe tv110c9m-ll3 and inx hj110iz-01a
.../display/panel/boe,tv101wum-nl6.yaml | 7 + .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 745 +++++++++++++++++- 2 files changed, 750 insertions(+), 2 deletions(-)
The auo,b101uan08.3 panel (already supported by this driver) has a 3.3V rail that needs to be turned on. For previous users of this panel this voltage was directly output by pmic. On a new user (the not-yet-upstream sc7180-trogdor-mrbland board) we need to turn the 3.3V rail on. Add support in the driver for this.
Signed-off-by: yangcong yangcong5@huaqin.corp-partner.google.com Reviewed-by: Douglas Anderson dianders@chromium.org --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index db9d0b86d542..9a644433629e 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -45,6 +45,7 @@ struct boe_panel { const struct panel_desc *desc;
enum drm_panel_orientation orientation; + struct regulator *pp3300; struct regulator *pp1800; struct regulator *avee; struct regulator *avdd; @@ -511,6 +512,7 @@ static int boe_panel_unprepare(struct drm_panel *panel) gpiod_set_value(boe->enable_gpio, 0); usleep_range(5000, 7000); regulator_disable(boe->pp1800); + regulator_disable(boe->pp3300); } else { gpiod_set_value(boe->enable_gpio, 0); usleep_range(500, 1000); @@ -518,6 +520,7 @@ static int boe_panel_unprepare(struct drm_panel *panel) regulator_disable(boe->avdd); usleep_range(5000, 7000); regulator_disable(boe->pp1800); + regulator_disable(boe->pp3300); }
boe->prepared = false; @@ -536,6 +539,10 @@ static int boe_panel_prepare(struct drm_panel *panel) gpiod_set_value(boe->enable_gpio, 0); usleep_range(1000, 1500);
+ ret = regulator_enable(boe->pp3300); + if (ret < 0) + return ret; + ret = regulator_enable(boe->pp1800); if (ret < 0) return ret; @@ -767,6 +774,10 @@ static int boe_panel_add(struct boe_panel *boe) if (IS_ERR(boe->avee)) return PTR_ERR(boe->avee);
+ boe->pp3300 = devm_regulator_get(dev, "pp3300"); + if (IS_ERR(boe->pp3300)) + return PTR_ERR(boe->pp3300); + boe->pp1800 = devm_regulator_get(dev, "pp1800"); if (IS_ERR(boe->pp1800)) return PTR_ERR(boe->pp1800);
The auo,b101uan08.3 panel (already supported by this driver) has a 3.3V rail that needs to be turned on. For previous users of this panel this voltage was directly output by pmic. On a new user (the not-yet-upstream sc7180-trogdor-mrbland board) we need to turn the 3.3V rail on.
Signed-off-by: yangcong yangcong5@huaqin.corp-partner.google.com Reviewed-by: Douglas Anderson dianders@chromium.org Reviewed-by: Rob Herring robh@kernel.org --- .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml index 38bc1d1b511e..a7091ae0f791 100644 --- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml +++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml @@ -36,6 +36,9 @@ properties: pp1800-supply: description: core voltage supply
+ pp3300-supply: + description: core voltage supply + avdd-supply: description: phandle of the regulator that provides positive voltage
Support for these two panels fits in nicely with the existing panel-boe-tv101wum-nl6 driver as suggested by Sam [1]. This is an incell IC, TDDI use time division multiplexing. Init code effect touch sensing.The main things we needed to handle were: a) These panels need slightly longer delays in two places. Since these new delays aren't much longer, let's just unconditionally increase them for the driver. b) These panel use video BURST mode
[1] https://lore.kernel.org/r/YSPAseE6WD8dDRuz@ravnborg.org/
Signed-off-by: yangcong yangcong5@huaqin.corp-partner.google.com Reviewed-by: Douglas Anderson dianders@chromium.org --- .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 734 +++++++++++++++++- 1 file changed, 732 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 9a644433629e..cb80daff3783 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -75,6 +75,672 @@ struct panel_init_cmd { .len = sizeof((char[]){__VA_ARGS__}), \ .data = (char[]){__VA_ARGS__} }
+static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = { + + _INIT_DCS_CMD(0xFF, 0x20), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x05, 0xD9), + _INIT_DCS_CMD(0x07, 0x78), + _INIT_DCS_CMD(0x08, 0x5A), + _INIT_DCS_CMD(0x0D, 0x63), + _INIT_DCS_CMD(0x0E, 0x91), + _INIT_DCS_CMD(0x0F, 0x73), + _INIT_DCS_CMD(0x95, 0xEB), + _INIT_DCS_CMD(0x96, 0xEB), + _INIT_DCS_CMD(0x30, 0x11), + _INIT_DCS_CMD(0x6D, 0x66), + _INIT_DCS_CMD(0x75, 0xA2), + _INIT_DCS_CMD(0x77, 0x3B), + + _INIT_DCS_CMD(0xB0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9), + _INIT_DCS_CMD(0xB1, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31), + _INIT_DCS_CMD(0xB2, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B), + _INIT_DCS_CMD(0xB3, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF), + + _INIT_DCS_CMD(0xB4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9), + _INIT_DCS_CMD(0xB5, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31), + _INIT_DCS_CMD(0xB6, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B), + _INIT_DCS_CMD(0xB7, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF), + _INIT_DCS_CMD(0xB8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9), + _INIT_DCS_CMD(0xB9, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31), + _INIT_DCS_CMD(0xBA, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B), + _INIT_DCS_CMD(0xBB, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF), + + _INIT_DCS_CMD(0xFF, 0x21), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1), + _INIT_DCS_CMD(0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), + _INIT_DCS_CMD(0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), + _INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xF7), + + _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1), + _INIT_DCS_CMD(0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), + _INIT_DCS_CMD(0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), + _INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xF7), + + _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1), + _INIT_DCS_CMD(0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29), + _INIT_DCS_CMD(0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73), + _INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xF7), + + _INIT_DCS_CMD(0xFF, 0x24), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0x00, 0x00), + _INIT_DCS_CMD(0x01, 0x00), + + _INIT_DCS_CMD(0x02, 0x1C), + _INIT_DCS_CMD(0x03, 0x1C), + + _INIT_DCS_CMD(0x04, 0x1D), + _INIT_DCS_CMD(0x05, 0x1D), + + _INIT_DCS_CMD(0x06, 0x04), + _INIT_DCS_CMD(0x07, 0x04), + + _INIT_DCS_CMD(0x08, 0x0F), + _INIT_DCS_CMD(0x09, 0x0F), + + _INIT_DCS_CMD(0x0A, 0x0E), + _INIT_DCS_CMD(0x0B, 0x0E), + + _INIT_DCS_CMD(0x0C, 0x0D), + _INIT_DCS_CMD(0x0D, 0x0D), + + _INIT_DCS_CMD(0x0E, 0x0C), + _INIT_DCS_CMD(0x0F, 0x0C), + + _INIT_DCS_CMD(0x10, 0x08), + _INIT_DCS_CMD(0x11, 0x08), + + _INIT_DCS_CMD(0x12, 0x00), + _INIT_DCS_CMD(0x13, 0x00), + _INIT_DCS_CMD(0x14, 0x00), + _INIT_DCS_CMD(0x15, 0x00), + + _INIT_DCS_CMD(0x16, 0x00), + _INIT_DCS_CMD(0x17, 0x00), + + _INIT_DCS_CMD(0x18, 0x1C), + _INIT_DCS_CMD(0x19, 0x1C), + + _INIT_DCS_CMD(0x1A, 0x1D), + _INIT_DCS_CMD(0x1B, 0x1D), + + _INIT_DCS_CMD(0x1C, 0x04), + _INIT_DCS_CMD(0x1D, 0x04), + + _INIT_DCS_CMD(0x1E, 0x0F), + _INIT_DCS_CMD(0x1F, 0x0F), + + _INIT_DCS_CMD(0x20, 0x0E), + _INIT_DCS_CMD(0x21, 0x0E), + + _INIT_DCS_CMD(0x22, 0x0D), + _INIT_DCS_CMD(0x23, 0x0D), + + _INIT_DCS_CMD(0x24, 0x0C), + _INIT_DCS_CMD(0x25, 0x0C), + + _INIT_DCS_CMD(0x26, 0x08), + _INIT_DCS_CMD(0x27, 0x08), + + _INIT_DCS_CMD(0x28, 0x00), + _INIT_DCS_CMD(0x29, 0x00), + _INIT_DCS_CMD(0x2A, 0x00), + _INIT_DCS_CMD(0x2B, 0x00), + + _INIT_DCS_CMD(0x2D, 0x20), + _INIT_DCS_CMD(0x2F, 0x0A), + _INIT_DCS_CMD(0x30, 0x44), + _INIT_DCS_CMD(0x33, 0x0C), + _INIT_DCS_CMD(0x34, 0x32), + + _INIT_DCS_CMD(0x37, 0x44), + _INIT_DCS_CMD(0x38, 0x40), + _INIT_DCS_CMD(0x39, 0x00), + _INIT_DCS_CMD(0x3A, 0x5D), + _INIT_DCS_CMD(0x3B, 0x60), + _INIT_DCS_CMD(0x3D, 0x42), + _INIT_DCS_CMD(0x3F, 0x06), + _INIT_DCS_CMD(0x43, 0x06), + _INIT_DCS_CMD(0x47, 0x66), + _INIT_DCS_CMD(0x4A, 0x5D), + _INIT_DCS_CMD(0x4B, 0x60), + _INIT_DCS_CMD(0x4C, 0x91), + _INIT_DCS_CMD(0x4D, 0x21), + _INIT_DCS_CMD(0x4E, 0x43), + _INIT_DCS_CMD(0x51, 0x12), + _INIT_DCS_CMD(0x52, 0x34), + _INIT_DCS_CMD(0x55, 0x82, 0x02), + _INIT_DCS_CMD(0x56, 0x04), + _INIT_DCS_CMD(0x58, 0x21), + _INIT_DCS_CMD(0x59, 0x30), + _INIT_DCS_CMD(0x5A, 0x60), + _INIT_DCS_CMD(0x5B, 0x50), + _INIT_DCS_CMD(0x5E, 0x00, 0x06), + _INIT_DCS_CMD(0x5F, 0x00), + _INIT_DCS_CMD(0x65, 0x82), + _INIT_DCS_CMD(0x7E, 0x20), + _INIT_DCS_CMD(0x7F, 0x3C), + _INIT_DCS_CMD(0x82, 0x04), + _INIT_DCS_CMD(0x97, 0xC0), + _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00), + _INIT_DCS_CMD(0x91, 0x44), + _INIT_DCS_CMD(0x92, 0xA9), + _INIT_DCS_CMD(0x93, 0x1A), + _INIT_DCS_CMD(0x94, 0x96), + _INIT_DCS_CMD(0xD7, 0x55), + _INIT_DCS_CMD(0xDA, 0x0A), + _INIT_DCS_CMD(0xDE, 0x08), + _INIT_DCS_CMD(0xDB, 0x05), + _INIT_DCS_CMD(0xDC, 0xA9), + _INIT_DCS_CMD(0xDD, 0x22), + + _INIT_DCS_CMD(0xDF, 0x05), + _INIT_DCS_CMD(0xE0, 0xA9), + _INIT_DCS_CMD(0xE1, 0x05), + _INIT_DCS_CMD(0xE2, 0xA9), + _INIT_DCS_CMD(0xE3, 0x05), + _INIT_DCS_CMD(0xE4, 0xA9), + _INIT_DCS_CMD(0xE5, 0x05), + _INIT_DCS_CMD(0xE6, 0xA9), + _INIT_DCS_CMD(0x5C, 0x00), + _INIT_DCS_CMD(0x5D, 0x00), + _INIT_DCS_CMD(0x8D, 0x00), + _INIT_DCS_CMD(0x8E, 0x00), + _INIT_DCS_CMD(0xB5, 0x90), + _INIT_DCS_CMD(0xFF, 0x25), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x05, 0x00), + _INIT_DCS_CMD(0x19, 0x07), + _INIT_DCS_CMD(0x1F, 0x60), + _INIT_DCS_CMD(0x20, 0x50), + _INIT_DCS_CMD(0x26, 0x60), + _INIT_DCS_CMD(0x27, 0x50), + _INIT_DCS_CMD(0x33, 0x60), + _INIT_DCS_CMD(0x34, 0x50), + _INIT_DCS_CMD(0x3F, 0xE0), + _INIT_DCS_CMD(0x40, 0x00), + _INIT_DCS_CMD(0x44, 0x00), + _INIT_DCS_CMD(0x45, 0x40), + _INIT_DCS_CMD(0x48, 0x60), + _INIT_DCS_CMD(0x49, 0x50), + _INIT_DCS_CMD(0x5B, 0x00), + _INIT_DCS_CMD(0x5C, 0x00), + _INIT_DCS_CMD(0x5D, 0x00), + _INIT_DCS_CMD(0x5E, 0xD0), + _INIT_DCS_CMD(0x61, 0x60), + _INIT_DCS_CMD(0x62, 0x50), + _INIT_DCS_CMD(0xF1, 0x10), + _INIT_DCS_CMD(0xFF, 0x2A), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0x64, 0x16), + _INIT_DCS_CMD(0x67, 0x16), + _INIT_DCS_CMD(0x6A, 0x16), + + _INIT_DCS_CMD(0x70, 0x30), + + _INIT_DCS_CMD(0xA2, 0xF3), + _INIT_DCS_CMD(0xA3, 0xFF), + _INIT_DCS_CMD(0xA4, 0xFF), + _INIT_DCS_CMD(0xA5, 0xFF), + + _INIT_DCS_CMD(0xD6, 0x08), + + _INIT_DCS_CMD(0xFF, 0x26), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x00, 0xA1), + + _INIT_DCS_CMD(0x02, 0x31), + _INIT_DCS_CMD(0x04, 0x28), + _INIT_DCS_CMD(0x06, 0x30), + _INIT_DCS_CMD(0x0C, 0x16), + _INIT_DCS_CMD(0x0D, 0x0D), + _INIT_DCS_CMD(0x0F, 0x00), + _INIT_DCS_CMD(0x11, 0x00), + _INIT_DCS_CMD(0x12, 0x50), + _INIT_DCS_CMD(0x13, 0x56), + _INIT_DCS_CMD(0x14, 0x57), + _INIT_DCS_CMD(0x15, 0x00), + _INIT_DCS_CMD(0x16, 0x10), + _INIT_DCS_CMD(0x17, 0xA0), + _INIT_DCS_CMD(0x18, 0x86), + _INIT_DCS_CMD(0x19, 0x0D), + _INIT_DCS_CMD(0x1A, 0x7F), + _INIT_DCS_CMD(0x1B, 0x0C), + _INIT_DCS_CMD(0x1C, 0xBF), + _INIT_DCS_CMD(0x22, 0x00), + _INIT_DCS_CMD(0x23, 0x00), + _INIT_DCS_CMD(0x2A, 0x0D), + _INIT_DCS_CMD(0x2B, 0x7F), + + _INIT_DCS_CMD(0x1D, 0x00), + _INIT_DCS_CMD(0x1E, 0x65), + _INIT_DCS_CMD(0x1F, 0x65), + _INIT_DCS_CMD(0x24, 0x00), + _INIT_DCS_CMD(0x25, 0x65), + _INIT_DCS_CMD(0x2F, 0x05), + _INIT_DCS_CMD(0x30, 0x65), + _INIT_DCS_CMD(0x31, 0x05), + _INIT_DCS_CMD(0x32, 0x7D), + _INIT_DCS_CMD(0x39, 0x00), + _INIT_DCS_CMD(0x3A, 0x65), + _INIT_DCS_CMD(0x20, 0x01), + _INIT_DCS_CMD(0x33, 0x11), + _INIT_DCS_CMD(0x34, 0x78), + _INIT_DCS_CMD(0x35, 0x16), + _INIT_DCS_CMD(0xC8, 0x04), + _INIT_DCS_CMD(0xC9, 0x80), + _INIT_DCS_CMD(0xCA, 0x4E), + _INIT_DCS_CMD(0xCB, 0x00), + _INIT_DCS_CMD(0xA9, 0x4C), + _INIT_DCS_CMD(0xAA, 0x47), + + _INIT_DCS_CMD(0xFF, 0x27), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0x56, 0x06), + _INIT_DCS_CMD(0x58, 0x80), + _INIT_DCS_CMD(0x59, 0x75), + _INIT_DCS_CMD(0x5A, 0x00), + _INIT_DCS_CMD(0x5B, 0x02), + _INIT_DCS_CMD(0x5C, 0x00), + _INIT_DCS_CMD(0x5D, 0x00), + _INIT_DCS_CMD(0x5E, 0x20), + _INIT_DCS_CMD(0x5F, 0x10), + _INIT_DCS_CMD(0x60, 0x00), + _INIT_DCS_CMD(0x61, 0x2E), + _INIT_DCS_CMD(0x62, 0x00), + _INIT_DCS_CMD(0x63, 0x01), + _INIT_DCS_CMD(0x64, 0x43), + _INIT_DCS_CMD(0x65, 0x2D), + _INIT_DCS_CMD(0x66, 0x00), + _INIT_DCS_CMD(0x67, 0x01), + _INIT_DCS_CMD(0x68, 0x44), + + _INIT_DCS_CMD(0x00, 0x00), + _INIT_DCS_CMD(0x78, 0x00), + _INIT_DCS_CMD(0xC3, 0x00), + + _INIT_DCS_CMD(0xFF, 0x2A), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0x22, 0x2F), + _INIT_DCS_CMD(0x23, 0x08), + + _INIT_DCS_CMD(0x24, 0x00), + _INIT_DCS_CMD(0x25, 0x65), + _INIT_DCS_CMD(0x26, 0xF8), + _INIT_DCS_CMD(0x27, 0x00), + _INIT_DCS_CMD(0x28, 0x1A), + _INIT_DCS_CMD(0x29, 0x00), + _INIT_DCS_CMD(0x2A, 0x1A), + _INIT_DCS_CMD(0x2B, 0x00), + _INIT_DCS_CMD(0x2D, 0x1A), + + _INIT_DCS_CMD(0xFF, 0x23), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0x00, 0x80), + _INIT_DCS_CMD(0x07, 0x00), + + _INIT_DCS_CMD(0xFF, 0xE0), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x14, 0x60), + _INIT_DCS_CMD(0x16, 0xC0), + + _INIT_DCS_CMD(0xFF, 0xF0), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x3A, 0x08), + + _INIT_DCS_CMD(0xFF, 0x10), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0xB9, 0x01), + _INIT_DCS_CMD(0xFF, 0x20), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x18, 0x40), + + _INIT_DCS_CMD(0xFF, 0x10), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0xB9, 0x02), + _INIT_DCS_CMD(0x35, 0x00), + _INIT_DCS_CMD(0x51, 0x00, 0xFF), + _INIT_DCS_CMD(0x53, 0x24), + _INIT_DCS_CMD(0x55, 0x00), + _INIT_DCS_CMD(0xBB, 0x13), + _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04), + _INIT_DELAY_CMD(100), + _INIT_DCS_CMD(0x11), + _INIT_DELAY_CMD(200), + _INIT_DCS_CMD(0x29), + _INIT_DELAY_CMD(100), + {}, +}; + +static const struct panel_init_cmd inx_init_cmd[] = { + _INIT_DCS_CMD(0xFF, 0x20), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x05, 0xD1), + _INIT_DCS_CMD(0x0D, 0x63), + _INIT_DCS_CMD(0x07, 0x8C), + _INIT_DCS_CMD(0x08, 0x4B), + _INIT_DCS_CMD(0x0E, 0x91), + _INIT_DCS_CMD(0x0F, 0x69), + _INIT_DCS_CMD(0x95, 0xFF), + _INIT_DCS_CMD(0x96, 0xFF), + _INIT_DCS_CMD(0x9D, 0x0A), + _INIT_DCS_CMD(0x9E, 0x0A), + _INIT_DCS_CMD(0x69, 0x98), + _INIT_DCS_CMD(0x75, 0xA2), + _INIT_DCS_CMD(0x77, 0xB3), + _INIT_DCS_CMD(0xFF, 0x24), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x91, 0x44), + _INIT_DCS_CMD(0x92, 0x7A), + _INIT_DCS_CMD(0x93, 0x1A), + _INIT_DCS_CMD(0x94, 0x40), + _INIT_DCS_CMD(0x9A, 0x08), + _INIT_DCS_CMD(0x60, 0x96), + _INIT_DCS_CMD(0x61, 0xD0), + _INIT_DCS_CMD(0x63, 0x70), + _INIT_DCS_CMD(0xC2, 0xCF), + _INIT_DCS_CMD(0x9B, 0x0F), + _INIT_DCS_CMD(0x9A, 0x08), + _INIT_DCS_CMD(0x00, 0x03), + _INIT_DCS_CMD(0x01, 0x03), + _INIT_DCS_CMD(0x02, 0x03), + _INIT_DCS_CMD(0x03, 0x03), + _INIT_DCS_CMD(0x04, 0x03), + _INIT_DCS_CMD(0x05, 0x03), + _INIT_DCS_CMD(0x06, 0x22), + _INIT_DCS_CMD(0x07, 0x06), + _INIT_DCS_CMD(0x08, 0x00), + _INIT_DCS_CMD(0x09, 0x1D), + _INIT_DCS_CMD(0x0A, 0x1C), + _INIT_DCS_CMD(0x0B, 0x13), + _INIT_DCS_CMD(0x0C, 0x12), + _INIT_DCS_CMD(0x0D, 0x11), + _INIT_DCS_CMD(0x0E, 0x10), + _INIT_DCS_CMD(0x0F, 0x0F), + _INIT_DCS_CMD(0x10, 0x0E), + _INIT_DCS_CMD(0x11, 0x0D), + _INIT_DCS_CMD(0x12, 0x0C), + _INIT_DCS_CMD(0x13, 0x04), + _INIT_DCS_CMD(0x14, 0x03), + _INIT_DCS_CMD(0x15, 0x03), + _INIT_DCS_CMD(0x16, 0x03), + _INIT_DCS_CMD(0x17, 0x03), + _INIT_DCS_CMD(0x18, 0x03), + _INIT_DCS_CMD(0x19, 0x03), + _INIT_DCS_CMD(0x1A, 0x03), + _INIT_DCS_CMD(0x1B, 0x03), + _INIT_DCS_CMD(0x1C, 0x22), + _INIT_DCS_CMD(0x1D, 0x06), + _INIT_DCS_CMD(0x1E, 0x00), + _INIT_DCS_CMD(0x1F, 0x1D), + _INIT_DCS_CMD(0x20, 0x1C), + _INIT_DCS_CMD(0x21, 0x13), + _INIT_DCS_CMD(0x22, 0x12), + _INIT_DCS_CMD(0x23, 0x11), + _INIT_DCS_CMD(0x24, 0x10), + _INIT_DCS_CMD(0x25, 0x0F), + _INIT_DCS_CMD(0x26, 0x0E), + _INIT_DCS_CMD(0x27, 0x0D), + _INIT_DCS_CMD(0x28, 0x0C), + _INIT_DCS_CMD(0x29, 0x04), + _INIT_DCS_CMD(0x2A, 0x03), + _INIT_DCS_CMD(0x2B, 0x03), + + _INIT_DCS_CMD(0x2F, 0x06), + _INIT_DCS_CMD(0x30, 0x32), + _INIT_DCS_CMD(0x31, 0x43), + _INIT_DCS_CMD(0x33, 0x06), + _INIT_DCS_CMD(0x34, 0x32), + _INIT_DCS_CMD(0x35, 0x43), + _INIT_DCS_CMD(0x37, 0x44), + _INIT_DCS_CMD(0x38, 0x40), + _INIT_DCS_CMD(0x39, 0x00), + _INIT_DCS_CMD(0x3A, 0x01), + _INIT_DCS_CMD(0x3B, 0x48), + _INIT_DCS_CMD(0x3D, 0x93), + _INIT_DCS_CMD(0xAB, 0x44), + _INIT_DCS_CMD(0xAC, 0x40), + + _INIT_DCS_CMD(0x4D, 0x21), + _INIT_DCS_CMD(0x4E, 0x43), + _INIT_DCS_CMD(0x4F, 0x65), + _INIT_DCS_CMD(0x50, 0x87), + _INIT_DCS_CMD(0x51, 0x78), + _INIT_DCS_CMD(0x52, 0x56), + _INIT_DCS_CMD(0x53, 0x34), + _INIT_DCS_CMD(0x54, 0x21), + _INIT_DCS_CMD(0x55, 0x83), + _INIT_DCS_CMD(0x56, 0x08), + _INIT_DCS_CMD(0x58, 0x21), + _INIT_DCS_CMD(0x59, 0x40), + _INIT_DCS_CMD(0x5A, 0x09), + _INIT_DCS_CMD(0x5B, 0x48), + _INIT_DCS_CMD(0x5E, 0x00, 0x10), + _INIT_DCS_CMD(0x5F, 0x00), + + _INIT_DCS_CMD(0x7A, 0x00), + _INIT_DCS_CMD(0x7B, 0x00), + _INIT_DCS_CMD(0x7C, 0x00), + _INIT_DCS_CMD(0x7D, 0x00), + _INIT_DCS_CMD(0x7E, 0x20), + _INIT_DCS_CMD(0x7F, 0x3C), + _INIT_DCS_CMD(0x80, 0x00), + _INIT_DCS_CMD(0x81, 0x00), + _INIT_DCS_CMD(0x82, 0x08), + _INIT_DCS_CMD(0x97, 0x02), + _INIT_DCS_CMD(0xC5, 0x10), + _INIT_DCS_CMD(0xDA, 0x05), + _INIT_DCS_CMD(0xDB, 0x01), + _INIT_DCS_CMD(0xDC, 0x7A), + _INIT_DCS_CMD(0xDD, 0x55), + _INIT_DCS_CMD(0xDE, 0x27), + _INIT_DCS_CMD(0xDF, 0x01), + _INIT_DCS_CMD(0xE0, 0x7A), + _INIT_DCS_CMD(0xE1, 0x01), + _INIT_DCS_CMD(0xE2, 0x7A), + _INIT_DCS_CMD(0xE3, 0x01), + _INIT_DCS_CMD(0xE4, 0x7A), + _INIT_DCS_CMD(0xE5, 0x01), + _INIT_DCS_CMD(0xE6, 0x7A), + _INIT_DCS_CMD(0xE7, 0x00), + _INIT_DCS_CMD(0xE8, 0x00), + _INIT_DCS_CMD(0xE9, 0x01), + _INIT_DCS_CMD(0xEA, 0x7A), + _INIT_DCS_CMD(0xEB, 0x01), + _INIT_DCS_CMD(0xEE, 0x7A), + _INIT_DCS_CMD(0xEF, 0x01), + _INIT_DCS_CMD(0xF0, 0x7A), + + _INIT_DCS_CMD(0xFF, 0x25), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0x05, 0x00), + + _INIT_DCS_CMD(0xF1, 0x10), + _INIT_DCS_CMD(0x1E, 0x00), + _INIT_DCS_CMD(0x1F, 0x09), + _INIT_DCS_CMD(0x20, 0x46), + _INIT_DCS_CMD(0x25, 0x00), + _INIT_DCS_CMD(0x26, 0x09), + _INIT_DCS_CMD(0x27, 0x46), + _INIT_DCS_CMD(0x3F, 0x80), + _INIT_DCS_CMD(0x40, 0x00), + _INIT_DCS_CMD(0x43, 0x00), + + + _INIT_DCS_CMD(0x44, 0x09), + _INIT_DCS_CMD(0x45, 0x46), + + _INIT_DCS_CMD(0x48, 0x09), + _INIT_DCS_CMD(0x49, 0x46), + _INIT_DCS_CMD(0x5B, 0x80), + _INIT_DCS_CMD(0x5C, 0x00), + _INIT_DCS_CMD(0x5D, 0x01), + _INIT_DCS_CMD(0x5E, 0x46), + _INIT_DCS_CMD(0x61, 0x01), + _INIT_DCS_CMD(0x62, 0x46), + _INIT_DCS_CMD(0x68, 0x10), + _INIT_DCS_CMD(0xFF, 0x26), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0x00, 0xA1), + _INIT_DCS_CMD(0x02, 0x31), + _INIT_DCS_CMD(0x0A, 0xF2), + _INIT_DCS_CMD(0x04, 0x28), + _INIT_DCS_CMD(0x06, 0x30), + _INIT_DCS_CMD(0x0C, 0x16), + _INIT_DCS_CMD(0x0D, 0x0D), + _INIT_DCS_CMD(0x0F, 0x00), + _INIT_DCS_CMD(0x11, 0x00), + _INIT_DCS_CMD(0x12, 0x50), + _INIT_DCS_CMD(0x13, 0x56), + _INIT_DCS_CMD(0x14, 0x57), + _INIT_DCS_CMD(0x15, 0x00), + _INIT_DCS_CMD(0x16, 0x10), + _INIT_DCS_CMD(0x17, 0xA0), + _INIT_DCS_CMD(0x18, 0x86), + _INIT_DCS_CMD(0x22, 0x00), + _INIT_DCS_CMD(0x23, 0x00), + _INIT_DCS_CMD(0x19, 0x0D), + _INIT_DCS_CMD(0x1A, 0x7F), + _INIT_DCS_CMD(0x1B, 0x0C), + _INIT_DCS_CMD(0x1C, 0xBF), + _INIT_DCS_CMD(0x2A, 0x0D), + _INIT_DCS_CMD(0x2B, 0x7F), + _INIT_DCS_CMD(0x20, 0x00), + + _INIT_DCS_CMD(0x1D, 0x00), + _INIT_DCS_CMD(0x1E, 0x78), + _INIT_DCS_CMD(0x1F, 0x78), + + _INIT_DCS_CMD(0x2F, 0x03), + _INIT_DCS_CMD(0x30, 0x78), + _INIT_DCS_CMD(0x33, 0x78), + _INIT_DCS_CMD(0x34, 0x66), + _INIT_DCS_CMD(0x35, 0x11), + + _INIT_DCS_CMD(0x39, 0x10), + _INIT_DCS_CMD(0x3A, 0x78), + _INIT_DCS_CMD(0x3B, 0x06), + + _INIT_DCS_CMD(0xC8, 0x04), + _INIT_DCS_CMD(0xC9, 0x84), + _INIT_DCS_CMD(0xCA, 0x4E), + _INIT_DCS_CMD(0xCB, 0x00), + + _INIT_DCS_CMD(0xA9, 0x50), + _INIT_DCS_CMD(0xAA, 0x4F), + _INIT_DCS_CMD(0xAB, 0x4D), + _INIT_DCS_CMD(0xAC, 0x4A), + _INIT_DCS_CMD(0xAD, 0x48), + _INIT_DCS_CMD(0xAE, 0x46), + _INIT_DCS_CMD(0xFF, 0x27), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0xC0, 0x18), + _INIT_DCS_CMD(0xC1, 0x00), + _INIT_DCS_CMD(0xC2, 0x00), + _INIT_DCS_CMD(0x56, 0x06), + _INIT_DCS_CMD(0x58, 0x80), + _INIT_DCS_CMD(0x59, 0x75), + _INIT_DCS_CMD(0x5A, 0x00), + _INIT_DCS_CMD(0x5B, 0x02), + _INIT_DCS_CMD(0x5C, 0x00), + _INIT_DCS_CMD(0x5D, 0x00), + _INIT_DCS_CMD(0x5E, 0x20), + _INIT_DCS_CMD(0x5F, 0x10), + _INIT_DCS_CMD(0x60, 0x00), + _INIT_DCS_CMD(0x61, 0x2E), + _INIT_DCS_CMD(0x62, 0x00), + _INIT_DCS_CMD(0x63, 0x01), + _INIT_DCS_CMD(0x64, 0x43), + _INIT_DCS_CMD(0x65, 0x2D), + _INIT_DCS_CMD(0x66, 0x00), + _INIT_DCS_CMD(0x67, 0x01), + _INIT_DCS_CMD(0x68, 0x43), + _INIT_DCS_CMD(0x98, 0x01), + _INIT_DCS_CMD(0xB4, 0x03), + _INIT_DCS_CMD(0x9B, 0xBD), + _INIT_DCS_CMD(0xA0, 0x90), + _INIT_DCS_CMD(0xAB, 0x1B), + _INIT_DCS_CMD(0xBC, 0x0C), + _INIT_DCS_CMD(0xBD, 0x28), + + _INIT_DCS_CMD(0xFF, 0x2A), + _INIT_DCS_CMD(0xFB, 0x01), + + _INIT_DCS_CMD(0x22, 0x2F), + _INIT_DCS_CMD(0x23, 0x08), + + _INIT_DCS_CMD(0x24, 0x00), + _INIT_DCS_CMD(0x25, 0x65), + _INIT_DCS_CMD(0x26, 0xF8), + _INIT_DCS_CMD(0x27, 0x00), + _INIT_DCS_CMD(0x28, 0x1A), + _INIT_DCS_CMD(0x29, 0x00), + _INIT_DCS_CMD(0x2A, 0x1A), + _INIT_DCS_CMD(0x2B, 0x00), + _INIT_DCS_CMD(0x2D, 0x1A), + + _INIT_DCS_CMD(0x64, 0x96), + _INIT_DCS_CMD(0x65, 0x00), + _INIT_DCS_CMD(0x66, 0x00), + _INIT_DCS_CMD(0x6A, 0x96), + _INIT_DCS_CMD(0x6B, 0x00), + _INIT_DCS_CMD(0x6C, 0x00), + _INIT_DCS_CMD(0x70, 0x92), + _INIT_DCS_CMD(0x71, 0x00), + _INIT_DCS_CMD(0x72, 0x00), + _INIT_DCS_CMD(0xA2, 0x33), + _INIT_DCS_CMD(0xA3, 0x30), + _INIT_DCS_CMD(0xA4, 0xC0), + _INIT_DCS_CMD(0xE8, 0x00), + _INIT_DCS_CMD(0xFF, 0xF0), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x3A, 0x08), + _INIT_DCS_CMD(0xFF, 0xD0), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x00, 0x33), + _INIT_DCS_CMD(0x02, 0x77), + _INIT_DCS_CMD(0x08, 0x01), + _INIT_DCS_CMD(0x09, 0xBF), + _INIT_DCS_CMD(0x28, 0x30), + _INIT_DCS_CMD(0x2F, 0x33), + _INIT_DCS_CMD(0xFF, 0x23), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x00, 0x80), + _INIT_DCS_CMD(0x07, 0x00), + _INIT_DCS_CMD(0xFF, 0x20), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0x30, 0x00), + _INIT_DCS_CMD(0xFF, 0x10), + _INIT_DCS_CMD(0xB9, 0x01), + _INIT_DCS_CMD(0xFF, 0x20), + _INIT_DCS_CMD(0x18, 0x40), + _INIT_DCS_CMD(0xFF, 0x10), + _INIT_DCS_CMD(0xB9, 0x02), + _INIT_DCS_CMD(0xFF, 0x10), + _INIT_DCS_CMD(0xFB, 0x01), + _INIT_DCS_CMD(0xBB, 0x13), + _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04), + _INIT_DCS_CMD(0x35, 0x00), + _INIT_DCS_CMD(0x51, 0x0F, 0xFF), + _INIT_DCS_CMD(0x53, 0x24), + _INIT_DELAY_CMD(100), + _INIT_DCS_CMD(0x11), + _INIT_DELAY_CMD(200), + _INIT_DCS_CMD(0x29), + _INIT_DELAY_CMD(100), + {}, +}; + static const struct panel_init_cmd boe_init_cmd[] = { _INIT_DELAY_CMD(24), _INIT_DCS_CMD(0xB0, 0x05), @@ -515,7 +1181,7 @@ static int boe_panel_unprepare(struct drm_panel *panel) regulator_disable(boe->pp3300); } else { gpiod_set_value(boe->enable_gpio, 0); - usleep_range(500, 1000); + usleep_range(1000, 2000); regulator_disable(boe->avee); regulator_disable(boe->avdd); usleep_range(5000, 7000); @@ -556,7 +1222,7 @@ static int boe_panel_prepare(struct drm_panel *panel) if (ret < 0) goto poweroffavdd;
- usleep_range(5000, 10000); + usleep_range(10000, 11000);
gpiod_set_value(boe->enable_gpio, 1); usleep_range(1000, 2000); @@ -593,6 +1259,64 @@ static int boe_panel_enable(struct drm_panel *panel) return 0; }
+static const struct drm_display_mode boe_tv110c9m_default_mode = { + .clock = 166594, + .hdisplay = 1200, + .hsync_start = 1200 + 40, + .hsync_end = 1200 + 40 + 8, + .htotal = 1200 + 40 + 8 + 28, + .vdisplay = 2000, + .vsync_start = 2000 + 26, + .vsync_end = 2000 + 26 + 2, + .vtotal = 2000 + 26 + 2 + 148, + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct panel_desc boe_tv110c9m_desc = { + .modes = &boe_tv110c9m_default_mode, + .bpc = 8, + .size = { + .width_mm = 143, + .height_mm = 238, + }, + .lanes = 4, + .format = MIPI_DSI_FMT_RGB888, + .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO + | MIPI_DSI_MODE_VIDEO_HSE + | MIPI_DSI_CLOCK_NON_CONTINUOUS + | MIPI_DSI_MODE_VIDEO_BURST, + .init_cmds = boe_tv110c9m_init_cmd, +}; + +static const struct drm_display_mode inx_hj110iz_default_mode = { + .clock = 166594, + .hdisplay = 1200, + .hsync_start = 1200 + 40, + .hsync_end = 1200 + 40 + 8, + .htotal = 1200 + 40 + 8 + 28, + .vdisplay = 2000, + .vsync_start = 2000 + 26, + .vsync_end = 2000 + 26 + 1, + .vtotal = 2000 + 26 + 1 + 149, + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct panel_desc inx_hj110iz_desc = { + .modes = &inx_hj110iz_default_mode, + .bpc = 8, + .size = { + .width_mm = 143, + .height_mm = 238, + }, + .lanes = 4, + .format = MIPI_DSI_FMT_RGB888, + .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO + | MIPI_DSI_MODE_VIDEO_HSE + | MIPI_DSI_CLOCK_NON_CONTINUOUS + | MIPI_DSI_MODE_VIDEO_BURST, + .init_cmds = inx_init_cmd, +}; + static const struct drm_display_mode boe_tv101wum_nl6_default_mode = { .clock = 159425, .hdisplay = 1200, @@ -881,6 +1605,12 @@ static const struct of_device_id boe_of_match[] = { { .compatible = "boe,tv105wum-nw0", .data = &boe_tv105wum_nw0_desc }, + { .compatible = "boe,tv110c9m-ll3", + .data = &boe_tv110c9m_desc + }, + { .compatible = "inx,hj110iz-01a", + .data = &inx_hj110iz_desc + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, boe_of_match);
Add bindings documentation for boe tv110c9m-ll3, inx hj110iz-01a panel.
Signed-off-by: yangcong yangcong5@huaqin.corp-partner.google.com Reviewed-by: Douglas Anderson dianders@chromium.org Acked-by: Rob Herring robh@kernel.org --- .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml index a7091ae0f791..45bd82931805 100644 --- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml +++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml @@ -26,6 +26,10 @@ properties: - auo,b101uan08.3 # BOE TV105WUM-NW0 10.5" WUXGA TFT LCD panel - boe,tv105wum-nw0 + # BOE TV110C9M-LL3 10.95" WUXGA TFT LCD panel + - boe,tv110c9m-ll3 + # INX HJ110IZ-01A 10.95" WUXGA TFT LCD panel + - inx,hj110iz-01a
reg: description: the virtual channel number of a DSI peripheral
Hi,
On Mon, Sep 13, 2021 at 8:23 PM yangcong yangcong5@huaqin.corp-partner.google.com wrote:
Compared to v5, squash this with patch #3 in the series in drm/panel: boe-tv101wum-nl6
yangcong (4): drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail dt-bindings: drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail drm/panel: support for BOE and INX video mode panel dt-bindings: boe, tv101wum-n16: Add compatible for boe tv110c9m-ll3 and inx hj110iz-01a
.../display/panel/boe,tv101wum-nl6.yaml | 7 + .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 745 +++++++++++++++++- 2 files changed, 750 insertions(+), 2 deletions(-)
Still seems OK to me and you carried my Reviewed-by over which is fine with me.
Just to give others time to chime in, I'll reset my snooze and wait another couple weeks. If I don't hear anything then I'll work on landing.
-Doug
Hi,
On Tue, Sep 14, 2021 at 9:26 AM Doug Anderson dianders@google.com wrote:
Hi,
On Mon, Sep 13, 2021 at 8:23 PM yangcong yangcong5@huaqin.corp-partner.google.com wrote:
Compared to v5, squash this with patch #3 in the series in drm/panel: boe-tv101wum-nl6
yangcong (4): drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail dt-bindings: drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail drm/panel: support for BOE and INX video mode panel dt-bindings: boe, tv101wum-n16: Add compatible for boe tv110c9m-ll3 and inx hj110iz-01a
.../display/panel/boe,tv101wum-nl6.yaml | 7 + .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 745 +++++++++++++++++- 2 files changed, 750 insertions(+), 2 deletions(-)
Still seems OK to me and you carried my Reviewed-by over which is fine with me.
Just to give others time to chime in, I'll reset my snooze and wait another couple weeks. If I don't hear anything then I'll work on landing.
OK, my snooze came back and nobody said anything. As promised I've pushed to drm-misc-next:
93ee1a2c0f08 drm/panel: support for BOE and INX video mode panel 76d364d81b55 dt-bindings: boe, tv101wum-n16: Add compatible for boe tv110c9m-ll3 and inx hj110iz-01a 18c58153b8c6 drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail c43da06c24a4 dt-bindings: drm/panel: boe-tv101wum-nl6: Support enabling a 3.3V rail
I made some small changes when applying and I've noted them in the commit messages. Summary here:
1. In the compatible string "inx," should have been "innolux,". The later is what's documented for Innolux in:
Documentation/devicetree/bindings/vendor-prefixes.yaml
...neither Rob nor I noticed at review time but dim apply-branch yelled and it was obvious what the fix was. I kept Rob's Ack in place.
2. I swapped the order of bindings and code. Bindings are supposed to land first.
3. I fixed two whitespace issues (removed blank lines) as reported by dim apply-branch.
-Doug
dri-devel@lists.freedesktop.org
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Doug Anderson -
yangcong