Hi Inki, Krzysztof,
This patchset adds support for Exynos 5433 HDMI. There are also few preparation/cleanup patches. All patches except one touch only exynos-drm. Sixth patch adds binding properties for Exynos5433 HDMI, Krzysztof could you look at it.
The patchset is based on exynos-drm-next.
Regards Andrzej
Andrzej Hajda (7): drm/exynos/hdmi: clock code re-factoring drm/exynos/hdmi: constify global variables drm/exynos/hdmi: use array specifier for HDMI-PHY configurations drm/exynos/hdmi: code cleanup drm/exynos/hdmi: stop programming registers with default values dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant drm/exynos/hdmi: add Exynos5433 support
.../devicetree/bindings/video/exynos_hdmi.txt | 27 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 454 +++++++++++++++------ drivers/gpu/drm/exynos/regs-hdmi.h | 9 +- 3 files changed, 352 insertions(+), 138 deletions(-)
With incoming support for newer SoCs different set of clocks will be required, depending on IP version. The patch prepares the driver for it.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com --- drivers/gpu/drm/exynos/exynos_hdmi.c | 184 ++++++++++++++++++++++++++--------- 1 file changed, 137 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 57b6755..d720b77 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -90,11 +90,24 @@ static const char * const supply[] = { "vdd_pll", };
+struct string_array_spec { + int count; + const char * const *data; +}; + +#define INIT_ARRAY_SPEC(a) { .count = ARRAY_SIZE(a), .data = a } + struct hdmi_driver_data { unsigned int type; const struct hdmiphy_config *phy_confs; unsigned int phy_conf_count; unsigned int is_apb_phy:1; + struct string_array_spec clk_gates; + /* + * Array of triplets (p_off, p_on, clock), where p_off and p_on are + * required parents of clock when HDMI-PHY is respectively off or on. + */ + struct string_array_spec clk_muxes; };
struct hdmi_context { @@ -116,11 +129,8 @@ struct hdmi_context { struct gpio_desc *hpd_gpio; int irq; struct regmap *pmureg; - struct clk *hdmi; - struct clk *sclk_hdmi; - struct clk *sclk_pixel; - struct clk *sclk_hdmiphy; - struct clk *mout_hdmi; + struct clk **clk_gates; + struct clk **clk_muxes; struct regulator_bulk_data regul_bulk[ARRAY_SIZE(supply)]; struct regulator *reg_hdmi_en; }; @@ -501,11 +511,21 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = { }, };
+static const char *hdmi_clk_gates4[] = { + "hdmi", "sclk_hdmi" +}; + +static const char *hdmi_clk_muxes4[] = { + "sclk_pixel", "sclk_hdmiphy", "mout_hdmi" +}; + static struct hdmi_driver_data exynos5420_hdmi_driver_data = { .type = HDMI_TYPE14, .phy_confs = hdmiphy_5420_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs), .is_apb_phy = 1, + .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), + .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
static struct hdmi_driver_data exynos4212_hdmi_driver_data = { @@ -513,6 +533,8 @@ static struct hdmi_driver_data exynos4212_hdmi_driver_data = { .phy_confs = hdmiphy_v14_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs), .is_apb_phy = 0, + .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), + .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
static struct hdmi_driver_data exynos4210_hdmi_driver_data = { @@ -520,6 +542,8 @@ static struct hdmi_driver_data exynos4210_hdmi_driver_data = { .phy_confs = hdmiphy_v13_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs), .is_apb_phy = 0, + .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), + .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id) @@ -847,6 +871,54 @@ static void hdmi_regs_dump(struct hdmi_context *hdata, char *prefix) hdmi_v14_regs_dump(hdata, prefix); }
+static int hdmi_clk_enable_gates(struct hdmi_context *hdata) +{ + int i, ret; + + for (i = 0; i < hdata->drv_data->clk_gates.count; ++i) { + ret = clk_prepare_enable(hdata->clk_gates[i]); + if (!ret) + continue; + + dev_err(hdata->dev, "Cannot enable clock '%s', %d\n", + hdata->drv_data->clk_gates.data[i], ret); + while (i--) + clk_disable_unprepare(hdata->clk_gates[i]); + return ret; + } + + return 0; +} + +static void hdmi_clk_disable_gates(struct hdmi_context *hdata) +{ + int i = hdata->drv_data->clk_gates.count; + + while (i--) + clk_disable_unprepare(hdata->clk_gates[i]); +} + +static int hdmi_clk_set_parents(struct hdmi_context *hdata, bool to_phy) +{ + struct device *dev = hdata->dev; + int ret = 0; + int i; + + for (i = 0; i < hdata->drv_data->clk_muxes.count; i += 3) { + struct clk **c = &hdata->clk_muxes[i]; + + ret = clk_set_parent(c[2], c[to_phy]); + if (!ret) + continue; + + dev_err(dev, "Cannot set clock parent of '%s' to '%s', %d\n", + hdata->drv_data->clk_muxes.data[i + 2], + hdata->drv_data->clk_muxes.data[i + to_phy], ret); + } + + return ret; +} + static u8 hdmi_chksum(struct hdmi_context *hdata, u32 start, u8 len, u32 hdr_sum) { @@ -1509,7 +1581,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
hdmiphy_wait_for_pll(hdata);
- clk_set_parent(hdata->mout_hdmi, hdata->sclk_hdmiphy); + hdmi_clk_set_parents(hdata, true);
/* enable HDMI and timing generator */ hdmi_start(hdata, true); @@ -1517,7 +1589,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
static void hdmiphy_conf_reset(struct hdmi_context *hdata) { - clk_set_parent(hdata->mout_hdmi, hdata->sclk_pixel); + hdmi_clk_set_parents(hdata, false);
/* reset hdmiphy */ hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT); @@ -1599,8 +1671,7 @@ static void hdmi_enable(struct drm_encoder *encoder) regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, PMU_HDMI_PHY_ENABLE_BIT, 1);
- clk_prepare_enable(hdata->hdmi); - clk_prepare_enable(hdata->sclk_hdmi); + hdmi_clk_enable_gates(hdata);
hdmi_conf_apply(hdata); } @@ -1633,8 +1704,7 @@ static void hdmi_disable(struct drm_encoder *encoder)
cancel_delayed_work(&hdata->hotplug_work);
- clk_disable_unprepare(hdata->sclk_hdmi); - clk_disable_unprepare(hdata->hdmi); + hdmi_clk_disable_gates(hdata);
/* reset pmu hdmiphy control bit to disable hdmiphy */ regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, @@ -1678,6 +1748,56 @@ static irqreturn_t hdmi_irq_thread(int irq, void *arg) return IRQ_HANDLED; }
+static int hdmi_clks_get(struct hdmi_context *hdata, + const struct string_array_spec *names, + struct clk **clks) +{ + struct device *dev = hdata->dev; + int i; + + for (i = 0; i < names->count; ++i) { + struct clk *clk = devm_clk_get(dev, names->data[i]); + + if (IS_ERR(clk)) { + int ret = PTR_ERR(clk); + + dev_err(dev, "Cannot get clock %s, %d\n", + names->data[i], ret); + + return ret; + } + + clks[i] = clk; + } + + return 0; +} + +static int hdmi_clk_init(struct hdmi_context *hdata) +{ + const struct hdmi_driver_data *drv_data = hdata->drv_data; + int count = drv_data->clk_gates.count + drv_data->clk_muxes.count; + struct device *dev = hdata->dev; + struct clk **clks; + int ret; + + if (!count) + return 0; + + clks = devm_kzalloc(dev, sizeof(*clks) * count, GFP_KERNEL); + if (!clks) + return -ENOMEM; + + hdata->clk_gates = clks; + hdata->clk_muxes = clks + drv_data->clk_gates.count; + + ret = hdmi_clks_get(hdata, &drv_data->clk_gates, hdata->clk_gates); + if (ret) + return ret; + + return hdmi_clks_get(hdata, &drv_data->clk_muxes, hdata->clk_muxes); +} + static int hdmi_resources_init(struct hdmi_context *hdata) { struct device *dev = hdata->dev; @@ -1694,41 +1814,14 @@ static int hdmi_resources_init(struct hdmi_context *hdata) hdata->irq = gpiod_to_irq(hdata->hpd_gpio); if (hdata->irq < 0) { DRM_ERROR("failed to get GPIO irq\n"); - return hdata->irq; - } - /* get clocks, power */ - hdata->hdmi = devm_clk_get(dev, "hdmi"); - if (IS_ERR(hdata->hdmi)) { - DRM_ERROR("failed to get clock 'hdmi'\n"); - ret = PTR_ERR(hdata->hdmi); - goto fail; - } - hdata->sclk_hdmi = devm_clk_get(dev, "sclk_hdmi"); - if (IS_ERR(hdata->sclk_hdmi)) { - DRM_ERROR("failed to get clock 'sclk_hdmi'\n"); - ret = PTR_ERR(hdata->sclk_hdmi); - goto fail; - } - hdata->sclk_pixel = devm_clk_get(dev, "sclk_pixel"); - if (IS_ERR(hdata->sclk_pixel)) { - DRM_ERROR("failed to get clock 'sclk_pixel'\n"); - ret = PTR_ERR(hdata->sclk_pixel); - goto fail; - } - hdata->sclk_hdmiphy = devm_clk_get(dev, "sclk_hdmiphy"); - if (IS_ERR(hdata->sclk_hdmiphy)) { - DRM_ERROR("failed to get clock 'sclk_hdmiphy'\n"); - ret = PTR_ERR(hdata->sclk_hdmiphy); - goto fail; - } - hdata->mout_hdmi = devm_clk_get(dev, "mout_hdmi"); - if (IS_ERR(hdata->mout_hdmi)) { - DRM_ERROR("failed to get clock 'mout_hdmi'\n"); - ret = PTR_ERR(hdata->mout_hdmi); - goto fail; + return hdata->irq; }
- clk_set_parent(hdata->mout_hdmi, hdata->sclk_pixel); + ret = hdmi_clk_init(hdata); + if (ret) + return ret; + + hdmi_clk_set_parents(hdata, false);
for (i = 0; i < ARRAY_SIZE(supply); ++i) { hdata->regul_bulk[i].supply = supply[i]; @@ -1753,9 +1846,6 @@ static int hdmi_resources_init(struct hdmi_context *hdata) DRM_ERROR("failed to enable hdmi-en regulator\n");
return ret; -fail: - DRM_ERROR("HDMI resource init - failed\n"); - return ret; }
static struct of_device_id hdmi_match_types[] = {
2015년 11월 02일 22:16에 Andrzej Hajda 이(가) 쓴 글:
With incoming support for newer SoCs different set of clocks will be required, depending on IP version. The patch prepares the driver for it.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com
drivers/gpu/drm/exynos/exynos_hdmi.c | 184 ++++++++++++++++++++++++++--------- 1 file changed, 137 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 57b6755..d720b77 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -90,11 +90,24 @@ static const char * const supply[] = { "vdd_pll", };
+struct string_array_spec {
- int count;
- const char * const *data;
+};
+#define INIT_ARRAY_SPEC(a) { .count = ARRAY_SIZE(a), .data = a }
struct hdmi_driver_data { unsigned int type; const struct hdmiphy_config *phy_confs; unsigned int phy_conf_count; unsigned int is_apb_phy:1;
- struct string_array_spec clk_gates;
- /*
* Array of triplets (p_off, p_on, clock), where p_off and p_on are* required parents of clock when HDMI-PHY is respectively off or on.*/- struct string_array_spec clk_muxes;
};
struct hdmi_context { @@ -116,11 +129,8 @@ struct hdmi_context { struct gpio_desc *hpd_gpio; int irq; struct regmap *pmureg;
- struct clk *hdmi;
- struct clk *sclk_hdmi;
- struct clk *sclk_pixel;
- struct clk *sclk_hdmiphy;
- struct clk *mout_hdmi;
- struct clk **clk_gates;
- struct clk **clk_muxes; struct regulator_bulk_data regul_bulk[ARRAY_SIZE(supply)]; struct regulator *reg_hdmi_en;
}; @@ -501,11 +511,21 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = { }, };
+static const char *hdmi_clk_gates4[] = {
- "hdmi", "sclk_hdmi"
+};
+static const char *hdmi_clk_muxes4[] = {
- "sclk_pixel", "sclk_hdmiphy", "mout_hdmi"
+};
static struct hdmi_driver_data exynos5420_hdmi_driver_data = { .type = HDMI_TYPE14, .phy_confs = hdmiphy_5420_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs), .is_apb_phy = 1,
- .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4),
- .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
};
static struct hdmi_driver_data exynos4212_hdmi_driver_data = { @@ -513,6 +533,8 @@ static struct hdmi_driver_data exynos4212_hdmi_driver_data = { .phy_confs = hdmiphy_v14_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs), .is_apb_phy = 0,
- .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4),
- .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
};
static struct hdmi_driver_data exynos4210_hdmi_driver_data = { @@ -520,6 +542,8 @@ static struct hdmi_driver_data exynos4210_hdmi_driver_data = { .phy_confs = hdmiphy_v13_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs), .is_apb_phy = 0,
- .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4),
- .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
};
static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id) @@ -847,6 +871,54 @@ static void hdmi_regs_dump(struct hdmi_context *hdata, char *prefix) hdmi_v14_regs_dump(hdata, prefix); }
+static int hdmi_clk_enable_gates(struct hdmi_context *hdata) +{
- int i, ret;
- for (i = 0; i < hdata->drv_data->clk_gates.count; ++i) {
ret = clk_prepare_enable(hdata->clk_gates[i]);if (!ret)continue;dev_err(hdata->dev, "Cannot enable clock '%s', %d\n",hdata->drv_data->clk_gates.data[i], ret);while (i--)clk_disable_unprepare(hdata->clk_gates[i]);return ret;- }
- return 0;
+}
+static void hdmi_clk_disable_gates(struct hdmi_context *hdata) +{
- int i = hdata->drv_data->clk_gates.count;
- while (i--)
clk_disable_unprepare(hdata->clk_gates[i]);+}
+static int hdmi_clk_set_parents(struct hdmi_context *hdata, bool to_phy) +{
- struct device *dev = hdata->dev;
- int ret = 0;
- int i;
- for (i = 0; i < hdata->drv_data->clk_muxes.count; i += 3) {
struct clk **c = &hdata->clk_muxes[i];ret = clk_set_parent(c[2], c[to_phy]);if (!ret)continue;dev_err(dev, "Cannot set clock parent of '%s' to '%s', %d\n",hdata->drv_data->clk_muxes.data[i + 2],hdata->drv_data->clk_muxes.data[i + to_phy], ret);- }
- return ret;
+}
static u8 hdmi_chksum(struct hdmi_context *hdata, u32 start, u8 len, u32 hdr_sum) { @@ -1509,7 +1581,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
hdmiphy_wait_for_pll(hdata);
- clk_set_parent(hdata->mout_hdmi, hdata->sclk_hdmiphy);
hdmi_clk_set_parents(hdata, true);
/* enable HDMI and timing generator */ hdmi_start(hdata, true);
@@ -1517,7 +1589,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
static void hdmiphy_conf_reset(struct hdmi_context *hdata) {
- clk_set_parent(hdata->mout_hdmi, hdata->sclk_pixel);
hdmi_clk_set_parents(hdata, false);
/* reset hdmiphy */ hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
@@ -1599,8 +1671,7 @@ static void hdmi_enable(struct drm_encoder *encoder) regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, PMU_HDMI_PHY_ENABLE_BIT, 1);
- clk_prepare_enable(hdata->hdmi);
- clk_prepare_enable(hdata->sclk_hdmi);
hdmi_clk_enable_gates(hdata);
hdmi_conf_apply(hdata);
} @@ -1633,8 +1704,7 @@ static void hdmi_disable(struct drm_encoder *encoder)
cancel_delayed_work(&hdata->hotplug_work);
- clk_disable_unprepare(hdata->sclk_hdmi);
- clk_disable_unprepare(hdata->hdmi);
hdmi_clk_disable_gates(hdata);
/* reset pmu hdmiphy control bit to disable hdmiphy */ regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
@@ -1678,6 +1748,56 @@ static irqreturn_t hdmi_irq_thread(int irq, void *arg) return IRQ_HANDLED; }
+static int hdmi_clks_get(struct hdmi_context *hdata,
const struct string_array_spec *names,struct clk **clks)+{
- struct device *dev = hdata->dev;
- int i;
- for (i = 0; i < names->count; ++i) {
struct clk *clk = devm_clk_get(dev, names->data[i]);if (IS_ERR(clk)) {int ret = PTR_ERR(clk);dev_err(dev, "Cannot get clock %s, %d\n",names->data[i], ret);return ret;}clks[i] = clk;- }
- return 0;
+}
+static int hdmi_clk_init(struct hdmi_context *hdata) +{
- const struct hdmi_driver_data *drv_data = hdata->drv_data;
- int count = drv_data->clk_gates.count + drv_data->clk_muxes.count;
- struct device *dev = hdata->dev;
- struct clk **clks;
- int ret;
- if (!count)
return 0;- clks = devm_kzalloc(dev, sizeof(*clks) * count, GFP_KERNEL);
- if (!clks)
- return -ENOMEM;
- hdata->clk_gates = clks;
- hdata->clk_muxes = clks + drv_data->clk_gates.count;
- ret = hdmi_clks_get(hdata, &drv_data->clk_gates, hdata->clk_gates);
- if (ret)
return ret;- return hdmi_clks_get(hdata, &drv_data->clk_muxes, hdata->clk_muxes);
+}
static int hdmi_resources_init(struct hdmi_context *hdata) { struct device *dev = hdata->dev; @@ -1694,41 +1814,14 @@ static int hdmi_resources_init(struct hdmi_context *hdata) hdata->irq = gpiod_to_irq(hdata->hpd_gpio); if (hdata->irq < 0) { DRM_ERROR("failed to get GPIO irq\n");
return hdata->irq;- }
- /* get clocks, power */
- hdata->hdmi = devm_clk_get(dev, "hdmi");
- if (IS_ERR(hdata->hdmi)) {
DRM_ERROR("failed to get clock 'hdmi'\n");ret = PTR_ERR(hdata->hdmi);goto fail;- }
- hdata->sclk_hdmi = devm_clk_get(dev, "sclk_hdmi");
- if (IS_ERR(hdata->sclk_hdmi)) {
DRM_ERROR("failed to get clock 'sclk_hdmi'\n");ret = PTR_ERR(hdata->sclk_hdmi);goto fail;- }
- hdata->sclk_pixel = devm_clk_get(dev, "sclk_pixel");
- if (IS_ERR(hdata->sclk_pixel)) {
DRM_ERROR("failed to get clock 'sclk_pixel'\n");ret = PTR_ERR(hdata->sclk_pixel);goto fail;- }
- hdata->sclk_hdmiphy = devm_clk_get(dev, "sclk_hdmiphy");
- if (IS_ERR(hdata->sclk_hdmiphy)) {
DRM_ERROR("failed to get clock 'sclk_hdmiphy'\n");ret = PTR_ERR(hdata->sclk_hdmiphy);goto fail;- }
- hdata->mout_hdmi = devm_clk_get(dev, "mout_hdmi");
- if (IS_ERR(hdata->mout_hdmi)) {
DRM_ERROR("failed to get clock 'mout_hdmi'\n");ret = PTR_ERR(hdata->mout_hdmi);goto fail;
return hdata->irq;
- clk_set_parent(hdata->mout_hdmi, hdata->sclk_pixel);
- ret = hdmi_clk_init(hdata);
- if (ret)
return ret;- hdmi_clk_set_parents(hdata, false);
You should check return type but I can fix it.
Thanks, Inki Dae
for (i = 0; i < ARRAY_SIZE(supply); ++i) { hdata->regul_bulk[i].supply = supply[i]; @@ -1753,9 +1846,6 @@ static int hdmi_resources_init(struct hdmi_context *hdata) DRM_ERROR("failed to enable hdmi-en regulator\n");
return ret; -fail:
- DRM_ERROR("HDMI resource init - failed\n");
- return ret;
}
static struct of_device_id hdmi_match_types[] = {
These variables should not be modified.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com --- drivers/gpu/drm/exynos/exynos_hdmi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index d720b77..3b92d87 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -511,15 +511,15 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = { }, };
-static const char *hdmi_clk_gates4[] = { +static const char * const hdmi_clk_gates4[] = { "hdmi", "sclk_hdmi" };
-static const char *hdmi_clk_muxes4[] = { +static const char * const hdmi_clk_muxes4[] = { "sclk_pixel", "sclk_hdmiphy", "mout_hdmi" };
-static struct hdmi_driver_data exynos5420_hdmi_driver_data = { +static const struct hdmi_driver_data exynos5420_hdmi_driver_data = { .type = HDMI_TYPE14, .phy_confs = hdmiphy_5420_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs), @@ -528,7 +528,7 @@ static struct hdmi_driver_data exynos5420_hdmi_driver_data = { .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
-static struct hdmi_driver_data exynos4212_hdmi_driver_data = { +static const struct hdmi_driver_data exynos4212_hdmi_driver_data = { .type = HDMI_TYPE14, .phy_confs = hdmiphy_v14_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs), @@ -537,7 +537,7 @@ static struct hdmi_driver_data exynos4212_hdmi_driver_data = { .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
-static struct hdmi_driver_data exynos4210_hdmi_driver_data = { +static const struct hdmi_driver_data exynos4210_hdmi_driver_data = { .type = HDMI_TYPE13, .phy_confs = hdmiphy_v13_configs, .phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs),
HDMI-PHY configurations are stored as array pointer and count pair, we can re-use existing helpers to simplify their initialization.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com --- drivers/gpu/drm/exynos/exynos_hdmi.c | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 3b92d87..5ff68db 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -90,6 +90,16 @@ static const char * const supply[] = { "vdd_pll", };
+struct hdmiphy_config { + int pixel_clock; + u8 conf[32]; +}; + +struct hdmiphy_configs { + int count; + const struct hdmiphy_config *data; +}; + struct string_array_spec { int count; const char * const *data; @@ -99,9 +109,8 @@ struct string_array_spec {
struct hdmi_driver_data { unsigned int type; - const struct hdmiphy_config *phy_confs; - unsigned int phy_conf_count; unsigned int is_apb_phy:1; + struct hdmiphy_configs phy_confs; struct string_array_spec clk_gates; /* * Array of triplets (p_off, p_on, clock), where p_off and p_on are @@ -145,11 +154,6 @@ static inline struct hdmi_context *connector_to_hdmi(struct drm_connector *c) return container_of(c, struct hdmi_context, connector); }
-struct hdmiphy_config { - int pixel_clock; - u8 conf[32]; -}; - /* list of phy config settings */ static const struct hdmiphy_config hdmiphy_v13_configs[] = { { @@ -521,27 +525,24 @@ static const char * const hdmi_clk_muxes4[] = {
static const struct hdmi_driver_data exynos5420_hdmi_driver_data = { .type = HDMI_TYPE14, - .phy_confs = hdmiphy_5420_configs, - .phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs), .is_apb_phy = 1, + .phy_confs = INIT_ARRAY_SPEC(hdmiphy_5420_configs), .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
static const struct hdmi_driver_data exynos4212_hdmi_driver_data = { .type = HDMI_TYPE14, - .phy_confs = hdmiphy_v14_configs, - .phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs), .is_apb_phy = 0, + .phy_confs = INIT_ARRAY_SPEC(hdmiphy_v14_configs), .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
static const struct hdmi_driver_data exynos4210_hdmi_driver_data = { .type = HDMI_TYPE13, - .phy_confs = hdmiphy_v13_configs, - .phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs), .is_apb_phy = 0, + .phy_confs = INIT_ARRAY_SPEC(hdmiphy_v13_configs), .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), }; @@ -1067,10 +1068,11 @@ static int hdmi_get_modes(struct drm_connector *connector)
static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock) { + const struct hdmiphy_configs *confs = &hdata->drv_data->phy_confs; int i;
- for (i = 0; i < hdata->drv_data->phy_conf_count; i++) - if (hdata->drv_data->phy_confs[i].pixel_clock == pixel_clock) + for (i = 0; i < confs->count; i++) + if (confs->data[i].pixel_clock == pixel_clock) return i;
DRM_DEBUG_KMS("Could not find phy config for %d\n", pixel_clock); @@ -1611,7 +1613,7 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata) }
ret = hdmiphy_reg_write_buf(hdata, 0, - hdata->drv_data->phy_confs[i].conf, 32); + hdata->drv_data->phy_confs.data[i].conf, 32); if (ret) { DRM_ERROR("failed to configure hdmiphy\n"); return;
The patch performs following clean-ups: - remove unnecessary white spaces, - remove obvious comments, - fix tabulations, - remove NULL initializators, - re-order driver data.
The patch does not change driver's behavior.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com --- drivers/gpu/drm/exynos/exynos_hdmi.c | 79 ++++++++++++------------------------ 1 file changed, 26 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 5ff68db..13eea02 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -7,9 +7,9 @@ * * Based on drivers/media/video/s5p-tv/hdmi_drv.c * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * */ @@ -49,14 +49,16 @@
/* AVI header and aspect ratio */ #define HDMI_AVI_VERSION 0x02 -#define HDMI_AVI_LENGTH 0x0D +#define HDMI_AVI_LENGTH 0x0d
/* AUI header info */ -#define HDMI_AUI_VERSION 0x01 -#define HDMI_AUI_LENGTH 0x0A -#define AVI_SAME_AS_PIC_ASPECT_RATIO 0x8 -#define AVI_4_3_CENTER_RATIO 0x9 -#define AVI_16_9_CENTER_RATIO 0xa +#define HDMI_AUI_VERSION 0x01 +#define HDMI_AUI_LENGTH 0x0a + +/* AVI active format aspect ratio */ +#define AVI_SAME_AS_PIC_ASPECT_RATIO 0x08 +#define AVI_4_3_CENTER_RATIO 0x09 +#define AVI_16_9_CENTER_RATIO 0x0a
enum hdmi_type { HDMI_TYPE13, @@ -154,7 +156,6 @@ static inline struct hdmi_context *connector_to_hdmi(struct drm_connector *c) return container_of(c, struct hdmi_context, connector); }
-/* list of phy config settings */ static const struct hdmiphy_config hdmiphy_v13_configs[] = { { .pixel_clock = 27000000, @@ -523,26 +524,24 @@ static const char * const hdmi_clk_muxes4[] = { "sclk_pixel", "sclk_hdmiphy", "mout_hdmi" };
-static const struct hdmi_driver_data exynos5420_hdmi_driver_data = { - .type = HDMI_TYPE14, - .is_apb_phy = 1, - .phy_confs = INIT_ARRAY_SPEC(hdmiphy_5420_configs), +static const struct hdmi_driver_data exynos4210_hdmi_driver_data = { + .type = HDMI_TYPE13, + .phy_confs = INIT_ARRAY_SPEC(hdmiphy_v13_configs), .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
static const struct hdmi_driver_data exynos4212_hdmi_driver_data = { .type = HDMI_TYPE14, - .is_apb_phy = 0, .phy_confs = INIT_ARRAY_SPEC(hdmiphy_v14_configs), .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
-static const struct hdmi_driver_data exynos4210_hdmi_driver_data = { - .type = HDMI_TYPE13, - .is_apb_phy = 0, - .phy_confs = INIT_ARRAY_SPEC(hdmiphy_v13_configs), +static const struct hdmi_driver_data exynos5420_hdmi_driver_data = { + .type = HDMI_TYPE14, + .is_apb_phy = 1, + .phy_confs = INIT_ARRAY_SPEC(hdmiphy_5420_configs), .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates4), .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), }; @@ -1154,13 +1153,11 @@ static bool hdmi_mode_fixup(struct drm_encoder *encoder,
mode_ok = hdmi_mode_valid(connector, adjusted_mode);
- /* just return if user desired mode exists. */ if (mode_ok == MODE_OK) return true;
/* - * otherwise, find the most suitable mode among modes and change it - * to adjusted_mode. + * Find the most suitable mode and copy it to adjusted_mode. */ list_for_each_entry(m, &connector->modes, head) { mode_ok = hdmi_mode_valid(connector, m); @@ -1205,15 +1202,15 @@ static void hdmi_audio_init(struct hdmi_context *hdata) switch (bits_per_sample) { case 20: data_num = 2; - bit_ch = 1; + bit_ch = 1; break; case 24: data_num = 3; - bit_ch = 1; + bit_ch = 1; break; default: data_num = 1; - bit_ch = 0; + bit_ch = 0; break; }
@@ -1306,13 +1303,12 @@ static void hdmi_conf_init(struct hdmi_context *hdata) /* choose HDMI mode */ hdmi_reg_writemask(hdata, HDMI_MODE_SEL, HDMI_MODE_HDMI_EN, HDMI_MODE_MASK); - /* Apply Video preable and Guard band in HDMI mode only */ + /* apply video pre-amble and guard band in HDMI mode only */ hdmi_reg_writeb(hdata, HDMI_CON_2, 0); /* disable bluescreen */ hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_BLUE_SCR_EN);
if (hdata->dvi_mode) { - /* choose DVI mode */ hdmi_reg_writemask(hdata, HDMI_MODE_SEL, HDMI_MODE_DVI_EN, HDMI_MODE_MASK); hdmi_reg_writeb(hdata, HDMI_CON_2, @@ -1384,7 +1380,7 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
val = (m->hsync_start - m->hdisplay - 2); val |= ((m->hsync_end - m->hdisplay - 2) << 10); - val |= ((m->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0)<<20; + val |= ((m->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0)<<20; hdmi_reg_writev(hdata, HDMI_V13_H_SYNC_GEN_0, 3, val);
/* @@ -1395,7 +1391,6 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
/* Following values & calculations differ for different type of modes */ if (m->flags & DRM_MODE_FLAG_INTERLACE) { - /* Interlaced Mode */ val = ((m->vsync_end - m->vdisplay) / 2); val |= ((m->vsync_start - m->vdisplay) / 2) << 12; hdmi_reg_writev(hdata, HDMI_V13_V_SYNC_GEN_1_0, 3, val); @@ -1424,8 +1419,6 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2, 0x249); } else { - /* Progressive Mode */ - val = m->vtotal; val |= (m->vtotal - m->vdisplay) << 11; hdmi_reg_writev(hdata, HDMI_V13_V_BLANK_0, 3, val); @@ -1444,7 +1437,6 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2, 0x248); }
- /* Timing generator registers */ hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal); hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); @@ -1466,7 +1458,7 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_V_LINE_0, 2, m->vtotal); hdmi_reg_writev(hdata, HDMI_H_LINE_0, 2, m->htotal); hdmi_reg_writev(hdata, HDMI_HSYNC_POL, 1, - (m->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0); + (m->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0); hdmi_reg_writev(hdata, HDMI_VSYNC_POL, 1, (m->flags & DRM_MODE_FLAG_NVSYNC) ? 1 : 0); hdmi_reg_writev(hdata, HDMI_INT_PRO_MODE, 1, @@ -1480,7 +1472,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata)
/* Following values & calculations differ for different type of modes */ if (m->flags & DRM_MODE_FLAG_INTERLACE) { - /* Interlaced Mode */ hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_2_0, 2, (m->vsync_end - m->vdisplay) / 2); hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_1_0, 2, @@ -1513,7 +1504,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_TG_VACT_ST3_L, 2, 0x0); hdmi_reg_writev(hdata, HDMI_TG_VACT_ST4_L, 2, 0x0); } else { - /* Progressive Mode */ hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_2_0, 2, m->vsync_end - m->vdisplay); hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_BEF_1_0, 2, @@ -1538,7 +1528,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_TG_FIELD_BOT_HDMI_L, 2, 0x233); }
- /* Following values & calculations are same irrespective of mode type */ hdmi_reg_writev(hdata, HDMI_H_SYNC_START_0, 2, m->hsync_start - m->hdisplay - 2); hdmi_reg_writev(hdata, HDMI_H_SYNC_END_0, 2, @@ -1562,7 +1551,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_5_0, 2, 0xffff); hdmi_reg_writev(hdata, HDMI_V_SYNC_LINE_AFT_PXL_6_0, 2, 0xffff);
- /* Timing generator registers */ hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal); hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); @@ -1582,10 +1570,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata) hdmi_v14_mode_apply(hdata);
hdmiphy_wait_for_pll(hdata); - hdmi_clk_set_parents(hdata, true); - - /* enable HDMI and timing generator */ hdmi_start(hdata, true); }
@@ -1593,10 +1578,9 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) { hdmi_clk_set_parents(hdata, false);
- /* reset hdmiphy */ hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT); usleep_range(10000, 12000); - hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT); + hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT); usleep_range(10000, 12000); }
@@ -1605,7 +1589,6 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata) int ret; int i;
- /* pixel clock */ i = hdmi_find_phy_conf(hdata, hdata->current_mode.clock * 1000); if (i < 0) { DRM_ERROR("failed to find hdmiphy conf\n"); @@ -1626,16 +1609,11 @@ static void hdmi_conf_apply(struct hdmi_context *hdata) { hdmiphy_conf_reset(hdata); hdmiphy_conf_apply(hdata); - hdmi_start(hdata, false); hdmi_conf_init(hdata); - hdmi_audio_init(hdata); - - /* setting core registers */ hdmi_mode_apply(hdata); hdmi_audio_control(hdata, true); - hdmi_regs_dump(hdata, "start"); }
@@ -1669,7 +1647,6 @@ static void hdmi_enable(struct drm_encoder *encoder) if (regulator_bulk_enable(ARRAY_SIZE(supply), hdata->regul_bulk)) DRM_DEBUG_KMS("failed to enable regulator bulk\n");
- /* set pmu hdmiphy control bit to enable hdmiphy */ regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, PMU_HDMI_PHY_ENABLE_BIT, 1);
@@ -1701,14 +1678,12 @@ static void hdmi_disable(struct drm_encoder *encoder) if (funcs && funcs->disable) (*funcs->disable)(crtc);
- /* HDMI System Disable */ hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_EN);
cancel_delayed_work(&hdata->hotplug_work);
hdmi_clk_disable_gates(hdata);
- /* reset pmu hdmiphy control bit to disable hdmiphy */ regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, PMU_HDMI_PHY_ENABLE_BIT, 0);
@@ -1967,7 +1942,6 @@ static int hdmi_probe(struct platform_device *pdev) if (ddc_node) goto out_get_ddc_adpt;
- /* DDC i2c driver */ ddc_node = of_parse_phandle(dev->of_node, "ddc", 0); if (!ddc_node) { DRM_ERROR("Failed to find ddc node in device tree\n"); @@ -1985,7 +1959,6 @@ out_get_ddc_adpt: if (phy_node) goto out_get_phy_port;
- /* hdmiphy i2c driver */ phy_node = of_parse_phandle(dev->of_node, "phy", 0); if (!phy_node) { DRM_ERROR("Failed to find hdmiphy node in device tree\n");
There is no point in rewriting default values, as the IP is reset anyway.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com --- drivers/gpu/drm/exynos/exynos_hdmi.c | 19 ------------------- 1 file changed, 19 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 13eea02..e44e2f6 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -1434,20 +1434,12 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2, m->vtotal - m->vdisplay); hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay); - hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2, 0x248); }
hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal); hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal); - hdmi_reg_writev(hdata, HDMI_TG_VSYNC_L, 2, 0x1); - hdmi_reg_writev(hdata, HDMI_TG_VSYNC2_L, 2, 0x233); - hdmi_reg_writev(hdata, HDMI_TG_FIELD_CHG_L, 2, 0x233); - hdmi_reg_writev(hdata, HDMI_TG_VSYNC_TOP_HDMI_L, 2, 0x1); - hdmi_reg_writev(hdata, HDMI_TG_VSYNC_BOT_HDMI_L, 2, 0x233); - hdmi_reg_writev(hdata, HDMI_TG_FIELD_TOP_HDMI_L, 2, 0x1); - hdmi_reg_writev(hdata, HDMI_TG_FIELD_BOT_HDMI_L, 2, 0x233); }
static void hdmi_v14_mode_apply(struct hdmi_context *hdata) @@ -1520,12 +1512,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2, m->vtotal - m->vdisplay); hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay); - hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2, 0x248); - hdmi_reg_writev(hdata, HDMI_TG_VACT_ST3_L, 2, 0x47b); - hdmi_reg_writev(hdata, HDMI_TG_VACT_ST4_L, 2, 0x6ae); - hdmi_reg_writev(hdata, HDMI_TG_VSYNC2_L, 2, 0x233); - hdmi_reg_writev(hdata, HDMI_TG_VSYNC_BOT_HDMI_L, 2, 0x233); - hdmi_reg_writev(hdata, HDMI_TG_FIELD_BOT_HDMI_L, 2, 0x233); }
hdmi_reg_writev(hdata, HDMI_H_SYNC_START_0, 2, @@ -1555,11 +1541,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal); - hdmi_reg_writev(hdata, HDMI_TG_VSYNC_L, 2, 0x1); - hdmi_reg_writev(hdata, HDMI_TG_FIELD_CHG_L, 2, 0x233); - hdmi_reg_writev(hdata, HDMI_TG_VSYNC_TOP_HDMI_L, 2, 0x1); - hdmi_reg_writev(hdata, HDMI_TG_FIELD_TOP_HDMI_L, 2, 0x1); - hdmi_reg_writev(hdata, HDMI_TG_3D, 1, 0x0); }
static void hdmi_mode_apply(struct hdmi_context *hdata)
Exynos5433 variant of HDMI requires different set of clocks and sysreg phandle to system registers.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com --- .../devicetree/bindings/video/exynos_hdmi.txt | 27 +++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt b/Documentation/devicetree/bindings/video/exynos_hdmi.txt index d474f59..4c3c582 100644 --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt @@ -5,6 +5,7 @@ Required properties: 1) "samsung,exynos4210-hdmi" 2) "samsung,exynos4212-hdmi" 3) "samsung,exynos5420-hdmi" + 4) "samsung,exynos5433-hdmi" - reg: physical base address of the hdmi and length of memory mapped region. - interrupts: interrupt number to the cpu. @@ -12,6 +13,11 @@ Required properties: a) phandle of the gpio controller node. b) pin number within the gpio controller. c) optional flags and pull up/down. +- ddc: phandle to the hdmi ddc node +- phy: phandle to the hdmi phy node +- samsung,syscon-phandle: phandle for system controller node for PMU. + +Required properties for Exynos 4210, 4212 and 5420: - clocks: list of clock IDs from SoC clock driver. a) hdmi: Gate of HDMI IP bus clock. b) sclk_hdmi: Gate of HDMI special clock. @@ -25,9 +31,24 @@ Required properties: sclk_pixel. - clock-names: aliases as per driver requirements for above clock IDs: "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi". -- ddc: phandle to the hdmi ddc node -- phy: phandle to the hdmi phy node -- samsung,syscon-phandle: phandle for system controller node for PMU. + +Required properties for Exynos 5433: +- clocks: list of clock specifiers according to common clock bindings. + a) hdmi_pclk: Gate of HDMI IP APB bus. + b) hdmi_i_pclk: Gate of HDMI-PHY IP APB bus. + d) i_tmds_clk: Gate of HDMI TMDS clock. + e) i_pixel_clk: Gate of HDMI pixel clock. + f) i_spdif_clk: Gate of HDMI SPDIF clock. + g) oscclk: Oscillator clock, used as parent of following *_user clocks + in case HDMI-PHY is not operational. + h) tmds_clko: TMDS clock generated by HDMI-PHY. + i) tmds_clko_user: MUX used to switch between oscclk and tmds_clko, + respectively if HDMI-PHY is off and operational. + j) pixel_clko: Pixel clock generated by HDMI-PHY. + k) pixel_clko_user: MUX used to switch between oscclk and pixel_clko, + respectively if HDMI-PHY is off and operational. +- clock-names: aliases for above clock specfiers. +- samsung,sysreg: handle to syscon used to control the system registers.
Example:
On 02.11.2015 22:16, Andrzej Hajda wrote:
Exynos5433 variant of HDMI requires different set of clocks and sysreg phandle to system registers.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com
.../devicetree/bindings/video/exynos_hdmi.txt | 27 +++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-)
First of all, I think that my nor Kukjin's acks are not required. I saw [0] but still I think this is binding related to Exynos DRM so it falls under Exynos DRM maintainers
Nevertheless from my perspective everything looks good here:
Reviewed-by: Krzysztof Kozlowski k.kozlowski@samsung.com
[0] http://lists.freedesktop.org/archives/dri-devel/2015-October/092213.html
Best regards, Krzysztof
HDMI on Exynos5433 differs from previous versions: - different HDMI-PHY settings, - different clocks, - SYSREG registers for enabling reference clock, - MODE_SET register in HDMI-PHY. It is distinguished from other variants by different compatible string.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com --- drivers/gpu/drm/exynos/exynos_hdmi.c | 142 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/exynos/regs-hdmi.h | 9 ++- 2 files changed, 149 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index e44e2f6..46cf863 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -112,6 +112,7 @@ struct string_array_spec { struct hdmi_driver_data { unsigned int type; unsigned int is_apb_phy:1; + unsigned int has_sysreg:1; struct hdmiphy_configs phy_confs; struct string_array_spec clk_gates; /* @@ -140,6 +141,7 @@ struct hdmi_context { struct gpio_desc *hpd_gpio; int irq; struct regmap *pmureg; + struct regmap *sysreg; struct clk **clk_gates; struct clk **clk_muxes; struct regulator_bulk_data regul_bulk[ARRAY_SIZE(supply)]; @@ -516,6 +518,90 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = { }, };
+static const struct hdmiphy_config hdmiphy_5433_configs[] = { + { + .pixel_clock = 27000000, + .conf = { + 0x01, 0x51, 0x22, 0x51, 0x08, 0xfc, 0x88, 0x46, + 0x72, 0x50, 0x24, 0x0c, 0x24, 0x0f, 0x7c, 0xa5, + 0xd4, 0x2b, 0x87, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40, + }, + }, + { + .pixel_clock = 27027000, + .conf = { + 0x01, 0x51, 0x2d, 0x72, 0x64, 0x09, 0x88, 0xc3, + 0x71, 0x50, 0x24, 0x14, 0x24, 0x0f, 0x7c, 0xa5, + 0xd4, 0x2b, 0x87, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x28, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40, + }, + }, + { + .pixel_clock = 40000000, + .conf = { + 0x01, 0x51, 0x32, 0x55, 0x01, 0x00, 0x88, 0x02, + 0x4d, 0x50, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC, + 0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40, + }, + }, + { + .pixel_clock = 50000000, + .conf = { + 0x01, 0x51, 0x34, 0x40, 0x64, 0x09, 0x88, 0xc3, + 0x3d, 0x50, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC, + 0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40, + }, + }, + { + .pixel_clock = 65000000, + .conf = { + 0x01, 0x51, 0x36, 0x31, 0x40, 0x10, 0x04, 0xc6, + 0x2e, 0xe8, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC, + 0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40, + }, + }, + { + .pixel_clock = 74176000, + .conf = { + 0x01, 0x51, 0x3E, 0x35, 0x5B, 0xDE, 0x88, 0x42, + 0x53, 0x51, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC, + 0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40, + }, + }, + { + .pixel_clock = 74250000, + .conf = { + 0x01, 0x51, 0x3E, 0x35, 0x40, 0xF0, 0x88, 0xC2, + 0x52, 0x51, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC, + 0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40, + }, + }, + { + .pixel_clock = 108000000, + .conf = { + 0x01, 0x51, 0x2d, 0x15, 0x01, 0x00, 0x88, 0x02, + 0x72, 0x52, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC, + 0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40, + }, + }, + { + .pixel_clock = 148500000, + .conf = { + 0x01, 0x51, 0x1f, 0x00, 0x40, 0xf8, 0x88, 0xc1, + 0x52, 0x52, 0x24, 0x0c, 0x24, 0x0f, 0x7c, 0xa5, + 0xd4, 0x2b, 0x87, 0x00, 0x00, 0x04, 0x00, 0x30, + 0x08, 0x10, 0x01, 0x01, 0x48, 0x4a, 0x00, 0x40, + }, + }, +}; + static const char * const hdmi_clk_gates4[] = { "hdmi", "sclk_hdmi" }; @@ -524,6 +610,15 @@ static const char * const hdmi_clk_muxes4[] = { "sclk_pixel", "sclk_hdmiphy", "mout_hdmi" };
+static const char * const hdmi_clk_gates5433[] = { + "hdmi_pclk", "hdmi_i_pclk", "i_tmds_clk", "i_pixel_clk", "i_spdif_clk" +}; + +static const char * const hdmi_clk_muxes5433[] = { + "oscclk", "tmds_clko", "tmds_clko_user", + "oscclk", "pixel_clko", "pixel_clko_user" +}; + static const struct hdmi_driver_data exynos4210_hdmi_driver_data = { .type = HDMI_TYPE13, .phy_confs = INIT_ARRAY_SPEC(hdmiphy_v13_configs), @@ -546,6 +641,15 @@ static const struct hdmi_driver_data exynos5420_hdmi_driver_data = { .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes4), };
+static const struct hdmi_driver_data exynos5433_hdmi_driver_data = { + .type = HDMI_TYPE14, + .is_apb_phy = 1, + .has_sysreg = 1, + .phy_confs = INIT_ARRAY_SPEC(hdmiphy_5433_configs), + .clk_gates = INIT_ARRAY_SPEC(hdmi_clk_gates5433), + .clk_muxes = INIT_ARRAY_SPEC(hdmi_clk_muxes5433), +}; + static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id) { if ((reg_id & 0xffff0000) == HDMI_MAPPED_BASE) @@ -1541,6 +1645,8 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal); + if (hdata->drv_data == &exynos5433_hdmi_driver_data) + hdmi_reg_writeb(hdata, HDMI_TG_DECON_EN, 1); }
static void hdmi_mode_apply(struct hdmi_context *hdata) @@ -1565,6 +1671,14 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) usleep_range(10000, 12000); }
+static void hdmiphy_enable_mode_set(struct hdmi_context *hdata, bool enable) +{ + u8 v = enable ? HDMI_PHY_ENABLE_MODE_SET : HDMI_PHY_DISABLE_MODE_SET; + + if (hdata->drv_data == &exynos5433_hdmi_driver_data) + writel(v, hdata->regs_hdmiphy + HDMIPHY5433_MODE_SET_DONE); +} + static void hdmiphy_conf_apply(struct hdmi_context *hdata) { int ret; @@ -1576,12 +1690,14 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata) return; }
+ hdmiphy_enable_mode_set(hdata, true); ret = hdmiphy_reg_write_buf(hdata, 0, hdata->drv_data->phy_confs.data[i].conf, 32); if (ret) { DRM_ERROR("failed to configure hdmiphy\n"); return; } + hdmiphy_enable_mode_set(hdata, false);
usleep_range(10000, 12000); } @@ -1614,6 +1730,15 @@ static void hdmi_mode_set(struct drm_encoder *encoder, hdata->cea_video_id = drm_match_cea_mode(mode); }
+static void hdmi_set_refclk(struct hdmi_context *hdata, bool on) +{ + if (!hdata->sysreg) + return; + + regmap_update_bits(hdata->sysreg, EXYNOS5433_SYSREG_DISP_HDMI_PHY, + SYSREG_HDMI_REFCLK_INT_CLK, on ? ~0 : 0); +} + static void hdmi_enable(struct drm_encoder *encoder) { struct hdmi_context *hdata = encoder_to_hdmi(encoder); @@ -1631,6 +1756,8 @@ static void hdmi_enable(struct drm_encoder *encoder) regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, PMU_HDMI_PHY_ENABLE_BIT, 1);
+ hdmi_set_refclk(hdata, true); + hdmi_clk_enable_gates(hdata);
hdmi_conf_apply(hdata); @@ -1665,6 +1792,8 @@ static void hdmi_disable(struct drm_encoder *encoder)
hdmi_clk_disable_gates(hdata);
+ hdmi_set_refclk(hdata, false); + regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, PMU_HDMI_PHY_ENABLE_BIT, 0);
@@ -1817,6 +1946,9 @@ static struct of_device_id hdmi_match_types[] = { .compatible = "samsung,exynos5420-hdmi", .data = &exynos5420_hdmi_driver_data, }, { + .compatible = "samsung,exynos5433-hdmi", + .data = &exynos5433_hdmi_driver_data, + }, { /* end node */ } }; @@ -1983,6 +2115,16 @@ out_get_phy_port: goto err_hdmiphy; }
+ if (hdata->drv_data->has_sysreg) { + hdata->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node, + "samsung,sysreg-phandle"); + if (IS_ERR(hdata->sysreg)) { + DRM_ERROR("sysreg regmap lookup failed.\n"); + ret = -EPROBE_DEFER; + goto err_hdmiphy; + } + } + pm_runtime_enable(dev);
ret = component_add(&pdev->dev, &hdmi_component_ops); diff --git a/drivers/gpu/drm/exynos/regs-hdmi.h b/drivers/gpu/drm/exynos/regs-hdmi.h index 8c891e5..169667a 100644 --- a/drivers/gpu/drm/exynos/regs-hdmi.h +++ b/drivers/gpu/drm/exynos/regs-hdmi.h @@ -586,10 +586,12 @@ #define HDMI_TG_VACT_ST4_L HDMI_TG_BASE(0x0070) #define HDMI_TG_VACT_ST4_H HDMI_TG_BASE(0x0074) #define HDMI_TG_3D HDMI_TG_BASE(0x00F0) +#define HDMI_TG_DECON_EN HDMI_TG_BASE(0x01e0)
/* HDMI PHY Registers Offsets*/ -#define HDMIPHY_POWER (0x74 >> 2) -#define HDMIPHY_MODE_SET_DONE (0x7c >> 2) +#define HDMIPHY_POWER 0x74 +#define HDMIPHY_MODE_SET_DONE 0x7c +#define HDMIPHY5433_MODE_SET_DONE 0x84
/* HDMI PHY Values */ #define HDMI_PHY_POWER_ON 0x80 @@ -603,4 +605,7 @@ #define PMU_HDMI_PHY_CONTROL 0x700 #define PMU_HDMI_PHY_ENABLE_BIT BIT(0)
+#define EXYNOS5433_SYSREG_DISP_HDMI_PHY 0x1008 +#define SYSREG_HDMI_REFCLK_INT_CLK 1 + #endif /* SAMSUNG_REGS_HDMI_H */
Hi Inki,
Ping.
Regards Andrzej
On 11/02/2015 02:16 PM, Andrzej Hajda wrote:
Hi Inki, Krzysztof,
This patchset adds support for Exynos 5433 HDMI. There are also few preparation/cleanup patches. All patches except one touch only exynos-drm. Sixth patch adds binding properties for Exynos5433 HDMI, Krzysztof could you look at it.
The patchset is based on exynos-drm-next.
Regards Andrzej
Andrzej Hajda (7): drm/exynos/hdmi: clock code re-factoring drm/exynos/hdmi: constify global variables drm/exynos/hdmi: use array specifier for HDMI-PHY configurations drm/exynos/hdmi: code cleanup drm/exynos/hdmi: stop programming registers with default values dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant drm/exynos/hdmi: add Exynos5433 support
.../devicetree/bindings/video/exynos_hdmi.txt | 27 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 454 +++++++++++++++------ drivers/gpu/drm/exynos/regs-hdmi.h | 9 +- 3 files changed, 352 insertions(+), 138 deletions(-)
Hi Andrzej,
Really sorry for missing this. I will merge them soon.
Thanks, Inki Dae
2016년 01월 13일 23:01에 Andrzej Hajda 이(가) 쓴 글:
Hi Inki,
Ping.
Regards Andrzej
On 11/02/2015 02:16 PM, Andrzej Hajda wrote:
Hi Inki, Krzysztof,
This patchset adds support for Exynos 5433 HDMI. There are also few preparation/cleanup patches. All patches except one touch only exynos-drm. Sixth patch adds binding properties for Exynos5433 HDMI, Krzysztof could you look at it.
The patchset is based on exynos-drm-next.
Regards Andrzej
Andrzej Hajda (7): drm/exynos/hdmi: clock code re-factoring drm/exynos/hdmi: constify global variables drm/exynos/hdmi: use array specifier for HDMI-PHY configurations drm/exynos/hdmi: code cleanup drm/exynos/hdmi: stop programming registers with default values dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant drm/exynos/hdmi: add Exynos5433 support
.../devicetree/bindings/video/exynos_hdmi.txt | 27 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 454 +++++++++++++++------ drivers/gpu/drm/exynos/regs-hdmi.h | 9 +- 3 files changed, 352 insertions(+), 138 deletions(-)
-- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Andrzej,
This patch series incurred merge conflicts at severial patches so I had to merge them manually. It looks good to me but it seems to need more tests so I merged them to exynos-drm-next-todo. After that, I will move them to exynos-drm-next. Sorry for late reivew again.
Thanks, Inki Dae
2016년 01월 14일 13:54에 Inki Dae 이(가) 쓴 글:
Hi Andrzej,
Really sorry for missing this. I will merge them soon.
Thanks, Inki Dae
2016년 01월 13일 23:01에 Andrzej Hajda 이(가) 쓴 글:
Hi Inki,
Ping.
Regards Andrzej
On 11/02/2015 02:16 PM, Andrzej Hajda wrote:
Hi Inki, Krzysztof,
This patchset adds support for Exynos 5433 HDMI. There are also few preparation/cleanup patches. All patches except one touch only exynos-drm. Sixth patch adds binding properties for Exynos5433 HDMI, Krzysztof could you look at it.
The patchset is based on exynos-drm-next.
Regards Andrzej
Andrzej Hajda (7): drm/exynos/hdmi: clock code re-factoring drm/exynos/hdmi: constify global variables drm/exynos/hdmi: use array specifier for HDMI-PHY configurations drm/exynos/hdmi: code cleanup drm/exynos/hdmi: stop programming registers with default values dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant drm/exynos/hdmi: add Exynos5433 support
.../devicetree/bindings/video/exynos_hdmi.txt | 27 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 454 +++++++++++++++------ drivers/gpu/drm/exynos/regs-hdmi.h | 9 +- 3 files changed, 352 insertions(+), 138 deletions(-)
-- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
-- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 01/14/2016 07:25 AM, Inki Dae wrote:
Hi Andrzej,
This patch series incurred merge conflicts at severial patches so I had to merge them manually. It looks good to me but it seems to need more tests so I merged them to exynos-drm-next-todo. After that, I will move them to exynos-drm-next. Sorry for late reivew again.
I guess it is because exynos-drm-next does not contains patch 'dt-bindings: remove deprecated compatible string from exynos-hdmi'. It is already in next, it entered via samsung-dt tree. With this patch this patchset applies cleanly to exynos-drm-next.
Regards Andrzej
Thanks, Inki Dae
2016년 01월 14일 13:54에 Inki Dae 이(가) 쓴 글:
Hi Andrzej,
Really sorry for missing this. I will merge them soon.
Thanks, Inki Dae
2016년 01월 13일 23:01에 Andrzej Hajda 이(가) 쓴 글:
Hi Inki,
Ping.
Regards Andrzej
On 11/02/2015 02:16 PM, Andrzej Hajda wrote:
Hi Inki, Krzysztof,
This patchset adds support for Exynos 5433 HDMI. There are also few preparation/cleanup patches. All patches except one touch only exynos-drm. Sixth patch adds binding properties for Exynos5433 HDMI, Krzysztof could you look at it.
The patchset is based on exynos-drm-next.
Regards Andrzej
Andrzej Hajda (7): drm/exynos/hdmi: clock code re-factoring drm/exynos/hdmi: constify global variables drm/exynos/hdmi: use array specifier for HDMI-PHY configurations drm/exynos/hdmi: code cleanup drm/exynos/hdmi: stop programming registers with default values dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant drm/exynos/hdmi: add Exynos5433 support
.../devicetree/bindings/video/exynos_hdmi.txt | 27 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 454 +++++++++++++++------ drivers/gpu/drm/exynos/regs-hdmi.h | 9 +- 3 files changed, 352 insertions(+), 138 deletions(-)
-- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
-- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
2016년 01월 14일 16:01에 Andrzej Hajda 이(가) 쓴 글:
On 01/14/2016 07:25 AM, Inki Dae wrote:
Hi Andrzej,
This patch series incurred merge conflicts at severial patches so I had to merge them manually. It looks good to me but it seems to need more tests so I merged them to exynos-drm-next-todo. After that, I will move them to exynos-drm-next. Sorry for late reivew again.
I guess it is because exynos-drm-next does not contains patch 'dt-bindings: remove deprecated compatible string from exynos-hdmi'. It is already in next, it entered via samsung-dt tree. With this patch this patchset applies cleanly to exynos-drm-next.
Including dt-bindings patch, other patches also incurred merge conflicts. I think your patch set are conflicted with the configurable plane support already merged.
Thanks, Inki Dae
Regards Andrzej
Thanks, Inki Dae
2016년 01월 14일 13:54에 Inki Dae 이(가) 쓴 글:
Hi Andrzej,
Really sorry for missing this. I will merge them soon.
Thanks, Inki Dae
2016년 01월 13일 23:01에 Andrzej Hajda 이(가) 쓴 글:
Hi Inki,
Ping.
Regards Andrzej
On 11/02/2015 02:16 PM, Andrzej Hajda wrote:
Hi Inki, Krzysztof,
This patchset adds support for Exynos 5433 HDMI. There are also few preparation/cleanup patches. All patches except one touch only exynos-drm. Sixth patch adds binding properties for Exynos5433 HDMI, Krzysztof could you look at it.
The patchset is based on exynos-drm-next.
Regards Andrzej
Andrzej Hajda (7): drm/exynos/hdmi: clock code re-factoring drm/exynos/hdmi: constify global variables drm/exynos/hdmi: use array specifier for HDMI-PHY configurations drm/exynos/hdmi: code cleanup drm/exynos/hdmi: stop programming registers with default values dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant drm/exynos/hdmi: add Exynos5433 support
.../devicetree/bindings/video/exynos_hdmi.txt | 27 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 454 +++++++++++++++------ drivers/gpu/drm/exynos/regs-hdmi.h | 9 +- 3 files changed, 352 insertions(+), 138 deletions(-)
-- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
-- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
-- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
dri-devel@lists.freedesktop.org
-
Andrzej Hajda -
Inki Dae -
Krzysztof Kozlowski