This series implements support for YUV formats using the display engine frontend in the sun4i DRM driver, with various fixes along the way. Scaling is supported for every format handled by the frontend.
The tiling mode used by the VPU on Allwinner platforms is also supported by this series and a dedicated fourcc modifier is introduced, along with a specific ioctl for allocating tiled buffers.
New common fourcc helpers are also introduced in this series, especially related to YUV formats.
This was tested on the A33 and A20 platforms and all supported features work properly on both. Framebuffer offsets and source positions are not supported at this point.
Changes since v3: * Made the BT.601 CSC coefficients common; * Moved the tiling mode comment next to the associated macro; * Added collected Acked-by tags.
Changes since v2: * Removed DRM format helpers taking the format fourcc; * Passed the DRM format info structure when needed instead of iterating through the list; * Removed the sun4i-specific ioctl for allocating tiled buffers, which will be rebranded as a generic one in an upcoming patch; * Improved comment for X1 tiled offset and simplified its calculation; * Corrected author email and added SoB where needed; * Rebased on latest drm-misc next.
Changes since v1: * Extended source selected cleanup to both YUV and video channels; * Split and reworded comment about backend scaling; * Sorted newly-introduced lists alphabetically; * Simplified functions to check if a format is supported; * Reworked frontend selection logic as discussed; * Made YUV helpers common, with fourcc and drm_info fashions; * Changed the CREATE_TILED ioctl flags to match the CREATE_DUMB ioctl; * Reworked YUV dimensions calculations to use drm_format_info; * Dropped MB32 part in modifier to match V4L2 definition name; * Improved the description of the tiling modifier; * Avoided splitting CSC coefficients to avoid introducing a new module; * Fixed building the driver as modules; * Various code simplifications and cleanups; * Split commits into logical changes.
Maxime Ripard (5): drm/sun4i: Move access control before setting the register as documented drm/sun4i: frontend: Add a quirk structure drm/sun4i: Set the coef_rdy bit right after the coef have been set drm/sun4i: Make COEF_RDY conditional drm/sun4i: frontend: Move the FIR filter phases to our quirks
Paul Kocialkowski (17): drm/fourcc: Add format info helpers for checking YUV planes disposition drm/fourcc: Add format info helpers for checking YUV sub-sampling drm/sun4i: backend: Use explicit fourcc helpers for packed YUV422 check drm/sun4i: frontend: Pass DRM format info to input format helpers drm/sun4i: frontend: Determine input format based on colorspace drm/sun4i: Move the BT.601 CSC coefficients to the frontend drm/sun4i: frontend: Configure and enable YUV to RGB CSC when needed drm/sun4i: frontend: Add support for packed YUV422 input formats drm/sun4i: frontend: Add support for semi-planar YUV input formats drm/sun4i: frontend: Add support for planar YUV input formats drm/fourcc: Add definitions for Allwinner vendor and VPU tiled format drm/sun4i: frontend: Add support for tiled YUV input mode configuration drm/sun4i: Add buffer stride and offset configuration for tiling mode drm/sun4i: frontend: Add and use helper for checking tiling support drm/sun4i: layer: Add tiled modifier support and helper drm/sun4i: drv: Allow framebuffer modifiers in mode config drm/sun4i: frontend: Add A20-specific device-tree compatible and quirks
drivers/gpu/drm/sun4i/sun4i_backend.c | 25 +- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + drivers/gpu/drm/sun4i/sun4i_frontend.c | 346 ++++++++++++++++++++++--- drivers/gpu/drm/sun4i/sun4i_frontend.h | 52 ++++ drivers/gpu/drm/sun4i/sun4i_layer.c | 28 +- include/drm/drm_fourcc.h | 117 +++++++++ include/uapi/drm/drm_fourcc.h | 16 ++ 7 files changed, 530 insertions(+), 55 deletions(-)
It is often useful to check whether the DRM format info retrieved from the DRM framebuffer matches a specific YUV planes disposition.
This introduces helpers to quickly check that a provided format info matches a YUV format with a specific disposition, in commonly-used terminology.
The intent of providing helpers taking the format info instead of the fourcc alone is to avoid the overhead of iterating through all formats when the whole format info structure is available. As a result, these helpers are very simple so they are made inline.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Reviewed-by: Maxime Ripard maxime.ripard@bootlin.com --- include/drm/drm_fourcc.h | 42 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h index bcb389f04618..01cd353d9302 100644 --- a/include/drm/drm_fourcc.h +++ b/include/drm/drm_fourcc.h @@ -143,6 +143,48 @@ struct drm_format_name_buf { char str[32]; };
+/** + * drm_format_info_is_yuv_packed - check that the format info matches a YUV + * format with data laid in a single plane + * @info: format info + * + * Returns: + * A boolean indicating whether the format info matches a packed YUV format. + */ +static inline bool +drm_format_info_is_yuv_packed(const struct drm_format_info *info) +{ + return info->is_yuv && info->num_planes == 1; +} + +/** + * drm_format_info_is_yuv_semiplanar - check that the format info matches a YUV + * format with data laid in two planes (luminance and chrominance) + * @info: format info + * + * Returns: + * A boolean indicating whether the format info matches a semiplanar YUV format. + */ +static inline bool +drm_format_info_is_yuv_semiplanar(const struct drm_format_info *info) +{ + return info->is_yuv && info->num_planes == 2; +} + +/** + * drm_format_info_is_yuv_planar - check that the format info matches a YUV + * format with data laid in three planes (one for each YUV component) + * @info: format info + * + * Returns: + * A boolean indicating whether the format info matches a planar YUV format. + */ +static inline bool +drm_format_info_is_yuv_planar(const struct drm_format_info *info) +{ + return info->is_yuv && info->num_planes == 3; +} + const struct drm_format_info *__drm_format_info(u32 format); const struct drm_format_info *drm_format_info(u32 format); const struct drm_format_info *
Display engine drivers often need to distinguish between different types of YUV sub-sampling. This introduces helpers to check for common sub-sampling ratios in their commonly-used denomination from the DRM format info.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Reviewed-by: Maxime Ripard maxime.ripard@bootlin.com --- include/drm/drm_fourcc.h | 75 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+)
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h index 01cd353d9302..b3d9d88ab290 100644 --- a/include/drm/drm_fourcc.h +++ b/include/drm/drm_fourcc.h @@ -185,6 +185,81 @@ drm_format_info_is_yuv_planar(const struct drm_format_info *info) return info->is_yuv && info->num_planes == 3; }
+/** + * drm_format_info_is_yuv_sampling_410 - check that the format info matches a + * YUV format with 4:1:0 sub-sampling + * @info: format info + * + * Returns: + * A boolean indicating whether the format info matches a YUV format with 4:1:0 + * sub-sampling. + */ +static inline bool +drm_format_info_is_yuv_sampling_410(const struct drm_format_info *info) +{ + return info->is_yuv && info->hsub == 4 && info->vsub == 4; +} + +/** + * drm_format_info_is_yuv_sampling_411 - check that the format info matches a + * YUV format with 4:1:1 sub-sampling + * @info: format info + * + * Returns: + * A boolean indicating whether the format info matches a YUV format with 4:1:1 + * sub-sampling. + */ +static inline bool +drm_format_info_is_yuv_sampling_411(const struct drm_format_info *info) +{ + return info->is_yuv && info->hsub == 4 && info->vsub == 1; +} + +/** + * drm_format_info_is_yuv_sampling_420 - check that the format info matches a + * YUV format with 4:2:0 sub-sampling + * @info: format info + * + * Returns: + * A boolean indicating whether the format info matches a YUV format with 4:2:0 + * sub-sampling. + */ +static inline bool +drm_format_info_is_yuv_sampling_420(const struct drm_format_info *info) +{ + return info->is_yuv && info->hsub == 2 && info->vsub == 2; +} + +/** + * drm_format_info_is_yuv_sampling_422 - check that the format info matches a + * YUV format with 4:2:2 sub-sampling + * @info: format info + * + * Returns: + * A boolean indicating whether the format info matches a YUV format with 4:2:2 + * sub-sampling. + */ +static inline bool +drm_format_info_is_yuv_sampling_422(const struct drm_format_info *info) +{ + return info->is_yuv && info->hsub == 2 && info->vsub == 1; +} + +/** + * drm_format_info_is_yuv_sampling_444 - check that the format info matches a + * YUV format with 4:4:4 sub-sampling + * @info: format info + * + * Returns: + * A boolean indicating whether the format info matches a YUV format with 4:4:4 + * sub-sampling. + */ +static inline bool +drm_format_info_is_yuv_sampling_444(const struct drm_format_info *info) +{ + return info->is_yuv && info->hsub == 1 && info->vsub == 1; +} + const struct drm_format_info *__drm_format_info(u32 format); const struct drm_format_info *drm_format_info(u32 format); const struct drm_format_info *
Checking for the number of planes is not sufficient to en ensure that the format is a packed YUV422.
Use explicit fourcc helpers for the check instead.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_backend.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c index 9e9255ee59cd..bbadc2ab9f4d 100644 --- a/drivers/gpu/drm/sun4i/sun4i_backend.c +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c @@ -245,7 +245,8 @@ static int sun4i_backend_update_yuv_format(struct sun4i_backend *backend, SUN4I_BACKEND_ATTCTL_REG0_LAY_YUVEN);
/* TODO: Add support for the multi-planar YUV formats */ - if (format->num_planes == 1) + if (drm_format_info_is_yuv_packed(format) && + drm_format_info_is_yuv_sampling_422(format)) val |= SUN4I_BACKEND_IYUVCTL_FBFMT_PACKED_YUV422; else DRM_DEBUG_DRIVER("Unsupported YUV format (0x%x)\n", fmt);
The helper returning the input mode needs to know the number of planes for the provided format. Passing the fourcc requires iterating through the format info list in order to return the number of planes.
Pass the DRM format info structure directly instead to all helpers related to configuring the input format, since it's available to the caller. Also rename the input format in the caller function to keep things consistent.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 1a7ebc45747e..dd5af3019099 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -104,9 +104,11 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, } EXPORT_SYMBOL(sun4i_frontend_update_buffer);
-static int sun4i_frontend_drm_format_to_input_fmt(uint32_t fmt, u32 *val) +static int +sun4i_frontend_drm_format_to_input_fmt(const struct drm_format_info *format, + u32 *val) { - switch (fmt) { + switch (format->format) { case DRM_FORMAT_XRGB8888: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB; return 0; @@ -116,9 +118,11 @@ static int sun4i_frontend_drm_format_to_input_fmt(uint32_t fmt, u32 *val) } }
-static int sun4i_frontend_drm_format_to_input_mode(uint32_t fmt, u32 *val) +static int +sun4i_frontend_drm_format_to_input_mode(const struct drm_format_info *format, + u32 *val) { - if (drm_format_num_planes(fmt) == 1) + if (format->num_planes == 1) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED; else return -EINVAL; @@ -126,9 +130,11 @@ static int sun4i_frontend_drm_format_to_input_mode(uint32_t fmt, u32 *val) return 0; }
-static int sun4i_frontend_drm_format_to_input_sequence(uint32_t fmt, u32 *val) +static int +sun4i_frontend_drm_format_to_input_sequence(const struct drm_format_info *format, + u32 *val) { - switch (fmt) { + switch (format->format) { case DRM_FORMAT_BGRX8888: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX; return 0; @@ -183,7 +189,7 @@ int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, { struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; - uint32_t format = fb->format->format; + const struct drm_format_info *format = fb->format; u32 out_fmt_val; u32 in_fmt_val, in_mod_val, in_ps_val; int ret;
On Wed, Dec 05, 2018 at 09:36:45AM +0100, Paul Kocialkowski wrote:
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
Since all the RGB input formats have the same value for the DATA_FMT field of the INPUT_FMT register, we can group them when the format is known to be RGB. Here, we assume that a non-YUV format is RGB, because the hardware does not support any other colorspace than RGB and YUV.
Use the DRM format info structure to check whether the format uses a YUV colorspace.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index dd5af3019099..7c7a5ea0cf58 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -108,14 +108,12 @@ static int sun4i_frontend_drm_format_to_input_fmt(const struct drm_format_info *format, u32 *val) { - switch (format->format) { - case DRM_FORMAT_XRGB8888: + if (!format->is_yuv) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB; - return 0; - - default: + else return -EINVAL; - } + + return 0; }
static int
On Wed, Dec 05, 2018 at 09:36:46AM +0100, Paul Kocialkowski wrote:
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
Both the backend and the frontend need the BT.601 CSC coefficients for YUV to RGB conversion. Since the backend has a dependency on the frontend (and not the other way round), move the coefficients there so that both can access them without having to duplicate them.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_backend.c | 22 ---------------------- drivers/gpu/drm/sun4i/sun4i_frontend.c | 23 +++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun4i_frontend.h | 1 + 3 files changed, 24 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c index bbadc2ab9f4d..892197f52557 100644 --- a/drivers/gpu/drm/sun4i/sun4i_backend.c +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c @@ -45,28 +45,6 @@ static const u32 sunxi_rgb2yuv_coef[12] = { 0x000001c1, 0x00003e88, 0x00003fb8, 0x00000808 };
-/* - * These coefficients are taken from the A33 BSP from Allwinner. - * - * The first three values of each row are coded as 13-bit signed fixed-point - * numbers, with 10 bits for the fractional part. The fourth value is a - * constant coded as a 14-bit signed fixed-point number with 4 bits for the - * fractional part. - * - * The values in table order give the following colorspace translation: - * G = 1.164 * Y - 0.391 * U - 0.813 * V + 135 - * R = 1.164 * Y + 1.596 * V - 222 - * B = 1.164 * Y + 2.018 * U + 276 - * - * This seems to be a conversion from Y[16:235] UV[16:240] to RGB[0:255], - * following the BT601 spec. - */ -static const u32 sunxi_bt601_yuv2rgb_coef[12] = { - 0x000004a7, 0x00001e6f, 0x00001cbf, 0x00000877, - 0x000004a7, 0x00000000, 0x00000662, 0x00003211, - 0x000004a7, 0x00000812, 0x00000000, 0x00002eb1, -}; - static void sun4i_backend_apply_color_correction(struct sunxi_engine *engine) { int i; diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 7c7a5ea0cf58..045013efdc57 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -48,6 +48,29 @@ static const u32 sun4i_frontend_horz_coef[64] = { 0x03ff0000, 0x0000fd41, 0x01ff0000, 0x0000fe42, };
+/* + * These coefficients are taken from the A33 BSP from Allwinner. + * + * The first three values of each row are coded as 13-bit signed fixed-point + * numbers, with 10 bits for the fractional part. The fourth value is a + * constant coded as a 14-bit signed fixed-point number with 4 bits for the + * fractional part. + * + * The values in table order give the following colorspace translation: + * G = 1.164 * Y - 0.391 * U - 0.813 * V + 135 + * R = 1.164 * Y + 1.596 * V - 222 + * B = 1.164 * Y + 2.018 * U + 276 + * + * This seems to be a conversion from Y[16:235] UV[16:240] to RGB[0:255], + * following the BT601 spec. + */ +const u32 sunxi_bt601_yuv2rgb_coef[12] = { + 0x000004a7, 0x00001e6f, 0x00001cbf, 0x00000877, + 0x000004a7, 0x00000000, 0x00000662, 0x00003211, + 0x000004a7, 0x00000812, 0x00000000, 0x00002eb1, +}; +EXPORT_SYMBOL(sunxi_bt601_yuv2rgb_coef); + static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend) { int i; diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index ad146e8d8d70..3df2bd8a7a95 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -86,6 +86,7 @@ struct sun4i_frontend { };
extern const struct of_device_id sun4i_frontend_of_table[]; +extern const u32 sunxi_bt601_yuv2rgb_coef[12];
int sun4i_frontend_init(struct sun4i_frontend *frontend); void sun4i_frontend_exit(struct sun4i_frontend *frontend);
On Wed, Dec 05, 2018 at 09:36:47AM +0100, Paul Kocialkowski wrote:
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
In prevision of adding support for YUV formats, set the YUV to RGB colorspace conversion coefficients if required and don't bypass the CSC engine when converting.
The BT601 coefficients from the A33 BSP are copied over from the backend code. Because of module inter-dependency, we can't have the frontend use these coefficients from the backend directly.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 23 +++++++++++++++++++++-- drivers/gpu/drm/sun4i/sun4i_frontend.h | 2 ++ 2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 045013efdc57..bf37a4ea81c5 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -213,6 +213,8 @@ int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, const struct drm_format_info *format = fb->format; u32 out_fmt_val; u32 in_fmt_val, in_mod_val, in_ps_val; + unsigned int i; + u32 bypass; int ret;
ret = sun4i_frontend_drm_format_to_input_fmt(format, &in_fmt_val); @@ -250,9 +252,26 @@ int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG, 0x400); regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG, 0x400);
+ /* + * Checking the input format is sufficient since we currently only + * support RGB output formats to the backend. If YUV output formats + * ever get supported, an YUV input and output would require bypassing + * the CSC engine too. + */ + if (format->is_yuv) { + /* Setup the CSC engine for YUV to RGB conversion. */ + bypass = 0; + + for (i = 0; i < ARRAY_SIZE(sunxi_bt601_yuv2rgb_coef); i++) + regmap_write(frontend->regs, + SUN4I_FRONTEND_CSC_COEF_REG(i), + sunxi_bt601_yuv2rgb_coef[i]); + } else { + bypass = SUN4I_FRONTEND_BYPASS_CSC_EN; + } + regmap_update_bits(frontend->regs, SUN4I_FRONTEND_BYPASS_REG, - SUN4I_FRONTEND_BYPASS_CSC_EN, - SUN4I_FRONTEND_BYPASS_CSC_EN); + SUN4I_FRONTEND_BYPASS_CSC_EN, bypass);
regmap_write(frontend->regs, SUN4I_FRONTEND_INPUT_FMT_REG, in_mod_val | in_fmt_val | in_ps_val); diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index 3df2bd8a7a95..17b46ecf7d9e 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -35,6 +35,8 @@ #define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_BGRX8888 1 #define SUN4I_FRONTEND_OUTPUT_FMT_DATA_FMT_XRGB8888 2
+#define SUN4I_FRONTEND_CSC_COEF_REG(c) (0x070 + (0x4 * (c))) + #define SUN4I_FRONTEND_CH0_INSIZE_REG 0x100 #define SUN4I_FRONTEND_INSIZE(h, w) ((((h) - 1) << 16) | (((w) - 1)))
On Wed, Dec 05, 2018 at 09:36:48AM +0100, Paul Kocialkowski wrote:
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
This introduces support for packed YUV formats with 4:2:2 sampling using the frontend. Definitions are introduced for the data format and pixel sequence input format register values.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun4i_frontend.h | 5 +++++ 2 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index bf37a4ea81c5..1946dd9e58d9 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -133,6 +133,8 @@ sun4i_frontend_drm_format_to_input_fmt(const struct drm_format_info *format, { if (!format->is_yuv) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB; + else if (drm_format_info_is_yuv_sampling_422(format)) + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422; else return -EINVAL;
@@ -160,10 +162,26 @@ sun4i_frontend_drm_format_to_input_sequence(const struct drm_format_info *format *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX; return 0;
+ case DRM_FORMAT_UYVY: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY; + return 0; + + case DRM_FORMAT_VYUY: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VYUY; + return 0; + case DRM_FORMAT_XRGB8888: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_XRGB; return 0;
+ case DRM_FORMAT_YUYV: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YUYV; + return 0; + + case DRM_FORMAT_YVYU: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YVYU; + return 0; + default: return -EINVAL; } @@ -187,7 +205,11 @@ static int sun4i_frontend_drm_format_to_output_fmt(uint32_t fmt, u32 *val)
static const uint32_t sun4i_frontend_formats[] = { DRM_FORMAT_BGRX8888, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, };
bool sun4i_frontend_format_is_supported(uint32_t fmt, uint64_t modifier) diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index 17b46ecf7d9e..e287a71a0db9 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -27,7 +27,12 @@
#define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8) +#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422 (1 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB (5 << 4) +#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY 0 +#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YUYV 1 +#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VYUY 2 +#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YVYU 3 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX 0 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_XRGB 1
Semi-planar YUV formats use two distinct planes, one for luminance and one for chrominance. To add support for them, we need to configure the second line stride and buffer address registers to setup the second YUV plane.
New definitions are introduced to configure the input format register for the YUV420 and YUV422 semi-planar formats.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 50 +++++++++++++++++++++++--- drivers/gpu/drm/sun4i/sun4i_frontend.h | 6 ++++ drivers/gpu/drm/sun4i/sun4i_layer.c | 4 +++ 3 files changed, 55 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 1946dd9e58d9..f262069d348f 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -119,11 +119,23 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG, fb->pitches[0]);
+ if (fb->format->num_planes > 1) + regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD1_REG, + fb->pitches[1]); + /* Set the physical address of the buffer in memory */ paddr = drm_fb_cma_get_gem_addr(fb, state, 0); paddr -= PHYS_OFFSET; - DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); + DRM_DEBUG_DRIVER("Setting buffer #0 address to %pad\n", &paddr); regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr); + + if (fb->format->num_planes > 1) { + paddr = drm_fb_cma_get_gem_addr(fb, state, 1); + paddr -= PHYS_OFFSET; + DRM_DEBUG_DRIVER("Setting buffer #1 address to %pad\n", &paddr); + regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG, + paddr); + } } EXPORT_SYMBOL(sun4i_frontend_update_buffer);
@@ -133,6 +145,8 @@ sun4i_frontend_drm_format_to_input_fmt(const struct drm_format_info *format, { if (!format->is_yuv) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB; + else if (drm_format_info_is_yuv_sampling_420(format)) + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420; else if (drm_format_info_is_yuv_sampling_422(format)) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422; else @@ -145,12 +159,18 @@ static int sun4i_frontend_drm_format_to_input_mode(const struct drm_format_info *format, u32 *val) { - if (format->num_planes == 1) + switch (format->num_planes) { + case 1: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED; - else - return -EINVAL; + return 0;
- return 0; + case 2: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR; + return 0; + + default: + return -EINVAL; + } }
static int @@ -162,6 +182,22 @@ sun4i_frontend_drm_format_to_input_sequence(const struct drm_format_info *format *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX; return 0;
+ case DRM_FORMAT_NV12: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UV; + return 0; + + case DRM_FORMAT_NV16: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UV; + return 0; + + case DRM_FORMAT_NV21: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VU; + return 0; + + case DRM_FORMAT_NV61: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VU; + return 0; + case DRM_FORMAT_UYVY: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY; return 0; @@ -205,6 +241,10 @@ static int sun4i_frontend_drm_format_to_output_fmt(uint32_t fmt, u32 *val)
static const uint32_t sun4i_frontend_formats[] = { DRM_FORMAT_BGRX8888, + DRM_FORMAT_NV12, + DRM_FORMAT_NV16, + DRM_FORMAT_NV21, + DRM_FORMAT_NV61, DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, DRM_FORMAT_XRGB8888, diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index e287a71a0db9..2f9e3f84e2ff 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -22,17 +22,23 @@ #define SUN4I_FRONTEND_BYPASS_CSC_EN BIT(1)
#define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020 +#define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024
#define SUN4I_FRONTEND_LINESTRD0_REG 0x040 +#define SUN4I_FRONTEND_LINESTRD1_REG 0x044
#define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8) +#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR (2 << 8) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422 (1 << 4) +#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420 (2 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB (5 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY 0 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YUYV 1 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VYUY 2 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YVYU 3 +#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UV 0 +#define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VU 1 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX 0 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_XRGB 1
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c index 29631e0efde3..185ef38649aa 100644 --- a/drivers/gpu/drm/sun4i/sun4i_layer.c +++ b/drivers/gpu/drm/sun4i/sun4i_layer.c @@ -138,6 +138,10 @@ static const uint32_t sun4i_layer_formats[] = { DRM_FORMAT_RGBA4444, DRM_FORMAT_RGB888, DRM_FORMAT_RGB565, + DRM_FORMAT_NV12, + DRM_FORMAT_NV16, + DRM_FORMAT_NV21, + DRM_FORMAT_NV61, DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, DRM_FORMAT_XRGB8888,
Planar YUV formats come with 3 distinct planes, which requires configuring the frontend line stride and address registers for the third plane.
Our hardware only supports the YUV planes order and in order to support formats with a YVU plane order, a helper is introduced to indicate whether to invert the address of the two chroma planes.
Missing definitions for YUV411 and YUV444 input format configuration are also introduced as support is added for these formats. For the input sequence part, no configuration is required for planar YUV formats so zero is returned in that case.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 54 +++++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun4i_frontend.h | 5 +++ drivers/gpu/drm/sun4i/sun4i_layer.c | 8 ++++ 3 files changed, 66 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index f262069d348f..6219f5d0dc53 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -107,12 +107,27 @@ void sun4i_frontend_exit(struct sun4i_frontend *frontend) } EXPORT_SYMBOL(sun4i_frontend_exit);
+static bool sun4i_frontend_format_chroma_requires_swap(uint32_t fmt) +{ + switch (fmt) { + case DRM_FORMAT_YVU411: + case DRM_FORMAT_YVU420: + case DRM_FORMAT_YVU422: + case DRM_FORMAT_YVU444: + return true; + + default: + return false; + } +} + void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, struct drm_plane *plane) { struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; dma_addr_t paddr; + bool swap;
/* Set the line width */ DRM_DEBUG_DRIVER("Frontend stride: %d bytes\n", fb->pitches[0]); @@ -123,6 +138,13 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD1_REG, fb->pitches[1]);
+ if (fb->format->num_planes > 2) + regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD2_REG, + fb->pitches[2]); + + /* Some planar formats require chroma channel swapping by hand. */ + swap = sun4i_frontend_format_chroma_requires_swap(fb->format->format); + /* Set the physical address of the buffer in memory */ paddr = drm_fb_cma_get_gem_addr(fb, state, 0); paddr -= PHYS_OFFSET; @@ -130,12 +152,20 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr);
if (fb->format->num_planes > 1) { - paddr = drm_fb_cma_get_gem_addr(fb, state, 1); + paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 2 : 1); paddr -= PHYS_OFFSET; DRM_DEBUG_DRIVER("Setting buffer #1 address to %pad\n", &paddr); regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG, paddr); } + + if (fb->format->num_planes > 2) { + paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 1 : 2); + paddr -= PHYS_OFFSET; + DRM_DEBUG_DRIVER("Setting buffer #2 address to %pad\n", &paddr); + regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR2_REG, + paddr); + } } EXPORT_SYMBOL(sun4i_frontend_update_buffer);
@@ -145,10 +175,14 @@ sun4i_frontend_drm_format_to_input_fmt(const struct drm_format_info *format, { if (!format->is_yuv) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB; + else if (drm_format_info_is_yuv_sampling_411(format)) + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV411; else if (drm_format_info_is_yuv_sampling_420(format)) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420; else if (drm_format_info_is_yuv_sampling_422(format)) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422; + else if (drm_format_info_is_yuv_sampling_444(format)) + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV444; else return -EINVAL;
@@ -168,6 +202,10 @@ sun4i_frontend_drm_format_to_input_mode(const struct drm_format_info *format, *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR; return 0;
+ case 3: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR; + return 0; + default: return -EINVAL; } @@ -177,6 +215,12 @@ static int sun4i_frontend_drm_format_to_input_sequence(const struct drm_format_info *format, u32 *val) { + /* Planar formats have an explicit input sequence. */ + if (drm_format_info_is_yuv_planar(format)) { + *val = 0; + return 0; + } + switch (format->format) { case DRM_FORMAT_BGRX8888: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX; @@ -248,7 +292,15 @@ static const uint32_t sun4i_frontend_formats[] = { DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUV411, + DRM_FORMAT_YUV420, + DRM_FORMAT_YUV422, + DRM_FORMAT_YUV444, DRM_FORMAT_YUYV, + DRM_FORMAT_YVU411, + DRM_FORMAT_YVU420, + DRM_FORMAT_YVU422, + DRM_FORMAT_YVU444, DRM_FORMAT_YVYU, };
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index 2f9e3f84e2ff..c62735c2dc4b 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -23,15 +23,20 @@
#define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020 #define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024 +#define SUN4I_FRONTEND_BUF_ADDR2_REG 0x028
#define SUN4I_FRONTEND_LINESTRD0_REG 0x040 #define SUN4I_FRONTEND_LINESTRD1_REG 0x044 +#define SUN4I_FRONTEND_LINESTRD2_REG 0x048
#define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c +#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR (0 << 8) #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8) #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR (2 << 8) +#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV444 (0 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422 (1 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420 (2 << 4) +#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV411 (3 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB (5 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY 0 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YUYV 1 diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c index 185ef38649aa..8cf8ca997b1d 100644 --- a/drivers/gpu/drm/sun4i/sun4i_layer.c +++ b/drivers/gpu/drm/sun4i/sun4i_layer.c @@ -145,7 +145,15 @@ static const uint32_t sun4i_layer_formats[] = { DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUV411, + DRM_FORMAT_YUV420, + DRM_FORMAT_YUV422, + DRM_FORMAT_YUV444, DRM_FORMAT_YUYV, + DRM_FORMAT_YVU411, + DRM_FORMAT_YVU420, + DRM_FORMAT_YVU422, + DRM_FORMAT_YVU444, DRM_FORMAT_YVYU, };
This introduces specific definitions for vendor Allwinner and its associated tiled format modifier. This modifier is used for the output format of the VPU, that can be imported directly with the display engine hardware supported by the sun4i-drm driver.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Reviewed-by: Maxime Ripard maxime.ripard@bootlin.com --- include/uapi/drm/drm_fourcc.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 0b44260a5ee9..ea108e88ae03 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -238,6 +238,8 @@ extern "C" { #define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06 #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 +#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 + /* add more to the end as needed */
#define DRM_FORMAT_RESERVED ((1ULL << 56) - 1) @@ -644,6 +646,20 @@ extern "C" { */ #define AFBC_FORMAT_MOD_SC (1ULL << 9)
+/* + * Allwinner tiled modifier + * + * This tiling mode is implemented by the VPU found on all Allwinner platforms, + * codenamed sunxi. It is associated with a YUV format that uses either 2 or 3 + * planes. + * + * With this tiling, the luminance samples are disposed in tiles representing + * 32x32 pixels and the chrominance samples in tiles representing 32x64 pixels. + * The pixel order in each tile is linear and the tiles are disposed linearly, + * both in row-major order. + */ +#define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1) + #if defined(__cplusplus) } #endif
This introduces the data input mode definitions for the tiled YUV mode, that are used in the input mode helper if tiling is requested.
The modifier is passed to the helper from the framebuffer to determine if tiling is requested.
Only semiplanar and planar YUV formats are supported for tiling mode.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 14 ++++++++++---- drivers/gpu/drm/sun4i/sun4i_frontend.h | 2 ++ 2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 6219f5d0dc53..e950370792ce 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -191,19 +191,23 @@ sun4i_frontend_drm_format_to_input_fmt(const struct drm_format_info *format,
static int sun4i_frontend_drm_format_to_input_mode(const struct drm_format_info *format, - u32 *val) + uint64_t modifier, u32 *val) { + bool tiled = (modifier == DRM_FORMAT_MOD_ALLWINNER_TILED); + switch (format->num_planes) { case 1: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED; return 0;
case 2: - *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR; + *val = tiled ? SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_SEMIPLANAR + : SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR; return 0;
case 3: - *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR; + *val = tiled ? SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_PLANAR + : SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR; return 0;
default: @@ -325,6 +329,7 @@ int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; const struct drm_format_info *format = fb->format; + uint64_t modifier = fb->modifier; u32 out_fmt_val; u32 in_fmt_val, in_mod_val, in_ps_val; unsigned int i; @@ -337,7 +342,8 @@ int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, return ret; }
- ret = sun4i_frontend_drm_format_to_input_mode(format, &in_mod_val); + ret = sun4i_frontend_drm_format_to_input_mode(format, modifier, + &in_mod_val); if (ret) { DRM_DEBUG_DRIVER("Invalid input mode\n"); return ret; diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index c62735c2dc4b..6c4d7797bb8a 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -33,6 +33,8 @@ #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR (0 << 8) #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8) #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR (2 << 8) +#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_PLANAR (4 << 8) +#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_MB32_SEMIPLANAR (6 << 8) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV444 (0 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422 (1 << 4) #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420 (2 << 4)
This introduces stride and offset configuration for the VPU tiling mode. Stride is calculated differently than it is for linear formats and an offset is calculated, for which new register definitions are introduced.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 49 ++++++++++++++++++++++++-- drivers/gpu/drm/sun4i/sun4i_frontend.h | 19 ++++++++++ 2 files changed, 65 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index e950370792ce..6ede40aab515 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -126,21 +126,64 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, { struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; + unsigned int strides[3] = {}; + dma_addr_t paddr; bool swap;
+ if (fb->modifier == DRM_FORMAT_MOD_ALLWINNER_TILED) { + unsigned int width = state->src_w >> 16; + unsigned int offset; + + strides[0] = SUN4I_FRONTEND_LINESTRD_TILED(fb->pitches[0]); + + /* + * The X1 offset is the offset to the bottom-right point in the + * end tile, which is the final pixel (at offset width - 1) + * within the end tile (with a 32-byte mask). + */ + offset = (width - 1) & (32 - 1); + + regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF0_REG, + SUN4I_FRONTEND_TB_OFF_X1(offset)); + + if (fb->format->num_planes > 1) { + strides[1] = + SUN4I_FRONTEND_LINESTRD_TILED(fb->pitches[1]); + + regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF1_REG, + SUN4I_FRONTEND_TB_OFF_X1(offset)); + } + + if (fb->format->num_planes > 2) { + strides[2] = + SUN4I_FRONTEND_LINESTRD_TILED(fb->pitches[2]); + + regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF2_REG, + SUN4I_FRONTEND_TB_OFF_X1(offset)); + } + } else { + strides[0] = fb->pitches[0]; + + if (fb->format->num_planes > 1) + strides[1] = fb->pitches[1]; + + if (fb->format->num_planes > 2) + strides[2] = fb->pitches[2]; + } + /* Set the line width */ DRM_DEBUG_DRIVER("Frontend stride: %d bytes\n", fb->pitches[0]); regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG, - fb->pitches[0]); + strides[0]);
if (fb->format->num_planes > 1) regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD1_REG, - fb->pitches[1]); + strides[1]);
if (fb->format->num_planes > 2) regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD2_REG, - fb->pitches[2]); + strides[2]);
/* Some planar formats require chroma channel swapping by hand. */ swap = sun4i_frontend_format_chroma_requires_swap(fb->format->format); diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index 6c4d7797bb8a..235109199b9d 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -25,10 +25,29 @@ #define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024 #define SUN4I_FRONTEND_BUF_ADDR2_REG 0x028
+#define SUN4I_FRONTEND_TB_OFF0_REG 0x030 +#define SUN4I_FRONTEND_TB_OFF1_REG 0x034 +#define SUN4I_FRONTEND_TB_OFF2_REG 0x038 +#define SUN4I_FRONTEND_TB_OFF_X1(x1) ((x1) << 16) +#define SUN4I_FRONTEND_TB_OFF_Y0(y0) ((y0) << 8) +#define SUN4I_FRONTEND_TB_OFF_X0(x0) (x0) + #define SUN4I_FRONTEND_LINESTRD0_REG 0x040 #define SUN4I_FRONTEND_LINESTRD1_REG 0x044 #define SUN4I_FRONTEND_LINESTRD2_REG 0x048
+/* + * In tiled mode, the stride is defined as the distance between the start of the + * end line of the current tile and the start of the first line in the next + * vertical tile. + * + * Tiles are represented in row-major order, thus the end line of current tile + * starts at: 31 * 32 (31 lines of 32 cols), the next vertical tile starts at: + * 32-bit-aligned-width * 32 and the distance is: + * 32 * (32-bit-aligned-width - 31). + */ +#define SUN4I_FRONTEND_LINESTRD_TILED(stride) (((stride) - 31) * 32) + #define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR (0 << 8) #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8)
On Wed, Dec 05, 2018 at 09:36:54AM +0100, Paul Kocialkowski wrote:
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
This introduces a helper to check whether a frontend input format supports tiling mode. This helper is used when tiling is requested in the frontend format support helper.
Only semiplanar and planar YUV formats are supported by the hardware.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 6ede40aab515..1153539f3aef 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -121,6 +121,26 @@ static bool sun4i_frontend_format_chroma_requires_swap(uint32_t fmt) } }
+static bool sun4i_frontend_format_supports_tiling(uint32_t fmt) +{ + switch (fmt) { + case DRM_FORMAT_NV12: + case DRM_FORMAT_NV16: + case DRM_FORMAT_NV21: + case DRM_FORMAT_NV61: + case DRM_FORMAT_YUV411: + case DRM_FORMAT_YUV420: + case DRM_FORMAT_YUV422: + case DRM_FORMAT_YVU420: + case DRM_FORMAT_YVU422: + case DRM_FORMAT_YVU411: + return true; + + default: + return false; + } +} + void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, struct drm_plane *plane) { @@ -355,7 +375,9 @@ bool sun4i_frontend_format_is_supported(uint32_t fmt, uint64_t modifier) { unsigned int i;
- if (modifier != DRM_FORMAT_MOD_LINEAR) + if (modifier == DRM_FORMAT_MOD_ALLWINNER_TILED) + return sun4i_frontend_format_supports_tiling(fmt); + else if (modifier != DRM_FORMAT_MOD_LINEAR) return false;
for (i = 0; i < ARRAY_SIZE(sun4i_frontend_formats); i++)
This introduces a list of supported modifiers for the driver, that includes the Allwinner tiled modifier, as well as a format_mod_supported callback.
The callback uses both the backend and frontend helpers to indicate per-format modifier support (including for the linear modifier).
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_layer.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c index 8cf8ca997b1d..c5a999ca1d72 100644 --- a/drivers/gpu/drm/sun4i/sun4i_layer.c +++ b/drivers/gpu/drm/sun4i/sun4i_layer.c @@ -114,6 +114,13 @@ static void sun4i_backend_layer_atomic_update(struct drm_plane *plane, sun4i_backend_layer_enable(backend, layer->id, true); }
+static bool sun4i_layer_format_mod_supported(struct drm_plane *plane, + uint32_t format, uint64_t modifier) +{ + return sun4i_backend_format_is_supported(format, modifier) || + sun4i_frontend_format_is_supported(format, modifier); +} + static const struct drm_plane_helper_funcs sun4i_backend_layer_helper_funcs = { .prepare_fb = drm_gem_fb_prepare_fb, .atomic_disable = sun4i_backend_layer_atomic_disable, @@ -127,6 +134,7 @@ static const struct drm_plane_funcs sun4i_backend_layer_funcs = { .disable_plane = drm_atomic_helper_disable_plane, .reset = sun4i_backend_layer_reset, .update_plane = drm_atomic_helper_update_plane, + .format_mod_supported = sun4i_layer_format_mod_supported, };
static const uint32_t sun4i_layer_formats[] = { @@ -157,6 +165,12 @@ static const uint32_t sun4i_layer_formats[] = { DRM_FORMAT_YVYU, };
+static const uint64_t sun4i_layer_modifiers[] = { + DRM_FORMAT_MOD_LINEAR, + DRM_FORMAT_MOD_ALLWINNER_TILED, + DRM_FORMAT_MOD_INVALID +}; + static struct sun4i_layer *sun4i_layer_init_one(struct drm_device *drm, struct sun4i_backend *backend, enum drm_plane_type type) @@ -173,7 +187,7 @@ static struct sun4i_layer *sun4i_layer_init_one(struct drm_device *drm, &sun4i_backend_layer_funcs, sun4i_layer_formats, ARRAY_SIZE(sun4i_layer_formats), - NULL, type, NULL); + sun4i_layer_modifiers, type, NULL); if (ret) { dev_err(drm->dev, "Couldn't initialize layer\n"); return ERR_PTR(ret);
This is the final step to indicate to the core that our driver supports framebuffer modifiers.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 9e4c375ccc96..93da837194cf 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -97,6 +97,7 @@ static int sun4i_drv_bind(struct device *dev) }
drm_mode_config_init(drm); + drm->mode_config.allow_fb_modifiers = true;
ret = component_bind_all(drm->dev, drm); if (ret) {
From: Maxime Ripard maxime.ripard@bootlin.com
Unlike what is currently being done, the ACCESS_CTRL bit documentation asks that this bit should be set before modifying any register. The code in the BSP also does this, so make sure we do this as well.
Signed-off-by: Maxime Ripard maxime.ripard@bootlin.com Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 1153539f3aef..88ac77518610 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -75,6 +75,10 @@ static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend) { int i;
+ regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, + SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL, + SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL); + for (i = 0; i < 32; i++) { regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i), sun4i_frontend_horz_coef[2 * i]); @@ -90,9 +94,6 @@ static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend) sun4i_frontend_vert_coef[i]); }
- regmap_update_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, - SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL, - SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL); }
int sun4i_frontend_init(struct sun4i_frontend *frontend)
From: Maxime Ripard maxime.ripard@bootlin.com
The ACCESS_CTRL bit is not found on all the variants of the frontend, so let's introduce a structure that will hold whether or not we need to set it, and associate it with the compatible.
This will be extended for further similar quirks later on.
Signed-off-by: Maxime Ripard maxime.ripard@bootlin.com Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 21 +++++++++++++++++---- drivers/gpu/drm/sun4i/sun4i_frontend.h | 6 ++++++ 2 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 88ac77518610..6636b1998a76 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -10,6 +10,7 @@ #include <linux/clk.h> #include <linux/component.h> #include <linux/module.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> @@ -75,9 +76,10 @@ static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend) { int i;
- regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, - SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL, - SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL); + if (frontend->data->has_coef_access_ctrl) + regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG, + SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL, + SUN4I_FRONTEND_FRM_CTRL_COEF_ACCESS_CTRL);
for (i = 0; i < 32; i++) { regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i), @@ -553,6 +555,10 @@ static int sun4i_frontend_bind(struct device *dev, struct device *master, frontend->dev = dev; frontend->node = dev->of_node;
+ frontend->data = of_device_get_match_data(dev); + if (!frontend->data) + return -ENODEV; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); regs = devm_ioremap_resource(dev, res); if (IS_ERR(regs)) @@ -665,8 +671,15 @@ static const struct dev_pm_ops sun4i_frontend_pm_ops = { .runtime_suspend = sun4i_frontend_runtime_suspend, };
+static const struct sun4i_frontend_data sun8i_a33_frontend = { + .has_coef_access_ctrl = true, +}; + const struct of_device_id sun4i_frontend_of_table[] = { - { .compatible = "allwinner,sun8i-a33-display-frontend" }, + { + .compatible = "allwinner,sun8i-a33-display-frontend", + .data = &sun8i_a33_frontend + }, { } }; EXPORT_SYMBOL(sun4i_frontend_of_table); diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index 235109199b9d..01e68bb11c98 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -112,6 +112,10 @@ struct drm_plane; struct regmap; struct reset_control;
+struct sun4i_frontend_data { + bool has_coef_access_ctrl; +}; + struct sun4i_frontend { struct list_head list; struct device *dev; @@ -122,6 +126,8 @@ struct sun4i_frontend { struct clk *ram_clk; struct regmap *regs; struct reset_control *reset; + + const struct sun4i_frontend_data *data; };
extern const struct of_device_id sun4i_frontend_of_table[];
From: Maxime Ripard maxime.ripard@bootlin.com
The COEF_RDY bit is used to tell the hardware that new FIR filters coefficients have been written to the registers and that the hardware should take them into account starting next frame.
Signed-off-by: Maxime Ripard maxime.ripard@bootlin.com Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 6636b1998a76..7a1095b004d4 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -96,6 +96,10 @@ static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend) sun4i_frontend_vert_coef[i]); }
+ regmap_write_bits(frontend->regs, + SUN4I_FRONTEND_FRM_CTRL_REG, + SUN4I_FRONTEND_FRM_CTRL_COEF_RDY, + SUN4I_FRONTEND_FRM_CTRL_COEF_RDY); }
int sun4i_frontend_init(struct sun4i_frontend *frontend)
From: Maxime Ripard maxime.ripard@bootlin.com
The COEF_RDY bit isn't found in all the SoCs featuring some variant of the frontend.
Add it to our quirks structure.
Signed-off-by: Maxime Ripard maxime.ripard@bootlin.com Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 9 +++++---- drivers/gpu/drm/sun4i/sun4i_frontend.h | 1 + 2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 7a1095b004d4..86c5033102b9 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -96,10 +96,11 @@ static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend) sun4i_frontend_vert_coef[i]); }
- regmap_write_bits(frontend->regs, - SUN4I_FRONTEND_FRM_CTRL_REG, - SUN4I_FRONTEND_FRM_CTRL_COEF_RDY, - SUN4I_FRONTEND_FRM_CTRL_COEF_RDY); + if (frontend->data->has_coef_rdy) + regmap_write_bits(frontend->regs, + SUN4I_FRONTEND_FRM_CTRL_REG, + SUN4I_FRONTEND_FRM_CTRL_COEF_RDY, + SUN4I_FRONTEND_FRM_CTRL_COEF_RDY); }
int sun4i_frontend_init(struct sun4i_frontend *frontend) diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index 01e68bb11c98..e332bc1c6b68 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -114,6 +114,7 @@ struct reset_control;
struct sun4i_frontend_data { bool has_coef_access_ctrl; + bool has_coef_rdy; };
struct sun4i_frontend {
From: Maxime Ripard maxime.ripard@bootlin.com
The FIR filters phase depend on the SoC, so let's move it to our quirks structure instead of removing them.
Signed-off-by: Maxime Ripard maxime.ripard@bootlin.com Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 28 ++++++++++++++++++++------ drivers/gpu/drm/sun4i/sun4i_frontend.h | 5 +++++ 2 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 86c5033102b9..4a215d5202e2 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -438,12 +438,18 @@ int sun4i_frontend_update_formats(struct sun4i_frontend *frontend, * I have no idea what this does exactly, but it seems to be * related to the scaler FIR filter phase parameters. */ - regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZPHASE_REG, 0x400); - regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZPHASE_REG, 0x400); - regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE0_REG, 0x400); - regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE0_REG, 0x400); - regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG, 0x400); - regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG, 0x400); + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZPHASE_REG, + frontend->data->ch_phase[0].horzphase); + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZPHASE_REG, + frontend->data->ch_phase[1].horzphase); + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE0_REG, + frontend->data->ch_phase[0].vertphase[0]); + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE0_REG, + frontend->data->ch_phase[1].vertphase[0]); + regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG, + frontend->data->ch_phase[0].vertphase[1]); + regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG, + frontend->data->ch_phase[1].vertphase[1]);
/* * Checking the input format is sufficient since we currently only @@ -677,6 +683,16 @@ static const struct dev_pm_ops sun4i_frontend_pm_ops = { };
static const struct sun4i_frontend_data sun8i_a33_frontend = { + .ch_phase = { + { + .horzphase = 0x400, + .vertphase = { 0x400, 0x400 }, + }, + { + .horzphase = 0x400, + .vertphase = { 0x400, 0x400 }, + }, + }, .has_coef_access_ctrl = true, };
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.h b/drivers/gpu/drm/sun4i/sun4i_frontend.h index e332bc1c6b68..0c382c1ddb0f 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.h +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.h @@ -115,6 +115,11 @@ struct reset_control; struct sun4i_frontend_data { bool has_coef_access_ctrl; bool has_coef_rdy; + + struct { + u32 horzphase; + u32 vertphase[2]; + } ch_phase[2]; };
struct sun4i_frontend {
This adds the appropriate device-tree compatible and quirk data for hooking frontend support for the A20. It supports the FIR coefficients ready bit but not the access control bit. It also takes different phase values than the A33 for these coefficients.
The compatible is already used in the A20 device-tree and already documented in the device-tree bindings.
Signed-off-by: Paul Kocialkowski paul.kocialkowski@bootlin.com Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- drivers/gpu/drm/sun4i/sun4i_frontend.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 4a215d5202e2..a1a4108f226e 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -682,6 +682,20 @@ static const struct dev_pm_ops sun4i_frontend_pm_ops = { .runtime_suspend = sun4i_frontend_runtime_suspend, };
+static const struct sun4i_frontend_data sun7i_a20_frontend = { + .ch_phase = { + { + .horzphase = 0, + .vertphase = { 0, 0 }, + }, + { + .horzphase = 0xfc000, + .vertphase = { 0xfc000, 0xfc000 }, + }, + }, + .has_coef_rdy = true, +}; + static const struct sun4i_frontend_data sun8i_a33_frontend = { .ch_phase = { { @@ -697,6 +711,10 @@ static const struct sun4i_frontend_data sun8i_a33_frontend = { };
const struct of_device_id sun4i_frontend_of_table[] = { + { + .compatible = "allwinner,sun7i-a20-display-frontend", + .data = &sun7i_a20_frontend + }, { .compatible = "allwinner,sun8i-a33-display-frontend", .data = &sun8i_a33_frontend
On Wed, 2018-12-05 at 09:36 +0100, Paul Kocialkowski wrote:
This series should be about ready for merge for the sun4i parts, but I'd like to get some feedback regarding the new helpers introduced to drm_fourcc (patches 1/ and 2/) as well as the introduction of the Allwinner tiling definitions (patch 11/).
Does anyone have any objection or suggestion regarding these patches or can we go ahead and merge them along with the remaining driver patches in this series?
Cheers,
Paul
dri-devel@lists.freedesktop.org
-
Maxime Ripard -
Paul Kocialkowski