From: "Lowry Li (Arm Technology China)" Lowry.Li@arm.com
Adds to support register dump on lpu and dou of pipeline and gcu on D71
Changes since v1: - For a constant format without additional arguments, use seq_puts() instead of seq_printf().
Signed-off-by: Lowry Li (Arm Technology China) lowry.li@arm.com --- .../arm/display/komeda/d71/d71_component.c | 86 ++++++++++++++++++- .../gpu/drm/arm/display/komeda/d71/d71_dev.c | 23 ++--- .../gpu/drm/arm/display/komeda/d71/d71_dev.h | 2 + .../gpu/drm/arm/display/komeda/komeda_dev.c | 2 + 4 files changed, 101 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c index 4073a452e24a..7ba3c135142c 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c @@ -1206,6 +1206,90 @@ int d71_probe_block(struct d71_dev *d71, return err; }
+static void d71_gcu_dump(struct d71_dev *d71, struct seq_file *sf) +{ + u32 v[5]; + + seq_puts(sf, "\n------ GCU ------\n"); + + get_values_from_reg(d71->gcu_addr, 0, 3, v); + seq_printf(sf, "GLB_ARCH_ID:\t\t0x%X\n", v[0]); + seq_printf(sf, "GLB_CORE_ID:\t\t0x%X\n", v[1]); + seq_printf(sf, "GLB_CORE_INFO:\t\t0x%X\n", v[2]); + + get_values_from_reg(d71->gcu_addr, 0x10, 1, v); + seq_printf(sf, "GLB_IRQ_STATUS:\t\t0x%X\n", v[0]); + + get_values_from_reg(d71->gcu_addr, 0xA0, 5, v); + seq_printf(sf, "GCU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); + seq_printf(sf, "GCU_IRQ_CLEAR:\t\t0x%X\n", v[1]); + seq_printf(sf, "GCU_IRQ_MASK:\t\t0x%X\n", v[2]); + seq_printf(sf, "GCU_IRQ_STATUS:\t\t0x%X\n", v[3]); + seq_printf(sf, "GCU_STATUS:\t\t0x%X\n", v[4]); + + get_values_from_reg(d71->gcu_addr, 0xD0, 3, v); + seq_printf(sf, "GCU_CONTROL:\t\t0x%X\n", v[0]); + seq_printf(sf, "GCU_CONFIG_VALID0:\t0x%X\n", v[1]); + seq_printf(sf, "GCU_CONFIG_VALID1:\t0x%X\n", v[2]); +} + +static void d71_lpu_dump(struct d71_pipeline *pipe, struct seq_file *sf) +{ + u32 v[6]; + + seq_printf(sf, "\n------ LPU%d ------\n", pipe->base.id); + + dump_block_header(sf, pipe->lpu_addr); + + get_values_from_reg(pipe->lpu_addr, 0xA0, 6, v); + seq_printf(sf, "LPU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); + seq_printf(sf, "LPU_IRQ_CLEAR:\t\t0x%X\n", v[1]); + seq_printf(sf, "LPU_IRQ_MASK:\t\t0x%X\n", v[2]); + seq_printf(sf, "LPU_IRQ_STATUS:\t\t0x%X\n", v[3]); + seq_printf(sf, "LPU_STATUS:\t\t0x%X\n", v[4]); + seq_printf(sf, "LPU_TBU_STATUS:\t\t0x%X\n", v[5]); + + get_values_from_reg(pipe->lpu_addr, 0xC0, 1, v); + seq_printf(sf, "LPU_INFO:\t\t0x%X\n", v[0]); + + get_values_from_reg(pipe->lpu_addr, 0xD0, 3, v); + seq_printf(sf, "LPU_RAXI_CONTROL:\t0x%X\n", v[0]); + seq_printf(sf, "LPU_WAXI_CONTROL:\t0x%X\n", v[1]); + seq_printf(sf, "LPU_TBU_CONTROL:\t0x%X\n", v[2]); +} + +static void d71_dou_dump(struct d71_pipeline *pipe, struct seq_file *sf) +{ + u32 v[5]; + + seq_printf(sf, "\n------ DOU%d ------\n", pipe->base.id); + + dump_block_header(sf, pipe->dou_addr); + + get_values_from_reg(pipe->dou_addr, 0xA0, 5, v); + seq_printf(sf, "DOU_IRQ_RAW_STATUS:\t0x%X\n", v[0]); + seq_printf(sf, "DOU_IRQ_CLEAR:\t\t0x%X\n", v[1]); + seq_printf(sf, "DOU_IRQ_MASK:\t\t0x%X\n", v[2]); + seq_printf(sf, "DOU_IRQ_STATUS:\t\t0x%X\n", v[3]); + seq_printf(sf, "DOU_STATUS:\t\t0x%X\n", v[4]); +} + +static void d71_pipeline_dump(struct komeda_pipeline *pipe, struct seq_file *sf) +{ + struct d71_pipeline *d71_pipe = to_d71_pipeline(pipe); + + d71_lpu_dump(d71_pipe, sf); + d71_dou_dump(d71_pipe, sf); +} + const struct komeda_pipeline_funcs d71_pipeline_funcs = { - .downscaling_clk_check = d71_downscaling_clk_check, + .downscaling_clk_check = d71_downscaling_clk_check, + .dump_register = d71_pipeline_dump, }; + +void d71_dump(struct komeda_dev *mdev, struct seq_file *sf) +{ + struct d71_dev *d71 = mdev->chip_data; + + d71_gcu_dump(d71, sf); +} diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c index d567ab7ed314..0b763ea543ac 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c @@ -561,17 +561,18 @@ static int d71_disconnect_iommu(struct komeda_dev *mdev) }
static const struct komeda_dev_funcs d71_chip_funcs = { - .init_format_table = d71_init_fmt_tbl, - .enum_resources = d71_enum_resources, - .cleanup = d71_cleanup, - .irq_handler = d71_irq_handler, - .enable_irq = d71_enable_irq, - .disable_irq = d71_disable_irq, - .on_off_vblank = d71_on_off_vblank, - .change_opmode = d71_change_opmode, - .flush = d71_flush, - .connect_iommu = d71_connect_iommu, - .disconnect_iommu = d71_disconnect_iommu, + .init_format_table = d71_init_fmt_tbl, + .enum_resources = d71_enum_resources, + .cleanup = d71_cleanup, + .irq_handler = d71_irq_handler, + .enable_irq = d71_enable_irq, + .disable_irq = d71_disable_irq, + .on_off_vblank = d71_on_off_vblank, + .change_opmode = d71_change_opmode, + .flush = d71_flush, + .connect_iommu = d71_connect_iommu, + .disconnect_iommu = d71_disconnect_iommu, + .dump_register = d71_dump, };
const struct komeda_dev_funcs * diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h index 84f1878b647d..c7357c2b9e62 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h @@ -49,4 +49,6 @@ int d71_probe_block(struct d71_dev *d71, struct block_header *blk, u32 __iomem *reg); void d71_read_block_header(u32 __iomem *reg, struct block_header *blk);
+void d71_dump(struct komeda_dev *mdev, struct seq_file *sf); + #endif /* !_D71_DEV_H_ */ diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c index 9d4d5075cc64..4aa324d46409 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c @@ -25,6 +25,8 @@ static int komeda_register_show(struct seq_file *sf, void *x) struct komeda_dev *mdev = sf->private; int i;
+ seq_puts(sf, "\n====== Komeda register dump =========\n"); + if (mdev->funcs->dump_register) mdev->funcs->dump_register(mdev, sf);
On Tue, Sep 17, 2019 at 11:25:44AM +0000, Lowry Li (Arm Technology China) wrote:
From: "Lowry Li (Arm Technology China)" Lowry.Li@arm.com
Adds to support register dump on lpu and dou of pipeline and gcu on D71
Changes since v1:
- For a constant format without additional arguments, use seq_puts()
instead of seq_printf().
Signed-off-by: Lowry Li (Arm Technology China) lowry.li@arm.com
.../arm/display/komeda/d71/d71_component.c | 86 ++++++++++++++++++- .../gpu/drm/arm/display/komeda/d71/d71_dev.c | 23 ++--- .../gpu/drm/arm/display/komeda/d71/d71_dev.h | 2 + .../gpu/drm/arm/display/komeda/komeda_dev.c | 2 + 4 files changed, 101 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c index 4073a452e24a..7ba3c135142c 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c @@ -1206,6 +1206,90 @@ int d71_probe_block(struct d71_dev *d71, return err; }
+static void d71_gcu_dump(struct d71_dev *d71, struct seq_file *sf) +{
- u32 v[5];
- seq_puts(sf, "\n------ GCU ------\n");
- get_values_from_reg(d71->gcu_addr, 0, 3, v);
- seq_printf(sf, "GLB_ARCH_ID:\t\t0x%X\n", v[0]);
- seq_printf(sf, "GLB_CORE_ID:\t\t0x%X\n", v[1]);
- seq_printf(sf, "GLB_CORE_INFO:\t\t0x%X\n", v[2]);
- get_values_from_reg(d71->gcu_addr, 0x10, 1, v);
- seq_printf(sf, "GLB_IRQ_STATUS:\t\t0x%X\n", v[0]);
- get_values_from_reg(d71->gcu_addr, 0xA0, 5, v);
- seq_printf(sf, "GCU_IRQ_RAW_STATUS:\t0x%X\n", v[0]);
- seq_printf(sf, "GCU_IRQ_CLEAR:\t\t0x%X\n", v[1]);
- seq_printf(sf, "GCU_IRQ_MASK:\t\t0x%X\n", v[2]);
- seq_printf(sf, "GCU_IRQ_STATUS:\t\t0x%X\n", v[3]);
- seq_printf(sf, "GCU_STATUS:\t\t0x%X\n", v[4]);
- get_values_from_reg(d71->gcu_addr, 0xD0, 3, v);
- seq_printf(sf, "GCU_CONTROL:\t\t0x%X\n", v[0]);
- seq_printf(sf, "GCU_CONFIG_VALID0:\t0x%X\n", v[1]);
- seq_printf(sf, "GCU_CONFIG_VALID1:\t0x%X\n", v[2]);
+}
+static void d71_lpu_dump(struct d71_pipeline *pipe, struct seq_file *sf) +{
- u32 v[6];
- seq_printf(sf, "\n------ LPU%d ------\n", pipe->base.id);
- dump_block_header(sf, pipe->lpu_addr);
- get_values_from_reg(pipe->lpu_addr, 0xA0, 6, v);
- seq_printf(sf, "LPU_IRQ_RAW_STATUS:\t0x%X\n", v[0]);
- seq_printf(sf, "LPU_IRQ_CLEAR:\t\t0x%X\n", v[1]);
- seq_printf(sf, "LPU_IRQ_MASK:\t\t0x%X\n", v[2]);
- seq_printf(sf, "LPU_IRQ_STATUS:\t\t0x%X\n", v[3]);
- seq_printf(sf, "LPU_STATUS:\t\t0x%X\n", v[4]);
- seq_printf(sf, "LPU_TBU_STATUS:\t\t0x%X\n", v[5]);
- get_values_from_reg(pipe->lpu_addr, 0xC0, 1, v);
- seq_printf(sf, "LPU_INFO:\t\t0x%X\n", v[0]);
- get_values_from_reg(pipe->lpu_addr, 0xD0, 3, v);
- seq_printf(sf, "LPU_RAXI_CONTROL:\t0x%X\n", v[0]);
- seq_printf(sf, "LPU_WAXI_CONTROL:\t0x%X\n", v[1]);
- seq_printf(sf, "LPU_TBU_CONTROL:\t0x%X\n", v[2]);
+}
+static void d71_dou_dump(struct d71_pipeline *pipe, struct seq_file *sf) +{
- u32 v[5];
- seq_printf(sf, "\n------ DOU%d ------\n", pipe->base.id);
- dump_block_header(sf, pipe->dou_addr);
- get_values_from_reg(pipe->dou_addr, 0xA0, 5, v);
- seq_printf(sf, "DOU_IRQ_RAW_STATUS:\t0x%X\n", v[0]);
- seq_printf(sf, "DOU_IRQ_CLEAR:\t\t0x%X\n", v[1]);
- seq_printf(sf, "DOU_IRQ_MASK:\t\t0x%X\n", v[2]);
- seq_printf(sf, "DOU_IRQ_STATUS:\t\t0x%X\n", v[3]);
- seq_printf(sf, "DOU_STATUS:\t\t0x%X\n", v[4]);
+}
+static void d71_pipeline_dump(struct komeda_pipeline *pipe, struct seq_file *sf) +{
- struct d71_pipeline *d71_pipe = to_d71_pipeline(pipe);
- d71_lpu_dump(d71_pipe, sf);
- d71_dou_dump(d71_pipe, sf);
+}
const struct komeda_pipeline_funcs d71_pipeline_funcs = {
- .downscaling_clk_check = d71_downscaling_clk_check,
- .downscaling_clk_check = d71_downscaling_clk_check,
- .dump_register = d71_pipeline_dump,
};
+void d71_dump(struct komeda_dev *mdev, struct seq_file *sf) +{
- struct d71_dev *d71 = mdev->chip_data;
- d71_gcu_dump(d71, sf);
+} diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c index d567ab7ed314..0b763ea543ac 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c @@ -561,17 +561,18 @@ static int d71_disconnect_iommu(struct komeda_dev *mdev) }
static const struct komeda_dev_funcs d71_chip_funcs = {
- .init_format_table = d71_init_fmt_tbl,
- .enum_resources = d71_enum_resources,
- .cleanup = d71_cleanup,
- .irq_handler = d71_irq_handler,
- .enable_irq = d71_enable_irq,
- .disable_irq = d71_disable_irq,
- .on_off_vblank = d71_on_off_vblank,
- .change_opmode = d71_change_opmode,
- .flush = d71_flush,
- .connect_iommu = d71_connect_iommu,
- .disconnect_iommu = d71_disconnect_iommu,
- .init_format_table = d71_init_fmt_tbl,
- .enum_resources = d71_enum_resources,
- .cleanup = d71_cleanup,
- .irq_handler = d71_irq_handler,
- .enable_irq = d71_enable_irq,
- .disable_irq = d71_disable_irq,
- .on_off_vblank = d71_on_off_vblank,
- .change_opmode = d71_change_opmode,
- .flush = d71_flush,
- .connect_iommu = d71_connect_iommu,
- .disconnect_iommu = d71_disconnect_iommu,
- .dump_register = d71_dump,
};
const struct komeda_dev_funcs * diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h index 84f1878b647d..c7357c2b9e62 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h @@ -49,4 +49,6 @@ int d71_probe_block(struct d71_dev *d71, struct block_header *blk, u32 __iomem *reg); void d71_read_block_header(u32 __iomem *reg, struct block_header *blk);
+void d71_dump(struct komeda_dev *mdev, struct seq_file *sf);
#endif /* !_D71_DEV_H_ */ diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c index 9d4d5075cc64..4aa324d46409 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c @@ -25,6 +25,8 @@ static int komeda_register_show(struct seq_file *sf, void *x) struct komeda_dev *mdev = sf->private; int i;
- seq_puts(sf, "\n====== Komeda register dump =========\n");
- if (mdev->funcs->dump_register) mdev->funcs->dump_register(mdev, sf);
Reviewed-by: James Qian Wang (Arm Technology China) james.qian.wang@arm.com
And I'll push it to drm-misc
Best Regards. James
dri-devel@lists.freedesktop.org
-
james qian wang (Arm Technology China) -
Lowry Li (Arm Technology China)