Fix typo in parameter description.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem") Reported-by: Hulk Robot hulkci@huawei.com Signed-off-by: Wei Yongjun weiyongjun1@huawei.com --- drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 821f7a71e182..3d53638ab15e 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)"); */ static uint zynqmp_dp_power_on_delay_ms = 4; module_param_named(power_on_delay_ms, zynqmp_dp_power_on_delay_ms, uint, 0444); -MODULE_PARM_DESC(aux_timeout_ms, "DP power on delay in msec (default: 4)"); +MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)");
/* Link configuration registers */ #define ZYNQMP_DP_LINK_BW_SET 0x0
Hi Hyun Kwon,
Are you all sorted with drm-misc commit rights so you can push the 3 (maybe there's more) xlnx fixup patches to drm-misc-next-fixes?
Cheers, Daniel
On Sat, Jul 25, 2020 at 06:34:29AM +0000, Wei Yongjun wrote:
Fix typo in parameter description.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem") Reported-by: Hulk Robot hulkci@huawei.com Signed-off-by: Wei Yongjun weiyongjun1@huawei.com
drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 821f7a71e182..3d53638ab15e 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)"); */ static uint zynqmp_dp_power_on_delay_ms = 4; module_param_named(power_on_delay_ms, zynqmp_dp_power_on_delay_ms, uint, 0444); -MODULE_PARM_DESC(aux_timeout_ms, "DP power on delay in msec (default: 4)"); +MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)");
/* Link configuration registers */ #define ZYNQMP_DP_LINK_BW_SET 0x0
On Wed, Jul 29, 2020 at 12:02:05AM +0200, daniel@ffwll.ch wrote:
Hi Hyun Kwon,
Are you all sorted with drm-misc commit rights so you can push the 3 (maybe there's more) xlnx fixup patches to drm-misc-next-fixes?
Thanks Daniel for bringing this up.
Hyun, would that work for you ?
On Sat, Jul 25, 2020 at 06:34:29AM +0000, Wei Yongjun wrote:
Fix typo in parameter description.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem") Reported-by: Hulk Robot hulkci@huawei.com Signed-off-by: Wei Yongjun weiyongjun1@huawei.com
drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 821f7a71e182..3d53638ab15e 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)"); */ static uint zynqmp_dp_power_on_delay_ms = 4; module_param_named(power_on_delay_ms, zynqmp_dp_power_on_delay_ms, uint, 0444); -MODULE_PARM_DESC(aux_timeout_ms, "DP power on delay in msec (default: 4)"); +MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)");
/* Link configuration registers */ #define ZYNQMP_DP_LINK_BW_SET 0x0
Hello,
On Tue, Jul 28, 2020 at 03:35:43PM -0700, Laurent Pinchart wrote:
On Wed, Jul 29, 2020 at 12:02:05AM +0200, daniel@ffwll.ch wrote:
Hi Hyun Kwon,
Are you all sorted with drm-misc commit rights so you can push the 3 (maybe there's more) xlnx fixup patches to drm-misc-next-fixes?
Thanks Daniel for bringing this up.
Hyun, would that work for you ?
Should I commit small fixups directly to, https://cgit.freedesktop.org/drm/drm-misc/log/?h=drm-misc-next-fixes?
I received the account for drm-misc a couple years ago, and was able to access back then. But now someting has changed, and I can't access at the moment. I'll need some time to fix my setup. Maybe some help would be appreciated to speed up. I may ping you offline if you don't mind.
Thanks, -hyun
On Sat, Jul 25, 2020 at 06:34:29AM +0000, Wei Yongjun wrote:
Fix typo in parameter description.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem") Reported-by: Hulk Robot hulkci@huawei.com Signed-off-by: Wei Yongjun weiyongjun1@huawei.com
drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 821f7a71e182..3d53638ab15e 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)"); */ static uint zynqmp_dp_power_on_delay_ms = 4; module_param_named(power_on_delay_ms, zynqmp_dp_power_on_delay_ms, uint, 0444); -MODULE_PARM_DESC(aux_timeout_ms, "DP power on delay in msec (default: 4)"); +MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)");
/* Link configuration registers */ #define ZYNQMP_DP_LINK_BW_SET0x0
-- Regards,
Laurent Pinchart
On Wed, Jul 29, 2020 at 2:33 AM Hyun Kwon hyun.kwon@xilinx.com wrote:
Hello,
On Tue, Jul 28, 2020 at 03:35:43PM -0700, Laurent Pinchart wrote:
On Wed, Jul 29, 2020 at 12:02:05AM +0200, daniel@ffwll.ch wrote:
Hi Hyun Kwon,
Are you all sorted with drm-misc commit rights so you can push the 3 (maybe there's more) xlnx fixup patches to drm-misc-next-fixes?
Thanks Daniel for bringing this up.
Hyun, would that work for you ?
Should I commit small fixups directly to, https://cgit.freedesktop.org/drm/drm-misc/log/?h=drm-misc-next-fixes?
Well these patches right now need to go there, but that's not always the case. We have a flowchart for that now:
https://drm.pages.freedesktop.org/maintainer-tools/committer-drm-misc.html#w...
I received the account for drm-misc a couple years ago, and was able to access back then. But now someting has changed, and I can't access at the moment. I'll need some time to fix my setup. Maybe some help would be appreciated to speed up. I may ping you offline if you don't mind.
Sure, happy to help out. -Daniel
Thanks, -hyun
On Sat, Jul 25, 2020 at 06:34:29AM +0000, Wei Yongjun wrote:
Fix typo in parameter description.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem") Reported-by: Hulk Robot hulkci@huawei.com Signed-off-by: Wei Yongjun weiyongjun1@huawei.com
drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 821f7a71e182..3d53638ab15e 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)"); */ static uint zynqmp_dp_power_on_delay_ms = 4; module_param_named(power_on_delay_ms, zynqmp_dp_power_on_delay_ms, uint, 0444); -MODULE_PARM_DESC(aux_timeout_ms, "DP power on delay in msec (default: 4)"); +MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)");
/* Link configuration registers */ #define ZYNQMP_DP_LINK_BW_SET0x0
-- Regards,
Laurent Pinchart
Hi Wei,
Thank you for the patch.
On Sat, Jul 25, 2020 at 06:34:29AM +0000, Wei Yongjun wrote:
Fix typo in parameter description.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem") Reported-by: Hulk Robot hulkci@huawei.com Signed-off-by: Wei Yongjun weiyongjun1@huawei.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 821f7a71e182..3d53638ab15e 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)"); */ static uint zynqmp_dp_power_on_delay_ms = 4; module_param_named(power_on_delay_ms, zynqmp_dp_power_on_delay_ms, uint, 0444); -MODULE_PARM_DESC(aux_timeout_ms, "DP power on delay in msec (default: 4)"); +MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)");
/* Link configuration registers */ #define ZYNQMP_DP_LINK_BW_SET 0x0
Hi Wei,
Thanks for the patch.
On Tue, Jul 28, 2020 at 03:33:49PM -0700, Laurent Pinchart wrote:
Hi Wei,
Thank you for the patch.
On Sat, Jul 25, 2020 at 06:34:29AM +0000, Wei Yongjun wrote:
Fix typo in parameter description.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort Subsystem") Reported-by: Hulk Robot hulkci@huawei.com Signed-off-by: Wei Yongjun weiyongjun1@huawei.com
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
Reviewed-by: Hyun Kwon hyun.kwon@xilinx.com
I'll commit this to drm-misc-next-fixes soon.
Thanks, -hyun
drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c index 821f7a71e182..3d53638ab15e 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -44,7 +44,7 @@ MODULE_PARM_DESC(aux_timeout_ms, "DP aux timeout value in msec (default: 50)"); */ static uint zynqmp_dp_power_on_delay_ms = 4; module_param_named(power_on_delay_ms, zynqmp_dp_power_on_delay_ms, uint, 0444); -MODULE_PARM_DESC(aux_timeout_ms, "DP power on delay in msec (default: 4)"); +MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in msec (default: 4)");
/* Link configuration registers */ #define ZYNQMP_DP_LINK_BW_SET 0x0
-- Regards,
Laurent Pinchart
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