Unfortunately AGP is still to widely used as we could just drop support for using its GART.
Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART.
For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available.
Please comment, Christian.
Always use the PCI GART instead.
Signed-off-by: Christian König christian.koenig@amd.com --- drivers/gpu/drm/radeon/radeon_drv.c | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index bbb0883e8ce6..a71f13116d6b 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -171,12 +171,7 @@ int radeon_no_wb; int radeon_modeset = -1; int radeon_dynclks = -1; int radeon_r4xx_atom = 0; -#ifdef __powerpc__ -/* Default to PCI on PowerPC (fdo #95017) */ int radeon_agpmode = -1; -#else -int radeon_agpmode = 0; -#endif int radeon_vram_limit = 0; int radeon_gart_size = -1; /* auto */ int radeon_benchmarking = 0;
On Wed, May 13, 2020 at 1:21 PM Christian König ckoenig.leichtzumerken@gmail.com wrote:
Always use the PCI GART instead.
Reviewed-by: Mathieu Malaterre malat@debian.org
Signed-off-by: Christian König christian.koenig@amd.com
drivers/gpu/drm/radeon/radeon_drv.c | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index bbb0883e8ce6..a71f13116d6b 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -171,12 +171,7 @@ int radeon_no_wb; int radeon_modeset = -1; int radeon_dynclks = -1; int radeon_r4xx_atom = 0; -#ifdef __powerpc__ -/* Default to PCI on PowerPC (fdo #95017) */ int radeon_agpmode = -1; -#else -int radeon_agpmode = 0; -#endif int radeon_vram_limit = 0; int radeon_gart_size = -1; /* auto */ int radeon_benchmarking = 0; -- 2.17.1
Even when core AGP support is compiled in Radeon and Nouveau can also work with the PCI GART.
The AGP support was notorious unstable and hard to maintain, so deprecate it for now and only enable it if there is a good reason to do so.
Signed-off-by: Christian König christian.koenig@amd.com --- drivers/gpu/drm/Kconfig | 8 ++++++++ drivers/gpu/drm/nouveau/nouveau_bo.c | 8 ++++---- drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h | 2 +- drivers/gpu/drm/radeon/radeon_agp.c | 8 ++++---- drivers/gpu/drm/radeon/radeon_ttm.c | 10 +++++----- drivers/gpu/drm/ttm/Makefile | 2 +- 6 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 4f4e7fa001c1..52d834303766 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -182,6 +182,14 @@ config DRM_TTM GPU memory types. Will be enabled automatically if a device driver uses it.
+config DRM_TTM_AGP + bool "TTM AGP GART support (deprecated)" + depends on DRM_TTM && AGP + default n + help + Enables deprecated AGP GART support in TTM. + Less reliable than PCI GART, but faster in some cases. + config DRM_TTM_DMA_PAGE_POOL bool depends on DRM_TTM && (SWIOTLB || INTEL_IOMMU) diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index c40f127de3d0..c73d4ae48f5c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -635,7 +635,7 @@ nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val) static struct ttm_tt * nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
if (drm->agp.bridge) { @@ -1448,7 +1448,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg) /* System memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { reg->bus.offset = reg->start << PAGE_SHIFT; reg->bus.base = drm->agp.base; @@ -1603,7 +1603,7 @@ nouveau_ttm_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { return ttm_agp_tt_populate(ttm, ctx); } @@ -1656,7 +1656,7 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { ttm_agp_tt_unpopulate(ttm); return; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h index ad4d3621d02b..d572528da852 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: MIT */ #include "priv.h" -#if defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE)) +#if defined(CONFIG_DRM_TTM_AGP) #ifndef __NVKM_PCI_AGP_H__ #define __NVKM_PCI_AGP_H__
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c index 0aca7bdf54c7..294d19301708 100644 --- a/drivers/gpu/drm/radeon/radeon_agp.c +++ b/drivers/gpu/drm/radeon/radeon_agp.c @@ -33,7 +33,7 @@
#include "radeon.h"
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP)
struct radeon_agpmode_quirk { u32 hostbridge_vendor; @@ -131,7 +131,7 @@ static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
int radeon_agp_init(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; struct drm_agp_mode mode; struct drm_agp_info info; @@ -265,7 +265,7 @@ int radeon_agp_init(struct radeon_device *rdev)
void radeon_agp_resume(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) int r; if (rdev->flags & RADEON_IS_AGP) { r = radeon_agp_init(rdev); @@ -277,7 +277,7 @@ void radeon_agp_resume(struct radeon_device *rdev)
void radeon_agp_fini(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->ddev->agp && rdev->ddev->agp->acquired) { drm_agp_release(rdev->ddev); } diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 5d50c9edbe80..4f9c4e5f8263 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -86,7 +86,7 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { if (!rdev->ddev->agp) { DRM_ERROR("AGP is not enabled for memory type %u\n", @@ -411,7 +411,7 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ /* system memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { /* RADEON_IS_AGP is set only if AGP is active */ mem->bus.offset = mem->start << PAGE_SHIFT; @@ -631,7 +631,7 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, struct radeon_ttm_tt *gtt;
rdev = radeon_get_rdev(bo->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, page_flags); @@ -683,7 +683,7 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm, }
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { return ttm_agp_tt_populate(ttm, ctx); } @@ -714,7 +714,7 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm) return;
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { ttm_agp_tt_unpopulate(ttm); return; diff --git a/drivers/gpu/drm/ttm/Makefile b/drivers/gpu/drm/ttm/Makefile index caea2a099496..aa772b198012 100644 --- a/drivers/gpu/drm/ttm/Makefile +++ b/drivers/gpu/drm/ttm/Makefile @@ -5,7 +5,7 @@ ttm-y := ttm_memory.o ttm_tt.o ttm_bo.o \ ttm_bo_util.o ttm_bo_vm.o ttm_module.o \ ttm_execbuf_util.o ttm_page_alloc.o ttm_bo_manager.o -ttm-$(CONFIG_AGP) += ttm_agp_backend.o +ttm-$(CONFIG_DRM_TTM_AGP) += ttm_agp_backend.o ttm-$(CONFIG_DRM_TTM_DMA_PAGE_POOL) += ttm_page_alloc_dma.o
obj-$(CONFIG_DRM_TTM) += ttm.o
On Wed, May 13, 2020 at 01:03:13PM +0200, Christian König wrote:
Even when core AGP support is compiled in Radeon and Nouveau can also work with the PCI GART.
The AGP support was notorious unstable and hard to maintain, so deprecate it for now and only enable it if there is a good reason to do so.
Signed-off-by: Christian König christian.koenig@amd.com
So a lot more work, and more risk (but hey it's agp, how busted can it get) could be to demidlayer this. I.e. a small set of helpers to create a TTM_PL_TT manager, backed by agp. With zero agp code remaining in ttm itself, and all the ttm agp code moved out to a ttm-agp-helper.ko module that drivers would call.
But again a lot of work, so really only an option if we can't sunset agp directly. -Daniel
drivers/gpu/drm/Kconfig | 8 ++++++++ drivers/gpu/drm/nouveau/nouveau_bo.c | 8 ++++---- drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h | 2 +- drivers/gpu/drm/radeon/radeon_agp.c | 8 ++++---- drivers/gpu/drm/radeon/radeon_ttm.c | 10 +++++----- drivers/gpu/drm/ttm/Makefile | 2 +- 6 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 4f4e7fa001c1..52d834303766 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -182,6 +182,14 @@ config DRM_TTM GPU memory types. Will be enabled automatically if a device driver uses it.
+config DRM_TTM_AGP
- bool "TTM AGP GART support (deprecated)"
- depends on DRM_TTM && AGP
- default n
- help
Enables deprecated AGP GART support in TTM.Less reliable than PCI GART, but faster in some cases.config DRM_TTM_DMA_PAGE_POOL bool depends on DRM_TTM && (SWIOTLB || INTEL_IOMMU) diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index c40f127de3d0..c73d4ae48f5c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -635,7 +635,7 @@ nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val) static struct ttm_tt * nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
if (drm->agp.bridge) { @@ -1448,7 +1448,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg) /* System memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { reg->bus.offset = reg->start << PAGE_SHIFT; reg->bus.base = drm->agp.base; @@ -1603,7 +1603,7 @@ nouveau_ttm_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { return ttm_agp_tt_populate(ttm, ctx); } @@ -1656,7 +1656,7 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { ttm_agp_tt_unpopulate(ttm); return; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h index ad4d3621d02b..d572528da852 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: MIT */ #include "priv.h" -#if defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE)) +#if defined(CONFIG_DRM_TTM_AGP) #ifndef __NVKM_PCI_AGP_H__ #define __NVKM_PCI_AGP_H__
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c index 0aca7bdf54c7..294d19301708 100644 --- a/drivers/gpu/drm/radeon/radeon_agp.c +++ b/drivers/gpu/drm/radeon/radeon_agp.c @@ -33,7 +33,7 @@
#include "radeon.h"
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP)
struct radeon_agpmode_quirk { u32 hostbridge_vendor; @@ -131,7 +131,7 @@ static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
int radeon_agp_init(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; struct drm_agp_mode mode; struct drm_agp_info info; @@ -265,7 +265,7 @@ int radeon_agp_init(struct radeon_device *rdev)
void radeon_agp_resume(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) int r; if (rdev->flags & RADEON_IS_AGP) { r = radeon_agp_init(rdev); @@ -277,7 +277,7 @@ void radeon_agp_resume(struct radeon_device *rdev)
void radeon_agp_fini(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->ddev->agp && rdev->ddev->agp->acquired) { drm_agp_release(rdev->ddev); } diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 5d50c9edbe80..4f9c4e5f8263 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -86,7 +86,7 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { if (!rdev->ddev->agp) { DRM_ERROR("AGP is not enabled for memory type %u\n", @@ -411,7 +411,7 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ /* system memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { /* RADEON_IS_AGP is set only if AGP is active */ mem->bus.offset = mem->start << PAGE_SHIFT; @@ -631,7 +631,7 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, struct radeon_ttm_tt *gtt;
rdev = radeon_get_rdev(bo->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, page_flags); @@ -683,7 +683,7 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm, }
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { return ttm_agp_tt_populate(ttm, ctx); } @@ -714,7 +714,7 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm) return;
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { ttm_agp_tt_unpopulate(ttm); return; diff --git a/drivers/gpu/drm/ttm/Makefile b/drivers/gpu/drm/ttm/Makefile index caea2a099496..aa772b198012 100644 --- a/drivers/gpu/drm/ttm/Makefile +++ b/drivers/gpu/drm/ttm/Makefile @@ -5,7 +5,7 @@ ttm-y := ttm_memory.o ttm_tt.o ttm_bo.o \ ttm_bo_util.o ttm_bo_vm.o ttm_module.o \ ttm_execbuf_util.o ttm_page_alloc.o ttm_bo_manager.o -ttm-$(CONFIG_AGP) += ttm_agp_backend.o +ttm-$(CONFIG_DRM_TTM_AGP) += ttm_agp_backend.o ttm-$(CONFIG_DRM_TTM_DMA_PAGE_POOL) += ttm_page_alloc_dma.o
obj-$(CONFIG_DRM_TTM) += ttm.o
2.17.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Am 13.05.20 um 14:34 schrieb Daniel Vetter:
On Wed, May 13, 2020 at 01:03:13PM +0200, Christian König wrote:
Even when core AGP support is compiled in Radeon and Nouveau can also work with the PCI GART.
The AGP support was notorious unstable and hard to maintain, so deprecate it for now and only enable it if there is a good reason to do so.
Signed-off-by: Christian König christian.koenig@amd.com
So a lot more work, and more risk (but hey it's agp, how busted can it get) could be to demidlayer this. I.e. a small set of helpers to create a TTM_PL_TT manager, backed by agp. With zero agp code remaining in ttm itself, and all the ttm agp code moved out to a ttm-agp-helper.ko module that drivers would call.
Yes, exactly that's the idea which I have in mind for quite a while as well.
Problem is I have exactly one old x86 Mac to test this. Currently trying to get another old system up and running again.
That is not even remotely sufficient to test anything as large as this.
Regards, Christian.
But again a lot of work, so really only an option if we can't sunset agp directly. -Daniel
drivers/gpu/drm/Kconfig | 8 ++++++++ drivers/gpu/drm/nouveau/nouveau_bo.c | 8 ++++---- drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h | 2 +- drivers/gpu/drm/radeon/radeon_agp.c | 8 ++++---- drivers/gpu/drm/radeon/radeon_ttm.c | 10 +++++----- drivers/gpu/drm/ttm/Makefile | 2 +- 6 files changed, 23 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 4f4e7fa001c1..52d834303766 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -182,6 +182,14 @@ config DRM_TTM GPU memory types. Will be enabled automatically if a device driver uses it.
+config DRM_TTM_AGP
- bool "TTM AGP GART support (deprecated)"
- depends on DRM_TTM && AGP
- default n
- help
Enables deprecated AGP GART support in TTM.Less reliable than PCI GART, but faster in some cases.- config DRM_TTM_DMA_PAGE_POOL bool depends on DRM_TTM && (SWIOTLB || INTEL_IOMMU)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index c40f127de3d0..c73d4ae48f5c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -635,7 +635,7 @@ nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val) static struct ttm_tt * nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
if (drm->agp.bridge) { @@ -1448,7 +1448,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *reg) /* System memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { reg->bus.offset = reg->start << PAGE_SHIFT; reg->bus.base = drm->agp.base; @@ -1603,7 +1603,7 @@ nouveau_ttm_tt_populate(struct ttm_tt *ttm, struct ttm_operation_ctx *ctx) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { return ttm_agp_tt_populate(ttm, ctx); } @@ -1656,7 +1656,7 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm) drm = nouveau_bdev(ttm->bdev); dev = drm->dev->dev;
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (drm->agp.bridge) { ttm_agp_tt_unpopulate(ttm); return; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h index ad4d3621d02b..d572528da852 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: MIT */ #include "priv.h" -#if defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE)) +#if defined(CONFIG_DRM_TTM_AGP) #ifndef __NVKM_PCI_AGP_H__ #define __NVKM_PCI_AGP_H__
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c index 0aca7bdf54c7..294d19301708 100644 --- a/drivers/gpu/drm/radeon/radeon_agp.c +++ b/drivers/gpu/drm/radeon/radeon_agp.c @@ -33,7 +33,7 @@
#include "radeon.h"
-#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP)
struct radeon_agpmode_quirk { u32 hostbridge_vendor; @@ -131,7 +131,7 @@ static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
int radeon_agp_init(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; struct drm_agp_mode mode; struct drm_agp_info info; @@ -265,7 +265,7 @@ int radeon_agp_init(struct radeon_device *rdev)
void radeon_agp_resume(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) int r; if (rdev->flags & RADEON_IS_AGP) { r = radeon_agp_init(rdev); @@ -277,7 +277,7 @@ void radeon_agp_resume(struct radeon_device *rdev)
void radeon_agp_fini(struct radeon_device *rdev) { -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->ddev->agp && rdev->ddev->agp->acquired) { drm_agp_release(rdev->ddev); } diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 5d50c9edbe80..4f9c4e5f8263 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -86,7 +86,7 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, man->available_caching = TTM_PL_MASK_CACHING; man->default_caching = TTM_PL_FLAG_CACHED; man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { if (!rdev->ddev->agp) { DRM_ERROR("AGP is not enabled for memory type %u\n", @@ -411,7 +411,7 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ /* system memory */ return 0; case TTM_PL_TT: -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { /* RADEON_IS_AGP is set only if AGP is active */ mem->bus.offset = mem->start << PAGE_SHIFT; @@ -631,7 +631,7 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, struct radeon_ttm_tt *gtt;
rdev = radeon_get_rdev(bo->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, page_flags); @@ -683,7 +683,7 @@ static int radeon_ttm_tt_populate(struct ttm_tt *ttm, }
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { return ttm_agp_tt_populate(ttm, ctx); } @@ -714,7 +714,7 @@ static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm) return;
rdev = radeon_get_rdev(ttm->bdev); -#if IS_ENABLED(CONFIG_AGP) +#if IS_ENABLED(CONFIG_DRM_TTM_AGP) if (rdev->flags & RADEON_IS_AGP) { ttm_agp_tt_unpopulate(ttm); return; diff --git a/drivers/gpu/drm/ttm/Makefile b/drivers/gpu/drm/ttm/Makefile index caea2a099496..aa772b198012 100644 --- a/drivers/gpu/drm/ttm/Makefile +++ b/drivers/gpu/drm/ttm/Makefile @@ -5,7 +5,7 @@ ttm-y := ttm_memory.o ttm_tt.o ttm_bo.o \ ttm_bo_util.o ttm_bo_vm.o ttm_module.o \ ttm_execbuf_util.o ttm_page_alloc.o ttm_bo_manager.o -ttm-$(CONFIG_AGP) += ttm_agp_backend.o +ttm-$(CONFIG_DRM_TTM_AGP) += ttm_agp_backend.o ttm-$(CONFIG_DRM_TTM_DMA_PAGE_POOL) += ttm_page_alloc_dma.o
obj-$(CONFIG_DRM_TTM) += ttm.o
2.17.1
dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Am 13.05.20 um 13:03 schrieb Christian König:
Unfortunately AGP is still to widely used as we could just drop support for using its GART.
Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART.
For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available.
So I've used an ancient system (32bit) to setup a test box for this.
The first GPU I could test is an RV280 (Radeon 9200 PRO) which is easily 15 years old.
What happens in AGP mode is that glxgears shows artifacts during rendering on this system.
In PCI mode those rendering artifacts are gone and glxgears seems to draw everything correctly now.
Performance is obviously not comparable, cause in AGP we don't render all triangles correctly.
The second GPU I could test is an RV630 PRO (Radeon HD 2600 PRO AGP) which is more than 10 years old.
As far as I can tell this one works in both AGP and PCIe mode perfectly fine.
Since this is only a 32bit system I couldn't really test any OpenGL game that well.
But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop.
The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon.
So if anybody wants to get his hands dirty and squeeze a bit more performance out of the old hardware, porting USWC from amdgpu to radeon shouldn't be to much of a problem.
Summing it up I'm still leaning towards disabling AGP completely by default for radeon and deprecate it in TTM as well.
Thoughts? Especially Alex what do you think.
Regards, Christian.
Hi, Christian,
On Wed, 20 May 2020 at 16:00, Christian König ckoenig.leichtzumerken@gmail.com wrote:
So I've used an ancient system (32bit) to setup a test box for this.
The first GPU I could test is an RV280 (Radeon 9200 PRO) which is easily 15 years old.
Oh, I have one of those in box somewhere, but no AGP machine to install it (yet).
What happens in AGP mode is that glxgears shows artifacts during rendering on this system.
In PCI mode those rendering artifacts are gone and glxgears seems to draw everything correctly now.
Performance is obviously not comparable, cause in AGP we don't render all triangles correctly.
I agree, correctness before performance, always.
The second GPU I could test is an RV630 PRO (Radeon HD 2600 PRO AGP) which is more than 10 years old.
As far as I can tell this one works in both AGP and PCIe mode perfectly fine.
Since this is only a 32bit system I couldn't really test any OpenGL game that well.
I usually test with my distro's (Debian or Ubuntu, in my case) games. For example, I used Nexuiz when wiring up the shader cache on r300g.
But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop.
The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon.
So if anybody wants to get his hands dirty and squeeze a bit more performance out of the old hardware, porting USWC from amdgpu to radeon shouldn't be to much of a problem.
Well, FWIW, I would argue that a regression in performance, if avoidable, should be avoided. I have not nearly enough knowledge of the driver to do it myself, but I'll glady test any patches, on both x86-64 (Radeon Xpress 1250) and ppc32 (Mobility Radeon 9550).
Cheers, Rui
On Wed, May 20, 2020 at 10:43 AM Christian König ckoenig.leichtzumerken@gmail.com wrote:
Am 13.05.20 um 13:03 schrieb Christian König:
Unfortunately AGP is still to widely used as we could just drop support for using its GART.
Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART.
For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available.
So I've used an ancient system (32bit) to setup a test box for this.
The first GPU I could test is an RV280 (Radeon 9200 PRO) which is easily 15 years old.
What happens in AGP mode is that glxgears shows artifacts during rendering on this system.
In PCI mode those rendering artifacts are gone and glxgears seems to draw everything correctly now.
Performance is obviously not comparable, cause in AGP we don't render all triangles correctly.
The second GPU I could test is an RV630 PRO (Radeon HD 2600 PRO AGP) which is more than 10 years old.
As far as I can tell this one works in both AGP and PCIe mode perfectly fine.
Since this is only a 32bit system I couldn't really test any OpenGL game that well.
But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop.
The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon.
So if anybody wants to get his hands dirty and squeeze a bit more performance out of the old hardware, porting USWC from amdgpu to radeon shouldn't be to much of a problem.
We do support USWC on radeon, although I think we had separate flags for cached and WC. That said we had a lot of problems with WC on 32 bit (see radeon_bo_create()). The other problem is that, at least on the really old radeons, the PCI gart didn't support snooped and unsnooped. It was always snooped. It wasn't until pcie that the gart hw got support for both. For AGP, the expectation was that AGP provided the uncached memory.
Summing it up I'm still leaning towards disabling AGP completely by default for radeon and deprecate it in TTM as well.
Thoughts? Especially Alex what do you think.
Works for me.
Alex
Am 20.05.20 um 18:18 schrieb Alex Deucher:
On Wed, May 20, 2020 at 10:43 AM Christian König ckoenig.leichtzumerken@gmail.com wrote:
Am 13.05.20 um 13:03 schrieb Christian König:
Unfortunately AGP is still to widely used as we could just drop support for using its GART.
Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART.
For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available.
So I've used an ancient system (32bit) to setup a test box for this.
The first GPU I could test is an RV280 (Radeon 9200 PRO) which is easily 15 years old.
What happens in AGP mode is that glxgears shows artifacts during rendering on this system.
In PCI mode those rendering artifacts are gone and glxgears seems to draw everything correctly now.
Performance is obviously not comparable, cause in AGP we don't render all triangles correctly.
The second GPU I could test is an RV630 PRO (Radeon HD 2600 PRO AGP) which is more than 10 years old.
As far as I can tell this one works in both AGP and PCIe mode perfectly fine.
Since this is only a 32bit system I couldn't really test any OpenGL game that well.
But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop.
The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon.
So if anybody wants to get his hands dirty and squeeze a bit more performance out of the old hardware, porting USWC from amdgpu to radeon shouldn't be to much of a problem.
We do support USWC on radeon, although I think we had separate flags for cached and WC. That said we had a lot of problems with WC on 32 bit (see radeon_bo_create()). The other problem is that, at least on the really old radeons, the PCI gart didn't support snooped and unsnooped. It was always snooped. It wasn't until pcie that the gart hw got support for both. For AGP, the expectation was that AGP provided the uncached memory.
Oh, indeed. I didn't remembered that.
Interesting is that in this case I have no idea where the performance difference is coming from.
Summing it up I'm still leaning towards disabling AGP completely by default for radeon and deprecate it in TTM as well.
Thoughts? Especially Alex what do you think.
Works for me.
I will take that as an rb and commit at least the first patch.
Thanks, Christian.
Alex
On Fri, May 22, 2020 at 6:41 AM Christian König ckoenig.leichtzumerken@gmail.com wrote:
Am 20.05.20 um 18:18 schrieb Alex Deucher:
On Wed, May 20, 2020 at 10:43 AM Christian König ckoenig.leichtzumerken@gmail.com wrote:
Am 13.05.20 um 13:03 schrieb Christian König:
Unfortunately AGP is still to widely used as we could just drop support for using its GART.
Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART.
For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available.
So I've used an ancient system (32bit) to setup a test box for this.
The first GPU I could test is an RV280 (Radeon 9200 PRO) which is easily 15 years old.
What happens in AGP mode is that glxgears shows artifacts during rendering on this system.
In PCI mode those rendering artifacts are gone and glxgears seems to draw everything correctly now.
Performance is obviously not comparable, cause in AGP we don't render all triangles correctly.
The second GPU I could test is an RV630 PRO (Radeon HD 2600 PRO AGP) which is more than 10 years old.
As far as I can tell this one works in both AGP and PCIe mode perfectly fine.
Since this is only a 32bit system I couldn't really test any OpenGL game that well.
But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop.
The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon.
So if anybody wants to get his hands dirty and squeeze a bit more performance out of the old hardware, porting USWC from amdgpu to radeon shouldn't be to much of a problem.
We do support USWC on radeon, although I think we had separate flags for cached and WC. That said we had a lot of problems with WC on 32 bit (see radeon_bo_create()). The other problem is that, at least on the really old radeons, the PCI gart didn't support snooped and unsnooped. It was always snooped. It wasn't until pcie that the gart hw got support for both. For AGP, the expectation was that AGP provided the uncached memory.
Oh, indeed. I didn't remembered that.
Interesting is that in this case I have no idea where the performance difference is coming from.
Summing it up I'm still leaning towards disabling AGP completely by default for radeon and deprecate it in TTM as well.
Thoughts? Especially Alex what do you think.
Works for me.
I will take that as an rb and commit at least the first patch.
Yeah, Reviewed-by: Alex Deucher alexander.deucher@amd.com
Thanks, Christian.
Alex
On 2020-05-20 4:43 p.m., Christian König wrote:
Am 13.05.20 um 13:03 schrieb Christian König:
Unfortunately AGP is still to widely used as we could just drop support for using its GART.
Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART.
For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available.
So I've used an ancient system (32bit) to setup a test box for this.
The first GPU I could test is an RV280 (Radeon 9200 PRO) which is easily 15 years old.
What happens in AGP mode is that glxgears shows artifacts during rendering on this system.
In PCI mode those rendering artifacts are gone and glxgears seems to draw everything correctly now.
Performance is obviously not comparable, cause in AGP we don't render all triangles correctly.
The second GPU I could test is an RV630 PRO (Radeon HD 2600 PRO AGP) which is more than 10 years old.
As far as I can tell this one works in both AGP and PCIe mode perfectly fine.
Since this is only a 32bit system I couldn't really test any OpenGL game that well.
But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop.
The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon.
I suspect the main reason it's only 5% is that PCIe GART page tables are stored in VRAM, so they don't need to be fetched across the PCIe link (and presumably it has more than one TLB entry as well). The difference is much bigger with native AGP ASICs with PCI GART.
Am 20.05.20 um 18:25 schrieb Michel Dänzer:
On 2020-05-20 4:43 p.m., Christian König wrote:
Am 13.05.20 um 13:03 schrieb Christian König:
Unfortunately AGP is still to widely used as we could just drop support for using its GART.
Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART.
For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available.
So I've used an ancient system (32bit) to setup a test box for this.
The first GPU I could test is an RV280 (Radeon 9200 PRO) which is easily 15 years old.
What happens in AGP mode is that glxgears shows artifacts during rendering on this system.
In PCI mode those rendering artifacts are gone and glxgears seems to draw everything correctly now.
Performance is obviously not comparable, cause in AGP we don't render all triangles correctly.
The second GPU I could test is an RV630 PRO (Radeon HD 2600 PRO AGP) which is more than 10 years old.
As far as I can tell this one works in both AGP and PCIe mode perfectly fine.
Since this is only a 32bit system I couldn't really test any OpenGL game that well.
But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop.
The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon.
I suspect the main reason it's only 5% is that PCIe GART page tables are stored in VRAM, so they don't need to be fetched across the PCIe link (and presumably it has more than one TLB entry as well). The difference is much bigger with native AGP ASICs with PCI GART.
Do you have some hardware you could give that a try on?
I mean the first card I put into the system obviously only worked correctly with AGP disabled.
While I agree that it means a performance regression, this is a rather high motivation to go ahead with at least the first patch.
Christian.
On 2020-05-22 12:40 p.m., Christian König wrote:
Am 20.05.20 um 18:25 schrieb Michel Dänzer:
On 2020-05-20 4:43 p.m., Christian König wrote:
Am 13.05.20 um 13:03 schrieb Christian König:
Unfortunately AGP is still to widely used as we could just drop support for using its GART.
Not using the AGP GART also doesn't mean a loss in functionality since drivers will just fallback to the driver specific PCI GART.
For now just deprecate the code and don't enable the AGP GART in TTM even when general AGP support is available.
So I've used an ancient system (32bit) to setup a test box for this.
The first GPU I could test is an RV280 (Radeon 9200 PRO) which is easily 15 years old.
What happens in AGP mode is that glxgears shows artifacts during rendering on this system.
In PCI mode those rendering artifacts are gone and glxgears seems to draw everything correctly now.
Performance is obviously not comparable, cause in AGP we don't render all triangles correctly.
The second GPU I could test is an RV630 PRO (Radeon HD 2600 PRO AGP) which is more than 10 years old.
As far as I can tell this one works in both AGP and PCIe mode perfectly fine.
Since this is only a 32bit system I couldn't really test any OpenGL game that well.
But for glxgears switching from AGP to PCIe mode seems to result in a roughly 5% performance drop.
The surprising reason for this is not the better TLB performance, but the lack of USWC support for the PCIe GART in radeon.
I suspect the main reason it's only 5% is that PCIe GART page tables are stored in VRAM, so they don't need to be fetched across the PCIe link (and presumably it has more than one TLB entry as well). The difference is much bigger with native AGP ASICs with PCI GART.
Do you have some hardware you could give that a try on?
As I mentioned before, I tested this many times on my AGP PowerBooks back in the day. The result was always a similar, big hit with PCI GART vs AGP (even just 1x). I haven't seen any reason to believe this has changed.
While I agree that it means a performance regression, this is a rather high motivation to go ahead with at least the first patch.
I totally agree with the benefits, I just want everyone to be honest and clear about the performance hit with native AGP Radeons, which already have very weak performance by today's standards even with AGP.
dri-devel@lists.freedesktop.org
-
Alex Deucher -
Christian König -
Daniel Vetter -
Mathieu Malaterre -
Michel Dänzer -
Rui Salvaterra