Create AI engine device/partition hierarchical structure.

Each AI engine device can have multiple logical partitions(groups of AI engine tiles). Each partition is column based and has its own node ID in the system. AI engine device driver manages its partitions.

Applications can access AI engine partition through the AI engine partition driver instance. AI engine registers write is moved to kernel as there are registers in the AI engine array needs privilege permission.

Signed-off-by: Wendy Liang wendy.liang@xilinx.com Signed-off-by: Hyun Kwon hyun.kwon@xilinx.com --- MAINTAINERS | 8 + drivers/misc/Kconfig | 12 + drivers/misc/Makefile | 1 + drivers/misc/xilinx-ai-engine/Makefile | 11 + drivers/misc/xilinx-ai-engine/ai-engine-aie.c | 115 +++++ drivers/misc/xilinx-ai-engine/ai-engine-dev.c | 452 +++++++++++++++++++ drivers/misc/xilinx-ai-engine/ai-engine-internal.h | 226 ++++++++++ drivers/misc/xilinx-ai-engine/ai-engine-part.c | 498 +++++++++++++++++++++ drivers/misc/xilinx-ai-engine/ai-engine-res.c | 114 +++++ include/uapi/linux/xlnx-ai-engine.h | 107 +++++ 10 files changed, 1544 insertions(+) create mode 100644 drivers/misc/xilinx-ai-engine/Makefile create mode 100644 drivers/misc/xilinx-ai-engine/ai-engine-aie.c create mode 100644 drivers/misc/xilinx-ai-engine/ai-engine-dev.c create mode 100644 drivers/misc/xilinx-ai-engine/ai-engine-internal.h create mode 100644 drivers/misc/xilinx-ai-engine/ai-engine-part.c create mode 100644 drivers/misc/xilinx-ai-engine/ai-engine-res.c create mode 100644 include/uapi/linux/xlnx-ai-engine.h

diff --git a/MAINTAINERS b/MAINTAINERS index 2daa6ee..1e36294 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19287,6 +19287,14 @@ T: git https://github.com/Xilinx/linux-xlnx.git F: Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml F: drivers/phy/xilinx/phy-zynqmp.c

+XILINX AI ENGINE DRIVER +M: Wendy Liang wendy.liang@xilinx.com +S: Supported +F: Documentation/devicetree/bindings/soc/xilinx/xlnx,ai-engine.yaml +F: drivers/misc/xilinx-ai-engine/ +F: include/linux/xlnx-ai-engine.h +F: include/uapi/linux/xlnx-ai-engine.h + XILLYBUS DRIVER M: Eli Billauer eli.billauer@gmail.com L: linux-kernel@vger.kernel.org diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index fafa8b0..0b8ce4d 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -444,6 +444,18 @@ config XILINX_SDFEC

If unsure, say N.

+config XILINX_AIE + tristate "Xilinx AI engine" + depends on ARM64 || COMPILE_TEST + help + This option enables support for the Xilinx AI engine driver. + One Xilinx AI engine device can have multiple partitions (groups of + AI engine tiles). Xilinx AI engine device driver instance manages + AI engine partitions. User application access its partitions through + AI engine partition instance file operations. + + If unsure, say N + config MISC_RTSX tristate default MISC_RTSX_PCI || MISC_RTSX_USB diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d23231e..2176b18 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -57,3 +57,4 @@ obj-$(CONFIG_HABANA_AI) += habanalabs/ obj-$(CONFIG_UACCE) += uacce/ obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o obj-$(CONFIG_HISI_HIKEY_USB) += hisi_hikey_usb.o +obj-$(CONFIG_XILINX_AIE) += xilinx-ai-engine/ diff --git a/drivers/misc/xilinx-ai-engine/Makefile b/drivers/misc/xilinx-ai-engine/Makefile new file mode 100644 index 0000000..7827a0a --- /dev/null +++ b/drivers/misc/xilinx-ai-engine/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Makefile for Xilinx AI engine device driver +# + +obj-$(CONFIG_XILINX_AIE) += xilinx-aie.o + +xilinx-aie-$(CONFIG_XILINX_AIE) := ai-engine-aie.o \ + ai-engine-dev.o \ + ai-engine-part.o \ + ai-engine-res.o diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-aie.c b/drivers/misc/xilinx-ai-engine/ai-engine-aie.c new file mode 100644 index 0000000..319260f --- /dev/null +++ b/drivers/misc/xilinx-ai-engine/ai-engine-aie.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx AI Engine driver AIE device specific implementation + * + * Copyright (C) 2020 Xilinx, Inc. + */ + +#include <linux/slab.h> + +#include "ai-engine-internal.h" + +#define AIE_ARRAY_SHIFT 30U +#define AIE_COL_SHIFT 23U +#define AIE_ROW_SHIFT 18U + +/* + * Registers offsets + */ +#define AIE_SHIMNOC_L2INTR_MASK_REGOFF 0x00015000U +#define AIE_SHIMNOC_L2INTR_INTR_REGOFF 0x00015010U +#define AIE_SHIMNOC_DMA_BD0_ADDRLOW_REGOFF 0x0001d000U +#define AIE_SHIMNOC_DMA_BD15_PACKET_REGOFF 0x0001d13cU +#define AIE_SHIMNOC_AXIMM_REGOFF 0x0001e020U +#define AIE_SHIMPL_L1INTR_MASK_A_REGOFF 0x00035000U +#define AIE_SHIMPL_L1INTR_BLOCK_NORTH_B_REGOFF 0x00035050U +#define AIE_SHIMPL_CLKCNTR_REGOFF 0x00036040U +#define AIE_SHIMPL_RESET_REGOFF 0x0003604cU +#define AIE_TILE_CORE_CLKCNTR_REGOFF 0x00036040U + +static const struct aie_tile_regs aie_kernel_regs[] = { + /* SHIM AXI MM Config */ + {.attribute = AIE_TILE_TYPE_SHIMNOC << AIE_REGS_ATTR_TILE_TYPE_SHIFT, + .soff = AIE_SHIMNOC_AXIMM_REGOFF, + .eoff = AIE_SHIMNOC_AXIMM_REGOFF, + }, + /* SHIM DMA ADDRESS range */ + {.attribute = AIE_TILE_TYPE_SHIMNOC << AIE_REGS_ATTR_TILE_TYPE_SHIFT, + .soff = AIE_SHIMNOC_DMA_BD0_ADDRLOW_REGOFF, + .eoff = AIE_SHIMNOC_DMA_BD15_PACKET_REGOFF, + }, + /* SHIM 2nd level interrupt controller */ + {.attribute = AIE_TILE_TYPE_SHIMNOC << AIE_REGS_ATTR_TILE_TYPE_SHIFT, + .soff = AIE_SHIMNOC_L2INTR_MASK_REGOFF, + .eoff = AIE_SHIMNOC_L2INTR_INTR_REGOFF, + }, + /* SHIM 1st level interrupt controller */ + {.attribute = (AIE_TILE_TYPE_SHIMPL | AIE_TILE_TYPE_SHIMNOC) << + AIE_REGS_ATTR_TILE_TYPE_SHIFT, + .soff = AIE_SHIMPL_L1INTR_MASK_A_REGOFF, + .eoff = AIE_SHIMPL_L1INTR_BLOCK_NORTH_B_REGOFF, + }, + /* SHIM reset Enable */ + {.attribute = (AIE_TILE_TYPE_SHIMPL | AIE_TILE_TYPE_SHIMNOC) << + AIE_REGS_ATTR_TILE_TYPE_SHIFT, + .soff = AIE_SHIMPL_RESET_REGOFF, + .eoff = AIE_SHIMPL_RESET_REGOFF, + }, + /* SHIM clock control */ + {.attribute = (AIE_TILE_TYPE_SHIMPL | AIE_TILE_TYPE_SHIMNOC) << + AIE_REGS_ATTR_TILE_TYPE_SHIFT, + .soff = AIE_SHIMPL_CLKCNTR_REGOFF, + .eoff = AIE_SHIMPL_CLKCNTR_REGOFF, + }, + /* Tile clock control */ + {.attribute = AIE_TILE_TYPE_TILE << AIE_REGS_ATTR_TILE_TYPE_SHIFT, + .soff = AIE_TILE_CORE_CLKCNTR_REGOFF, + .eoff = AIE_TILE_CORE_CLKCNTR_REGOFF, + }, +}; + +static u32 aie_get_tile_type(struct aie_location *loc) +{ + if (loc->row) + return AIE_TILE_TYPE_TILE; + /* SHIM row */ + if ((loc->col % 4) < 2) + return AIE_TILE_TYPE_SHIMPL; + + return AIE_TILE_TYPE_SHIMNOC; +} + +static const struct aie_tile_operations aie_ops = { + .get_tile_type = aie_get_tile_type, +}; + +/** + * aie_device_init() - Initialize AI engine device struct AIE specific + * properties + * @adev: AI engine device + * @return: 0 for success, negative value for failure. + * + * This function initialize the AI engine device structure device version + * specific elements such as register addressing related array shift, + * column shift, and row shift; AIE specific device operations, device + * columns resource. + */ +int aie_device_init(struct aie_device *adev) +{ + int ret; + + adev->array_shift = AIE_ARRAY_SHIFT; + adev->col_shift = AIE_COL_SHIFT; + adev->row_shift = AIE_ROW_SHIFT; + adev->ops = &aie_ops; + adev->num_kernel_regs = ARRAY_SIZE(aie_kernel_regs); + adev->kernel_regs = aie_kernel_regs; + + /* Get the columns resource */ + /* Get number of columns from AI engine memory resource */ + ret = aie_resource_initialize(&adev->cols_res, 50); + if (ret) + dev_err(&adev->dev, "failed to initialize columns resource.\n"); + + return ret; +} diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-dev.c b/drivers/misc/xilinx-ai-engine/ai-engine-dev.c new file mode 100644 index 0000000..5a56a92 --- /dev/null +++ b/drivers/misc/xilinx-ai-engine/ai-engine-dev.c @@ -0,0 +1,452 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx AI Engine device driver + * + * Copyright (C) 2020 Xilinx, Inc. + */ + +#include <linux/anon_inodes.h> +#include <linux/cdev.h> +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/dma-mapping.h> +#include <linux/file.h> +#include <linux/fs.h> +#include <linux/idr.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/uaccess.h> +#include <uapi/linux/xlnx-ai-engine.h> + +#include "ai-engine-internal.h" + +#define AIE_DEV_MAX (MINORMASK + 1) + +static dev_t aie_major; +struct class *aie_class; + +static DEFINE_IDA(aie_device_ida); +static DEFINE_IDA(aie_minor_ida); + +/** + * aie_get_partition_fd() - Get AI engine partition file descriptor + * @apart: AI engine partition + * @return: file descriptor for AI engine partition for success, or negative + * value for failure. + * + * This function gets a file descriptor for the AI engine partition. + */ +static int aie_get_partition_fd(struct aie_partition *apart) +{ + struct file *filep; + int ret; + + /* + * We can't use anon_inode_getfd() because we need to modify + * the f_mode flags directly to allow more than just ioctls + */ + ret = get_unused_fd_flags(O_CLOEXEC); + if (ret < 0) + return ret; + + filep = anon_inode_getfile(dev_name(&apart->dev), &aie_part_fops, + apart, O_RDWR); + if (IS_ERR(filep)) { + put_unused_fd(ret); + ret = PTR_ERR(filep); + return ret; + } + filep->f_mode |= (FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE); + fd_install(ret, filep); + + return ret; +} + +/** + * aie_enquire_partitions() - get AI engine partitions information + * @adev: AI engine device + * @query: data struct to store the partition information + * @return: 0 for success, and negative value for failure. + */ +static int aie_enquire_partitions(struct aie_device *adev, + struct aie_partition_query *query) +{ + struct aie_partition *apart; + u64 user_part; + u32 partition_cnt, i = 0; + int ret; + + if (!query->partitions) { + /* + * If partitions information buffer is NULL. + * It is to get the number of partitions. + */ + query->partition_cnt = 0; + list_for_each_entry(apart, &adev->partitions, node) + query->partition_cnt++; + return 0; + } + + partition_cnt = query->partition_cnt; + if (!partition_cnt) + return 0; + + ret = mutex_lock_interruptible(&adev->mlock); + if (ret) + return ret; + + user_part = query->partitions; + list_for_each_entry(apart, &adev->partitions, node) { + struct aie_range_args part; + + if (i >= partition_cnt) + break; + part.partition_id = apart->partition_id; + /* + * TBD: check with PLM that if the partition is programmed + * and get the UID of the image which is loaded on the AI + * engine partition. + */ + part.uid = 0; + part.range.start.col = apart->range.start.col; + part.range.start.row = apart->range.start.row; + part.range.size.col = apart->range.size.col; + part.range.size.row = apart->range.size.row; + /* Check if partition is in use */ + part.status = apart->status; + if (copy_to_user(u64_to_user_ptr(user_part), &part, + sizeof(part))) { + mutex_unlock(&adev->mlock); + return -EFAULT; + } + user_part += sizeof(part); + i++; + } + mutex_unlock(&adev->mlock); + query->partition_cnt = i; + + return 0; +} + +/** + * aie_get_partition_from_id() - get AI engine partition from id + * @adev: AI engine device + * @partition_id: partition id to check + * @return: partition pointer if partition exists, otherwise, NULL. + * + * This function checks defined partitions with partition id. + * This function expect the caller to lock mlock of @adev. + */ +struct aie_partition *aie_get_partition_from_id(struct aie_device *adev, + u32 partition_id) +{ + struct aie_partition *apart; + + list_for_each_entry(apart, &adev->partitions, node) { + if (apart->partition_id == partition_id) + return apart; + } + + return NULL; +} + +/** + * aie_request_partition() - request AI engine partition + * @adev: AI engine device + * @req: partition request, includes the requested AI engine information + * such as partition node ID and the UID of the image which is + * loaded on the partition. + * @return: partition pointer if partition exists, otherwise, NULL. + * + * This function finds a defined partition which matches the specified + * partition id, request it if it hasn't been requested, and returns it. + */ +struct aie_partition *aie_request_partition(struct aie_device *adev, + struct aie_partition_req *req) +{ + struct aie_partition *apart; + int ret; + + ret = mutex_lock_interruptible(&adev->mlock); + if (ret) + return ERR_PTR(ret); + + apart = aie_get_partition_from_id(adev, req->partition_id); + if (!apart) { + dev_err(&adev->dev, + "request partition %u failed, not exist.\n", + req->partition_id); + mutex_unlock(&adev->mlock); + return ERR_PTR(-EINVAL); + } + /* + * TBD: It will check image UID too to see if the user matches + * what's loaded in the AI engine partition. And check the meta + * data to see which resources used by application. + */ + + ret = mutex_lock_interruptible(&apart->mlock); + if (ret) + return ERR_PTR(ret); + + if (apart->status & XAIE_PART_STATUS_INUSE) { + mutex_unlock(&apart->mlock); + dev_err(&adev->dev, + "request partition %u failed, partition in use.\n", + req->partition_id); + apart = ERR_PTR(-EBUSY); + } else { + /* + * TBD: + * 1. setup NOC AXI MM config to only generate error events + * for slave error and decode error. + * 2. scan to see which tiles have been clock gated. + * + * This needs to be done before the AI engine partition is + * exported for user to access. + */ + apart->status = XAIE_PART_STATUS_INUSE; + mutex_unlock(&apart->mlock); + } + mutex_unlock(&adev->mlock); + + return apart; +} + +static long xilinx_ai_engine_ioctl(struct file *filp, unsigned int cmd, + unsigned long arg) +{ + struct inode *inode = file_inode(filp); + struct aie_device *adev = cdev_to_aiedev(inode->i_cdev); + void __user *argp = (void __user *)arg; + int ret; + + switch (cmd) { + case AIE_ENQUIRE_PART_IOCTL: + { + struct aie_partition_query query; + struct aie_partition_query __user *uquery_ptr = argp; + + if (copy_from_user(&query, uquery_ptr, sizeof(query))) + return -EFAULT; + ret = aie_enquire_partitions(adev, &query); + if (ret < 0) + return ret; + if (copy_to_user((void __user *)&uquery_ptr->partition_cnt, + &query.partition_cnt, + sizeof(query.partition_cnt))) + return -EFAULT; + break; + } + case AIE_REQUEST_PART_IOCTL: + { + struct aie_partition_req req; + struct aie_partition *apart; + + if (copy_from_user(&req, argp, sizeof(req))) + return -EFAULT; + apart = aie_request_partition(adev, &req); + if (IS_ERR(apart)) + return PTR_ERR(apart); + ret = aie_get_partition_fd(apart); + if (ret < 0) { + dev_err(&apart->dev, "failed to get fd.\n"); + break; + } + break; + } + default: + dev_err(&adev->dev, "Invalid ioctl command %u.\n", cmd); + ret = -EINVAL; + break; + } + + return ret; +} + +static const struct file_operations aie_device_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = xilinx_ai_engine_ioctl, +}; + +static void xilinx_ai_engine_release_device(struct device *dev) +{ + struct aie_device *adev = dev_to_aiedev(dev); + + ida_simple_remove(&aie_device_ida, dev->id); + ida_simple_remove(&aie_minor_ida, MINOR(dev->devt)); + cdev_del(&adev->cdev); + aie_resource_uninitialize(&adev->cols_res); +} + +/** + * of_xilinx_ai_engine_part_probe() - probes for AI engine partition nodes + * @adev: AI engine device + * + * This function will probe for children AI engine partition nodes and create + * an AI engine partition instance for each node. + */ +static void of_xilinx_ai_engine_part_probe(struct aie_device *adev) +{ + struct device_node *nc; + + for_each_available_child_of_node(adev->dev.of_node, nc) { + struct aie_partition *apart; + + if (of_node_test_and_set_flag(nc, OF_POPULATED)) + continue; + apart = of_aie_part_probe(adev, nc); + if (IS_ERR(apart)) { + dev_err(&adev->dev, + "Failed to probe AI engine part for %pOF\n", + nc); + of_node_clear_flag(nc, OF_POPULATED); + } + } +} + +static int xilinx_ai_engine_probe(struct platform_device *pdev) +{ + struct aie_device *adev; + struct device *dev; + int ret; + + adev = devm_kzalloc(&pdev->dev, sizeof(*adev), GFP_KERNEL); + if (!adev) + return -ENOMEM; + platform_set_drvdata(pdev, adev); + INIT_LIST_HEAD(&adev->partitions); + mutex_init(&adev->mlock); + + adev->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!adev->res) { + dev_err(&pdev->dev, "No memory resource.\n"); + return -EINVAL; + } + adev->base = devm_ioremap_resource(&pdev->dev, adev->res); + if (IS_ERR(adev->base)) { + dev_err(&pdev->dev, "no io memory resource.\n"); + return PTR_ERR(adev->base); + } + + /* Initialize AIE device specific instance. */ + ret = aie_device_init(adev); + if (ret < 0) { + dev_err(&pdev->dev, "failed to initialize device instance.\n"); + return ret; + } + + dev = &adev->dev; + device_initialize(dev); + dev->class = aie_class; + dev->parent = &pdev->dev; + dev->of_node = pdev->dev.of_node; + + ret = ida_simple_get(&aie_minor_ida, 0, AIE_DEV_MAX, GFP_KERNEL); + if (ret < 0) + goto free_dev; + dev->devt = MKDEV(MAJOR(aie_major), ret); + ret = ida_simple_get(&aie_device_ida, 0, 0, GFP_KERNEL); + if (ret < 0) + goto free_minor_ida; + dev->id = ret; + dev_set_name(&adev->dev, "aie%d", dev->id); + + cdev_init(&adev->cdev, &aie_device_fops); + adev->cdev.owner = THIS_MODULE; + ret = cdev_add(&adev->cdev, dev->devt, 1); + if (ret) + goto free_ida; + /* We can now rely on the release function for cleanup */ + dev->release = xilinx_ai_engine_release_device; + + ret = device_add(dev); + if (ret) { + dev_err(&pdev->dev, "device_add failed: %d\n", ret); + put_device(dev); + return ret; + } + + of_xilinx_ai_engine_part_probe(adev); + dev_info(&pdev->dev, "Xilinx AI Engine device(cols=%u) probed\n", + adev->cols_res.total); + return 0; + +free_ida: + ida_simple_remove(&aie_device_ida, dev->id); +free_minor_ida: + ida_simple_remove(&aie_minor_ida, MINOR(dev->devt)); +free_dev: + put_device(dev); + + return ret; +} + +static int xilinx_ai_engine_remove(struct platform_device *pdev) +{ + struct aie_device *adev = platform_get_drvdata(pdev); + struct aie_partition *apart; + + list_for_each_entry(apart, &adev->partitions, node) + aie_part_remove(apart); + + device_del(&adev->dev); + put_device(&adev->dev); + + return 0; +} + +static const struct of_device_id xilinx_ai_engine_of_match[] = { + { .compatible = "xlnx,ai-engine-v1.0", }, + { /* end of table */ }, +}; +MODULE_DEVICE_TABLE(of, xilinx_ai_engine_of_match); + +static struct platform_driver xilinx_ai_engine_driver = { + .probe = xilinx_ai_engine_probe, + .remove = xilinx_ai_engine_remove, + .driver = { + .name = "xilinx-ai-engine", + .of_match_table = xilinx_ai_engine_of_match, + }, +}; + +static int __init xilinx_ai_engine_init(void) +{ + int ret; + + ret = alloc_chrdev_region(&aie_major, 0, AIE_DEV_MAX, "aie"); + if (ret < 0) { + pr_err("aie: failed to allocate aie region\n"); + return ret; + } + + aie_class = class_create(THIS_MODULE, "aie"); + if (IS_ERR(aie_class)) { + pr_err("failed to create aie class\n"); + unregister_chrdev_region(aie_major, AIE_DEV_MAX); + return PTR_ERR(aie_class); + } + + platform_driver_register(&xilinx_ai_engine_driver); + + return 0; +} +postcore_initcall(xilinx_ai_engine_init); + +static void __exit xilinx_ai_engine_exit(void) +{ + platform_driver_unregister(&xilinx_ai_engine_driver); + class_destroy(aie_class); + unregister_chrdev_region(aie_major, AIE_DEV_MAX); +} +module_exit(xilinx_ai_engine_exit); + +MODULE_AUTHOR("Xilinx, Inc."); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h new file mode 100644 index 0000000..6a69946 --- /dev/null +++ b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h @@ -0,0 +1,226 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Xilinx AI Engine driver internal header + * + * Copyright (C) 2020 Xilinx, Inc. + */ + +#ifndef AIE_INTERNAL_H +#define AIE_INTERNAL_H + +#include <linux/bitfield.h> +#include <linux/bits.h> +#include <linux/cdev.h> +#include <linux/device.h> +#include <linux/io.h> +#include <linux/list.h> +#include <linux/mutex.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <uapi/linux/xlnx-ai-engine.h> + +/* + * Macros for AI engine tile type bitmasks + */ +#define AIE_TILE_TYPE_TILE BIT(0) +#define AIE_TILE_TYPE_SHIMPL BIT(1) +/* SHIM NOC tile includes SHIM PL and SHIM NOC modules */ +#define AIE_TILE_TYPE_SHIMNOC BIT(2) + +/* + * Macros for attribute property of AI engine registers accessed by kernel + * 0 - 7 bits: tile type bits + * 8 - 15 bits: permission bits. If it is 1, it allows write from userspace + */ +#define AIE_REGS_ATTR_TILE_TYPE_SHIFT 0U +#define AIE_REGS_ATTR_PERM_SHIFT 8U +#define AIE_REGS_ATTR_TILE_TYPE_MASK GENMASK(AIE_REGS_ATTR_PERM_SHIFT - 1, \ + AIE_REGS_ATTR_TILE_TYPE_SHIFT) +#define AIE_REGS_ATTR_PERM_MASK GENMASK(15, \ + AIE_REGS_ATTR_PERM_SHIFT) + +/** + * struct aie_tile_regs - contiguous range of AI engine register + * within an AI engine tile + * @soff: start offset of the range + * @eoff: end offset of the range + * @attribute: registers attribute. It uses AIE_REGS_ATTR_* macros defined + * above. + */ +struct aie_tile_regs { + size_t soff; + size_t eoff; + u32 attribute; +}; + +struct aie_device; +struct aie_partition; + +/** + * struct aie_tile_operations - AI engine device operations + * @get_tile_type: get type of tile based on tile operation + * + * Different AI engine device version has its own device + * operation. + */ +struct aie_tile_operations { + u32 (*get_tile_type)(struct aie_location *loc); +}; + +/** + * struct aie_resource - AI engine resource structure + * @bitmap: resource bitmap + * @total: total number of resource + */ +struct aie_resource { + unsigned long *bitmap; + u32 total; +}; + +/** + * struct aie_device - AI engine device structure + * @partitions: list of partitions requested + * @cdev: cdev for the AI engine + * @dev: device for the AI engine device + * @mlock: protection for AI engine device operations + * @base: AI engine device base virtual address + * @res: memory resource of AI engine device + * @kernel_regs: array of kernel only registers + * @ops: tile operations + * @size: size of the AI engine address space + * @array_shift: array address shift + * @col_shift: column address shift + * @row_shift: row address shift + * @cols_res: AI engine columns resources to indicate + * while columns are occupied by partitions. + * @num_kernel_regs: number of kernel only registers range + * @version: AI engine device version + */ +struct aie_device { + struct list_head partitions; + struct cdev cdev; + struct device dev; + struct mutex mlock; /* protection for AI engine partitions */ + void __iomem *base; + struct resource *res; + const struct aie_tile_regs *kernel_regs; + const struct aie_tile_operations *ops; + size_t size; + struct aie_resource cols_res; + u32 array_shift; + u32 col_shift; + u32 row_shift; + u32 num_kernel_regs; + int version; +}; + +/** + * struct aie_partition - AI engine partition structure + * @node: list node + * @adev: pointer to AI device instance + * @range: range of partition + * @mlock: protection for AI engine partition operations + * @dev: device for the AI engine partition + * @partition_id: partition id. Partition ID is the identifier + * of the AI engine partition in the system. + * @status: indicate if the partition is in use + */ +struct aie_partition { + struct list_head node; + struct aie_device *adev; + struct aie_range range; + struct mutex mlock; /* protection for AI engine partition operations */ + struct device dev; + u32 partition_id; + u32 status; +}; + +extern struct class *aie_class; +extern const struct file_operations aie_part_fops; + +#define cdev_to_aiedev(i_cdev) container_of((i_cdev), struct aie_device, cdev) +#define dev_to_aiedev(_dev) container_of((_dev), struct aie_device, dev) +#define dev_to_aiepart(_dev) container_of((_dev), struct aie_partition, dev) + +#define aie_col_mask(adev) ({ \ + struct aie_device *_adev = (adev); \ + GENMASK_ULL(_adev->array_shift - 1, _adev->col_shift); \ + }) + +#define aie_row_mask(adev) ({ \ + struct aie_device *_adev = (adev); \ + GENMASK_ULL(_adev->col_shift - 1, _adev->row_shift); \ + }) + +#define aie_tile_reg_mask(adev) ({ \ + struct aie_device *_adev = (adev); \ + GENMASK_ULL(_adev->row_shift - 1, 0); \ + }) + +/* + * Need to define field get, as AI engine shift mask is not constant. + * Cannot use FIELD_GET() + */ +#define aie_tile_reg_field_get(mask, shift, regoff) ( \ + ((regoff) & (mask)) >> (shift)) + +#define aie_cal_tile_reg(adev, regoff) ( \ + aie_tile_reg_field_get(aie_tile_reg_mask(adev), 0, regoff)) + +/** + * aie_cal_regoff() - calculate register offset to the whole AI engine + * device start address + * @adev: AI engine device + * @loc: AI engine tile location + * @regoff_intile: register offset within a tile + * @return: register offset to the whole AI engine device start address + */ +static inline u32 aie_cal_regoff(struct aie_device *adev, + struct aie_location loc, u32 regoff_intile) +{ + return regoff_intile + (loc.col << adev->col_shift) + + (loc.row << adev->row_shift); +} + +/** + * aie_validate_location() - validate tile location within an AI engine + * partition + * @apart: AI engine partition + * @loc: AI engine tile location + * @return: return 0 if it is valid, negative value for errors. + * + * This function checks if the AI engine location is within the AI engine + * partition. + */ +static inline int aie_validate_location(struct aie_partition *apart, + struct aie_location loc) +{ + if (loc.col < apart->range.start.col || + loc.col >= apart->range.start.col + apart->range.size.col || + loc.row < apart->range.start.row || + loc.row >= apart->range.start.row + apart->range.size.row) + return -EINVAL; + + return 0; +} + +int aie_resource_initialize(struct aie_resource *res, int count); +void aie_resource_uninitialize(struct aie_resource *res); +int aie_resource_check_region(struct aie_resource *res, u32 start, + u32 count); +int aie_resource_get_region(struct aie_resource *res, u32 start, + u32 count); +void aie_resource_put_region(struct aie_resource *res, int start, u32 count); + +const struct file_operations *aie_part_get_fops(void); +u8 aie_part_in_use(struct aie_partition *apart); +struct aie_partition *aie_get_partition_from_id(struct aie_device *adev, + u32 partition_id); +struct aie_partition *aie_request_partition(struct aie_device *adev, + struct aie_partition_req *req); +struct aie_partition *of_aie_part_probe(struct aie_device *adev, + struct device_node *nc); +void aie_part_remove(struct aie_partition *apart); + +int aie_device_init(struct aie_device *adev); +#endif /* AIE_INTERNAL_H */ diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-part.c b/drivers/misc/xilinx-ai-engine/ai-engine-part.c new file mode 100644 index 0000000..fc8f9f5 --- /dev/null +++ b/drivers/misc/xilinx-ai-engine/ai-engine-part.c @@ -0,0 +1,498 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx AI Engine partition driver + * + * Copyright (C) 2020 Xilinx, Inc. + */ + +#include <linux/cdev.h> +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/fs.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/mm.h> +#include <linux/mman.h> +#include <linux/mmu_context.h> +#include <linux/mutex.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/slab.h> +#include <linux/uaccess.h> +#include <linux/uio.h> +#include <uapi/linux/xlnx-ai-engine.h> + +#include "ai-engine-internal.h" + +/** + * aie_cal_loc() - calculate tile location from register offset to the AI + * engine device + * @adev: AI engine device + * @loc: memory pointer to restore returning location information + * @regoff: tile internal register offset + * + * This function returns the tile location. + */ +static void aie_cal_loc(struct aie_device *adev, + struct aie_location *loc, u64 regoff) +{ + loc->col = (u32)aie_tile_reg_field_get(aie_col_mask(adev), + adev->col_shift, regoff); + loc->row = (u32)aie_tile_reg_field_get(aie_row_mask(adev), + adev->row_shift, regoff); +} + +/** + * aie_part_reg_validation() - validate AI engine partition register access + * @apart: AI engine partition + * @offset: AI engine register offset + * @len: len of data to write/read + * @is_write: is the access to write to register + * @return: 0 for success, or negative value for failure. + * + * This function validate if the register to access is within the AI engine + * partition. If it is write access, if the register is writable by user. + */ +static int aie_part_reg_validation(struct aie_partition *apart, size_t offset, + size_t len, u8 is_write) +{ + struct aie_device *adev; + u32 regend32, ttype; + u64 regoff, regend64; + struct aie_location loc; + unsigned int i; + + adev = apart->adev; + if (offset % sizeof(u32)) { + dev_err(&apart->dev, + "Invalid reg off(0x%zx), not 32bit aligned.\n", + offset); + return -EINVAL; + } + + if (len % sizeof(u32)) { + dev_err(&apart->dev, "Invalid reg operation len %zu.\n", len); + return -EINVAL; + } + + regoff = aie_cal_tile_reg(adev, offset); + regend64 = regoff + len; + if (regend64 >= BIT_ULL(adev->row_shift)) { + dev_err(&apart->dev, + "Invalid reg operation len %zu.\n", len); + return -EINVAL; + } + + aie_cal_loc(adev, &loc, offset); + if (aie_validate_location(apart, loc)) { + dev_err(&apart->dev, + "Invalid (%d,%d) out of part(%d,%d),(%d,%d)\n", + loc.col, loc.row, + apart->range.start.col, apart->range.start.row, + apart->range.size.col, apart->range.size.row); + return -EINVAL; + } + + if (!is_write) + return 0; + + regend32 = lower_32_bits(regend64); + ttype = adev->ops->get_tile_type(&loc); + for (i = 0; i < adev->num_kernel_regs; i++) { + const struct aie_tile_regs *regs; + u32 rttype, writable; + + regs = &adev->kernel_regs[i]; + rttype = (regs->attribute & AIE_REGS_ATTR_TILE_TYPE_MASK) >> + AIE_REGS_ATTR_TILE_TYPE_SHIFT; + writable = (regs->attribute & AIE_REGS_ATTR_PERM_MASK) >> + AIE_REGS_ATTR_PERM_SHIFT; + if (!(ttype & rttype)) + continue; + if ((regoff >= regs->soff && regoff <= regs->eoff) || + (regend32 >= regs->soff && regend32 <= regs->eoff)) { + if (!writable) { + dev_err(&apart->dev, + "reg 0x%zx,0x%zx not writable.\n", + offset, len); + return -EINVAL; + } + } + } + + return 0; +} + +/** + * aie_part_write_register() - AI engine partition write register + * @apart: AI engine partition + * @offset: AI engine register offset + * @len: len of data to write + * @data: data to write + * @mask: mask, if it is non 0, it is mask write. + * @return: number of bytes write for success, or negative value for failure. + * + * This function writes data to the specified registers. + * If the mask is non 0, it is mask write. + */ +static int aie_part_write_register(struct aie_partition *apart, size_t offset, + size_t len, void *data, u32 mask) +{ + int ret; + void __iomem *va; + + if (mask && len > sizeof(u32)) { + /* For mask write, only allow 32bit. */ + dev_err(&apart->dev, + "failed mask write, len is more that 32bit.\n"); + return -EINVAL; + } + + /* offset is expected to be relative to the start of the partition */ + offset += aie_cal_regoff(apart->adev, apart->range.start, 0); + ret = aie_part_reg_validation(apart, offset, len, 1); + if (ret < 0) { + dev_err(&apart->dev, "failed to write to 0x%zx,0x%zx.\n", + offset, len); + return ret; + } + + va = apart->adev->base + offset; + if (!mask) { + if (len == sizeof(u32)) + iowrite32(*((u32 *)data), va); + else + memcpy_toio(va, data, len); + } else { + u32 val = ioread32(va); + + val &= ~mask; + val |= *((u32 *)data) & mask; + iowrite32(val, va); + } + + return (int)len; +} + +/** + * aie_part_access_regs() - AI engine partition registers access + * @apart: AI engine partition + * @num_reqs: number of access requests + * @reqs: array of registers access + * @return: 0 for success, and negative value for failure. + * + * This function executes AI engine partition register access requests. + */ +static int aie_part_access_regs(struct aie_partition *apart, u32 num_reqs, + struct aie_reg_args *reqs) +{ + u32 i; + + for (i = 0; i < num_reqs; i++) { + struct aie_reg_args *args = &reqs[i]; + int ret; + + if (args->op != AIE_REG_WRITE) { + dev_err(&apart->dev, + "Invalid register command type: %u.\n", + args->op); + return -EINVAL; + } + ret = aie_part_write_register(apart, + (size_t)args->offset, + sizeof(args->val), + &args->val, args->mask); + if (ret < 0) { + dev_err(&apart->dev, "reg op %u failed: 0x%llx.\n", + args->op, args->offset); + return ret; + } + } + + return 0; +} + +static int aie_part_release(struct inode *inode, struct file *filp) +{ + struct aie_partition *apart = filp->private_data; + int ret; + + /* + * TODO: It will need to reset the SHIM columns and gate the + * tiles of the partition. + */ + ret = mutex_lock_interruptible(&apart->mlock); + if (ret) + return ret; + + apart->status = 0; + mutex_unlock(&apart->mlock); + + return 0; +} + +static const struct vm_operations_struct aie_part_physical_vm_ops = { +#ifdef CONFIG_HAVE_IOREMAP_PROT + .access = generic_access_phys, +#endif +}; + +static int aie_part_mmap(struct file *fp, struct vm_area_struct *vma) +{ + struct aie_partition *apart = fp->private_data; + struct aie_device *adev = apart->adev; + unsigned long offset = vma->vm_pgoff * PAGE_SIZE; + phys_addr_t addr; + size_t size; + + if (vma->vm_end < vma->vm_start) + return -EINVAL; + /* Only allow userspace directly read registers */ + if (vma->vm_flags & VM_WRITE) { + dev_err(&apart->dev, "%s: do not support writable mmap.\n", + __func__); + return -EINVAL; + } + vma->vm_private_data = apart; + vma->vm_ops = &aie_part_physical_vm_ops; + size = apart->range.size.col << adev->col_shift; + if ((vma->vm_end - vma->vm_start) > (size - offset)) { + dev_err(&apart->dev, + "%s: size exceed.\n", __func__); + return -EINVAL; + } + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + /* Calculate the partition address */ + addr = adev->res->start; + addr += apart->range.start.col << adev->col_shift; + addr += apart->range.start.row << adev->row_shift; + addr += offset; + return remap_pfn_range(vma, + vma->vm_start, + addr >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, + vma->vm_page_prot); +} + +static long aie_part_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) +{ + struct aie_partition *apart = fp->private_data; + void __user *argp = (void __user *)arg; + long ret; + + switch (cmd) { + case AIE_REG_IOCTL: + { + struct aie_reg_args raccess; + + if (copy_from_user(&raccess, argp, sizeof(raccess))) + return -EFAULT; + + ret = mutex_lock_interruptible(&apart->mlock); + if (ret) + return ret; + + ret = aie_part_access_regs(apart, 1, &raccess); + mutex_unlock(&apart->mlock); + break; + } + default: + dev_err(&apart->dev, "Invalid ioctl command %u.\n", cmd); + ret = -EINVAL; + break; + } + + return ret; +} + +const struct file_operations aie_part_fops = { + .owner = THIS_MODULE, + .release = aie_part_release, + .mmap = aie_part_mmap, + .unlocked_ioctl = aie_part_ioctl, +}; + +/** + * aie_part_release_device() - release an AI engine partition instance + * @dev: AI engine partition device + * + * It will be called by device driver core when no one holds a valid + * pointer to @dev anymore. + */ +static void aie_part_release_device(struct device *dev) +{ + struct aie_partition *apart = dev_to_aiepart(dev); + struct aie_device *adev = apart->adev; + int ret; + + ret = mutex_lock_interruptible(&adev->mlock); + if (ret) { + dev_warn(&apart->dev, + "getting adev->mlock is interrupted by signal\n"); + } + + aie_resource_put_region(&adev->cols_res, apart->range.start.col, + apart->range.size.col); + list_del(&apart->node); + mutex_unlock(&adev->mlock); + put_device(apart->dev.parent); +} + +/** + * aie_create_partition() - create AI engine partition instance + * @adev: AI engine device + * @range: AI engine partition range to check. A range describes a group + * of AI engine tiles. + * @return: created AI engine partition pointer for success, and PTR_ERR + * for failure. + * + * This function creates an AI engine partition instance. + * It creates AI engine partition, the AI engine partition device and + * the AI engine partition character device. + */ +static struct aie_partition *aie_create_partition(struct aie_device *adev, + struct aie_range *range) +{ + struct aie_partition *apart; + struct device *dev; + char devname[32]; + int ret; + + ret = mutex_lock_interruptible(&adev->mlock); + if (ret) + return ERR_PTR(ret); + + ret = aie_resource_check_region(&adev->cols_res, range->start.col, + range->size.col); + if (ret != range->start.col) { + dev_err(&adev->dev, "invalid partition (%u,%u)(%u,%u).\n", + range->start.col, range->start.row, + range->size.col, range->size.row); + mutex_unlock(&adev->mlock); + return ERR_PTR(-EINVAL); + } + ret = aie_resource_get_region(&adev->cols_res, range->start.col, + range->size.col); + if (ret != range->start.col) { + dev_err(&adev->dev, "failed to get partition (%u,%u)(%u,%u).\n", + range->start.col, range->start.row, + range->size.col, range->size.row); + mutex_unlock(&adev->mlock); + return ERR_PTR(-EFAULT); + } + mutex_unlock(&adev->mlock); + + apart = devm_kzalloc(&adev->dev, sizeof(*apart), GFP_KERNEL); + if (!apart) + return ERR_PTR(-ENOMEM); + + apart->adev = adev; + memcpy(&apart->range, range, sizeof(*range)); + mutex_init(&apart->mlock); + + /* Create AI engine partition device */ + dev = &apart->dev; + device_initialize(dev); + dev->parent = &adev->dev; + dev->class = aie_class; + dev_set_drvdata(dev, apart); + snprintf(devname, sizeof(devname) - 1, "aiepart_%d_%d", + apart->range.start.col, apart->range.size.col); + dev_set_name(dev, devname); + /* We can now rely on the release function for cleanup */ + dev->release = aie_part_release_device; + ret = device_add(dev); + if (ret) { + dev_err(dev, "device_add failed: %d\n", ret); + put_device(dev); + return ERR_PTR(ret); + } + + ret = mutex_lock_interruptible(&adev->mlock); + if (ret) { + put_device(dev); + return ERR_PTR(ret); + } + + list_add_tail(&apart->node, &adev->partitions); + mutex_unlock(&adev->mlock); + get_device(&adev->dev); + dev_dbg(dev, "created AIE partition device.\n"); + + return apart; +} + +struct aie_partition * +of_aie_part_probe(struct aie_device *adev, struct device_node *nc) +{ + struct aie_partition *apart; + struct aie_range range; + u32 partition_id, regs[4]; + int ret; + + /* Select device driver */ + ret = of_property_read_u32_array(nc, "reg", regs, ARRAY_SIZE(regs)); + if (ret < 0) { + dev_err(&adev->dev, + "probe %pOF failed, no tiles range information.\n", + nc); + return ERR_PTR(ret); + } + range.start.col = regs[0]; + range.start.row = regs[1]; + range.size.col = regs[2]; + range.size.row = regs[3]; + + ret = of_property_read_u32_index(nc, "xlnx,partition-id", 0, + &partition_id); + if (ret < 0) { + dev_err(&adev->dev, + "probe %pOF failed, no partition id.\n", nc); + return ERR_PTR(ret); + } + + ret = mutex_lock_interruptible(&adev->mlock); + if (ret) + return ERR_PTR(ret); + + apart = aie_get_partition_from_id(adev, partition_id); + mutex_unlock(&adev->mlock); + if (apart) { + dev_err(&adev->dev, + "probe failed: partition %u exists.\n", + partition_id); + return ERR_PTR(ret); + } + + apart = aie_create_partition(adev, &range); + if (IS_ERR(apart)) { + dev_err(&adev->dev, + "%s: failed to create part(%u,%u),(%u,%u).\n", + __func__, range.start.col, range.start.row, + range.size.col, range.size.row); + return apart; + } + + of_node_get(nc); + apart->dev.of_node = nc; + apart->partition_id = partition_id; + + dev_info(&adev->dev, + "AI engine part(%u,%u),(%u,%u), id %u is probed successfully.\n", + range.start.col, range.start.row, + range.size.col, range.size.row, apart->partition_id); + + return apart; +} + +/** + * aie_destroy_part() - destroy AI engine partition + * @apart: AI engine partition + * + * This function will remove AI engine partition. + */ +void aie_part_remove(struct aie_partition *apart) +{ + device_del(&apart->dev); + put_device(&apart->dev); +} diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-res.c b/drivers/misc/xilinx-ai-engine/ai-engine-res.c new file mode 100644 index 0000000..36f08bf --- /dev/null +++ b/drivers/misc/xilinx-ai-engine/ai-engine-res.c @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx AI Engine device driver + * + * Copyright (C) 2020 Xilinx, Inc. + */ + +#include <linux/bitmap.h> + +#include "ai-engine-internal.h" + +/** + * aie_resource_initialize() - initialize AI engine resource + * @res: pointer to AI engine resource + * @count: total number of element of this resource + * @return: 0 for success, negative value for failure. + * + * This function will initialize the data structure for the + * resource. + */ +int aie_resource_initialize(struct aie_resource *res, int count) +{ + if (!res || !count) + return -EINVAL; + res->bitmap = bitmap_zalloc(count, GFP_KERNEL); + if (!res->bitmap) + return -ENOMEM; + res->total = count; + + return 0; +} + +/** + * aie_resource_uninitialize() - uninitialize AI engine resource + * @res: pointer to AI engine resource + * + * This function will release the AI engine resource data members. + */ +void aie_resource_uninitialize(struct aie_resource *res) +{ + res->total = 0; + if (res->bitmap) + bitmap_free(res->bitmap); +} + +/** + * aie_resource_check() - check availability of requested resource + * @res: pointer to AI engine resource to check + * @start: start index of the required resource, it will only be used if + * @continuous is 1. It will check the available resource starting from + * @start + * @count: number of requested element + * @return: start resource id if the requested number of resources are available + * It will return negative value of errors. + * + * This function will check the availability. It will return start resource id + * if the requested number of resources are available. + */ +int aie_resource_check_region(struct aie_resource *res, + u32 start, u32 count) +{ + unsigned long id; + + if (!res || !res->bitmap || !count) + return -EINVAL; + id = bitmap_find_next_zero_area(res->bitmap, res->total, start, + count, 0); + if (id >= res->total) + return -ERANGE; + + return (int)id; +} + +/** + * aie_resource_get_region() - get requested AI engine resource + * @res: pointer to AI engine resource to check + * @count: number of requested element + * @start: start index of the required resource + * @return: start resource id for success, and negative value for failure. + * + * This function check if the requested AI engine resource is available. + * If it is available, mark it used and return the start resource id. + */ +int aie_resource_get_region(struct aie_resource *res, u32 start, u32 count) +{ + unsigned long off; + + if (!res || !res->bitmap || !count) + return -EINVAL; + off = bitmap_find_next_zero_area(res->bitmap, res->total, start, + count, 0); + if (off >= res->total) { + pr_err("Failed to get available AI engine resource.\n"); + return -ERANGE; + } + bitmap_set(res->bitmap, off, count); + + return (int)off; +} + +/** + * aie_resource_put_region() - release requested AI engine resource + * @res: pointer to AI engine resource to check + * @start: start index of the resource to release + * @count: number of elements to release + * + * This function release the requested AI engine resource. + */ +void aie_resource_put_region(struct aie_resource *res, int start, u32 count) +{ + if (!res || !count) + return; + bitmap_clear(res->bitmap, start, count); +} diff --git a/include/uapi/linux/xlnx-ai-engine.h b/include/uapi/linux/xlnx-ai-engine.h new file mode 100644 index 0000000..2a0239b --- /dev/null +++ b/include/uapi/linux/xlnx-ai-engine.h @@ -0,0 +1,107 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (c) 2020, Xilinx Inc. + */ + +#ifndef _UAPI_AI_ENGINE_H_ +#define _UAPI_AI_ENGINE_H_ + +#include <linux/ioctl.h> +#include <linux/types.h> + +/* AI engine register access operation */ +#define AIE_REG_WRITE 0 + +/* AI engine partition is in use */ +#define XAIE_PART_STATUS_INUSE (1U << 0) + +/** + * struct aie_location - AIE location information + * @col: column id + * @row: row id + */ +struct aie_location { + __u32 col; + __u32 row; +}; + +/** + * struct aie_range - AIE range information + * @start: start tile location + * @size: size of the range, number of columns and rows + */ +struct aie_range { + struct aie_location start; + struct aie_location size; +}; + +/** + * struct aie_reg_args - AIE access register arguments + * @op: if this request is to read, write or poll register + * @mask: mask for mask write, 0 for not mask write + * @offset: offset of register to the start of an AI engine partition + * @val: value to write or get + */ +struct aie_reg_args { + __u32 op; + __u32 mask; + __u64 offset; + __u32 val; +}; + +/** + * struct aie_range_args - AIE range request arguments + * @partition_id: partition id. It is used to identify the + * AI engine partition in the system. + * @uid: image identifier loaded on the AI engine partition + * @range: range of AIE tiles + * @status: indicate if the AI engine is in use. + * 0 means not in used, otherwise, in use. + */ +struct aie_range_args { + __u32 partition_id; + __u32 uid; + struct aie_range range; + __u32 status; +}; + +/** + * struct aie_partition_query - AIE partition query arguments + * @partition_cnt: number of defined partitions in the system + * @partitions: buffer to store defined partitions information. + * It is an array of struct aie_range_args. + */ +struct aie_partition_query { + __u64 partitions; + __u32 partition_cnt; +}; + +/** + * struct aie_partition_req - AIE request partition arguments + * @partition_id: partition node id. It is used to identify the AI engine + * partition in the system. + * @uid: image identifier loaded on the AI engine partition + * @meta_data: meta data to indicate which resources used by application. + * @flag: used for application to indicate particular driver requirements + * application wants to have for the partition. e.g. do not clean + * resource when closing the partition. + */ +struct aie_partition_req { + __u32 partition_id; + __u32 uid; + __u64 meta_data; + __u32 flag; +}; + +#define AIE_IOCTL_BASE 'A' + +/* AI engine device IOCTL operations */ +#define AIE_ENQUIRE_PART_IOCTL _IOWR(AIE_IOCTL_BASE, 0x1, \ + struct aie_partition_query) +#define AIE_REQUEST_PART_IOCTL _IOR(AIE_IOCTL_BASE, 0x2, \ + struct aie_partition_req) + +/* AI engine partition IOCTL operations */ +#define AIE_REG_IOCTL _IOWR(AIE_IOCTL_BASE, 0x8, \ + struct aie_reg_args) +#endif

There is no concern to have userspace to directly access AI engine program and data memories. It will be much faster to directly copy data to and from these memories from userspace.

We choose to use DMA buf for the data and program memory because of the DMA buf features. DMA buf can share the DMA memory between applications and different devices, which can benefit on how to share data with AI engine device in future.

There is one DMA buf per type of memory in an AI engine partition. e.g. There is one DMA buf for all the tile core program memories in an AI engine partition. There is another DMA buf for all the tile data memories in an AI engine partition.

Signed-off-by: Wendy Liang wendy.liang@xilinx.com Reviewed-by: Hyun Kwon hyun.kwon@xilinx.com --- drivers/misc/xilinx-ai-engine/Makefile | 1 + drivers/misc/xilinx-ai-engine/ai-engine-aie.c | 36 +++ drivers/misc/xilinx-ai-engine/ai-engine-internal.h | 30 +++ drivers/misc/xilinx-ai-engine/ai-engine-mem.c | 275 +++++++++++++++++++++ drivers/misc/xilinx-ai-engine/ai-engine-part.c | 47 ++++ drivers/misc/xilinx-ai-engine/ai-engine-reset.c | 38 +++ include/uapi/linux/xlnx-ai-engine.h | 50 ++++ 7 files changed, 477 insertions(+) create mode 100644 drivers/misc/xilinx-ai-engine/ai-engine-mem.c

diff --git a/drivers/misc/xilinx-ai-engine/Makefile b/drivers/misc/xilinx-ai-engine/Makefile index 39bec61..2dbed42 100644 --- a/drivers/misc/xilinx-ai-engine/Makefile +++ b/drivers/misc/xilinx-ai-engine/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_XILINX_AIE) += xilinx-aie.o

xilinx-aie-$(CONFIG_XILINX_AIE) := ai-engine-aie.o \ ai-engine-dev.o \ + ai-engine-mem.o \ ai-engine-part.o \ ai-engine-res.o \ ai-engine-reset.o diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-aie.c b/drivers/misc/xilinx-ai-engine/ai-engine-aie.c index 36127f0..7fce2f00 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-aie.c +++ b/drivers/misc/xilinx-ai-engine/ai-engine-aie.c @@ -12,10 +12,14 @@

#include "ai-engine-internal.h"

+#define KBYTES(n) ((n) * 1024) + #define AIE_ARRAY_SHIFT 30U #define AIE_COL_SHIFT 23U #define AIE_ROW_SHIFT 18U

+#define NUM_MEMS_PER_TILE 2U + /* * Registers offsets */ @@ -114,6 +118,37 @@ static u32 aie_get_tile_type(struct aie_location *loc) return AIE_TILE_TYPE_SHIMNOC; }

+static unsigned int aie_get_mem_info(struct aie_range *range, + struct aie_part_mem *pmem) +{ + unsigned int i; + + if (range->start.row + range->size.row <= 1) { + /* SHIM row only, no memories in this range */ + return 0; + } + if (!pmem) + return NUM_MEMS_PER_TILE; + + for (i = 0; i < NUM_MEMS_PER_TILE; i++) { + struct aie_mem *mem = &pmem[i].mem; + + memcpy(&mem->range, range, sizeof(*range)); + if (!mem->range.start.row) { + mem->range.start.row = 1; + mem->range.size.row--; + } + } + /* Setup tile data memory information */ + pmem[0].mem.offset = 0; + pmem[0].mem.size = KBYTES(32); + /* Setup program memory information */ + pmem[1].mem.offset = 0x20000; + pmem[1].mem.size = KBYTES(16); + + return NUM_MEMS_PER_TILE; +} + /** * aie_set_shim_reset() - Set AI engine SHIM reset * @adev: AI engine device @@ -170,6 +205,7 @@ static int aie_reset_shim(struct aie_device *adev, struct aie_range *range)

static const struct aie_tile_operations aie_ops = { .get_tile_type = aie_get_tile_type, + .get_mem_info = aie_get_mem_info, .reset_shim = aie_reset_shim, };

diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h index 2acd34f..e84610b 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h +++ b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h @@ -12,6 +12,8 @@ #include <linux/bits.h> #include <linux/cdev.h> #include <linux/device.h> +#include <linux/dma-buf.h> +#include <linux/file.h> #include <linux/io.h> #include <linux/list.h> #include <linux/mutex.h> @@ -67,8 +69,30 @@ struct aie_device; struct aie_partition;

/** + * struct aie_part_mem - AI engine partition memory information structure + * @apart: AI engine partition + * @dbuf: dmabuf pointer associated with the memory + * @mem: memory information of a type of memory + * @size: size of the total memories in the partition + * + * This structure is to keep the information of a type of memory in a + * partition. The memory information will be stored in @mem property. + * The following information will be keep: + * * memory start address offset within a tile + * * memory size + * * what tiles contain this type of memory + */ +struct aie_part_mem { + struct aie_partition *apart; + struct dma_buf *dbuf; + struct aie_mem mem; + size_t size; +}; + +/** * struct aie_tile_operations - AI engine device operations * @get_tile_type: get type of tile based on tile operation + * @get_mem_info: get different types of memories information * @reset_shim: reset shim, it will assert and then release SHIM reset * * Different AI engine device version has its own device @@ -76,6 +100,8 @@ struct aie_partition; */ struct aie_tile_operations { u32 (*get_tile_type)(struct aie_location *loc); + unsigned int (*get_mem_info)(struct aie_range *range, + struct aie_part_mem *pmem); int (*reset_shim)(struct aie_device *adev, struct aie_range *range); };

@@ -134,6 +160,7 @@ struct aie_device { * struct aie_partition - AI engine partition structure * @node: list node * @adev: pointer to AI device instance + * @pmems: pointer to partition memories types * @range: range of partition * @mlock: protection for AI engine partition operations * @dev: device for the AI engine partition @@ -146,6 +173,7 @@ struct aie_device { struct aie_partition { struct list_head node; struct aie_device *adev; + struct aie_part_mem *pmems; struct aie_range range; struct mutex mlock; /* protection for AI engine partition operations */ struct device dev; @@ -256,5 +284,7 @@ struct aie_partition *of_aie_part_probe(struct aie_device *adev, void aie_part_remove(struct aie_partition *apart); int aie_part_clean(struct aie_partition *apart);

+int aie_mem_get_info(struct aie_partition *apart, unsigned long arg); + int aie_device_init(struct aie_device *adev); #endif /* AIE_INTERNAL_H */ diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-mem.c b/drivers/misc/xilinx-ai-engine/ai-engine-mem.c new file mode 100644 index 0000000..4b2697e --- /dev/null +++ b/drivers/misc/xilinx-ai-engine/ai-engine-mem.c @@ -0,0 +1,275 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx AI Engine device memory implementation + * + * Copyright (C) 2020 Xilinx, Inc. + */ + +#include <linux/dma-buf.h> +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/types.h> +#include <linux/uaccess.h> +#include <uapi/linux/xlnx-ai-engine.h> + +#include "ai-engine-internal.h" + +#define aie_cal_reg_goffset(adev, loc, regoff) ({ \ + struct aie_device *_adev = (adev); \ + struct aie_location *_loc = &(loc); \ + (_loc->col << _adev->col_shift) + \ + (_loc->row << _adev->row_shift) + (regoff); \ + }) + +#define aie_cal_reg_pa(adev, loc, regoff) ({ \ + struct aie_device *__adev = (adev); \ + __adev->res->start + aie_cal_reg_goffset(__adev, loc, regoff); \ + }) + +static struct sg_table * +aie_mem_map_dma_buf(struct dma_buf_attachment *attachment, + enum dma_data_direction direction) +{ + /* + * TODO: It is mandatory by DMA buf operation. It is used return + * scatterlist table of an attachment. We don't have the implementation + * for now. And thus it has empty implementation. + */ + (void)attachment; + (void)direction; + dev_warn(attachment->dev, + "AI engine memory map dma buf is not implemented.\n"); + return NULL; +} + +static void aie_mem_unmap_dma_buf(struct dma_buf_attachment *attachment, + struct sg_table *table, + enum dma_data_direction direction) +{ + /* + * TODO: It is mandatory by DMA buf operation. It is used deallocate + * scatterlist table of an attachment. We don't have the implementation + * for now. And thus it has empty implementation. + */ + (void)attachment; + (void)table; + (void)direction; + dev_warn(attachment->dev, + "AI engine memory unmap dma buf is not implemented.\n"); +} + +static int aie_mem_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) +{ + struct aie_part_mem *pmem = dmabuf->priv; + struct aie_mem *mem = &pmem->mem; + struct aie_partition *apart = pmem->apart; + struct aie_location loc; + unsigned long addr = vma->vm_start; + unsigned long offset = vma->vm_pgoff * PAGE_SIZE, moffset = 0; + unsigned long remainder = vma->vm_end - addr; + size_t msize = mem->size; + + if (remainder + offset > pmem->size) + return -EINVAL; + + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + for (loc.col = mem->range.start.col; + loc.col < mem->range.start.col + mem->range.size.col; loc.col++) { + for (loc.row = mem->range.start.row; + loc.row < mem->range.start.row + mem->range.size.row; + loc.row++) { + unsigned long toffset, len; + phys_addr_t mempa; + int ret; + + remainder = vma->vm_end - addr; + if (!remainder) + return 0; + + if (moffset + msize < offset) { + moffset += msize; + continue; + } + /* + * calculate offset within the tile memory. + * offset is the offset to vma->start. + * moffset is the tile memory start offset to + * vma->start. + */ + toffset = offset - moffset; + len = msize - toffset; + if (len > remainder) + len = remainder; + mempa = aie_cal_reg_pa(apart->adev, loc, + toffset + mem->offset); + + ret = remap_pfn_range(vma, addr, mempa >> PAGE_SHIFT, + len, vma->vm_page_prot); + if (ret) { + dev_err(&apart->dev, + "failed to mmap (%u,%u)memory, remap failed, 0x%pa, 0x%lx.\n", + loc.col, loc.row, &mempa, len); + return ret; + } + addr += len; + offset += len; + moffset += msize; + } + } + return 0; +} + +static void aie_mem_dmabuf_release(struct dma_buf *dmabuf) +{ + struct aie_part_mem *pmem = dmabuf->priv; + + pmem->dbuf = NULL; +} + +static const struct dma_buf_ops aie_mem_dma_buf_ops = { + .map_dma_buf = aie_mem_map_dma_buf, + .unmap_dma_buf = aie_mem_unmap_dma_buf, + .mmap = aie_mem_mmap, + .release = aie_mem_dmabuf_release, +}; + +/** + * aie_mem_create_dmabuf() - creates DMA buffer for AI engine partition + * memories + * @apart: AI engine partition + * @pmem: pointer to the partition memory information + * @mem: pointer to where it store the memory information and DMA buf file + * descriptor for user. + * @return: 0 for success, negative value for failure + * + * This function will create DMA buffer for the AI engine partition memory + * and will store the DMA buffer file descriptor and memory information in + * @mem. + */ +static int aie_mem_create_dmabuf(struct aie_partition *apart, + struct aie_part_mem *pmem, + struct aie_mem *mem) +{ + struct dma_buf *dmabuf; + int ret; + + if (!PAGE_ALIGNED(pmem->mem.size)) { + dev_warn(&apart->dev, + "no dmabuf for mem(0x%zx, 0x%zx), not aligned with page size.\n", + pmem->mem.offset, pmem->mem.size); + return -EINVAL; + } + + dmabuf = pmem->dbuf; + if (!dmabuf) { + DEFINE_DMA_BUF_EXPORT_INFO(exp_info); + + exp_info.ops = &aie_mem_dma_buf_ops; + exp_info.size = pmem->size; + exp_info.flags = O_RDWR; + exp_info.priv = pmem; + + dmabuf = dma_buf_export(&exp_info); + if (IS_ERR(dmabuf)) + return PTR_ERR(dmabuf); + + pmem->dbuf = dmabuf; + } + + ret = dma_buf_fd(dmabuf, O_CLOEXEC); + if (ret < 0) { + dev_err(&apart->dev, + "dmabuf creation failed, failed to get fd.\n"); + return ret; + } + memcpy(mem, &pmem->mem, sizeof(*mem)); + mem->fd = ret; + + return 0; +} + +/** + * aie_mem_get_info() - get AI engine memories information + * @apart: AI engine partition + * @arg: argument from user to enquire AI engine partition memory information + * @return: 0 for success, and negative value for failure + * + * This function will get the memories information for the specified AI engine + * partition. It will create DMA buf file descriptors for the memories and + * return the DMA buf file descriptors to users. + * It will create a DMA buffer per type of memories. + * e.g. There will be a DMA buffer for all the tile program memories in the + * partition, and another DMA buffer for all the tile data memories in the + * partition. + * User can first pass num_mems as 0 in the @arg to enquire for how many types + * of memories in this AI engine partition. And then, user can allocate memory + * to keep the information for different types of memories, and then use the + * same enquiry with non-zero num_mems and none NULL pointer to ask for the + * details of the information of all the types of memories in the AI engine + * partition. + */ +int aie_mem_get_info(struct aie_partition *apart, unsigned long arg) +{ + struct aie_mem_args margs; + struct aie_mem *mems; + unsigned int num_mems, i; + int ret; + + if (copy_from_user(&margs, (void __user *)arg, sizeof(margs))) + return -EFAULT; + + num_mems = apart->adev->ops->get_mem_info(&apart->range, NULL); + if (num_mems <= 0) + return -EINVAL; + + if (!margs.num_mems) { + struct aie_mem_args __user *umargs_ptr = (void __user *)arg; + + /* This enquiry is to get the number of types of memories. */ + if (copy_to_user((void __user *)&umargs_ptr->num_mems, + &num_mems, sizeof(num_mems))) + return -EFAULT; + return 0; + } + + if (num_mems != margs.num_mems) { + dev_err(&apart->dev, + "failed to get mem info, invalid num of mems %d,%d.\n", + num_mems, margs.num_mems); + return -EINVAL; + } + if (!margs.mems) { + dev_err(&apart->dev, + "failed to get mem info, mems pointer is NULL.\n"); + return -EINVAL; + } + + mems = kcalloc(num_mems, sizeof(*mems), GFP_KERNEL); + if (!mems) + return -ENOMEM; + + /* + * Create DMA buffer for the memories. + * Each type of memory in the partition has its own DMA buf. + */ + for (i = 0; i < num_mems; i++) { + ret = aie_mem_create_dmabuf(apart, &apart->pmems[i], &mems[i]); + if (ret) + break; + } + if (!ret) { + if (copy_to_user(u64_to_user_ptr(margs.mems), mems, + num_mems * sizeof(mems[0]))) + ret = -EFAULT; + } + + if (ret) { + for (i = 0; i < num_mems; i++) { + if (mems[i].fd) + put_unused_fd(mems[i].fd); + } + } + + kfree(mems); + return ret; +} diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-part.c b/drivers/misc/xilinx-ai-engine/ai-engine-part.c index 98f125b..4be6d38 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-part.c +++ b/drivers/misc/xilinx-ai-engine/ai-engine-part.c @@ -294,6 +294,8 @@ static long aie_part_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) mutex_unlock(&apart->mlock); break; } + case AIE_GET_MEM_IOCTL: + return aie_mem_get_info(apart, arg); default: dev_err(&apart->dev, "Invalid ioctl command %u.\n", cmd); ret = -EINVAL; @@ -337,6 +339,41 @@ static void aie_part_release_device(struct device *dev) }

/** + * aie_part_create_mems_info() - creates array to store the AI engine partition + * different memories types information + * @apart: AI engine partition + * @return: 0 for success, negative value for failure + * + * This function will create array to store the information of different + * memories types in the partition. This array is stored in @apart->pmems. + */ +static int aie_part_create_mems_info(struct aie_partition *apart) +{ + unsigned int i, num_mems; + + num_mems = apart->adev->ops->get_mem_info(&apart->range, NULL); + if (!num_mems) + return 0; + + apart->pmems = devm_kcalloc(&apart->dev, num_mems, + sizeof(struct aie_part_mem), + GFP_KERNEL); + if (!apart->pmems) + return -ENOMEM; + + apart->adev->ops->get_mem_info(&apart->range, apart->pmems); + for (i = 0; i < num_mems; i++) { + struct aie_mem *mem = &apart->pmems[i].mem; + + apart->pmems[i].apart = apart; + apart->pmems[i].size = mem->size * + mem->range.size.col * + mem->range.size.row; + } + return 0; +} + +/** * aie_create_partition() - create AI engine partition instance * @adev: AI engine device * @range: AI engine partition range to check. A range describes a group @@ -406,6 +443,16 @@ static struct aie_partition *aie_create_partition(struct aie_device *adev, return ERR_PTR(ret); }

+ /* + * Create array to keep the information of the different types of tile + * memories information of the AI engine partition. + */ + ret = aie_part_create_mems_info(apart); + if (ret) { + put_device(dev); + return ERR_PTR(ret); + } + ret = mutex_lock_interruptible(&adev->mlock); if (ret) { put_device(dev); diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-reset.c b/drivers/misc/xilinx-ai-engine/ai-engine-reset.c index fc0262f7..d35cd8d 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-reset.c +++ b/drivers/misc/xilinx-ai-engine/ai-engine-reset.c @@ -86,6 +86,43 @@ static void aie_part_set_cols_clkbuf(struct aie_partition *apart, bool enable) }

/** + * aie_part_clear_mems() - clear memories of every tile in a partition + * @apart: AI engine partition + */ +static void aie_part_clear_mems(struct aie_partition *apart) +{ + struct aie_device *adev = apart->adev; + struct aie_part_mem *pmems = apart->pmems; + u32 i, num_mems; + + /* Get the number of different types of memories */ + num_mems = adev->ops->get_mem_info(&apart->range, NULL); + if (!num_mems) + return; + + /* Clear each type of memories in the partition */ + for (i = 0; i < num_mems; i++) { + struct aie_mem *mem = &pmems[i].mem; + struct aie_range *range = &mem->range; + u32 c, r; + + for (c = range->start.col; + c < range->start.col + range->size.col; c++) { + for (r = range->start.row; + r < range->start.row + range->size.row; r++) { + struct aie_location loc; + u32 memoff; + + loc.col = c; + loc.row = r; + memoff = aie_cal_regoff(adev, loc, mem->offset); + memset_io(adev->base + memoff, 0, mem->size); + } + } + } +} + +/** * aie_part_clean() - reset and clear AI engine partition * @apart: AI engine partition * @return: 0 for success and negative value for failure @@ -115,6 +152,7 @@ int aie_part_clean(struct aie_partition *apart) if (ret < 0) return ret;

+ aie_part_clear_mems(apart); aie_part_set_cols_clkbuf(apart, false);

return 0; diff --git a/include/uapi/linux/xlnx-ai-engine.h b/include/uapi/linux/xlnx-ai-engine.h index 0f46151..9faeebe 100644 --- a/include/uapi/linux/xlnx-ai-engine.h +++ b/include/uapi/linux/xlnx-ai-engine.h @@ -6,6 +6,10 @@ #ifndef _UAPI_AI_ENGINE_H_ #define _UAPI_AI_ENGINE_H_

+#ifndef __KERNEL__ +#include <stdlib.h> +#endif + #include <linux/ioctl.h> #include <linux/types.h>

@@ -42,6 +46,33 @@ struct aie_range { };

/** + * struct aie_mem - AIE memory information + * @range: range of tiles of the memory + * @offset: register offset within a tile of the memory + * @size: of a the memory in one tile + * @fd: file descriptor of the memory + */ +struct aie_mem { + struct aie_range range; + size_t offset; + size_t size; + int fd; +}; + +/** + * struct aie_mem_args - AIE memory enquiry arguments + * @num_mems: number of "struct aie_mem" elements + * e.g. two memory information elements, one for tile core memory, + * and the other for tile data memory. + * @mems: array of struct aie_mem which are the AI engine memories + * information. + */ +struct aie_mem_args { + unsigned int num_mems; + __u64 mems; +}; + +/** * struct aie_reg_args - AIE access register arguments * @op: if this request is to read, write or poll register * @mask: mask for mask write, 0 for not mask write @@ -110,4 +141,23 @@ struct aie_partition_req { /* AI engine partition IOCTL operations */ #define AIE_REG_IOCTL _IOWR(AIE_IOCTL_BASE, 0x8, \ struct aie_reg_args) +/** + * DOC: AIE_GET_MEM_IOCTL - enquire information of memories in the AI engine + * partition + * This ioctl is used to get the information of all the different types of + * memories in the AI engine partition. Application can get the memories + * information in two steps: + * 1. passing 0 as @num_mems in struct aie_mem_args to enquire the number of + * different memories in the partition, the value will be returned in + * @num_mems. + * 2. passing the number of memories in @num_mems and valid pointer as @mems of + * struct aie_mem_args to store the details information of different + * memories. The driver will create DMA buf for each type of memories, and + * will return the memory addressing information along with the DMA buf file + * descriptors in @mems. + * After getting the memories information, user can use mmap() with the DMA buf + * file descriptor to enable access the memories from userspace. + */ +#define AIE_GET_MEM_IOCTL _IOWR(AIE_IOCTL_BASE, 0x9, \ + struct aie_mem_args) #endif

Add request/release and related clock gating functions to AI engine driver: * scanning when the partition is being requested to know which tiles are in use. * check if a tile is gated or not * tiles requesting and releasing ioctl so that user application can enable/disable tiles at runtime.

Signed-off-by: Wendy Liang wendy.liang@xilinx.com Reviewed-by: Hyun Kwon hyun.kwon@xilinx.com --- drivers/misc/xilinx-ai-engine/Makefile | 1 + drivers/misc/xilinx-ai-engine/ai-engine-aie.c | 225 +++++++++++++++++++ drivers/misc/xilinx-ai-engine/ai-engine-clock.c | 245 +++++++++++++++++++++ drivers/misc/xilinx-ai-engine/ai-engine-dev.c | 19 +- drivers/misc/xilinx-ai-engine/ai-engine-internal.h | 34 +++ drivers/misc/xilinx-ai-engine/ai-engine-part.c | 32 +++ drivers/misc/xilinx-ai-engine/ai-engine-res.c | 51 +++++ include/uapi/linux/xlnx-ai-engine.h | 31 +++ 8 files changed, 631 insertions(+), 7 deletions(-) create mode 100644 drivers/misc/xilinx-ai-engine/ai-engine-clock.c

diff --git a/drivers/misc/xilinx-ai-engine/Makefile b/drivers/misc/xilinx-ai-engine/Makefile index 1b743fa..2e67b25 100644 --- a/drivers/misc/xilinx-ai-engine/Makefile +++ b/drivers/misc/xilinx-ai-engine/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_XILINX_AIE) += xilinx-aie.o

xilinx-aie-$(CONFIG_XILINX_AIE) := ai-engine-aie.o \ + ai-engine-clock.o \ ai-engine-dev.o \ ai-engine-dma.o \ ai-engine-mem.o \ diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-aie.c b/drivers/misc/xilinx-ai-engine/ai-engine-aie.c index ac95aff..ff721b3 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-aie.c +++ b/drivers/misc/xilinx-ai-engine/ai-engine-aie.c @@ -41,6 +41,9 @@ #define AIE_SHIMPL_SHIMRST_MASK 0x1U #define AIE_SHIMPL_COLRST_MASK 0x1U #define AIE_SHIMPL_CLKCNTR_COLBUF_MASK 0x1U +#define AIE_SHIMPL_CLKCNTR_NEXTCLK_MASK BIT(1) +#define AIE_TILE_CLKCNTR_COLBUF_MASK BIT(0) +#define AIE_TILE_CLKCNTR_NEXTCLK_MASK BIT(1)

/* * AI engine SHIM reset ID. @@ -221,10 +224,232 @@ static int aie_reset_shim(struct aie_device *adev, struct aie_range *range) return 0; }

+static int aie_init_part_clk_state(struct aie_partition *apart) +{ + int ret, num_tiles; + + num_tiles = apart->range.size.col * (apart->range.size.row - 1); + + ret = aie_resource_initialize(&apart->cores_clk_state, num_tiles); + if (ret) { + dev_err(&apart->dev, + "failed to initialize cores clock state resource.\n"); + return ret; + } + + ret = aie_resource_initialize(&apart->tiles_inuse, num_tiles); + if (ret) { + dev_err(&apart->dev, + "failed to initialize tiles in use resource.\n"); + return ret; + } + + return 0; +} + +static int aie_scan_part_clocks(struct aie_partition *apart) +{ + struct aie_device *adev = apart->adev; + struct aie_range *range = &apart->range; + struct aie_location loc; + + /* Clear the bitmap of cores and memories clock state */ + aie_resource_put_region(&apart->cores_clk_state, 0, + apart->cores_clk_state.total); + + for (loc.col = range->start.col; + loc.col < range->start.col + range->size.col; + loc.col++) { + for (loc.row = range->start.row; + loc.row < range->start.row + range->size.row - 1; + loc.row++) { + void __iomem *va; + u32 val, nbitpos; + + /* + * Reading registers of the current tile to see the next + * tile is clock gated. + */ + nbitpos = loc.col * (range->size.row - 1) + loc.row; + + if (aie_get_tile_type(&loc) != AIE_TILE_TYPE_TILE) { + /* Checks shim tile for next core tile */ + va = adev->base + + aie_cal_regoff(adev, loc, + AIE_SHIMPL_CLKCNTR_REGOFF); + val = ioread32(va); + + /* + * check if the clock buffer and the next clock + * tile is set, if one of them is not set, the + * tiles of the column are clock gated. + */ + if (!(val & AIE_SHIMPL_CLKCNTR_COLBUF_MASK) || + !(val & AIE_SHIMPL_CLKCNTR_NEXTCLK_MASK)) + break; + + /* Set next tile in the row clock state on */ + aie_resource_set(&apart->cores_clk_state, + nbitpos, 1); + continue; + } + + /* Checks core tile for next tile */ + va = adev->base + + aie_cal_regoff(adev, loc, + AIE_TILE_CORE_CLKCNTR_REGOFF); + val = ioread32(va); + + /* + * If the next tile is gated, skip the rest of the + * column. + */ + if (!(val & AIE_TILE_CLKCNTR_NEXTCLK_MASK)) + break; + + aie_resource_set(&apart->cores_clk_state, nbitpos, 1); + } + } + + /* + * Set the tiles in use bitmap. + * In case of scanning, tiles which are powered on are considered as + * tiles in use. + */ + bitmap_copy(apart->tiles_inuse.bitmap, apart->cores_clk_state.bitmap, + apart->tiles_inuse.total); + + return 0; +} + +/* aie_set_col_clocks() - set clocks of a range of tiles of a column + * @apart: AI engine partition + * @range: range of tiles of a column + * @enable: true to enable the clock, false to disable + * @return: 0 for success, negative value of errors. + */ +static int aie_set_col_clocks(struct aie_partition *apart, + struct aie_range *range, bool enable) +{ + struct aie_location ploc; + u32 startbit; + + /* + * check if the range is of single column. only single column is allowed. + * check if the start row is tile row, only tile rows are allowed. + */ + if (range->size.col != 1 || range->start.row < 1) + return -EINVAL; + + ploc.col = range->start.col; + for (ploc.row = range->start.row - 1; + ploc.row < range->start.row + range->size.row - 1; + ploc.row++) { + struct aie_device *adev = apart->adev; + + if (!ploc.row) { + void __iomem *va; + u32 val = 0; + + /* + * Configure SHIM clock registers to gate or + * ungate next tile. + */ + if (enable) + val = AIE_SHIMPL_CLKCNTR_COLBUF_MASK | + AIE_SHIMPL_CLKCNTR_NEXTCLK_MASK; + va = adev->base + + aie_cal_regoff(adev, ploc, + AIE_SHIMPL_CLKCNTR_REGOFF); + iowrite32(val, va); + } else { + void __iomem *va; + u32 val = 0; + + /* + * Configure core tile clock registers to gate + * or ungate next tile. + */ + if (enable) + val = AIE_TILE_CLKCNTR_COLBUF_MASK | + AIE_TILE_CLKCNTR_NEXTCLK_MASK; + va = adev->base + + aie_cal_regoff(adev, ploc, + AIE_TILE_CORE_CLKCNTR_REGOFF); + iowrite32(val, va); + } + + /* If the tile clock is not on, jump to next column */ + if (!enable) + break; + } + + /* Update clock state bitmap */ + startbit = range->start.col * (apart->range.size.row - 1) + + range->start.row - 1; + if (enable) + aie_resource_set(&apart->cores_clk_state, startbit, + range->size.row); + else + aie_resource_clear(&apart->cores_clk_state, startbit, + range->size.row); + + return 0; +} + +static int aie_set_part_clocks(struct aie_partition *apart) +{ + struct aie_range *range = &apart->range, lrange; + struct aie_location loc; + + /* + * The tiles below the highest tile whose clock is on, need to have the + * clock on. The first for loop is to scan the clock states bitmap to + * see which tiles are required to be clocked on, and update the bitmap + * to make sure the tiles below are also required to be clocked on. + */ + for (loc.col = range->start.col; + loc.col < range->start.col + range->size.col; + loc.col++) { + u32 startbit, inuse_toprow = 0, clk_toprow = 0; + + startbit = loc.col * (range->size.row - 1); + + for (loc.row = range->start.row + 1; + loc.row < range->start.row + range->size.row; + loc.row++) { + u32 bit = startbit + loc.row - 1; + + if (aie_resource_testbit(&apart->tiles_inuse, bit)) + inuse_toprow = loc.row; + if (aie_resource_testbit(&apart->cores_clk_state, bit)) + clk_toprow = loc.row; + } + + /* Update clock states of a column */ + lrange.start.col = loc.col; + lrange.size.col = 1; + if (inuse_toprow < clk_toprow) { + lrange.start.row = inuse_toprow + 1; + lrange.size.row = clk_toprow - inuse_toprow; + aie_set_col_clocks(apart, &lrange, false); + } else if (inuse_toprow > clk_toprow) { + lrange.start.row = clk_toprow + 1; + lrange.size.row = inuse_toprow - clk_toprow; + aie_set_col_clocks(apart, &lrange, true); + } + } + + return 0; +} + static const struct aie_tile_operations aie_ops = { .get_tile_type = aie_get_tile_type, .get_mem_info = aie_get_mem_info, .reset_shim = aie_reset_shim, + .init_part_clk_state = aie_init_part_clk_state, + .scan_part_clocks = aie_scan_part_clocks, + .set_part_clocks = aie_set_part_clocks, };

/** diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-clock.c b/drivers/misc/xilinx-ai-engine/ai-engine-clock.c new file mode 100644 index 0000000..261702b --- /dev/null +++ b/drivers/misc/xilinx-ai-engine/ai-engine-clock.c @@ -0,0 +1,245 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx AI Engine device driver + * + * Copyright (C) 2020 Xilinx, Inc. + */ + +#include "ai-engine-internal.h" +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/uaccess.h> + +/** + * aie_part_get_clk_state_bit() - return bit position of the clock state of a + * tile + * @apart: AI engine partition + * @loc: AI engine tile location + * @return: bit position for success, negative value for failure + */ +static int aie_part_get_clk_state_bit(struct aie_partition *apart, + struct aie_location *loc) +{ + if (apart->adev->ops->get_tile_type(loc) != AIE_TILE_TYPE_TILE) + return -EINVAL; + + return loc->col * (apart->range.size.row - 1) + loc->row - 1; +} + +/** + * aie_part_scan_clk_state() - scan the clock states of tiles of the AI engine + * partition + * @apart: AI engine partition + * @return: 0 for success, negative value for failure. + * + * This function will scan the clock status of both the memory and core + * modules. + */ +int aie_part_scan_clk_state(struct aie_partition *apart) +{ + return apart->adev->ops->scan_part_clocks(apart); +} + +/** + * aie_part_check_clk_enable_loc() - return if clock of a tile is enabled + * @apart: AI engine partition + * @loc: AI engine tile location + * @return: true for enabled, false for disabled + */ +bool aie_part_check_clk_enable_loc(struct aie_partition *apart, + struct aie_location *loc) +{ + int bit; + + if (apart->adev->ops->get_tile_type(loc) != AIE_TILE_TYPE_TILE) + return true; + + bit = aie_part_get_clk_state_bit(apart, loc); + return aie_resource_testbit(&apart->cores_clk_state, bit); +} + +/** + * aie_part_request_tiles() - request tiles from an AI engine partition. + * @apart: AI engine partition + * @num_tiles: number of tiles to request. If it is 0, it means all tiles + * @locs: the AI engine tiles locations array which will be requested + * @return: 0 for success, negative value for failure. + * + * This function will enable clocks of the specified tiles. + */ +static int aie_part_request_tiles(struct aie_partition *apart, int num_tiles, + struct aie_location *locs) +{ + if (num_tiles == 0) { + aie_resource_set(&apart->tiles_inuse, 0, + apart->tiles_inuse.total); + } else { + u32 n; + + if (!locs) + return -EINVAL; + + for (n = 0; n < num_tiles; n++) { + int bit = aie_part_get_clk_state_bit(apart, &locs[n]); + + if (bit >= 0) + aie_resource_set(&apart->tiles_inuse, bit, 1); + } + } + + return apart->adev->ops->set_part_clocks(apart); +} + +/** + * aie_part_release_tiles() - release tiles from an AI engine partition. + * @apart: AI engine partition + * @num_tiles: number of tiles to release. If it is 0, it means all tiles + * @locs: the AI engine tiles locations array which will be released + * @return: 0 for success, negative value for failure. + * + * This function will disable clocks of the specified tiles. + */ +static int aie_part_release_tiles(struct aie_partition *apart, int num_tiles, + struct aie_location *locs) +{ + if (num_tiles == 0) { + aie_resource_clear(&apart->tiles_inuse, 0, + apart->tiles_inuse.total); + } else { + u32 n; + + if (!locs) + return -EINVAL; + + for (n = 0; n < num_tiles; n++) { + int bit = aie_part_get_clk_state_bit(apart, &locs[n]); + + if (bit >= 0) + aie_resource_clear(&apart->tiles_inuse, bit, 1); + } + } + + return apart->adev->ops->set_part_clocks(apart); +} + +/** + * aie_part_request_tiles_from_user() - request tiles from an AI engine + * partition from user + * @apart: AI engine partition + * @user_args: user AI engine request tiles argument + * @return: 0 for success, negative value for failure. + * + * This function will request tiles from user request. + */ +int aie_part_request_tiles_from_user(struct aie_partition *apart, + void __user *user_args) +{ + struct aie_tiles_array args; + struct aie_location *locs = NULL; + int ret; + + if (copy_from_user(&args, user_args, sizeof(args))) + return -EFAULT; + + if (args.num_tiles) { + u32 i; + + locs = kmalloc_array(args.num_tiles, sizeof(*locs), + GFP_KERNEL); + if (!locs) + return -ENOMEM; + + if (copy_from_user(locs, u64_to_user_ptr(args.locs), + args.num_tiles * sizeof(*locs))) { + kfree(locs); + return -EFAULT; + } + + /* update the location to absolute location */ + for (i = 0; i < args.num_tiles; i++) { + if (locs[i].col > apart->range.size.col || + locs[i].row > apart->range.size.row) { + dev_err(&apart->dev, + "failed to request tiles, invalid tile(%u,%u).\n", + locs[i].col, locs[i].row); + kfree(locs); + return -EINVAL; + } + locs[i].col += apart->range.start.col; + locs[i].row += apart->range.start.row; + } + } + + ret = mutex_lock_interruptible(&apart->mlock); + if (ret) { + kfree(locs); + return ret; + } + + ret = aie_part_request_tiles(apart, args.num_tiles, locs); + mutex_unlock(&apart->mlock); + + kfree(locs); + return ret; +} + +/** + * aie_part_release_tiles_from_user() - release tiles from an AI engine + * partition from user + * @apart: AI engine partition + * @user_args: user AI engine request tiles argument + * @return: 0 for success, negative value for failure. + * + * This function will release tiles from user request. + */ +int aie_part_release_tiles_from_user(struct aie_partition *apart, + void __user *user_args) +{ + struct aie_tiles_array args; + struct aie_location *locs = NULL; + int ret; + + if (copy_from_user(&args, user_args, sizeof(args))) + return -EFAULT; + + if (args.num_tiles) { + int i; + + locs = kmalloc_array(args.num_tiles, sizeof(*locs), + GFP_KERNEL); + if (!locs) + return -ENOMEM; + + if (copy_from_user(locs, u64_to_user_ptr(args.locs), + args.num_tiles * sizeof(*locs))) { + kfree(locs); + return -EFAULT; + } + + /* update the location to absolute location */ + for (i = 0; i < args.num_tiles; i++) { + if (locs[i].col > apart->range.size.col || + locs[i].row > apart->range.size.row) { + dev_err(&apart->dev, + "failed to release tiles, invalid tile(%u,%u).\n", + locs[i].col, locs[i].row); + kfree(locs); + return -EINVAL; + } + locs[i].col += apart->range.start.col; + locs[i].row += apart->range.start.row; + } + } + + ret = mutex_lock_interruptible(&apart->mlock); + if (ret) { + kfree(locs); + return ret; + } + + ret = aie_part_release_tiles(apart, args.num_tiles, locs); + mutex_unlock(&apart->mlock); + + kfree(locs); + return ret; +} diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-dev.c b/drivers/misc/xilinx-ai-engine/ai-engine-dev.c index 69f7216..43f4933 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-dev.c +++ b/drivers/misc/xilinx-ai-engine/ai-engine-dev.c @@ -204,17 +204,22 @@ struct aie_partition *aie_request_partition(struct aie_device *adev, } else { /* * TBD: - * 1. setup NOC AXI MM config to only generate error events - * for slave error and decode error. - * 2. scan to see which tiles have been clock gated. + * setup NOC AXI MM config to only generate error events + * for slave error and decode error. * * This needs to be done before the AI engine partition is * exported for user to access. */ - apart->status = XAIE_PART_STATUS_INUSE; - apart->cntrflag = req->flag; - - mutex_unlock(&apart->mlock); + /* scan to setup the initial clock state for tiles */ + ret = aie_part_scan_clk_state(apart); + if (ret) { + mutex_unlock(&apart->mlock); + apart = ERR_PTR(ret); + } else { + apart->status = XAIE_PART_STATUS_INUSE; + apart->cntrflag = req->flag; + mutex_unlock(&apart->mlock); + } } mutex_unlock(&adev->mlock);

diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h index bf3a09c..131d22a 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h +++ b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h @@ -112,6 +112,22 @@ struct aie_dma_attr { * @get_tile_type: get type of tile based on tile operation * @get_mem_info: get different types of memories information * @reset_shim: reset shim, it will assert and then release SHIM reset + * @init_part_clk_state: initialize clock states software structure which is a + * bitmap for the AI engine partition. The clock states + * structure is the structure used to keep track of if + * the modules in the AI engine partition are gated. + * @scan_part_clocks: scan partition modules to check whether the modules are + * clock gated or not, and update the soft clock states + * structure. It is required to be called when the partition + * is requested so that the driver knows which modules are + * clock gated when the partition is requested. This function + * expects the caller to apply partition lock before calling + * this function. + * @set_part_clocks: set partition modules clocks gate registers based on the + * partition clock states bitmap. This function expects the + * caller to apply partition lock before calling this + * function. The caller function will need to set the bitmap + * on which tiles are required to be clocked on. * * Different AI engine device version has its own device * operation. @@ -121,6 +137,9 @@ struct aie_tile_operations { unsigned int (*get_mem_info)(struct aie_range *range, struct aie_part_mem *pmem); int (*reset_shim)(struct aie_device *adev, struct aie_range *range); + int (*init_part_clk_state)(struct aie_partition *apart); + int (*scan_part_clocks)(struct aie_partition *apart); + int (*set_part_clocks)(struct aie_partition *apart); };

/** @@ -185,6 +204,8 @@ struct aie_device { * @range: range of partition * @mlock: protection for AI engine partition operations * @dev: device for the AI engine partition + * @cores_clk_state: bitmap to indicate the power state of core modules + * @tiles_inuse: bitmap to indicate if a tile is in use * @partition_id: partition id. Partition ID is the identifier * of the AI engine partition in the system. * @status: indicate if the partition is in use @@ -199,6 +220,8 @@ struct aie_partition { struct aie_range range; struct mutex mlock; /* protection for AI engine partition operations */ struct device dev; + struct aie_resource cores_clk_state; + struct aie_resource tiles_inuse; u32 partition_id; u32 status; u32 cntrflag; @@ -308,6 +331,9 @@ int aie_resource_check_region(struct aie_resource *res, u32 start, int aie_resource_get_region(struct aie_resource *res, u32 start, u32 count); void aie_resource_put_region(struct aie_resource *res, int start, u32 count); +int aie_resource_set(struct aie_resource *res, u32 start, u32 count); +int aie_resource_clear(struct aie_resource *res, u32 start, u32 count); +bool aie_resource_testbit(struct aie_resource *res, u32 bit);

const struct file_operations *aie_part_get_fops(void); u8 aie_part_in_use(struct aie_partition *apart); @@ -331,5 +357,13 @@ long aie_part_set_dmabuf_bd(struct aie_partition *apart, void __user *user_args); void aie_part_release_dmabufs(struct aie_partition *apart);

+int aie_part_scan_clk_state(struct aie_partition *apart); +bool aie_part_check_clk_enable_loc(struct aie_partition *apart, + struct aie_location *loc); +int aie_part_request_tiles_from_user(struct aie_partition *apart, + void __user *user_args); +int aie_part_release_tiles_from_user(struct aie_partition *apart, + void __user *user_args); + int aie_device_init(struct aie_device *adev); #endif /* AIE_INTERNAL_H */ diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-part.c b/drivers/misc/xilinx-ai-engine/ai-engine-part.c index dcfb9ec..54450b6 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-part.c +++ b/drivers/misc/xilinx-ai-engine/ai-engine-part.c @@ -94,6 +94,27 @@ static int aie_part_reg_validation(struct aie_partition *apart, size_t offset, return -EINVAL; }

+ /* + * We check if a tile is gated before trying to access the tile. + * As we mmap() the registers as read only to enable faster status + * enquiry, and mmap() memories as write/read to faster memory access, + * user can still access the clock gated tiles from userspace by + * accessing the mmapped space. + * Accessing the gated tiles can cause decode error. With PDI flow, + * the PDI sets up the SHIM NOC AXI MM to only generate AI engine error + * even instead of generating the NSU error. but for non PDI flow, as + * the AXI MM register are protected register, until we have EEMI API + * to update the AXI MM register, access the gated tiles can cause NSU + * errors. + * TODO: To solve this, we need to either request EEMI to configure + * AXI MM or split the mmapped space into tiles based lists. + */ + if (!aie_part_check_clk_enable_loc(apart, &loc)) { + dev_err(&apart->dev, + "Tile(%u,%d) is gated.\n", loc.col, loc.row); + return -EINVAL; + } + if (!is_write) return 0;

@@ -304,6 +325,10 @@ static long aie_part_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) return aie_part_detach_dmabuf_req(apart, argp); case AIE_SET_SHIMDMA_DMABUF_BD_IOCTL: return aie_part_set_dmabuf_bd(apart, argp); + case AIE_REQUEST_TILES_IOCTL: + return aie_part_request_tiles_from_user(apart, argp); + case AIE_RELEASE_TILES_IOCTL: + return aie_part_release_tiles_from_user(apart, argp); default: dev_err(&apart->dev, "Invalid ioctl command %u.\n", cmd); ret = -EINVAL; @@ -343,6 +368,7 @@ static void aie_part_release_device(struct device *dev) apart->range.size.col); list_del(&apart->node); mutex_unlock(&adev->mlock); + aie_resource_uninitialize(&apart->cores_clk_state); put_device(apart->dev.parent); }

@@ -466,6 +492,12 @@ static struct aie_partition *aie_create_partition(struct aie_device *adev, return ERR_PTR(ret); }

+ ret = adev->ops->init_part_clk_state(apart); + if (ret) { + put_device(dev); + return ERR_PTR(ret); + } + ret = mutex_lock_interruptible(&adev->mlock); if (ret) { put_device(dev); diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-res.c b/drivers/misc/xilinx-ai-engine/ai-engine-res.c index 36f08bf..b0c0741 100644 --- a/drivers/misc/xilinx-ai-engine/ai-engine-res.c +++ b/drivers/misc/xilinx-ai-engine/ai-engine-res.c @@ -112,3 +112,54 @@ void aie_resource_put_region(struct aie_resource *res, int start, u32 count) return; bitmap_clear(res->bitmap, start, count); } + +/** + * aie_resource_set() - set the AI engine resource bits + * @res: pointer to AI engine resource + * @start: start bit to set + * @count: number of bits to set + * @return: 0 for success and negative value for failure + * + * This function sets the specified number bits in the resource. + */ +int aie_resource_set(struct aie_resource *res, u32 start, u32 count) +{ + if (!res || !res->bitmap || !count || start + count > res->total) + return -EINVAL; + + bitmap_set(res->bitmap, start, count); + return 0; +} + +/** + * aie_resource_clear() - clear the AI engine resource bits + * @res: pointer to AI engine resource + * @start: start bit to set + * @count: number of bits to clear + * @return: 0 for success and negative value for failure + * + * This function clears the specified number bits in the resource. + */ +int aie_resource_clear(struct aie_resource *res, u32 start, u32 count) +{ + if (!res || !res->bitmap || !count || start + count > res->total) + return -EINVAL; + + bitmap_clear(res->bitmap, start, count); + return 0; +} + +/** + * aie_resource_testbit() - test if a bit is set in a AI engine resource + * @res: pointer to AI engine resource + * @bit: bit to check + * @return: true for set, false for not set + */ +bool aie_resource_testbit(struct aie_resource *res, u32 bit) +{ + if (!res || !res->bitmap || bit >= res->total) + return false; + + /* Locate the unsigned long the required bit belongs to */ + return test_bit(bit, res->bitmap); +} diff --git a/include/uapi/linux/xlnx-ai-engine.h b/include/uapi/linux/xlnx-ai-engine.h index 75d9dbf..a090550 100644 --- a/include/uapi/linux/xlnx-ai-engine.h +++ b/include/uapi/linux/xlnx-ai-engine.h @@ -146,6 +146,16 @@ struct aie_dmabuf_bd_args { __u32 bd_id; };

+/** + * struct aie_tiles_array - AIE tiles array + * @locs: tiles locations array. An array of struct aie_location. + * @num_tiles: number of tiles in the tiles locations array + */ +struct aie_tiles_array { + __u64 locs; + __u32 num_tiles; +}; + #define AIE_IOCTL_BASE 'A'

/* AI engine device IOCTL operations */ @@ -204,4 +214,25 @@ struct aie_dmabuf_bd_args { #define AIE_SET_SHIMDMA_DMABUF_BD_IOCTL _IOW(AIE_IOCTL_BASE, 0x10, \ struct aie_dmabuf_bd_args)

+/** + * DOC: AIE_REQUEST_TILES_IOCTL - request AI engine tiles + * + * This ioctl is used to request tiles. + * When requested the AI engine partition, the kernel driver will scan the + * partition to track which tiles are enabled or not. After that, if user + * want to request for more tiles, it will use this ioctl to request more + * tiles. + * If the aie_tiles_array is empty, it means it will request for all tiles + * in the partition. + */ +#define AIE_REQUEST_TILES_IOCTL _IOW(AIE_IOCTL_BASE, 0xe, \ + struct aie_tiles_array) + +/** + * DOC: AIE_RELEASE_TILES_IOCTL - release AI engine tiles + * + * This ioctl is used to release tiles + */ +#define AIE_RELEASE_TILES_IOCTL _IOW(AIE_IOCTL_BASE, 0xf, \ + struct aie_tiles_array) #endif

From: Izhar Ameer Shaikh izhar.ameer.shaikh@xilinx.com

Latching of AIE NPI Interrupts is present in Versal ES1 Silicon Rev, however it has been removed from ES2 rev. As a result on ES1, in order to use the interrupt, a client needs to request PMC to clear/ack the interrupt.

Provide an EEMI IOCTL to serve the same purpose. Note that, this will only be applicable for ES1 rev. For ES2 and other non-silicon platforms, this call will essentially be a NOP in the firmware.

Signed-off-by: Izhar Ameer Shaikh izhar.ameer.shaikh@xilinx.com Signed-off-by: Wendy Liang wendy.liang@xilinx.com --- drivers/firmware/xilinx/zynqmp.c | 14 ++++++++++++++ include/linux/firmware/xlnx-zynqmp.h | 8 ++++++++ 2 files changed, 22 insertions(+)

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index d08ac82..23e58cc 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -729,6 +729,20 @@ int zynqmp_pm_set_boot_health_status(u32 value) }

/** + * zynqmp_pm_clear_aie_npi_isr - Clear AI engine NPI interrupt status register + * @node: AI engine node id + * @irq_mask: Mask of AI engine NPI interrupt bit to clear + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_clear_aie_npi_isr(u32 node, u32 irq_mask) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_AIE_ISR_CLEAR, + irq_mask, 0, NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_clear_aie_npi_isr); + +/** * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) * @reset: Reset to be configured * @assert_flag: Flag stating should reset be asserted (1) or diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 83ac9ec..defa4ea 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -114,6 +114,8 @@ enum pm_ioctl_id { IOCTL_READ_PGGS = 15, /* Set healthy bit value */ IOCTL_SET_BOOT_HEALTH_STATUS = 17, + /* AI engine NPI ISR clear */ + IOCTL_AIE_ISR_CLEAR = 24, };

enum pm_query_id { @@ -355,6 +357,7 @@ int zynqmp_pm_write_pggs(u32 index, u32 value); int zynqmp_pm_read_pggs(u32 index, u32 *value); int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype); int zynqmp_pm_set_boot_health_status(u32 value); +int zynqmp_pm_clear_aie_npi_isr(u32 node, u32 irq_mask); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -505,6 +508,11 @@ static inline int zynqmp_pm_set_boot_health_status(u32 value) { return -ENODEV; } + +static inline int zynqmp_pm_clear_aie_npi_isr(u32 node, u32 irq_mask) +{ + return -ENODEV; +} #endif

#endif /* __FIRMWARE_ZYNQMP_H__ */