On MSM8996 the HDMI PHY is the QMP PHY, it provides an HDMI PLL clock used by the MMCC. Add support for providing this clock to the OF framework by registerding the clock provider and adding #clock-cells property to the DT node.
Changes since v1: - Also handle the xo clock (include it into the dtsi, use parent_data instead of parent_names). The patches were changed, so I didn't pick up the R-b tags.
Dmitry Baryshkov (3): dt-bindings: phy: qcom,hdmi-phy-qmp: add clock-cells and XO clock drm/msm/hdmi: make hdmi_phy_8996 OF clk provider arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node
.../bindings/phy/qcom,hdmi-phy-qmp.yaml | 14 ++++++++--- arch/arm64/boot/dts/qcom/msm8996.dtsi | 8 ++++-- drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c | 25 +++++++++++-------- 3 files changed, 31 insertions(+), 16 deletions(-)
As the QMP HDMI PHY is a clock provider, add constant #clock-cells property. For the compatibility with older DTs the property is not marked as required. Also add the XO clock to the list of the clocks used by the driver.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org --- .../devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml index eea2e02678ed..41e6492d4a0f 100644 --- a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml @@ -28,12 +28,14 @@ properties: - const: hdmi_phy
clocks: - maxItems: 2 + minItems: 2 + maxItems: 3
clock-names: items: - const: iface - const: ref + - const: xo
power-domains: maxItems: 1 @@ -44,6 +46,9 @@ properties: vddio-supply: description: phandle to VDD I/O supply regulator
+ '#clock-cells': + const: 0 + '#phy-cells': const: 0
@@ -75,9 +80,12 @@ examples: "hdmi_phy";
clocks = <&mmcc 116>, - <&gcc 214>; + <&gcc 214>, + <&xo_board>; clock-names = "iface", - "ref"; + "ref", + "xo"; + #clock-cells = <0>; #phy-cells = <0>;
vddio-supply = <&vreg_l12a_1p8>;
On 20/06/2022 03:02, Dmitry Baryshkov wrote:
As the QMP HDMI PHY is a clock provider, add constant #clock-cells property. For the compatibility with older DTs the property is not marked as required. Also add the XO clock to the list of the clocks used by the driver.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org
Reviewed-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org
Best regards, Krzysztof
On MSM8996 the HDMI PHY provides the PLL clock to the MMCC. As we are preparing to convert the MSM8996 to use DT clocks properties (rather than global clock names), register the OF clock provider.
While we are at it, also change the driver to use clk_parent_data rather parent_names to setup a link to the XO clock.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org --- drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c | 25 +++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c index b06d9d25a189..4dd055416620 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c @@ -691,15 +691,13 @@ static const struct clk_ops hdmi_8996_pll_ops = { .is_enabled = hdmi_8996_pll_is_enabled, };
-static const char * const hdmi_pll_parents[] = { - "xo", -}; - static const struct clk_init_data pll_init = { .name = "hdmipll", .ops = &hdmi_8996_pll_ops, - .parent_names = hdmi_pll_parents, - .num_parents = ARRAY_SIZE(hdmi_pll_parents), + .parent_data = (const struct clk_parent_data[]){ + { .fw_name = "xo", .name = "xo_board" }, + }, + .num_parents = 1, .flags = CLK_IGNORE_UNUSED, };
@@ -707,8 +705,7 @@ int msm_hdmi_pll_8996_init(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct hdmi_pll_8996 *pll; - struct clk *clk; - int i; + int i, ret;
pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL); if (!pll) @@ -735,10 +732,16 @@ int msm_hdmi_pll_8996_init(struct platform_device *pdev) } pll->clk_hw.init = &pll_init;
- clk = devm_clk_register(dev, &pll->clk_hw); - if (IS_ERR(clk)) { + ret = devm_clk_hw_register(dev, &pll->clk_hw); + if (ret) { DRM_DEV_ERROR(dev, "failed to register pll clock\n"); - return -EINVAL; + return ret; + } + + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &pll->clk_hw); + if (ret) { + DRM_DEV_ERROR(dev, "%s: failed to register clk provider: %d\n", __func__, ret); + return ret; }
return 0;
Add #clock-cells property to the HDMI PHY device node to let other nodes resolve the hdmipll clock. While we are at it, also add the XO clock to the device node.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 9932186f7ceb..c0def6dd7f00 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -960,9 +960,13 @@ hdmi_phy: hdmi-phy@9a0600 { "hdmi_phy";
clocks = <&mmcc MDSS_AHB_CLK>, - <&gcc GCC_HDMI_CLKREF_CLK>; + <&gcc GCC_HDMI_CLKREF_CLK>, + <&xo_board>; clock-names = "iface", - "ref"; + "ref", + "xo"; + + #clock-cells = <0>;
status = "disabled"; };
On 20/06/2022 03:03, Dmitry Baryshkov wrote:
Add #clock-cells property to the HDMI PHY device node to let other nodes resolve the hdmipll clock. While we are at it, also add the XO clock to the device node.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org
Acked-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org
Best regards, Krzysztof
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