Hello Ben Goz,
The patch 914bea6329b2: "drm/amdkfd: Add support for VI in DQM" from Jan 12, 2015, leads to the following static checker warning:
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c:158 init_sdma_vm() warn: should this be a bitwise op?
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c 148 static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q, 149 struct qcm_process_device *qpd) 150 { 151 uint32_t value = (1 << SDMA0_RLC0_VIRTUAL_ADDR__ATC__SHIFT); 152 153 if (q->process->is_32bit_user_mode) 154 value |= (1 << SDMA0_RLC0_VIRTUAL_ADDR__PTR32__SHIFT) | 155 get_sh_mem_bases_32(qpd_to_pdd(qpd)); 156 else 157 value |= ((get_sh_mem_bases_nybble_64(qpd_to_pdd(qpd))) << 158 SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE__SHIFT) && ^^ Probably logical AND was intended.
159 SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE_MASK; 160 161 q->properties.sdma_vm_addr = value; 162 }
Also:
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c:146 init_sdma_vm() warn: should this be a bitwise op?
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c 136 static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q, 137 struct qcm_process_device *qpd) 138 { 139 uint32_t value = (1 << SDMA0_RLC0_VIRTUAL_ADDR__ATC__SHIFT); 140 141 if (q->process->is_32bit_user_mode) 142 value |= (1 << SDMA0_RLC0_VIRTUAL_ADDR__PTR32__SHIFT) | 143 get_sh_mem_bases_32(qpd_to_pdd(qpd)); 144 else 145 value |= ((get_sh_mem_bases_nybble_64(qpd_to_pdd(qpd))) << 146 SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE__SHIFT) && ^ 147 SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE_MASK; 148 149 q->properties.sdma_vm_addr = value; 150 }
regards, dan carpenter
On Tue, Jul 28, 2015 at 7:00 PM, Dan Carpenter dan.carpenter@oracle.com wrote:
Hello Ben Goz,
The patch 914bea6329b2: "drm/amdkfd: Add support for VI in DQM" from Jan 12, 2015, leads to the following static checker warning:
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c:158 init_sdma_vm() warn: should this be a bitwise op?
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_vi.c 148 static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q, 149 struct qcm_process_device *qpd) 150 { 151 uint32_t value = (1 << SDMA0_RLC0_VIRTUAL_ADDR__ATC__SHIFT); 152 153 if (q->process->is_32bit_user_mode) 154 value |= (1 << SDMA0_RLC0_VIRTUAL_ADDR__PTR32__SHIFT) | 155 get_sh_mem_bases_32(qpd_to_pdd(qpd)); 156 else 157 value |= ((get_sh_mem_bases_nybble_64(qpd_to_pdd(qpd))) << 158 SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE__SHIFT) && ^^ Probably logical AND was intended.
159 SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE_MASK; 160 161 q->properties.sdma_vm_addr = value; 162 }
Also:
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c:146 init_sdma_vm() warn: should this be a bitwise op?
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c 136 static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q, 137 struct qcm_process_device *qpd) 138 { 139 uint32_t value = (1 << SDMA0_RLC0_VIRTUAL_ADDR__ATC__SHIFT); 140 141 if (q->process->is_32bit_user_mode) 142 value |= (1 << SDMA0_RLC0_VIRTUAL_ADDR__PTR32__SHIFT) | 143 get_sh_mem_bases_32(qpd_to_pdd(qpd)); 144 else 145 value |= ((get_sh_mem_bases_nybble_64(qpd_to_pdd(qpd))) << 146 SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE__SHIFT) && ^ 147 SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE_MASK; 148 149 q->properties.sdma_vm_addr = value; 150 }
regards, dan carpenter _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Thanks again for catching that. Indeed, the AND operation should be bitwise AND, not logical AND. I will send a patch shortly.
Oded
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