SoCs having mdp5 or dpu have identical tree like device hierarchy where MDSS top level wrapper manages common power resources for all child devices.

Subclass msm_mdss so that msm_mdss includes common defines and mdp5/dpu mdss derivations to include any extensions.

Add mdss helper interface (msm_mdss_funcs) to msm_mdss base for mdp5/dpu mdss specific implementation calls.

This change subclasses msm_mdss for mdp5, dpu specific changes will be done separately.

Changes in v3: - none

Changes in v2: - fixed indentation for irq_domain_add_linear call (Sean Paul)

Signed-off-by: Rajesh Yadav ryadav@codeaurora.org Reviewed-by: Sean Paul seanpaul@chromium.org --- drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 154 ++++++++++++++++-------------- drivers/gpu/drm/msm/msm_drv.c | 23 +++-- drivers/gpu/drm/msm/msm_kms.h | 20 ++-- 3 files changed, 110 insertions(+), 87 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c index f2a0db7..1cc4e57 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c @@ -20,12 +20,10 @@ #include "msm_drv.h" #include "mdp5_kms.h"

-/* - * If needed, this can become more specific: something like struct mdp5_mdss, - * which contains a 'struct msm_mdss base' member. - */ -struct msm_mdss { - struct drm_device *dev; +#define to_mdp5_mdss(x) container_of(x, struct mdp5_mdss, base) + +struct mdp5_mdss { + struct msm_mdss base;

void __iomem *mmio, *vbif;

@@ -41,22 +39,22 @@ struct msm_mdss { } irqcontroller; };

-static inline void mdss_write(struct msm_mdss *mdss, u32 reg, u32 data) +static inline void mdss_write(struct mdp5_mdss *mdp5_mdss, u32 reg, u32 data) { - msm_writel(data, mdss->mmio + reg); + msm_writel(data, mdp5_mdss->mmio + reg); }

-static inline u32 mdss_read(struct msm_mdss *mdss, u32 reg) +static inline u32 mdss_read(struct mdp5_mdss *mdp5_mdss, u32 reg) { - return msm_readl(mdss->mmio + reg); + return msm_readl(mdp5_mdss->mmio + reg); }

static irqreturn_t mdss_irq(int irq, void *arg) { - struct msm_mdss *mdss = arg; + struct mdp5_mdss *mdp5_mdss = arg; u32 intr;

- intr = mdss_read(mdss, REG_MDSS_HW_INTR_STATUS); + intr = mdss_read(mdp5_mdss, REG_MDSS_HW_INTR_STATUS);

VERB("intr=%08x", intr);

@@ -64,7 +62,7 @@ static irqreturn_t mdss_irq(int irq, void *arg) irq_hw_number_t hwirq = fls(intr) - 1;

generic_handle_irq(irq_find_mapping( - mdss->irqcontroller.domain, hwirq)); + mdp5_mdss->irqcontroller.domain, hwirq)); intr &= ~(1 << hwirq); }

@@ -84,19 +82,19 @@ static irqreturn_t mdss_irq(int irq, void *arg)

static void mdss_hw_mask_irq(struct irq_data *irqd) { - struct msm_mdss *mdss = irq_data_get_irq_chip_data(irqd); + struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);

smp_mb__before_atomic(); - clear_bit(irqd->hwirq, &mdss->irqcontroller.enabled_mask); + clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask); smp_mb__after_atomic(); }

static void mdss_hw_unmask_irq(struct irq_data *irqd) { - struct msm_mdss *mdss = irq_data_get_irq_chip_data(irqd); + struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);

smp_mb__before_atomic(); - set_bit(irqd->hwirq, &mdss->irqcontroller.enabled_mask); + set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask); smp_mb__after_atomic(); }

@@ -109,13 +107,13 @@ static void mdss_hw_unmask_irq(struct irq_data *irqd) static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) { - struct msm_mdss *mdss = d->host_data; + struct mdp5_mdss *mdp5_mdss = d->host_data;

if (!(VALID_IRQS & (1 << hwirq))) return -EPERM;

irq_set_chip_and_handler(irq, &mdss_hw_irq_chip, handle_level_irq); - irq_set_chip_data(irq, mdss); + irq_set_chip_data(irq, mdp5_mdss);

return 0; } @@ -126,90 +124,99 @@ static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq, };

-static int mdss_irq_domain_init(struct msm_mdss *mdss) +static int mdss_irq_domain_init(struct mdp5_mdss *mdp5_mdss) { - struct device *dev = mdss->dev->dev; + struct device *dev = mdp5_mdss->base.dev->dev; struct irq_domain *d;

d = irq_domain_add_linear(dev->of_node, 32, &mdss_hw_irqdomain_ops, - mdss); + mdp5_mdss); if (!d) { dev_err(dev, "mdss irq domain add failed\n"); return -ENXIO; }

- mdss->irqcontroller.enabled_mask = 0; - mdss->irqcontroller.domain = d; + mdp5_mdss->irqcontroller.enabled_mask = 0; + mdp5_mdss->irqcontroller.domain = d;

return 0; }

-int msm_mdss_enable(struct msm_mdss *mdss) +static int mdp5_mdss_enable(struct msm_mdss *mdss) { + struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss); DBG("");

- clk_prepare_enable(mdss->ahb_clk); - if (mdss->axi_clk) - clk_prepare_enable(mdss->axi_clk); - if (mdss->vsync_clk) - clk_prepare_enable(mdss->vsync_clk); + clk_prepare_enable(mdp5_mdss->ahb_clk); + if (mdp5_mdss->axi_clk) + clk_prepare_enable(mdp5_mdss->axi_clk); + if (mdp5_mdss->vsync_clk) + clk_prepare_enable(mdp5_mdss->vsync_clk);

return 0; }

-int msm_mdss_disable(struct msm_mdss *mdss) +static int mdp5_mdss_disable(struct msm_mdss *mdss) { + struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss); DBG("");

- if (mdss->vsync_clk) - clk_disable_unprepare(mdss->vsync_clk); - if (mdss->axi_clk) - clk_disable_unprepare(mdss->axi_clk); - clk_disable_unprepare(mdss->ahb_clk); + if (mdp5_mdss->vsync_clk) + clk_disable_unprepare(mdp5_mdss->vsync_clk); + if (mdp5_mdss->axi_clk) + clk_disable_unprepare(mdp5_mdss->axi_clk); + clk_disable_unprepare(mdp5_mdss->ahb_clk);

return 0; }

-static int msm_mdss_get_clocks(struct msm_mdss *mdss) +static int msm_mdss_get_clocks(struct mdp5_mdss *mdp5_mdss) { - struct platform_device *pdev = to_platform_device(mdss->dev->dev); + struct platform_device *pdev = + to_platform_device(mdp5_mdss->base.dev->dev);

- mdss->ahb_clk = msm_clk_get(pdev, "iface"); - if (IS_ERR(mdss->ahb_clk)) - mdss->ahb_clk = NULL; + mdp5_mdss->ahb_clk = msm_clk_get(pdev, "iface"); + if (IS_ERR(mdp5_mdss->ahb_clk)) + mdp5_mdss->ahb_clk = NULL;

- mdss->axi_clk = msm_clk_get(pdev, "bus"); - if (IS_ERR(mdss->axi_clk)) - mdss->axi_clk = NULL; + mdp5_mdss->axi_clk = msm_clk_get(pdev, "bus"); + if (IS_ERR(mdp5_mdss->axi_clk)) + mdp5_mdss->axi_clk = NULL;

- mdss->vsync_clk = msm_clk_get(pdev, "vsync"); - if (IS_ERR(mdss->vsync_clk)) - mdss->vsync_clk = NULL; + mdp5_mdss->vsync_clk = msm_clk_get(pdev, "vsync"); + if (IS_ERR(mdp5_mdss->vsync_clk)) + mdp5_mdss->vsync_clk = NULL;

return 0; }

-void msm_mdss_destroy(struct drm_device *dev) +static void mdp5_mdss_destroy(struct drm_device *dev) { struct msm_drm_private *priv = dev->dev_private; - struct msm_mdss *mdss = priv->mdss; + struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(priv->mdss);

- if (!mdss) + if (!mdp5_mdss) return;

- irq_domain_remove(mdss->irqcontroller.domain); - mdss->irqcontroller.domain = NULL; + irq_domain_remove(mdp5_mdss->irqcontroller.domain); + mdp5_mdss->irqcontroller.domain = NULL;

- regulator_disable(mdss->vdd); + regulator_disable(mdp5_mdss->vdd);

pm_runtime_disable(dev->dev); }

-int msm_mdss_init(struct drm_device *dev) +static const struct msm_mdss_funcs mdss_funcs = { + .enable = mdp5_mdss_enable, + .disable = mdp5_mdss_disable, + .destroy = mdp5_mdss_destroy, +}; + +int mdp5_mdss_init(struct drm_device *dev) { struct platform_device *pdev = to_platform_device(dev->dev); struct msm_drm_private *priv = dev->dev_private; - struct msm_mdss *mdss; + struct mdp5_mdss *mdp5_mdss; int ret;

DBG(""); @@ -217,40 +224,40 @@ int msm_mdss_init(struct drm_device *dev) if (!of_device_is_compatible(dev->dev->of_node, "qcom,mdss")) return 0;

- mdss = devm_kzalloc(dev->dev, sizeof(*mdss), GFP_KERNEL); - if (!mdss) { + mdp5_mdss = devm_kzalloc(dev->dev, sizeof(*mdp5_mdss), GFP_KERNEL); + if (!mdp5_mdss) { ret = -ENOMEM; goto fail; }

- mdss->dev = dev; + mdp5_mdss->base.dev = dev;

- mdss->mmio = msm_ioremap(pdev, "mdss_phys", "MDSS"); - if (IS_ERR(mdss->mmio)) { - ret = PTR_ERR(mdss->mmio); + mdp5_mdss->mmio = msm_ioremap(pdev, "mdss_phys", "MDSS"); + if (IS_ERR(mdp5_mdss->mmio)) { + ret = PTR_ERR(mdp5_mdss->mmio); goto fail; }

- mdss->vbif = msm_ioremap(pdev, "vbif_phys", "VBIF"); - if (IS_ERR(mdss->vbif)) { - ret = PTR_ERR(mdss->vbif); + mdp5_mdss->vbif = msm_ioremap(pdev, "vbif_phys", "VBIF"); + if (IS_ERR(mdp5_mdss->vbif)) { + ret = PTR_ERR(mdp5_mdss->vbif); goto fail; }

- ret = msm_mdss_get_clocks(mdss); + ret = msm_mdss_get_clocks(mdp5_mdss); if (ret) { dev_err(dev->dev, "failed to get clocks: %d\n", ret); goto fail; }

/* Regulator to enable GDSCs in downstream kernels */ - mdss->vdd = devm_regulator_get(dev->dev, "vdd"); - if (IS_ERR(mdss->vdd)) { - ret = PTR_ERR(mdss->vdd); + mdp5_mdss->vdd = devm_regulator_get(dev->dev, "vdd"); + if (IS_ERR(mdp5_mdss->vdd)) { + ret = PTR_ERR(mdp5_mdss->vdd); goto fail; }

- ret = regulator_enable(mdss->vdd); + ret = regulator_enable(mdp5_mdss->vdd); if (ret) { dev_err(dev->dev, "failed to enable regulator vdd: %d\n", ret); @@ -258,25 +265,26 @@ int msm_mdss_init(struct drm_device *dev) }

ret = devm_request_irq(dev->dev, platform_get_irq(pdev, 0), - mdss_irq, 0, "mdss_isr", mdss); + mdss_irq, 0, "mdss_isr", mdp5_mdss); if (ret) { dev_err(dev->dev, "failed to init irq: %d\n", ret); goto fail_irq; }

- ret = mdss_irq_domain_init(mdss); + ret = mdss_irq_domain_init(mdp5_mdss); if (ret) { dev_err(dev->dev, "failed to init sub-block irqs: %d\n", ret); goto fail_irq; }

- priv->mdss = mdss; + mdp5_mdss->base.funcs = &mdss_funcs; + priv->mdss = &mdp5_mdss->base;

pm_runtime_enable(dev->dev);

return 0; fail_irq: - regulator_disable(mdss->vdd); + regulator_disable(mdp5_mdss->vdd); fail: return ret; } diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 9bb436f..5d8f1b6 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -270,6 +270,7 @@ static int msm_drm_uninit(struct device *dev) struct drm_device *ddev = platform_get_drvdata(pdev); struct msm_drm_private *priv = ddev->dev_private; struct msm_kms *kms = priv->kms; + struct msm_mdss *mdss = priv->mdss; struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl; struct vblank_event *vbl_ev, *tmp; int i; @@ -346,8 +347,8 @@ static int msm_drm_uninit(struct device *dev)

debugfs_remove_recursive(priv->debug_root);

- msm_mdss_destroy(ddev); - + if (mdss && mdss->funcs) + mdss->funcs->destroy(ddev);

ddev->dev_private = NULL; kfree(priv); @@ -476,6 +477,7 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) struct drm_device *ddev; struct msm_drm_private *priv; struct msm_kms *kms; + struct msm_mdss *mdss;

#ifdef CONFIG_DRM_MSM_DPU struct dpu_dbg_power_ctrl dbg_power_ctrl = { 0 }; @@ -501,10 +503,12 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) ddev->dev_private = priv; priv->dev = ddev;

- ret = msm_mdss_init(ddev); + ret = mdp5_mdss_init(ddev); if (ret) goto mdss_init_fail;

+ mdss = priv->mdss; + priv->wq = alloc_ordered_workqueue("msm", 0);

INIT_LIST_HEAD(&priv->client_event_list); @@ -746,7 +750,8 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) dpu_power_resource_deinit(pdev, &priv->phandle); power_init_fail: #endif - msm_mdss_destroy(ddev); + if (mdss && mdss->funcs) + mdss->funcs->destroy(ddev); mdss_init_fail: kfree(priv); priv_alloc_fail: @@ -1416,11 +1421,12 @@ static int msm_runtime_suspend(struct device *dev) { struct drm_device *ddev = dev_get_drvdata(dev); struct msm_drm_private *priv = ddev->dev_private; + struct msm_mdss *mdss = priv->mdss;

DBG("");

- if (priv->mdss) - return 0; // msm_mdss_disable(priv->mdss); + if (mdss && mdss->funcs) + mdss->funcs->disable(mdss);

return 0; } @@ -1429,11 +1435,12 @@ static int msm_runtime_resume(struct device *dev) { struct drm_device *ddev = dev_get_drvdata(dev); struct msm_drm_private *priv = ddev->dev_private; + struct msm_mdss *mdss = priv->mdss;

DBG("");

- if (priv->mdss) - return 0;//msm_mdss_enable(priv->mdss); + if (mdss && mdss->funcs) + mdss->funcs->enable(mdss);

return 0; } diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index 5b09ce5..9a7bc7d 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -126,16 +126,24 @@ static inline void msm_kms_init(struct msm_kms *kms, kms->funcs = funcs; }

-struct msm_kms *mdp4_kms_init(struct drm_device *dev); - -int msm_mdss_init(struct drm_device *dev); -void msm_mdss_destroy(struct drm_device *dev); struct msm_kms *mdp5_kms_init(struct drm_device *dev);

struct msm_kms *dpu_kms_init(struct drm_device *dev);

-int msm_mdss_enable(struct msm_mdss *mdss); -int msm_mdss_disable(struct msm_mdss *mdss); +struct msm_kms *mdp4_kms_init(struct drm_device *dev); + +struct msm_mdss_funcs { + int (*enable)(struct msm_mdss *mdss); + int (*disable)(struct msm_mdss *mdss); + void (*destroy)(struct drm_device *dev); +}; + +struct msm_mdss { + struct drm_device *dev; + const struct msm_mdss_funcs *funcs; +}; + +int mdp5_mdss_init(struct drm_device *dev);

/** * Mode Set Utility Functions

Current MSM display controller HW matches a tree like hierarchy where MDSS top level wrapper is parent device and mdp5/dpu, dsi, dp are child devices.

Each child device like mdp5, dsi etc. have a separate driver, but currently dpu handling is tied to a single driver which was managing both mdss and dpu resources.

Inorder to have the cleaner one to one device and driver association, this change adds a new platform_driver for dpu child device node which implements the kms functionality.

The dpu driver implements runtime_pm support for managing clocks and bus bandwidth etc.

Changes in v3: - none

Changes in v2: - remove redundant param check from _dpu_kms_hw_destroy (Sean Paul) - remove explicit calls to devm_kfree (Sean Paul) - merge dpu_init into dpu_bind (Sean Paul) - merge dpu_destroy into dpu_unbind (Sean Paul) - use %pK for kernel pointer printing (Jordan Crouse) - remove explicit devm allocation failure message (Jordan Crouse)

Signed-off-by: Rajesh Yadav ryadav@codeaurora.org Reviewed-by: Jordan Crouse jcrouse@codeaurora.org Reviewed-by: Sean Paul seanpaul@chromium.org --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 238 +++++++++++++++++++++++++------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 4 + drivers/gpu/drm/msm/msm_drv.c | 2 + drivers/gpu/drm/msm/msm_drv.h | 3 + 4 files changed, 196 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index e4ab753..85f3dbc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1030,16 +1030,12 @@ static long dpu_kms_round_pixclk(struct msm_kms *kms, unsigned long rate, return rate; }

-static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms, - struct platform_device *pdev) +static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms) { struct drm_device *dev; struct msm_drm_private *priv; int i;

- if (!dpu_kms || !pdev) - return; - dev = dpu_kms->dev; if (!dev) return; @@ -1091,15 +1087,15 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms, dpu_kms->core_client = NULL;

if (dpu_kms->vbif[VBIF_NRT]) - msm_iounmap(pdev, dpu_kms->vbif[VBIF_NRT]); + msm_iounmap(dpu_kms->pdev, dpu_kms->vbif[VBIF_NRT]); dpu_kms->vbif[VBIF_NRT] = NULL;

if (dpu_kms->vbif[VBIF_RT]) - msm_iounmap(pdev, dpu_kms->vbif[VBIF_RT]); + msm_iounmap(dpu_kms->pdev, dpu_kms->vbif[VBIF_RT]); dpu_kms->vbif[VBIF_RT] = NULL;

if (dpu_kms->mmio) - msm_iounmap(pdev, dpu_kms->mmio); + msm_iounmap(dpu_kms->pdev, dpu_kms->mmio); dpu_kms->mmio = NULL;

dpu_reg_dma_deinit(); @@ -1172,8 +1168,6 @@ int dpu_kms_mmu_attach(struct dpu_kms *dpu_kms, bool secure_only) static void dpu_kms_destroy(struct msm_kms *kms) { struct dpu_kms *dpu_kms; - struct drm_device *dev; - struct platform_device *platformdev;

if (!kms) { DPU_ERROR("invalid kms\n"); @@ -1181,20 +1175,7 @@ static void dpu_kms_destroy(struct msm_kms *kms) }

dpu_kms = to_dpu_kms(kms); - dev = dpu_kms->dev; - if (!dev) { - DPU_ERROR("invalid device\n"); - return; - } - - platformdev = to_platform_device(dev->dev); - if (!platformdev) { - DPU_ERROR("invalid platform device\n"); - return; - } - - _dpu_kms_hw_destroy(dpu_kms, platformdev); - kfree(dpu_kms); + _dpu_kms_hw_destroy(dpu_kms); }

static void dpu_kms_preclose(struct msm_kms *kms, struct drm_file *file) @@ -1550,7 +1531,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms) struct dpu_kms *dpu_kms; struct drm_device *dev; struct msm_drm_private *priv; - struct platform_device *platformdev; int i, rc = -EINVAL;

if (!kms) { @@ -1565,34 +1545,28 @@ static int dpu_kms_hw_init(struct msm_kms *kms) goto end; }

- platformdev = to_platform_device(dev->dev); - if (!platformdev) { - DPU_ERROR("invalid platform device\n"); - goto end; - } - priv = dev->dev_private; if (!priv) { DPU_ERROR("invalid private data\n"); goto end; }

- dpu_kms->mmio = msm_ioremap(platformdev, "mdp_phys", "mdp_phys"); + dpu_kms->mmio = msm_ioremap(dpu_kms->pdev, "mdp_phys", "mdp_phys"); if (IS_ERR(dpu_kms->mmio)) { rc = PTR_ERR(dpu_kms->mmio); DPU_ERROR("mdp register memory map failed: %d\n", rc); dpu_kms->mmio = NULL; goto error; } - DRM_INFO("mapped mdp address space @%p\n", dpu_kms->mmio); - dpu_kms->mmio_len = msm_iomap_size(platformdev, "mdp_phys"); + DRM_DEBUG("mapped dpu address space @%pK\n", dpu_kms->mmio); + dpu_kms->mmio_len = msm_iomap_size(dpu_kms->pdev, "mdp_phys");

rc = dpu_dbg_reg_register_base(DPU_DBG_NAME, dpu_kms->mmio, dpu_kms->mmio_len); if (rc) DPU_ERROR("dbg base register kms failed: %d\n", rc);

- dpu_kms->vbif[VBIF_RT] = msm_ioremap(platformdev, "vbif_phys", + dpu_kms->vbif[VBIF_RT] = msm_ioremap(dpu_kms->pdev, "vbif_phys", "vbif_phys"); if (IS_ERR(dpu_kms->vbif[VBIF_RT])) { rc = PTR_ERR(dpu_kms->vbif[VBIF_RT]); @@ -1600,20 +1574,20 @@ static int dpu_kms_hw_init(struct msm_kms *kms) dpu_kms->vbif[VBIF_RT] = NULL; goto error; } - dpu_kms->vbif_len[VBIF_RT] = msm_iomap_size(platformdev, + dpu_kms->vbif_len[VBIF_RT] = msm_iomap_size(dpu_kms->pdev, "vbif_phys"); rc = dpu_dbg_reg_register_base("vbif_rt", dpu_kms->vbif[VBIF_RT], dpu_kms->vbif_len[VBIF_RT]); if (rc) DPU_ERROR("dbg base register vbif_rt failed: %d\n", rc);

- dpu_kms->vbif[VBIF_NRT] = msm_ioremap(platformdev, "vbif_nrt_phys", + dpu_kms->vbif[VBIF_NRT] = msm_ioremap(dpu_kms->pdev, "vbif_nrt_phys", "vbif_nrt_phys"); if (IS_ERR(dpu_kms->vbif[VBIF_NRT])) { dpu_kms->vbif[VBIF_NRT] = NULL; DPU_DEBUG("VBIF NRT is not defined"); } else { - dpu_kms->vbif_len[VBIF_NRT] = msm_iomap_size(platformdev, + dpu_kms->vbif_len[VBIF_NRT] = msm_iomap_size(dpu_kms->pdev, "vbif_nrt_phys"); rc = dpu_dbg_reg_register_base("vbif_nrt", dpu_kms->vbif[VBIF_NRT], @@ -1624,13 +1598,13 @@ static int dpu_kms_hw_init(struct msm_kms *kms) }

#ifdef CONFIG_CHROME_REGDMA - dpu_kms->reg_dma = msm_ioremap(platformdev, "regdma_phys", + dpu_kms->reg_dma = msm_ioremap(dpu_kms->pdev, "regdma_phys", "regdma_phys"); if (IS_ERR(dpu_kms->reg_dma)) { dpu_kms->reg_dma = NULL; DPU_DEBUG("REG_DMA is not defined"); } else { - dpu_kms->reg_dma_len = msm_iomap_size(platformdev, + dpu_kms->reg_dma_len = msm_iomap_size(dpu_kms->pdev, "regdma_phys"); rc = dpu_dbg_reg_register_base("reg_dma", dpu_kms->reg_dma, @@ -1804,14 +1778,13 @@ static int dpu_kms_hw_init(struct msm_kms *kms) dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, false); pm_runtime_put_sync(dev->dev); error: - _dpu_kms_hw_destroy(dpu_kms, platformdev); + _dpu_kms_hw_destroy(dpu_kms); end: return rc; }

struct msm_kms *dpu_kms_init(struct drm_device *dev) { - struct platform_device *pdev = to_platform_device(dev->dev); struct msm_drm_private *priv; struct dpu_kms *dpu_kms; int irq; @@ -1821,24 +1794,187 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev) return ERR_PTR(-EINVAL); }

- irq = platform_get_irq(pdev, 0); + priv = dev->dev_private; + dpu_kms = to_dpu_kms(priv->kms); + + irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0); if (irq < 0) { DPU_ERROR("failed to get irq: %d\n", irq); return ERR_PTR(irq); } + dpu_kms->base.irq = irq;

- priv = dev->dev_private; + return &dpu_kms->base; +}

- dpu_kms = kzalloc(sizeof(*dpu_kms), GFP_KERNEL); - if (!dpu_kms) { - DPU_ERROR("failed to allocate dpu kms\n"); - return ERR_PTR(-ENOMEM); +static int dpu_bind(struct device *dev, struct device *master, void *data) +{ + struct drm_device *ddev = dev_get_drvdata(master); + struct platform_device *pdev = to_platform_device(dev); + struct msm_drm_private *priv = ddev->dev_private; + struct dpu_kms *dpu_kms; + struct dss_module_power *mp; + int ret = 0; + + dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL); + if (!dpu_kms) + return -ENOMEM; + + mp = &dpu_kms->mp; + ret = msm_dss_parse_clock(pdev, mp); + if (ret) { + DPU_ERROR("failed to parse clocks, ret=%d\n", ret); + return ret; + } + + ret = msm_dss_get_clk(&pdev->dev, mp->clk_config, mp->num_clk); + if (ret) { + pr_err("failed to get clocks, ret=%d\n", ret); + goto clk_get_error; + } + + ret = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk); + if (ret) { + pr_err("failed to set clock rate, ret=%d\n", ret); + goto clk_rate_error; }

+ platform_set_drvdata(pdev, dpu_kms); + msm_kms_init(&dpu_kms->base, &kms_funcs); - dpu_kms->dev = dev; - dpu_kms->base.irq = irq; + dpu_kms->dev = ddev; + dpu_kms->pdev = pdev;

- return &dpu_kms->base; + pm_runtime_enable(&pdev->dev); + dpu_kms->rpm_enabled = true; + + priv->kms = &dpu_kms->base; + return ret; + +clk_rate_error: + msm_dss_put_clk(mp->clk_config, mp->num_clk); +clk_get_error: + devm_kfree(&pdev->dev, mp->clk_config); + mp->num_clk = 0; + return ret; }

+static void dpu_unbind(struct device *dev, struct device *master, void *data) +{ + struct platform_device *pdev = to_platform_device(dev); + struct dpu_kms *dpu_kms = platform_get_drvdata(pdev); + struct dss_module_power *mp = &dpu_kms->mp; + + msm_dss_put_clk(mp->clk_config, mp->num_clk); + devm_kfree(&pdev->dev, mp->clk_config); + mp->num_clk = 0; + + if (dpu_kms->rpm_enabled) + pm_runtime_disable(&pdev->dev); +} + +static const struct component_ops dpu_ops = { + .bind = dpu_bind, + .unbind = dpu_unbind, +}; + +static int dpu_dev_probe(struct platform_device *pdev) +{ + return component_add(&pdev->dev, &dpu_ops); +} + +static int dpu_dev_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &dpu_ops); + return 0; +} + +static int dpu_runtime_suspend(struct device *dev) +{ + int rc = -1; + struct platform_device *pdev = to_platform_device(dev); + struct dpu_kms *dpu_kms = platform_get_drvdata(pdev); + struct drm_device *ddev; + struct msm_drm_private *priv; + struct dss_module_power *mp = &dpu_kms->mp; + + ddev = dpu_kms->dev; + if (!ddev) { + DPU_ERROR("invalid drm_device\n"); + goto exit; + } + priv = ddev->dev_private; + + rc = dpu_power_resource_enable(&priv->phandle, + dpu_kms->core_client, false); + if (rc) + DPU_ERROR("resource disable failed: %d\n", rc); + + rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, false); + if (rc) + DPU_ERROR("clock disable failed rc:%d\n", rc); + +exit: + return rc; +} + +static int dpu_runtime_resume(struct device *dev) +{ + int rc = -1; + struct platform_device *pdev = to_platform_device(dev); + struct dpu_kms *dpu_kms = platform_get_drvdata(pdev); + struct drm_device *ddev; + struct msm_drm_private *priv; + struct dss_module_power *mp = &dpu_kms->mp; + + ddev = dpu_kms->dev; + if (!ddev) { + DPU_ERROR("invalid drm_device\n"); + goto exit; + } + priv = ddev->dev_private; + + rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, true); + if (rc) { + DPU_ERROR("clock enable failed rc:%d\n", rc); + goto exit; + } + + rc = dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, + true); + if (rc) + DPU_ERROR("resource enable failed: %d\n", rc); + +exit: + return rc; +} + +static const struct dev_pm_ops dpu_pm_ops = { + SET_RUNTIME_PM_OPS(dpu_runtime_suspend, dpu_runtime_resume, NULL) +}; + +static const struct of_device_id dpu_dt_match[] = { + { .compatible = "qcom,dpu", }, + {} +}; +MODULE_DEVICE_TABLE(of, dpu_dt_match); + +static struct platform_driver dpu_driver = { + .probe = dpu_dev_probe, + .remove = dpu_dev_remove, + .driver = { + .name = "msm_dpu", + .of_match_table = dpu_dt_match, + .pm = &dpu_pm_ops, + }, +}; + +void __init msm_dpu_register(void) +{ + platform_driver_register(&dpu_driver); +} + +void __exit msm_dpu_unregister(void) +{ + platform_driver_unregister(&dpu_driver); +} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index a1c0910..3c69921 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -200,6 +200,10 @@ struct dpu_kms { struct dpu_hw_mdp *hw_mdp;

bool has_danger_ctrl; + + struct platform_device *pdev; + bool rpm_enabled; + struct dss_module_power mp; };

struct vsync_info { diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index a0e73ea..5470529 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -1731,6 +1731,7 @@ static int __init msm_drm_register(void)

DBG("init"); msm_mdp_register(); + msm_dpu_register(); msm_dsi_register(); msm_edp_register(); msm_hdmi_register(); @@ -1747,6 +1748,7 @@ static void __exit msm_drm_unregister(void) msm_edp_unregister(); msm_dsi_unregister(); msm_mdp_unregister(); + msm_dpu_unregister(); }

module_init(msm_drm_register); diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index e8e5e73..22a3096 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -682,6 +682,9 @@ static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, void __init msm_mdp_register(void); void __exit msm_mdp_unregister(void);

+void __init msm_dpu_register(void); +void __exit msm_dpu_unregister(void); + #ifdef CONFIG_DEBUG_FS void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m); void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);

MDSS and dpu drivers manage their respective clocks via runtime_pm. Remove custom clock management code from dpu_power_handle.

Also dpu core clock management code is restricted to dpu_core_perf module.

Changes in v3: - none

Changes in v2: - remove local variable to hold and return error code in _dpu_core_perf_set_core_clk_rate() instead return retcode directly from msm_dss_clk_set_rate() call (Sean Paul) - dpu_core_perf_init() is called from dpu_kms_hw_init() and most of the params passed are already validated so remove redundant checks from dpu_core_perf_init() (Sean Paul) - return &mp->clk_config[i] directly to avoid local variable in _dpu_kms_get_clk() (Sean Paul) - invert conditional check to eliminate local rate variable from dpu_kms_get_clk_rate() (Sean Paul) - remove end label from dpu_power_resource_init() and return directly on dpu_power_parse_dt_supply() failure as no cleanup is needed (Sean Paul) - remove checks for vtotal and vrefresh from dpu_encoder_phys_cmd_tearcheck_config() as they should be valid in mode_set call (Sean Paul)

Signed-off-by: Rajesh Yadav ryadav@codeaurora.org Reviewed-by: Sean Paul seanpaul@chromium.org --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 41 ++--- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 8 +- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 9 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 28 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 9 + drivers/gpu/drm/msm/dpu_power_handle.c | 196 +-------------------- drivers/gpu/drm/msm/dpu_power_handle.h | 40 ----- 7 files changed, 63 insertions(+), 268 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 981f77f..5b79077 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -365,6 +365,17 @@ void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc) } }

+static int _dpu_core_perf_set_core_clk_rate(struct dpu_kms *kms, u64 rate) +{ + struct dss_clk *core_clk = kms->perf.core_clk; + + if (core_clk->max_rate && (rate > core_clk->max_rate)) + rate = core_clk->max_rate; + + core_clk->rate = rate; + return msm_dss_clk_set_rate(core_clk, 1); +} + static u64 _dpu_core_perf_get_core_clk_rate(struct dpu_kms *kms) { u64 clk_rate = kms->perf.perf_tune.min_core_clk; @@ -376,7 +387,8 @@ static u64 _dpu_core_perf_get_core_clk_rate(struct dpu_kms *kms) dpu_cstate = to_dpu_crtc_state(crtc->state); clk_rate = max(dpu_cstate->new_perf.core_clk_rate, clk_rate); - clk_rate = clk_round_rate(kms->perf.core_clk, clk_rate); + clk_rate = clk_round_rate(kms->perf.core_clk->clk, + clk_rate); } }

@@ -484,15 +496,11 @@ void dpu_core_perf_crtc_update(struct drm_crtc *crtc,

DPU_EVT32(kms->dev, stop_req, clk_rate);

- /* Temp change to avoid crash in clk_set_rate API. */ -#ifdef QCOM_DPU_SET_CLK - if (dpu_power_clk_set_rate(&priv->phandle, - kms->perf.clk_name, clk_rate)) { + if (_dpu_core_perf_set_core_clk_rate(kms, clk_rate)) { DPU_ERROR("failed to set %s clock rate %llu\n", - kms->perf.clk_name, clk_rate); + kms->perf.core_clk->clk_name, clk_rate); return; } -#endif

kms->perf.core_clk_rate = clk_rate; DPU_DEBUG("update clk rate = %lld HZ\n", clk_rate); @@ -656,7 +664,6 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf) dpu_core_perf_debugfs_destroy(perf); perf->max_core_clk_rate = 0; perf->core_clk = NULL; - perf->clk_name = NULL; perf->phandle = NULL; perf->catalog = NULL; perf->dev = NULL; @@ -667,9 +674,9 @@ int dpu_core_perf_init(struct dpu_core_perf *perf, struct dpu_mdss_cfg *catalog, struct dpu_power_handle *phandle, struct dpu_power_client *pclient, - char *clk_name) + struct dss_clk *core_clk) { - if (!perf || !dev || !catalog || !phandle || !pclient || !clk_name) { + if (!pclient) { DPU_ERROR("invalid parameters\n"); return -EINVAL; } @@ -678,23 +685,13 @@ int dpu_core_perf_init(struct dpu_core_perf *perf, perf->catalog = catalog; perf->phandle = phandle; perf->pclient = pclient; - perf->clk_name = clk_name; - - perf->core_clk = dpu_power_clk_get_clk(phandle, clk_name); - if (!perf->core_clk) { - DPU_ERROR("invalid core clk\n"); - goto err; - } + perf->core_clk = core_clk;

- perf->max_core_clk_rate = dpu_power_clk_get_max_rate(phandle, clk_name); + perf->max_core_clk_rate = core_clk->max_rate; if (!perf->max_core_clk_rate) { DPU_DEBUG("optional max core clk rate, use default\n"); perf->max_core_clk_rate = DPU_PERF_DEFAULT_MAX_CORE_CLK_RATE; }

return 0; - -err: - dpu_core_perf_destroy(perf); - return -ENODEV; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h index fe4d8ea..015b5f0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h @@ -54,7 +54,6 @@ struct dpu_core_perf_tune { * @catalog: Pointer to catalog configuration * @phandle: Pointer to power handler * @pclient: Pointer to power client - * @clk_name: core clock name * @core_clk: Pointer to core clock structure * @core_clk_rate: current core clock rate * @max_core_clk_rate: maximum allowable core clock rate @@ -70,8 +69,7 @@ struct dpu_core_perf { struct dpu_mdss_cfg *catalog; struct dpu_power_handle *phandle; struct dpu_power_client *pclient; - char *clk_name; - struct clk *core_clk; + struct dss_clk *core_clk; u64 core_clk_rate; u64 max_core_clk_rate; struct dpu_core_perf_tune perf_tune; @@ -118,14 +116,14 @@ void dpu_core_perf_crtc_update(struct drm_crtc *crtc, * @catalog: Pointer to catalog * @phandle: Pointer to power handle * @pclient: Pointer to power client - * @clk_name: core clock name + * @core_clk: pointer to core clock */ int dpu_core_perf_init(struct dpu_core_perf *perf, struct drm_device *dev, struct dpu_mdss_cfg *catalog, struct dpu_power_handle *phandle, struct dpu_power_client *pclient, - char *clk_name); + struct dss_clk *core_clk);

/** * dpu_core_perf_debugfs_init - initialize debugfs for core performance context diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 072939c..388de38 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -428,11 +428,10 @@ static void dpu_encoder_phys_cmd_tearcheck_config( * vsync_count is ratio of MDP VSYNC clock frequency to LCD panel * frequency divided by the no. of rows (lines) in the LCDpanel. */ - vsync_hz = dpu_power_clk_get_rate(&priv->phandle, "vsync_clk"); - if (!vsync_hz || !mode->vtotal || !mode->vrefresh) { - DPU_DEBUG_CMDENC(cmd_enc, - "invalid params - vsync_hz %u vtot %u vrefresh %u\n", - vsync_hz, mode->vtotal, mode->vrefresh); + vsync_hz = dpu_kms_get_clk_rate(dpu_kms, "vsync_clk"); + if (vsync_hz <= 0) { + DPU_DEBUG_CMDENC(cmd_enc, "invalid - vsync_hz %u\n", + vsync_hz); return; }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index cda4d12..349bda5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1499,6 +1499,31 @@ static int _dpu_kms_mmu_init(struct dpu_kms *dpu_kms) return ret; }

+static struct dss_clk *_dpu_kms_get_clk(struct dpu_kms *dpu_kms, + char *clock_name) +{ + struct dss_module_power *mp = &dpu_kms->mp; + int i; + + for (i = 0; i < mp->num_clk; i++) { + if (!strcmp(mp->clk_config[i].clk_name, clock_name)) + return &mp->clk_config[i]; + } + + return NULL; +} + +u64 dpu_kms_get_clk_rate(struct dpu_kms *dpu_kms, char *clock_name) +{ + struct dss_clk *clk; + + clk = _dpu_kms_get_clk(dpu_kms, clock_name); + if (!clk) + return -EINVAL; + + return clk_get_rate(clk->clk); +} + static void dpu_kms_handle_power_event(u32 event_type, void *usr) { struct dpu_kms *dpu_kms = usr; @@ -1696,7 +1721,8 @@ static int dpu_kms_hw_init(struct msm_kms *kms) #endif

rc = dpu_core_perf_init(&dpu_kms->perf, dev, dpu_kms->catalog, - &priv->phandle, priv->pclient, "core_clk"); + &priv->phandle, priv->pclient, + _dpu_kms_get_clk(dpu_kms, "core_clk")); if (rc) { DPU_ERROR("failed to init perf %d\n", rc); goto perf_err; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index 3c69921..a8255fe 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -537,4 +537,13 @@ struct dpu_kms_fbo *dpu_kms_fbo_alloc(struct drm_device *dev,

void dpu_kms_encoder_enable(struct drm_encoder *encoder);

+/** + * dpu_kms_get_clk_rate() - get the clock rate + * @dpu_kms: poiner to dpu_kms structure + * @clock_name: clock name to get the rate + * + * Return: current clock rate + */ +u64 dpu_kms_get_clk_rate(struct dpu_kms *dpu_kms, char *clock_name); + #endif /* __dpu_kms_H__ */ diff --git a/drivers/gpu/drm/msm/dpu_power_handle.c b/drivers/gpu/drm/msm/dpu_power_handle.c index e9e344a..12602ae 100644 --- a/drivers/gpu/drm/msm/dpu_power_handle.c +++ b/drivers/gpu/drm/msm/dpu_power_handle.c @@ -13,7 +13,6 @@

#define pr_fmt(fmt) "[drm:%s:%d]: " fmt, __func__, __LINE__

-#include <linux/clk.h> #include <linux/kernel.h> #include <linux/of.h> #include <linux/string.h> @@ -246,62 +245,6 @@ static int dpu_power_parse_dt_supply(struct platform_device *pdev, return rc; }

-static int dpu_power_parse_dt_clock(struct platform_device *pdev, - struct dss_module_power *mp) -{ - u32 i = 0, rc = 0; - const char *clock_name; - u32 clock_rate = 0; - u32 clock_max_rate = 0; - int num_clk = 0; - - if (!pdev || !mp) { - pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp); - return -EINVAL; - } - - mp->num_clk = 0; - num_clk = of_property_count_strings(pdev->dev.of_node, - "clock-names"); - if (num_clk <= 0) { - pr_debug("clocks are not defined\n"); - goto clk_err; - } - - mp->num_clk = num_clk; - mp->clk_config = devm_kzalloc(&pdev->dev, - sizeof(struct dss_clk) * num_clk, GFP_KERNEL); - if (!mp->clk_config) { - rc = -ENOMEM; - mp->num_clk = 0; - goto clk_err; - } - - for (i = 0; i < num_clk; i++) { - of_property_read_string_index(pdev->dev.of_node, "clock-names", - i, &clock_name); - strlcpy(mp->clk_config[i].clk_name, clock_name, - sizeof(mp->clk_config[i].clk_name)); - - of_property_read_u32_index(pdev->dev.of_node, "clock-rate", - i, &clock_rate); - mp->clk_config[i].rate = clock_rate; - - if (!clock_rate) - mp->clk_config[i].type = DSS_CLK_AHB; - else - mp->clk_config[i].type = DSS_CLK_PCLK; - - clock_max_rate = 0; - of_property_read_u32_index(pdev->dev.of_node, "clock-max-rate", - i, &clock_max_rate); - mp->clk_config[i].max_rate = clock_max_rate; - } - -clk_err: - return rc; -} - #ifdef CONFIG_QCOM_BUS_SCALING

#define MAX_AXI_PORT_COUNT 3 @@ -681,16 +624,10 @@ int dpu_power_resource_init(struct platform_device *pdev, mp = &phandle->mp; phandle->dev = &pdev->dev;

- rc = dpu_power_parse_dt_clock(pdev, mp); - if (rc) { - pr_err("device clock parsing failed\n"); - goto end; - } - rc = dpu_power_parse_dt_supply(pdev, mp); if (rc) { pr_err("device vreg supply parsing failed\n"); - goto parse_vreg_err; + return rc; }

rc = msm_dss_config_vreg(&pdev->dev, @@ -700,18 +637,6 @@ int dpu_power_resource_init(struct platform_device *pdev, goto vreg_err; }

- rc = msm_dss_get_clk(&pdev->dev, mp->clk_config, mp->num_clk); - if (rc) { - pr_err("clock get failed rc=%d\n", rc); - goto clk_err; - } - - rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk); - if (rc) { - pr_err("clock set rate failed rc=%d\n", rc); - goto bus_err; - } - rc = dpu_power_reg_bus_parse(pdev, phandle); if (rc) { pr_err("register bus parse failed rc=%d\n", rc); @@ -742,18 +667,11 @@ int dpu_power_resource_init(struct platform_device *pdev, dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); bus_err: - msm_dss_put_clk(mp->clk_config, mp->num_clk); -clk_err: msm_dss_config_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0); vreg_err: if (mp->vreg_config) devm_kfree(&pdev->dev, mp->vreg_config); mp->num_vreg = 0; -parse_vreg_err: - if (mp->clk_config) - devm_kfree(&pdev->dev, mp->clk_config); - mp->num_clk = 0; -end: return rc; }

@@ -796,19 +714,12 @@ void dpu_power_resource_deinit(struct platform_device *pdev,

dpu_power_reg_bus_unregister(phandle->reg_bus_hdl);

- msm_dss_put_clk(mp->clk_config, mp->num_clk); - msm_dss_config_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);

- if (mp->clk_config) - devm_kfree(&pdev->dev, mp->clk_config); - if (mp->vreg_config) devm_kfree(&pdev->dev, mp->vreg_config);

mp->num_vreg = 0; - mp->num_clk = 0; - }

int dpu_power_resource_enable(struct dpu_power_handle *phandle, @@ -885,12 +796,6 @@ int dpu_power_resource_enable(struct dpu_power_handle *phandle, goto reg_bus_hdl_err; }

- rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable); - if (rc) { - pr_err("clock enable failed rc:%d\n", rc); - goto clk_err; - } - dpu_power_event_trigger_locked(phandle, DPU_POWER_EVENT_POST_ENABLE);

@@ -898,8 +803,6 @@ int dpu_power_resource_enable(struct dpu_power_handle *phandle, dpu_power_event_trigger_locked(phandle, DPU_POWER_EVENT_PRE_DISABLE);

- msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable); - dpu_power_reg_bus_update(phandle->reg_bus_hdl, max_usecase_ndx);

@@ -917,8 +820,6 @@ int dpu_power_resource_enable(struct dpu_power_handle *phandle, mutex_unlock(&phandle->phandle_lock); return rc;

-clk_err: - dpu_power_reg_bus_update(phandle->reg_bus_hdl, prev_usecase_ndx); reg_bus_hdl_err: msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0); vreg_err: @@ -930,101 +831,6 @@ int dpu_power_resource_enable(struct dpu_power_handle *phandle, return rc; }

-int dpu_power_clk_set_rate(struct dpu_power_handle *phandle, char *clock_name, - u64 rate) -{ - int i, rc = -EINVAL; - struct dss_module_power *mp; - - if (!phandle) { - pr_err("invalid input power handle\n"); - return -EINVAL; - } - mp = &phandle->mp; - - for (i = 0; i < mp->num_clk; i++) { - if (!strcmp(mp->clk_config[i].clk_name, clock_name)) { - if (mp->clk_config[i].max_rate && - (rate > mp->clk_config[i].max_rate)) - rate = mp->clk_config[i].max_rate; - - mp->clk_config[i].rate = rate; - rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk); - break; - } - } - - return rc; -} - -u64 dpu_power_clk_get_rate(struct dpu_power_handle *phandle, char *clock_name) -{ - int i; - struct dss_module_power *mp; - u64 rate = -EINVAL; - - if (!phandle) { - pr_err("invalid input power handle\n"); - return -EINVAL; - } - mp = &phandle->mp; - - for (i = 0; i < mp->num_clk; i++) { - if (!strcmp(mp->clk_config[i].clk_name, clock_name)) { - rate = clk_get_rate(mp->clk_config[i].clk); - break; - } - } - - return rate; -} - -u64 dpu_power_clk_get_max_rate(struct dpu_power_handle *phandle, - char *clock_name) -{ - int i; - struct dss_module_power *mp; - u64 rate = 0; - - if (!phandle) { - pr_err("invalid input power handle\n"); - return 0; - } - mp = &phandle->mp; - - for (i = 0; i < mp->num_clk; i++) { - if (!strcmp(mp->clk_config[i].clk_name, clock_name)) { - rate = mp->clk_config[i].max_rate; - break; - } - } - - return rate; -} - -struct clk *dpu_power_clk_get_clk(struct dpu_power_handle *phandle, - char *clock_name) -{ - int i; - struct dss_module_power *mp; - struct clk *clk = NULL; - - if (!phandle) { - pr_err("invalid input power handle\n"); - return 0; - } - mp = &phandle->mp; - - for (i = 0; i < mp->num_clk; i++) { - if (!strcmp(mp->clk_config[i].clk_name, clock_name)) { - clk = mp->clk_config[i].clk; - break; - } - } - - return clk; -} - struct dpu_power_event *dpu_power_handle_register_event( struct dpu_power_handle *phandle, u32 event_type, void (*cb_fnc)(u32 event_type, void *usr), diff --git a/drivers/gpu/drm/msm/dpu_power_handle.h b/drivers/gpu/drm/msm/dpu_power_handle.h index 1edae5c..83f048d 100644 --- a/drivers/gpu/drm/msm/dpu_power_handle.h +++ b/drivers/gpu/drm/msm/dpu_power_handle.h @@ -230,46 +230,6 @@ int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, bool enable);

/** - * dpu_power_clk_set_rate() - set the clock rate - * @pdata: power handle containing the resources - * @clock_name: clock name which needs rate update. - * @rate: Requested rate. - * - * Return: error code. - */ -int dpu_power_clk_set_rate(struct dpu_power_handle *pdata, char *clock_name, - u64 rate); - -/** - * dpu_power_clk_get_rate() - get the clock rate - * @pdata: power handle containing the resources - * @clock_name: clock name to get the rate - * - * Return: current clock rate - */ -u64 dpu_power_clk_get_rate(struct dpu_power_handle *pdata, char *clock_name); - -/** - * dpu_power_clk_get_max_rate() - get the maximum clock rate - * @pdata: power handle containing the resources - * @clock_name: clock name to get the max rate. - * - * Return: maximum clock rate or 0 if not found. - */ -u64 dpu_power_clk_get_max_rate(struct dpu_power_handle *pdata, - char *clock_name); - -/** - * dpu_power_clk_get_clk() - get the clock - * @pdata: power handle containing the resources - * @clock_name: clock name to get the clk pointer. - * - * Return: Pointer to clock - */ -struct clk *dpu_power_clk_get_clk(struct dpu_power_handle *phandle, - char *clock_name); - -/** * dpu_power_data_bus_set_quota() - set data bus quota for power client * @phandle: power handle containing the resources * @client: client information to set quota

DP driver was dependent on dpu_power_handle for MDSS common clocks and gdsc (main power supply). The common clocks and power is managed by MDSS top wrapper device now which is parent of all sub-devices like DP device. For same reason, clock and power management code is removed from dpu_power_handle. Hence, remove the dpu_power_handle calls from dp driver.

Changes in v3: - none

Changes in v2: - none

Signed-off-by: Rajesh Yadav ryadav@codeaurora.org Reviewed-by: Sean Paul seanpaul@chromium.org --- drivers/gpu/drm/msm/dp/dp_power.c | 32 +------------------------------- drivers/gpu/drm/msm/dp/dp_power.h | 4 +--- 2 files changed, 2 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/msm/dp/dp_power.c b/drivers/gpu/drm/msm/dp/dp_power.c index f6e341b..2a85b38 100644 --- a/drivers/gpu/drm/msm/dp/dp_power.c +++ b/drivers/gpu/drm/msm/dp/dp_power.c @@ -26,8 +26,6 @@ struct dp_power_private { struct clk *pixel_parent;

struct dp_power dp_power; - struct dpu_power_client *dp_core_client; - struct dpu_power_handle *phandle;

bool core_clks_on; bool link_clks_on; @@ -410,8 +408,7 @@ static int dp_power_config_gpios(struct dp_power_private *power, bool flip, return 0; }

-static int dp_power_client_init(struct dp_power *dp_power, - struct dpu_power_handle *phandle) +static int dp_power_client_init(struct dp_power *dp_power) { int rc = 0; struct dp_power_private *power; @@ -436,19 +433,8 @@ static int dp_power_client_init(struct dp_power *dp_power, goto error_clk; }

- power->phandle = phandle; - snprintf(dp_client_name, DP_CLIENT_NAME_SIZE, "dp_core_client"); - power->dp_core_client = dpu_power_client_create(phandle, - dp_client_name); - if (IS_ERR_OR_NULL(power->dp_core_client)) { - pr_err("[%s] client creation failed for DP", dp_client_name); - rc = -EINVAL; - goto error_client; - } return 0;

-error_client: - dp_power_clk_init(power, false); error_clk: dp_power_regulator_deinit(power); error_power: @@ -466,7 +452,6 @@ static void dp_power_client_deinit(struct dp_power *dp_power)

power = container_of(dp_power, struct dp_power_private, dp_power);

- dpu_power_client_destroy(power->phandle, power->dp_core_client); dp_power_clk_init(power, false); dp_power_regulator_deinit(power); } @@ -521,13 +506,6 @@ static int dp_power_init(struct dp_power *dp_power, bool flip) goto err_gpio; }

- rc = dpu_power_resource_enable(power->phandle, - power->dp_core_client, true); - if (rc) { - pr_err("Power resource enable failed\n"); - goto err_dpu_power; - } - rc = dp_power_clk_enable(dp_power, DP_CORE_PM, true); if (rc) { pr_err("failed to enable DP core clocks\n"); @@ -537,8 +515,6 @@ static int dp_power_init(struct dp_power *dp_power, bool flip) return 0;

err_clk: - dpu_power_resource_enable(power->phandle, power->dp_core_client, false); -err_dpu_power: dp_power_config_gpios(power, flip, false); err_gpio: dp_power_pinctrl_set(power, false); @@ -562,12 +538,6 @@ static int dp_power_deinit(struct dp_power *dp_power) power = container_of(dp_power, struct dp_power_private, dp_power);

dp_power_clk_enable(dp_power, DP_CORE_PM, false); - rc = dpu_power_resource_enable(power->phandle, - power->dp_core_client, false); - if (rc) { - pr_err("Power resource enable failed, rc=%d\n", rc); - goto exit; - } dp_power_config_gpios(power, false, false); dp_power_pinctrl_set(power, false); dp_power_regulator_ctrl(power, false); diff --git a/drivers/gpu/drm/msm/dp/dp_power.h b/drivers/gpu/drm/msm/dp/dp_power.h index 84fe01d..d9dab72 100644 --- a/drivers/gpu/drm/msm/dp/dp_power.h +++ b/drivers/gpu/drm/msm/dp/dp_power.h @@ -16,7 +16,6 @@ #define _DP_POWER_H_

#include "dp_parser.h" -#include "dpu_power_handle.h"

/** * sruct dp_power - DisplayPort's power related data @@ -32,8 +31,7 @@ struct dp_power { int (*clk_enable)(struct dp_power *power, enum dp_pm_type pm_type, bool enable); int (*set_pixel_clk_parent)(struct dp_power *power); - int (*power_client_init)(struct dp_power *power, - struct dpu_power_handle *phandle); + int (*power_client_init)(struct dp_power *power); void (*power_client_deinit)(struct dp_power *power); };

Now, since dpu_power_handle manages only bus scaling and power enable/disable notifications which are restricted to dpu driver, move dpu_power_handle to dpu folder.

Changes in v3: - none

Changes in v2: - resolved conflict in dpu_unbind - dropped (Reviewed-by: Sean Paul) due to above change

Signed-off-by: Rajesh Yadav ryadav@codeaurora.org Reviewed-by: Sean Paul seanpaul@chromium.org --- drivers/gpu/drm/msm/Makefile | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 7 +- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 39 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 688 +++++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 288 ++++++++++ drivers/gpu/drm/msm/dpu_power_handle.c | 688 ----------------------- drivers/gpu/drm/msm/dpu_power_handle.h | 288 ---------- drivers/gpu/drm/msm/msm_drv.c | 9 - drivers/gpu/drm/msm/msm_drv.h | 4 - 14 files changed, 1008 insertions(+), 1015 deletions(-) create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h delete mode 100644 drivers/gpu/drm/msm/dpu_power_handle.c delete mode 100644 drivers/gpu/drm/msm/dpu_power_handle.h

diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index d9826c1..f578d5a 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -82,10 +82,10 @@ msm-y := \ disp/dpu1/dpu_rm.o \ disp/dpu1/dpu_vbif.o \ disp/dpu1/dpu_mdss.o \ + disp/dpu1/dpu_power_handle.o \ dpu_dbg.o \ dpu_io_util.o \ dpu_dbg_evtlog.o \ - dpu_power_handle.o \ msm_prop.o \ msm_atomic.o \ msm_debugfs.o \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c index 5c5cc56..33ab2ac 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c @@ -18,7 +18,6 @@ #include <linux/kthread.h>

#include "dpu_core_irq.h" -#include "dpu_power_handle.h"

/** * dpu_core_irq_callback_handler - dispatch core interrupts diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 2cf3fca..d3a1ed9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -257,7 +257,6 @@ static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, = dpu_crtc_get_client_type(crtc); struct drm_crtc *tmp_crtc; struct dpu_crtc_state *dpu_cstate; - struct msm_drm_private *priv = kms->dev->dev_private;

drm_for_each_crtc(tmp_crtc, crtc->dev) { if (_dpu_core_perf_crtc_is_power_on(tmp_crtc) && @@ -287,7 +286,7 @@ static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms,

switch (curr_client_type) { case NRT_CLIENT: - dpu_power_data_bus_set_quota(&priv->phandle, kms->core_client, + dpu_power_data_bus_set_quota(&kms->phandle, kms->core_client, DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT, bus_id, bus_ab_quota, bus_ib_quota); DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "nrt", @@ -295,7 +294,7 @@ static void _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, break;

case RT_CLIENT: - dpu_power_data_bus_set_quota(&priv->phandle, kms->core_client, + dpu_power_data_bus_set_quota(&kms->phandle, kms->core_client, DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT, bus_id, bus_ab_quota, bus_ib_quota); DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "rt", diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index e2d2e32..99c5e75 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -598,6 +598,7 @@ static void dpu_crtc_destroy(struct drm_crtc *crtc) _dpu_crtc_destroy_dest_scaler(dpu_crtc);

_dpu_crtc_deinit_events(dpu_crtc); + dpu_crtc->phandle = NULL;

drm_crtc_cleanup(crtc); mutex_destroy(&dpu_crtc->crtc_lock); @@ -2572,7 +2573,7 @@ static void dpu_crtc_disable(struct drm_crtc *crtc) }

if (dpu_crtc->power_event) - dpu_power_handle_unregister_event(&priv->phandle, + dpu_power_handle_unregister_event(dpu_crtc->phandle, dpu_crtc->power_event);

@@ -2643,7 +2644,7 @@ static void dpu_crtc_enable(struct drm_crtc *crtc, mutex_unlock(&dpu_crtc->crtc_lock);

dpu_crtc->power_event = dpu_power_handle_register_event( - &priv->phandle, + dpu_crtc->phandle, DPU_POWER_EVENT_POST_ENABLE | DPU_POWER_EVENT_POST_DISABLE | DPU_POWER_EVENT_PRE_DISABLE, dpu_crtc_handle_power_event, crtc, dpu_crtc->name); @@ -3938,6 +3939,8 @@ struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane) dpu_cp_crtc_init(crtc); dpu_cp_crtc_install_properties(crtc);

+ dpu_crtc->phandle = &kms->phandle; + DPU_DEBUG("%s: successfully initialized crtc\n", dpu_crtc->name); return crtc; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h index 9304058..671d909 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h @@ -184,6 +184,7 @@ struct dpu_crtc_event { * @misr_enable : boolean entry indicates misr enable/disable status. * @misr_frame_count : misr frame count provided by client * @misr_data : store misr data before turning off the clocks. + * @phandle: Pointer to power handler * @power_event : registered power event handle * @cur_perf : current performance committed to clock/bandwidth driver * @rp_lock : serialization lock for resource pool @@ -240,6 +241,7 @@ struct dpu_crtc { u32 misr_frame_count; u32 misr_data[CRTC_DUAL_MIXERS];

+ struct dpu_power_handle *phandle; struct dpu_power_event *power_event;

struct dpu_core_perf_params cur_perf; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 298a6ef..11ae6cc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -31,7 +31,6 @@ #include "dpu_hw_ctl.h" #include "dpu_formats.h" #include "dpu_encoder_phys.h" -#include "dpu_power_handle.h" #include "dpu_crtc.h" #include "dpu_trace.h" #include "dpu_core_irq.h" diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 9c3b220..0598cfb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1017,24 +1017,19 @@ static long dpu_kms_round_pixclk(struct msm_kms *kms, unsigned long rate, static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms) { struct drm_device *dev; - struct msm_drm_private *priv; int i;

dev = dpu_kms->dev; if (!dev) return;

- priv = dev->dev_private; - if (!priv) - return; - if (dpu_kms->hw_intr) dpu_hw_intr_destroy(dpu_kms->hw_intr); dpu_kms->hw_intr = NULL;

if (dpu_kms->power_event) dpu_power_handle_unregister_event( - &priv->phandle, dpu_kms->power_event); + &dpu_kms->phandle, dpu_kms->power_event);

/* safe to call these more than once during shutdown */ _dpu_debugfs_destroy(dpu_kms); @@ -1067,7 +1062,8 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms) dpu_kms->catalog = NULL;

if (dpu_kms->core_client) - dpu_power_client_destroy(&priv->phandle, dpu_kms->core_client); + dpu_power_client_destroy(&dpu_kms->phandle, + dpu_kms->core_client); dpu_kms->core_client = NULL;

if (dpu_kms->vbif[VBIF_NRT]) @@ -1624,7 +1620,8 @@ static int dpu_kms_hw_init(struct msm_kms *kms) } #endif

- dpu_kms->core_client = dpu_power_client_create(&priv->phandle, "core"); + dpu_kms->core_client = dpu_power_client_create(&dpu_kms->phandle, + "core"); if (IS_ERR_OR_NULL(dpu_kms->core_client)) { rc = PTR_ERR(dpu_kms->core_client); if (!dpu_kms->core_client) @@ -1721,7 +1718,8 @@ static int dpu_kms_hw_init(struct msm_kms *kms) #endif

rc = dpu_core_perf_init(&dpu_kms->perf, dev, dpu_kms->catalog, - &priv->phandle, _dpu_kms_get_clk(dpu_kms, "core_clk")); + &dpu_kms->phandle, + _dpu_kms_get_clk(dpu_kms, "core_clk")); if (rc) { DPU_ERROR("failed to init perf %d\n", rc); goto perf_err; @@ -1765,7 +1763,8 @@ static int dpu_kms_hw_init(struct msm_kms *kms) * Handle (re)initializations during power enable */ dpu_kms_handle_power_event(DPU_POWER_EVENT_POST_ENABLE, dpu_kms); - dpu_kms->power_event = dpu_power_handle_register_event(&priv->phandle, + dpu_kms->power_event = dpu_power_handle_register_event( + &dpu_kms->phandle, DPU_POWER_EVENT_POST_ENABLE, dpu_kms_handle_power_event, dpu_kms, "kms");

@@ -1841,6 +1840,12 @@ static int dpu_bind(struct device *dev, struct device *master, void *data) goto clk_rate_error; }

+ ret = dpu_power_resource_init(pdev, &dpu_kms->phandle); + if (ret) { + pr_err("dpu power resource init failed\n"); + goto power_init_fail; + } + platform_set_drvdata(pdev, dpu_kms);

msm_kms_init(&dpu_kms->base, &kms_funcs); @@ -1853,6 +1858,7 @@ static int dpu_bind(struct device *dev, struct device *master, void *data) priv->kms = &dpu_kms->base; return ret;

+power_init_fail: clk_rate_error: msm_dss_put_clk(mp->clk_config, mp->num_clk); clk_get_error: @@ -1867,6 +1873,7 @@ static void dpu_unbind(struct device *dev, struct device *master, void *data) struct dpu_kms *dpu_kms = platform_get_drvdata(pdev); struct dss_module_power *mp = &dpu_kms->mp;

+ dpu_power_resource_deinit(pdev, &dpu_kms->phandle); msm_dss_put_clk(mp->clk_config, mp->num_clk); devm_kfree(&pdev->dev, mp->clk_config); mp->num_clk = 0; @@ -1897,7 +1904,6 @@ static int dpu_runtime_suspend(struct device *dev) struct platform_device *pdev = to_platform_device(dev); struct dpu_kms *dpu_kms = platform_get_drvdata(pdev); struct drm_device *ddev; - struct msm_drm_private *priv; struct dss_module_power *mp = &dpu_kms->mp;

ddev = dpu_kms->dev; @@ -1905,10 +1911,9 @@ static int dpu_runtime_suspend(struct device *dev) DPU_ERROR("invalid drm_device\n"); goto exit; } - priv = ddev->dev_private;

- rc = dpu_power_resource_enable(&priv->phandle, - dpu_kms->core_client, false); + rc = dpu_power_resource_enable(&dpu_kms->phandle, + dpu_kms->core_client, false); if (rc) DPU_ERROR("resource disable failed: %d\n", rc);

@@ -1926,7 +1931,6 @@ static int dpu_runtime_resume(struct device *dev) struct platform_device *pdev = to_platform_device(dev); struct dpu_kms *dpu_kms = platform_get_drvdata(pdev); struct drm_device *ddev; - struct msm_drm_private *priv; struct dss_module_power *mp = &dpu_kms->mp;

ddev = dpu_kms->dev; @@ -1934,7 +1938,6 @@ static int dpu_runtime_resume(struct device *dev) DPU_ERROR("invalid drm_device\n"); goto exit; } - priv = ddev->dev_private;

rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, true); if (rc) { @@ -1942,8 +1945,8 @@ static int dpu_runtime_resume(struct device *dev) goto exit; }

- rc = dpu_power_resource_enable(&priv->phandle, dpu_kms->core_client, - true); + rc = dpu_power_resource_enable(&dpu_kms->phandle, + dpu_kms->core_client, true); if (rc) DPU_ERROR("resource enable failed: %d\n", rc);

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index a8255fe..c48ed4e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -164,6 +164,7 @@ struct dpu_kms { struct dpu_mdss_cfg *catalog;

struct msm_gem_address_space *aspace[MSM_SMMU_DOMAIN_MAX]; + struct dpu_power_handle phandle; struct dpu_power_client *core_client; #ifdef CONFIG_ION struct ion_client *iclient; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c new file mode 100644 index 0000000..bdf18de --- /dev/null +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c @@ -0,0 +1,688 @@ +/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#define pr_fmt(fmt) "[drm:%s:%d]: " fmt, __func__, __LINE__ + +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/string.h> +#include <linux/of_address.h> +#include <linux/slab.h> +#include <linux/mutex.h> +#include <linux/of_platform.h> +#ifdef CONFIG_QCOM_BUS_SCALING +#include <linux/msm-bus.h> +#include <linux/msm-bus-board.h> +#endif +#include <linux/dpu_io_util.h> + +#include "dpu_power_handle.h" +#include "dpu_trace.h" + +static const char *data_bus_name[DPU_POWER_HANDLE_DBUS_ID_MAX] = { + [DPU_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,dpu-data-bus", + [DPU_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,dpu-llcc-bus", + [DPU_POWER_HANDLE_DBUS_ID_EBI] = "qcom,dpu-ebi-bus", +}; + +const char *dpu_power_handle_get_dbus_name(u32 bus_id) +{ + if (bus_id < DPU_POWER_HANDLE_DBUS_ID_MAX) + return data_bus_name[bus_id]; + + return NULL; +} + +static void dpu_power_event_trigger_locked(struct dpu_power_handle *phandle, + u32 event_type) +{ + struct dpu_power_event *event; + + list_for_each_entry(event, &phandle->event_list, list) { + if (event->event_type & event_type) + event->cb_fnc(event_type, event->usr); + } +} + +struct dpu_power_client *dpu_power_client_create( + struct dpu_power_handle *phandle, char *client_name) +{ + struct dpu_power_client *client; + static u32 id; + + if (!client_name || !phandle) { + pr_err("client name is null or invalid power data\n"); + return ERR_PTR(-EINVAL); + } + + client = kzalloc(sizeof(struct dpu_power_client), GFP_KERNEL); + if (!client) + return ERR_PTR(-ENOMEM); + + mutex_lock(&phandle->phandle_lock); + strlcpy(client->name, client_name, MAX_CLIENT_NAME_LEN); + client->usecase_ndx = VOTE_INDEX_DISABLE; + client->id = id; + client->active = true; + pr_debug("client %s created:%pK id :%d\n", client_name, + client, id); + id++; + list_add(&client->list, &phandle->power_client_clist); + mutex_unlock(&phandle->phandle_lock); + + return client; +} + +void dpu_power_client_destroy(struct dpu_power_handle *phandle, + struct dpu_power_client *client) +{ + if (!client || !phandle) { + pr_err("reg bus vote: invalid client handle\n"); + } else if (!client->active) { + pr_err("dpu power deinit already done\n"); + kfree(client); + } else { + pr_debug("bus vote client %s destroyed:%pK id:%u\n", + client->name, client, client->id); + mutex_lock(&phandle->phandle_lock); + list_del_init(&client->list); + mutex_unlock(&phandle->phandle_lock); + kfree(client); + } +} + +#ifdef CONFIG_QCOM_BUS_SCALING + +#define MAX_AXI_PORT_COUNT 3 + +static int _dpu_power_data_bus_set_quota( + struct dpu_power_data_bus_handle *pdbus, + u64 ab_quota_rt, u64 ab_quota_nrt, + u64 ib_quota_rt, u64 ib_quota_nrt) +{ + int new_uc_idx; + u64 ab_quota[MAX_AXI_PORT_COUNT] = {0, 0}; + u64 ib_quota[MAX_AXI_PORT_COUNT] = {0, 0}; + int rc; + + if (pdbus->data_bus_hdl < 1) { + pr_err("invalid bus handle %d\n", pdbus->data_bus_hdl); + return -EINVAL; + } + + pdbus->ab_rt = ab_quota_rt; + pdbus->ib_rt = ib_quota_rt; + pdbus->ab_nrt = ab_quota_nrt; + pdbus->ib_nrt = ib_quota_nrt; + + if (pdbus->enable) { + ab_quota_rt = max_t(u64, ab_quota_rt, + DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA); + ib_quota_rt = max_t(u64, ib_quota_rt, + DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA); + ab_quota_nrt = max_t(u64, ab_quota_nrt, + DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA); + ib_quota_nrt = max_t(u64, ib_quota_nrt, + DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA); + } else { + ab_quota_rt = min_t(u64, ab_quota_rt, + DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA); + ib_quota_rt = min_t(u64, ib_quota_rt, + DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA); + ab_quota_nrt = min_t(u64, ab_quota_nrt, + DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA); + ib_quota_nrt = min_t(u64, ib_quota_nrt, + DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA); + } + + if (!ab_quota_rt && !ab_quota_nrt && !ib_quota_rt && !ib_quota_nrt) { + new_uc_idx = 0; + } else { + int i; + struct msm_bus_vectors *vect = NULL; + struct msm_bus_scale_pdata *bw_table = + pdbus->data_bus_scale_table; + u32 nrt_axi_port_cnt = pdbus->nrt_axi_port_cnt; + u32 total_axi_port_cnt = pdbus->axi_port_cnt; + u32 rt_axi_port_cnt = total_axi_port_cnt - nrt_axi_port_cnt; + + if (!bw_table || !total_axi_port_cnt || + total_axi_port_cnt > MAX_AXI_PORT_COUNT) { + pr_err("invalid input\n"); + return -EINVAL; + } + + if (pdbus->bus_channels) { + ib_quota_rt = div_u64(ib_quota_rt, + pdbus->bus_channels); + ib_quota_nrt = div_u64(ib_quota_nrt, + pdbus->bus_channels); + } + + if (nrt_axi_port_cnt) { + + ab_quota_rt = div_u64(ab_quota_rt, rt_axi_port_cnt); + ab_quota_nrt = div_u64(ab_quota_nrt, nrt_axi_port_cnt); + + for (i = 0; i < total_axi_port_cnt; i++) { + if (i < rt_axi_port_cnt) { + ab_quota[i] = ab_quota_rt; + ib_quota[i] = ib_quota_rt; + } else { + ab_quota[i] = ab_quota_nrt; + ib_quota[i] = ib_quota_nrt; + } + } + } else { + ab_quota[0] = div_u64(ab_quota_rt + ab_quota_nrt, + total_axi_port_cnt); + ib_quota[0] = ib_quota_rt + ib_quota_nrt; + + for (i = 1; i < total_axi_port_cnt; i++) { + ab_quota[i] = ab_quota[0]; + ib_quota[i] = ib_quota[0]; + } + } + + new_uc_idx = (pdbus->curr_bw_uc_idx % + (bw_table->num_usecases - 1)) + 1; + + for (i = 0; i < total_axi_port_cnt; i++) { + vect = &bw_table->usecase[new_uc_idx].vectors[i]; + vect->ab = ab_quota[i]; + vect->ib = ib_quota[i]; + + pr_debug( + "%s uc_idx=%d %s path idx=%d ab=%llu ib=%llu\n", + bw_table->name, + new_uc_idx, (i < rt_axi_port_cnt) ? "rt" : "nrt" + , i, vect->ab, vect->ib); + } + } + pdbus->curr_bw_uc_idx = new_uc_idx; + pdbus->ao_bw_uc_idx = new_uc_idx; + + DPU_ATRACE_BEGIN("msm_bus_scale_req"); + rc = msm_bus_scale_client_update_request(pdbus->data_bus_hdl, + new_uc_idx); + DPU_ATRACE_END("msm_bus_scale_req"); + + return rc; +} + +int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, + struct dpu_power_client *pclient, + int bus_client, u32 bus_id, + u64 ab_quota, u64 ib_quota) +{ + int rc = 0; + int i; + u64 total_ab_rt = 0, total_ib_rt = 0; + u64 total_ab_nrt = 0, total_ib_nrt = 0; + struct dpu_power_client *client; + + if (!phandle || !pclient || + bus_client >= DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX || + bus_id >= DPU_POWER_HANDLE_DBUS_ID_MAX) { + pr_err("invalid parameters\n"); + return -EINVAL; + } + + mutex_lock(&phandle->phandle_lock); + + pclient->ab[bus_client] = ab_quota; + pclient->ib[bus_client] = ib_quota; + trace_dpu_perf_update_bus(bus_client, ab_quota, ib_quota); + + list_for_each_entry(client, &phandle->power_client_clist, list) { + for (i = 0; i < DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX; i++) { + if (i == DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT) { + total_ab_nrt += client->ab[i]; + total_ib_nrt += client->ib[i]; + } else { + total_ab_rt += client->ab[i]; + total_ib_rt = max(total_ib_rt, client->ib[i]); + } + } + } + + if (phandle->data_bus_handle[bus_id].data_bus_hdl) + rc = _dpu_power_data_bus_set_quota( + &phandle->data_bus_handle[bus_id], + total_ab_rt, total_ab_nrt, + total_ib_rt, total_ib_nrt); + + mutex_unlock(&phandle->phandle_lock); + + return rc; +} + +static void dpu_power_data_bus_unregister( + struct dpu_power_data_bus_handle *pdbus) +{ + if (pdbus->data_bus_hdl) { + msm_bus_scale_unregister_client(pdbus->data_bus_hdl); + pdbus->data_bus_hdl = 0; + } +} + +static int dpu_power_data_bus_parse(struct platform_device *pdev, + struct dpu_power_data_bus_handle *pdbus, const char *name) +{ + struct device_node *node; + int rc = 0; + int paths; + + pdbus->bus_channels = 1; + rc = of_property_read_u32(pdev->dev.of_node, + "qcom,dpu-dram-channels", &pdbus->bus_channels); + if (rc) { + pr_debug("number of channels property not specified\n"); + rc = 0; + } + + pdbus->nrt_axi_port_cnt = 0; + rc = of_property_read_u32(pdev->dev.of_node, + "qcom,dpu-num-nrt-paths", + &pdbus->nrt_axi_port_cnt); + if (rc) { + pr_debug("number of axi port property not specified\n"); + rc = 0; + } + + node = of_get_child_by_name(pdev->dev.of_node, name); + if (node) { + rc = of_property_read_u32(node, + "qcom,msm-bus,num-paths", &paths); + if (rc) { + pr_err("Error. qcom,msm-bus,num-paths not found\n"); + return rc; + } + pdbus->axi_port_cnt = paths; + + pdbus->data_bus_scale_table = + msm_bus_pdata_from_node(pdev, node); + if (IS_ERR_OR_NULL(pdbus->data_bus_scale_table)) { + pr_err("reg bus handle parsing failed\n"); + rc = PTR_ERR(pdbus->data_bus_scale_table); + if (!pdbus->data_bus_scale_table) + rc = -EINVAL; + goto end; + } + pdbus->data_bus_hdl = msm_bus_scale_register_client( + pdbus->data_bus_scale_table); + if (!pdbus->data_bus_hdl) { + pr_err("data_bus_client register failed\n"); + rc = -EINVAL; + goto end; + } + pr_debug("register %s data_bus_hdl=%x\n", name, + pdbus->data_bus_hdl); + } + +end: + return rc; +} + +static int dpu_power_reg_bus_parse(struct platform_device *pdev, + struct dpu_power_handle *phandle) +{ + struct device_node *node; + struct msm_bus_scale_pdata *bus_scale_table; + int rc = 0; + + node = of_get_child_by_name(pdev->dev.of_node, "qcom,dpu-reg-bus"); + if (node) { + bus_scale_table = msm_bus_pdata_from_node(pdev, node); + if (IS_ERR_OR_NULL(bus_scale_table)) { + pr_err("reg bus handle parsing failed\n"); + rc = PTR_ERR(bus_scale_table); + if (!bus_scale_table) + rc = -EINVAL; + goto end; + } + phandle->reg_bus_hdl = msm_bus_scale_register_client( + bus_scale_table); + if (!phandle->reg_bus_hdl) { + pr_err("reg_bus_client register failed\n"); + rc = -EINVAL; + goto end; + } + pr_debug("register reg_bus_hdl=%x\n", phandle->reg_bus_hdl); + } + +end: + return rc; +} + +static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl) +{ + if (reg_bus_hdl) + msm_bus_scale_unregister_client(reg_bus_hdl); +} + +int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, + bool enable) +{ + int i; + + if (!phandle) { + pr_err("invalid param\n"); + return -EINVAL; + } + + for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC; + i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) + phandle->data_bus_handle[i].enable = enable; + + return 0; +} + +static int dpu_power_data_bus_update(struct dpu_power_data_bus_handle *pdbus, + bool enable) +{ + int rc = 0; + + pdbus->enable = enable; + + if (pdbus->data_bus_hdl) + rc = _dpu_power_data_bus_set_quota(pdbus, pdbus->ab_rt, + pdbus->ab_nrt, pdbus->ib_rt, pdbus->ib_nrt); + + if (rc) + pr_err("failed to set data bus vote rc=%d enable:%d\n", + rc, enable); + + return rc; +} + +static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) +{ + int rc = 0; + + if (reg_bus_hdl) + rc = msm_bus_scale_client_update_request(reg_bus_hdl, + usecase_ndx); + if (rc) + pr_err("failed to set reg bus vote rc=%d\n", rc); + + return rc; +} +#else +static int dpu_power_data_bus_parse(struct platform_device *pdev, + struct dpu_power_data_bus_handle *pdbus, const char *name) +{ + return 0; +} + +static void dpu_power_data_bus_unregister( + struct dpu_power_data_bus_handle *pdbus) +{ +} + +int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, + struct dpu_power_client *pclient, + int bus_client, u32 bus_id, + u64 ab_quota, u64 ib_quota) +{ + return 0; +} + +static int dpu_power_reg_bus_parse(struct platform_device *pdev, + struct dpu_power_handle *phandle) +{ + return 0; +} + +static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl) +{ +} + +static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) +{ + return 0; +} + +static int dpu_power_data_bus_update(struct dpu_power_data_bus_handle *pdbus, + bool enable) +{ + return 0; +} + +int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, + bool enable) +{ + return 0; +} +#endif + +int dpu_power_resource_init(struct platform_device *pdev, + struct dpu_power_handle *phandle) +{ + int rc = 0, i; + + phandle->dev = &pdev->dev; + + rc = dpu_power_reg_bus_parse(pdev, phandle); + if (rc) { + pr_err("register bus parse failed rc=%d\n", rc); + return rc; + } + + for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC; + i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { + rc = dpu_power_data_bus_parse(pdev, + &phandle->data_bus_handle[i], + data_bus_name[i]); + if (rc) { + pr_err("register data bus parse failed id=%d rc=%d\n", + i, rc); + goto data_bus_err; + } + } + + INIT_LIST_HEAD(&phandle->power_client_clist); + INIT_LIST_HEAD(&phandle->event_list); + + mutex_init(&phandle->phandle_lock); + + return rc; + +data_bus_err: + for (i--; i >= 0; i--) + dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); + dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); + return rc; +} + +void dpu_power_resource_deinit(struct platform_device *pdev, + struct dpu_power_handle *phandle) +{ + struct dpu_power_client *curr_client, *next_client; + struct dpu_power_event *curr_event, *next_event; + int i; + + if (!phandle || !pdev) { + pr_err("invalid input param\n"); + return; + } + + mutex_lock(&phandle->phandle_lock); + list_for_each_entry_safe(curr_client, next_client, + &phandle->power_client_clist, list) { + pr_err("cliend:%s-%d still registered with refcount:%d\n", + curr_client->name, curr_client->id, + curr_client->refcount); + curr_client->active = false; + list_del(&curr_client->list); + } + + list_for_each_entry_safe(curr_event, next_event, + &phandle->event_list, list) { + pr_err("event:%d, client:%s still registered\n", + curr_event->event_type, + curr_event->client_name); + curr_event->active = false; + list_del(&curr_event->list); + } + mutex_unlock(&phandle->phandle_lock); + + for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) + dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); + + dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); +} + +int dpu_power_resource_enable(struct dpu_power_handle *phandle, + struct dpu_power_client *pclient, bool enable) +{ + int rc = 0, i; + bool changed = false; + u32 max_usecase_ndx = VOTE_INDEX_DISABLE, prev_usecase_ndx; + struct dpu_power_client *client; + + if (!phandle || !pclient) { + pr_err("invalid input argument\n"); + return -EINVAL; + } + + mutex_lock(&phandle->phandle_lock); + if (enable) + pclient->refcount++; + else if (pclient->refcount) + pclient->refcount--; + + if (pclient->refcount) + pclient->usecase_ndx = VOTE_INDEX_LOW; + else + pclient->usecase_ndx = VOTE_INDEX_DISABLE; + + list_for_each_entry(client, &phandle->power_client_clist, list) { + if (client->usecase_ndx < VOTE_INDEX_MAX && + client->usecase_ndx > max_usecase_ndx) + max_usecase_ndx = client->usecase_ndx; + } + + if (phandle->current_usecase_ndx != max_usecase_ndx) { + changed = true; + prev_usecase_ndx = phandle->current_usecase_ndx; + phandle->current_usecase_ndx = max_usecase_ndx; + } + + pr_debug("%pS: changed=%d current idx=%d request client %s id:%u enable:%d refcount:%d\n", + __builtin_return_address(0), changed, max_usecase_ndx, + pclient->name, pclient->id, enable, pclient->refcount); + + if (!changed) + goto end; + + if (enable) { + dpu_power_event_trigger_locked(phandle, + DPU_POWER_EVENT_PRE_ENABLE); + + for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { + rc = dpu_power_data_bus_update( + &phandle->data_bus_handle[i], enable); + if (rc) { + pr_err("failed to set data bus vote id=%d rc=%d\n", + i, rc); + goto data_bus_hdl_err; + } + } + + rc = dpu_power_reg_bus_update(phandle->reg_bus_hdl, + max_usecase_ndx); + if (rc) { + pr_err("failed to set reg bus vote rc=%d\n", rc); + goto reg_bus_hdl_err; + } + + dpu_power_event_trigger_locked(phandle, + DPU_POWER_EVENT_POST_ENABLE); + + } else { + dpu_power_event_trigger_locked(phandle, + DPU_POWER_EVENT_PRE_DISABLE); + + dpu_power_reg_bus_update(phandle->reg_bus_hdl, + max_usecase_ndx); + + for (i = 0 ; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) + dpu_power_data_bus_update(&phandle->data_bus_handle[i], + enable); + + dpu_power_event_trigger_locked(phandle, + DPU_POWER_EVENT_POST_DISABLE); + } + +end: + mutex_unlock(&phandle->phandle_lock); + return rc; + +reg_bus_hdl_err: + for (i = 0 ; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) + dpu_power_data_bus_update(&phandle->data_bus_handle[i], 0); +data_bus_hdl_err: + phandle->current_usecase_ndx = prev_usecase_ndx; + mutex_unlock(&phandle->phandle_lock); + return rc; +} + +struct dpu_power_event *dpu_power_handle_register_event( + struct dpu_power_handle *phandle, + u32 event_type, void (*cb_fnc)(u32 event_type, void *usr), + void *usr, char *client_name) +{ + struct dpu_power_event *event; + + if (!phandle) { + pr_err("invalid power handle\n"); + return ERR_PTR(-EINVAL); + } else if (!cb_fnc || !event_type) { + pr_err("no callback fnc or event type\n"); + return ERR_PTR(-EINVAL); + } + + event = kzalloc(sizeof(struct dpu_power_event), GFP_KERNEL); + if (!event) + return ERR_PTR(-ENOMEM); + + event->event_type = event_type; + event->cb_fnc = cb_fnc; + event->usr = usr; + strlcpy(event->client_name, client_name, MAX_CLIENT_NAME_LEN); + event->active = true; + + mutex_lock(&phandle->phandle_lock); + list_add(&event->list, &phandle->event_list); + mutex_unlock(&phandle->phandle_lock); + + return event; +} + +void dpu_power_handle_unregister_event( + struct dpu_power_handle *phandle, + struct dpu_power_event *event) +{ + if (!phandle || !event) { + pr_err("invalid phandle or event\n"); + } else if (!event->active) { + pr_err("power handle deinit already done\n"); + kfree(event); + } else { + mutex_lock(&phandle->phandle_lock); + list_del_init(&event->list); + mutex_unlock(&phandle->phandle_lock); + kfree(event); + } +} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h new file mode 100644 index 0000000..9a6d4b9 --- /dev/null +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h @@ -0,0 +1,288 @@ +/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _DPU_POWER_HANDLE_H_ +#define _DPU_POWER_HANDLE_H_ + +#define MAX_CLIENT_NAME_LEN 128 + +#define DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA 0 +#define DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA 0 +#define DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA 1600000000 +#define DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA 0 + +#include <linux/dpu_io_util.h> + +/* event will be triggered before power handler disable */ +#define DPU_POWER_EVENT_PRE_DISABLE 0x1 + +/* event will be triggered after power handler disable */ +#define DPU_POWER_EVENT_POST_DISABLE 0x2 + +/* event will be triggered before power handler enable */ +#define DPU_POWER_EVENT_PRE_ENABLE 0x4 + +/* event will be triggered after power handler enable */ +#define DPU_POWER_EVENT_POST_ENABLE 0x8 + +/** + * mdss_bus_vote_type: register bus vote type + * VOTE_INDEX_DISABLE: removes the client vote + * VOTE_INDEX_LOW: keeps the lowest vote for register bus + * VOTE_INDEX_MAX: invalid + */ +enum mdss_bus_vote_type { + VOTE_INDEX_DISABLE, + VOTE_INDEX_LOW, + VOTE_INDEX_MAX, +}; + +/** + * enum dpu_power_handle_data_bus_client - type of axi bus clients + * @DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT: core real-time bus client + * @DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT: core non-real-time bus client + * @DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX: maximum number of bus client type + */ +enum dpu_power_handle_data_bus_client { + DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT, + DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT, + DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX +}; + +/** + * enum DPU_POWER_HANDLE_DBUS_ID - data bus identifier + * @DPU_POWER_HANDLE_DBUS_ID_MNOC: DPU/MNOC data bus + * @DPU_POWER_HANDLE_DBUS_ID_LLCC: MNOC/LLCC data bus + * @DPU_POWER_HANDLE_DBUS_ID_EBI: LLCC/EBI data bus + */ +enum DPU_POWER_HANDLE_DBUS_ID { + DPU_POWER_HANDLE_DBUS_ID_MNOC, + DPU_POWER_HANDLE_DBUS_ID_LLCC, + DPU_POWER_HANDLE_DBUS_ID_EBI, + DPU_POWER_HANDLE_DBUS_ID_MAX, +}; + +/** + * struct dpu_power_client: stores the power client for dpu driver + * @name: name of the client + * @usecase_ndx: current regs bus vote type + * @refcount: current refcount if multiple modules are using same + * same client for enable/disable. Power module will + * aggregate the refcount and vote accordingly for this + * client. + * @id: assigned during create. helps for debugging. + * @list: list to attach power handle master list + * @ab: arbitrated bandwidth for each bus client + * @ib: instantaneous bandwidth for each bus client + * @active: inidcates the state of dpu power handle + */ +struct dpu_power_client { + char name[MAX_CLIENT_NAME_LEN]; + short usecase_ndx; + short refcount; + u32 id; + struct list_head list; + u64 ab[DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX]; + u64 ib[DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX]; + bool active; +}; + +/** + * struct dpu_power_data_handle: power handle struct for data bus + * @data_bus_scale_table: pointer to bus scaling table + * @data_bus_hdl: current data bus handle + * @axi_port_cnt: number of rt axi ports + * @nrt_axi_port_cnt: number of nrt axi ports + * @bus_channels: number of memory bus channels + * @curr_bw_uc_idx: current use case index of data bus + * @ao_bw_uc_idx: active only use case index of data bus + * @ab_rt: realtime ab quota + * @ib_rt: realtime ib quota + * @ab_nrt: non-realtime ab quota + * @ib_nrt: non-realtime ib quota + * @enable: true if bus is enabled + */ +struct dpu_power_data_bus_handle { + struct msm_bus_scale_pdata *data_bus_scale_table; + u32 data_bus_hdl; + u32 axi_port_cnt; + u32 nrt_axi_port_cnt; + u32 bus_channels; + u32 curr_bw_uc_idx; + u32 ao_bw_uc_idx; + u64 ab_rt; + u64 ib_rt; + u64 ab_nrt; + u64 ib_nrt; + bool enable; +}; + +/* + * struct dpu_power_event - local event registration structure + * @client_name: name of the client registering + * @cb_fnc: pointer to desired callback function + * @usr: user pointer to pass to callback event trigger + * @event: refer to DPU_POWER_HANDLE_EVENT_* + * @list: list to attach event master list + * @active: indicates the state of dpu power handle + */ +struct dpu_power_event { + char client_name[MAX_CLIENT_NAME_LEN]; + void (*cb_fnc)(u32 event_type, void *usr); + void *usr; + u32 event_type; + struct list_head list; + bool active; +}; + +/** + * struct dpu_power_handle: power handle main struct + * @client_clist: master list to store all clients + * @phandle_lock: lock to synchronize the enable/disable + * @dev: pointer to device structure + * @usecase_ndx: current usecase index + * @reg_bus_hdl: current register bus handle + * @data_bus_handle: context structure for data bus control + * @event_list: current power handle event list + */ +struct dpu_power_handle { + struct list_head power_client_clist; + struct mutex phandle_lock; + struct device *dev; + u32 current_usecase_ndx; + u32 reg_bus_hdl; + struct dpu_power_data_bus_handle data_bus_handle + [DPU_POWER_HANDLE_DBUS_ID_MAX]; + struct list_head event_list; +}; + +/** + * dpu_power_resource_init() - initializes the dpu power handle + * @pdev: platform device to search the power resources + * @pdata: power handle to store the power resources + * + * Return: error code. + */ +int dpu_power_resource_init(struct platform_device *pdev, + struct dpu_power_handle *pdata); + +/** + * dpu_power_resource_deinit() - release the dpu power handle + * @pdev: platform device for power resources + * @pdata: power handle containing the resources + * + * Return: error code. + */ +void dpu_power_resource_deinit(struct platform_device *pdev, + struct dpu_power_handle *pdata); + +/** + * dpu_power_client_create() - create the client on power handle + * @pdata: power handle containing the resources + * @client_name: new client name for registration + * + * Return: error code. + */ +struct dpu_power_client *dpu_power_client_create(struct dpu_power_handle *pdata, + char *client_name); + +/** + * dpu_power_client_destroy() - destroy the client on power handle + * @pdata: power handle containing the resources + * @client_name: new client name for registration + * + * Return: none + */ +void dpu_power_client_destroy(struct dpu_power_handle *phandle, + struct dpu_power_client *client); + +/** + * dpu_power_resource_enable() - enable/disable the power resources + * @pdata: power handle containing the resources + * @client: client information to enable/disable its vote + * @enable: boolean request for enable/disable + * + * Return: error code. + */ +int dpu_power_resource_enable(struct dpu_power_handle *pdata, + struct dpu_power_client *pclient, bool enable); + +/** + * dpu_power_data_bus_state_update() - update data bus state + * @pdata: power handle containing the resources + * @enable: take enable vs disable path + * + * Return: error code. + */ +int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, + bool enable); + +/** + * dpu_power_data_bus_set_quota() - set data bus quota for power client + * @phandle: power handle containing the resources + * @client: client information to set quota + * @bus_client: real-time or non-real-time bus client + * @bus_id: identifier of data bus, see DPU_POWER_HANDLE_DBUS_ID + * @ab_quota: arbitrated bus bandwidth + * @ib_quota: instantaneous bus bandwidth + * + * Return: zero if success, or error code otherwise + */ +int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, + struct dpu_power_client *pclient, + int bus_client, u32 bus_id, + u64 ab_quota, u64 ib_quota); + +/** + * dpu_power_data_bus_bandwidth_ctrl() - control data bus bandwidth enable + * @phandle: power handle containing the resources + * @client: client information to bandwidth control + * @enable: true to enable bandwidth for data base + * + * Return: none + */ +void dpu_power_data_bus_bandwidth_ctrl(struct dpu_power_handle *phandle, + struct dpu_power_client *pclient, int enable); + +/** + * dpu_power_handle_register_event - register a callback function for an event. + * Clients can register for multiple events with a single register. + * Any block with access to phandle can register for the event + * notification. + * @phandle: power handle containing the resources + * @event_type: event type to register; refer DPU_POWER_HANDLE_EVENT_* + * @cb_fnc: pointer to desired callback function + * @usr: user pointer to pass to callback on event trigger + * + * Return: event pointer if success, or error code otherwise + */ +struct dpu_power_event *dpu_power_handle_register_event( + struct dpu_power_handle *phandle, + u32 event_type, void (*cb_fnc)(u32 event_type, void *usr), + void *usr, char *client_name); +/** + * dpu_power_handle_unregister_event - unregister callback for event(s) + * @phandle: power handle containing the resources + * @event: event pointer returned after power handle register + */ +void dpu_power_handle_unregister_event(struct dpu_power_handle *phandle, + struct dpu_power_event *event); + +/** + * dpu_power_handle_get_dbus_name - get name of given data bus identifier + * @bus_id: data bus identifier + * Return: Pointer to name string if success; NULL otherwise + */ +const char *dpu_power_handle_get_dbus_name(u32 bus_id); + +#endif /* _DPU_POWER_HANDLE_H_ */ diff --git a/drivers/gpu/drm/msm/dpu_power_handle.c b/drivers/gpu/drm/msm/dpu_power_handle.c deleted file mode 100644 index bdf18de..0000000 --- a/drivers/gpu/drm/msm/dpu_power_handle.c +++ /dev/null @@ -1,688 +0,0 @@ -/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#define pr_fmt(fmt) "[drm:%s:%d]: " fmt, __func__, __LINE__ - -#include <linux/kernel.h> -#include <linux/of.h> -#include <linux/string.h> -#include <linux/of_address.h> -#include <linux/slab.h> -#include <linux/mutex.h> -#include <linux/of_platform.h> -#ifdef CONFIG_QCOM_BUS_SCALING -#include <linux/msm-bus.h> -#include <linux/msm-bus-board.h> -#endif -#include <linux/dpu_io_util.h> - -#include "dpu_power_handle.h" -#include "dpu_trace.h" - -static const char *data_bus_name[DPU_POWER_HANDLE_DBUS_ID_MAX] = { - [DPU_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,dpu-data-bus", - [DPU_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,dpu-llcc-bus", - [DPU_POWER_HANDLE_DBUS_ID_EBI] = "qcom,dpu-ebi-bus", -}; - -const char *dpu_power_handle_get_dbus_name(u32 bus_id) -{ - if (bus_id < DPU_POWER_HANDLE_DBUS_ID_MAX) - return data_bus_name[bus_id]; - - return NULL; -} - -static void dpu_power_event_trigger_locked(struct dpu_power_handle *phandle, - u32 event_type) -{ - struct dpu_power_event *event; - - list_for_each_entry(event, &phandle->event_list, list) { - if (event->event_type & event_type) - event->cb_fnc(event_type, event->usr); - } -} - -struct dpu_power_client *dpu_power_client_create( - struct dpu_power_handle *phandle, char *client_name) -{ - struct dpu_power_client *client; - static u32 id; - - if (!client_name || !phandle) { - pr_err("client name is null or invalid power data\n"); - return ERR_PTR(-EINVAL); - } - - client = kzalloc(sizeof(struct dpu_power_client), GFP_KERNEL); - if (!client) - return ERR_PTR(-ENOMEM); - - mutex_lock(&phandle->phandle_lock); - strlcpy(client->name, client_name, MAX_CLIENT_NAME_LEN); - client->usecase_ndx = VOTE_INDEX_DISABLE; - client->id = id; - client->active = true; - pr_debug("client %s created:%pK id :%d\n", client_name, - client, id); - id++; - list_add(&client->list, &phandle->power_client_clist); - mutex_unlock(&phandle->phandle_lock); - - return client; -} - -void dpu_power_client_destroy(struct dpu_power_handle *phandle, - struct dpu_power_client *client) -{ - if (!client || !phandle) { - pr_err("reg bus vote: invalid client handle\n"); - } else if (!client->active) { - pr_err("dpu power deinit already done\n"); - kfree(client); - } else { - pr_debug("bus vote client %s destroyed:%pK id:%u\n", - client->name, client, client->id); - mutex_lock(&phandle->phandle_lock); - list_del_init(&client->list); - mutex_unlock(&phandle->phandle_lock); - kfree(client); - } -} - -#ifdef CONFIG_QCOM_BUS_SCALING - -#define MAX_AXI_PORT_COUNT 3 - -static int _dpu_power_data_bus_set_quota( - struct dpu_power_data_bus_handle *pdbus, - u64 ab_quota_rt, u64 ab_quota_nrt, - u64 ib_quota_rt, u64 ib_quota_nrt) -{ - int new_uc_idx; - u64 ab_quota[MAX_AXI_PORT_COUNT] = {0, 0}; - u64 ib_quota[MAX_AXI_PORT_COUNT] = {0, 0}; - int rc; - - if (pdbus->data_bus_hdl < 1) { - pr_err("invalid bus handle %d\n", pdbus->data_bus_hdl); - return -EINVAL; - } - - pdbus->ab_rt = ab_quota_rt; - pdbus->ib_rt = ib_quota_rt; - pdbus->ab_nrt = ab_quota_nrt; - pdbus->ib_nrt = ib_quota_nrt; - - if (pdbus->enable) { - ab_quota_rt = max_t(u64, ab_quota_rt, - DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA); - ib_quota_rt = max_t(u64, ib_quota_rt, - DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA); - ab_quota_nrt = max_t(u64, ab_quota_nrt, - DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA); - ib_quota_nrt = max_t(u64, ib_quota_nrt, - DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA); - } else { - ab_quota_rt = min_t(u64, ab_quota_rt, - DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA); - ib_quota_rt = min_t(u64, ib_quota_rt, - DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA); - ab_quota_nrt = min_t(u64, ab_quota_nrt, - DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA); - ib_quota_nrt = min_t(u64, ib_quota_nrt, - DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA); - } - - if (!ab_quota_rt && !ab_quota_nrt && !ib_quota_rt && !ib_quota_nrt) { - new_uc_idx = 0; - } else { - int i; - struct msm_bus_vectors *vect = NULL; - struct msm_bus_scale_pdata *bw_table = - pdbus->data_bus_scale_table; - u32 nrt_axi_port_cnt = pdbus->nrt_axi_port_cnt; - u32 total_axi_port_cnt = pdbus->axi_port_cnt; - u32 rt_axi_port_cnt = total_axi_port_cnt - nrt_axi_port_cnt; - - if (!bw_table || !total_axi_port_cnt || - total_axi_port_cnt > MAX_AXI_PORT_COUNT) { - pr_err("invalid input\n"); - return -EINVAL; - } - - if (pdbus->bus_channels) { - ib_quota_rt = div_u64(ib_quota_rt, - pdbus->bus_channels); - ib_quota_nrt = div_u64(ib_quota_nrt, - pdbus->bus_channels); - } - - if (nrt_axi_port_cnt) { - - ab_quota_rt = div_u64(ab_quota_rt, rt_axi_port_cnt); - ab_quota_nrt = div_u64(ab_quota_nrt, nrt_axi_port_cnt); - - for (i = 0; i < total_axi_port_cnt; i++) { - if (i < rt_axi_port_cnt) { - ab_quota[i] = ab_quota_rt; - ib_quota[i] = ib_quota_rt; - } else { - ab_quota[i] = ab_quota_nrt; - ib_quota[i] = ib_quota_nrt; - } - } - } else { - ab_quota[0] = div_u64(ab_quota_rt + ab_quota_nrt, - total_axi_port_cnt); - ib_quota[0] = ib_quota_rt + ib_quota_nrt; - - for (i = 1; i < total_axi_port_cnt; i++) { - ab_quota[i] = ab_quota[0]; - ib_quota[i] = ib_quota[0]; - } - } - - new_uc_idx = (pdbus->curr_bw_uc_idx % - (bw_table->num_usecases - 1)) + 1; - - for (i = 0; i < total_axi_port_cnt; i++) { - vect = &bw_table->usecase[new_uc_idx].vectors[i]; - vect->ab = ab_quota[i]; - vect->ib = ib_quota[i]; - - pr_debug( - "%s uc_idx=%d %s path idx=%d ab=%llu ib=%llu\n", - bw_table->name, - new_uc_idx, (i < rt_axi_port_cnt) ? "rt" : "nrt" - , i, vect->ab, vect->ib); - } - } - pdbus->curr_bw_uc_idx = new_uc_idx; - pdbus->ao_bw_uc_idx = new_uc_idx; - - DPU_ATRACE_BEGIN("msm_bus_scale_req"); - rc = msm_bus_scale_client_update_request(pdbus->data_bus_hdl, - new_uc_idx); - DPU_ATRACE_END("msm_bus_scale_req"); - - return rc; -} - -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, - struct dpu_power_client *pclient, - int bus_client, u32 bus_id, - u64 ab_quota, u64 ib_quota) -{ - int rc = 0; - int i; - u64 total_ab_rt = 0, total_ib_rt = 0; - u64 total_ab_nrt = 0, total_ib_nrt = 0; - struct dpu_power_client *client; - - if (!phandle || !pclient || - bus_client >= DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX || - bus_id >= DPU_POWER_HANDLE_DBUS_ID_MAX) { - pr_err("invalid parameters\n"); - return -EINVAL; - } - - mutex_lock(&phandle->phandle_lock); - - pclient->ab[bus_client] = ab_quota; - pclient->ib[bus_client] = ib_quota; - trace_dpu_perf_update_bus(bus_client, ab_quota, ib_quota); - - list_for_each_entry(client, &phandle->power_client_clist, list) { - for (i = 0; i < DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX; i++) { - if (i == DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT) { - total_ab_nrt += client->ab[i]; - total_ib_nrt += client->ib[i]; - } else { - total_ab_rt += client->ab[i]; - total_ib_rt = max(total_ib_rt, client->ib[i]); - } - } - } - - if (phandle->data_bus_handle[bus_id].data_bus_hdl) - rc = _dpu_power_data_bus_set_quota( - &phandle->data_bus_handle[bus_id], - total_ab_rt, total_ab_nrt, - total_ib_rt, total_ib_nrt); - - mutex_unlock(&phandle->phandle_lock); - - return rc; -} - -static void dpu_power_data_bus_unregister( - struct dpu_power_data_bus_handle *pdbus) -{ - if (pdbus->data_bus_hdl) { - msm_bus_scale_unregister_client(pdbus->data_bus_hdl); - pdbus->data_bus_hdl = 0; - } -} - -static int dpu_power_data_bus_parse(struct platform_device *pdev, - struct dpu_power_data_bus_handle *pdbus, const char *name) -{ - struct device_node *node; - int rc = 0; - int paths; - - pdbus->bus_channels = 1; - rc = of_property_read_u32(pdev->dev.of_node, - "qcom,dpu-dram-channels", &pdbus->bus_channels); - if (rc) { - pr_debug("number of channels property not specified\n"); - rc = 0; - } - - pdbus->nrt_axi_port_cnt = 0; - rc = of_property_read_u32(pdev->dev.of_node, - "qcom,dpu-num-nrt-paths", - &pdbus->nrt_axi_port_cnt); - if (rc) { - pr_debug("number of axi port property not specified\n"); - rc = 0; - } - - node = of_get_child_by_name(pdev->dev.of_node, name); - if (node) { - rc = of_property_read_u32(node, - "qcom,msm-bus,num-paths", &paths); - if (rc) { - pr_err("Error. qcom,msm-bus,num-paths not found\n"); - return rc; - } - pdbus->axi_port_cnt = paths; - - pdbus->data_bus_scale_table = - msm_bus_pdata_from_node(pdev, node); - if (IS_ERR_OR_NULL(pdbus->data_bus_scale_table)) { - pr_err("reg bus handle parsing failed\n"); - rc = PTR_ERR(pdbus->data_bus_scale_table); - if (!pdbus->data_bus_scale_table) - rc = -EINVAL; - goto end; - } - pdbus->data_bus_hdl = msm_bus_scale_register_client( - pdbus->data_bus_scale_table); - if (!pdbus->data_bus_hdl) { - pr_err("data_bus_client register failed\n"); - rc = -EINVAL; - goto end; - } - pr_debug("register %s data_bus_hdl=%x\n", name, - pdbus->data_bus_hdl); - } - -end: - return rc; -} - -static int dpu_power_reg_bus_parse(struct platform_device *pdev, - struct dpu_power_handle *phandle) -{ - struct device_node *node; - struct msm_bus_scale_pdata *bus_scale_table; - int rc = 0; - - node = of_get_child_by_name(pdev->dev.of_node, "qcom,dpu-reg-bus"); - if (node) { - bus_scale_table = msm_bus_pdata_from_node(pdev, node); - if (IS_ERR_OR_NULL(bus_scale_table)) { - pr_err("reg bus handle parsing failed\n"); - rc = PTR_ERR(bus_scale_table); - if (!bus_scale_table) - rc = -EINVAL; - goto end; - } - phandle->reg_bus_hdl = msm_bus_scale_register_client( - bus_scale_table); - if (!phandle->reg_bus_hdl) { - pr_err("reg_bus_client register failed\n"); - rc = -EINVAL; - goto end; - } - pr_debug("register reg_bus_hdl=%x\n", phandle->reg_bus_hdl); - } - -end: - return rc; -} - -static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl) -{ - if (reg_bus_hdl) - msm_bus_scale_unregister_client(reg_bus_hdl); -} - -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, - bool enable) -{ - int i; - - if (!phandle) { - pr_err("invalid param\n"); - return -EINVAL; - } - - for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC; - i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) - phandle->data_bus_handle[i].enable = enable; - - return 0; -} - -static int dpu_power_data_bus_update(struct dpu_power_data_bus_handle *pdbus, - bool enable) -{ - int rc = 0; - - pdbus->enable = enable; - - if (pdbus->data_bus_hdl) - rc = _dpu_power_data_bus_set_quota(pdbus, pdbus->ab_rt, - pdbus->ab_nrt, pdbus->ib_rt, pdbus->ib_nrt); - - if (rc) - pr_err("failed to set data bus vote rc=%d enable:%d\n", - rc, enable); - - return rc; -} - -static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) -{ - int rc = 0; - - if (reg_bus_hdl) - rc = msm_bus_scale_client_update_request(reg_bus_hdl, - usecase_ndx); - if (rc) - pr_err("failed to set reg bus vote rc=%d\n", rc); - - return rc; -} -#else -static int dpu_power_data_bus_parse(struct platform_device *pdev, - struct dpu_power_data_bus_handle *pdbus, const char *name) -{ - return 0; -} - -static void dpu_power_data_bus_unregister( - struct dpu_power_data_bus_handle *pdbus) -{ -} - -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, - struct dpu_power_client *pclient, - int bus_client, u32 bus_id, - u64 ab_quota, u64 ib_quota) -{ - return 0; -} - -static int dpu_power_reg_bus_parse(struct platform_device *pdev, - struct dpu_power_handle *phandle) -{ - return 0; -} - -static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl) -{ -} - -static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) -{ - return 0; -} - -static int dpu_power_data_bus_update(struct dpu_power_data_bus_handle *pdbus, - bool enable) -{ - return 0; -} - -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, - bool enable) -{ - return 0; -} -#endif - -int dpu_power_resource_init(struct platform_device *pdev, - struct dpu_power_handle *phandle) -{ - int rc = 0, i; - - phandle->dev = &pdev->dev; - - rc = dpu_power_reg_bus_parse(pdev, phandle); - if (rc) { - pr_err("register bus parse failed rc=%d\n", rc); - return rc; - } - - for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC; - i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { - rc = dpu_power_data_bus_parse(pdev, - &phandle->data_bus_handle[i], - data_bus_name[i]); - if (rc) { - pr_err("register data bus parse failed id=%d rc=%d\n", - i, rc); - goto data_bus_err; - } - } - - INIT_LIST_HEAD(&phandle->power_client_clist); - INIT_LIST_HEAD(&phandle->event_list); - - mutex_init(&phandle->phandle_lock); - - return rc; - -data_bus_err: - for (i--; i >= 0; i--) - dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); - dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); - return rc; -} - -void dpu_power_resource_deinit(struct platform_device *pdev, - struct dpu_power_handle *phandle) -{ - struct dpu_power_client *curr_client, *next_client; - struct dpu_power_event *curr_event, *next_event; - int i; - - if (!phandle || !pdev) { - pr_err("invalid input param\n"); - return; - } - - mutex_lock(&phandle->phandle_lock); - list_for_each_entry_safe(curr_client, next_client, - &phandle->power_client_clist, list) { - pr_err("cliend:%s-%d still registered with refcount:%d\n", - curr_client->name, curr_client->id, - curr_client->refcount); - curr_client->active = false; - list_del(&curr_client->list); - } - - list_for_each_entry_safe(curr_event, next_event, - &phandle->event_list, list) { - pr_err("event:%d, client:%s still registered\n", - curr_event->event_type, - curr_event->client_name); - curr_event->active = false; - list_del(&curr_event->list); - } - mutex_unlock(&phandle->phandle_lock); - - for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) - dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); - - dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); -} - -int dpu_power_resource_enable(struct dpu_power_handle *phandle, - struct dpu_power_client *pclient, bool enable) -{ - int rc = 0, i; - bool changed = false; - u32 max_usecase_ndx = VOTE_INDEX_DISABLE, prev_usecase_ndx; - struct dpu_power_client *client; - - if (!phandle || !pclient) { - pr_err("invalid input argument\n"); - return -EINVAL; - } - - mutex_lock(&phandle->phandle_lock); - if (enable) - pclient->refcount++; - else if (pclient->refcount) - pclient->refcount--; - - if (pclient->refcount) - pclient->usecase_ndx = VOTE_INDEX_LOW; - else - pclient->usecase_ndx = VOTE_INDEX_DISABLE; - - list_for_each_entry(client, &phandle->power_client_clist, list) { - if (client->usecase_ndx < VOTE_INDEX_MAX && - client->usecase_ndx > max_usecase_ndx) - max_usecase_ndx = client->usecase_ndx; - } - - if (phandle->current_usecase_ndx != max_usecase_ndx) { - changed = true; - prev_usecase_ndx = phandle->current_usecase_ndx; - phandle->current_usecase_ndx = max_usecase_ndx; - } - - pr_debug("%pS: changed=%d current idx=%d request client %s id:%u enable:%d refcount:%d\n", - __builtin_return_address(0), changed, max_usecase_ndx, - pclient->name, pclient->id, enable, pclient->refcount); - - if (!changed) - goto end; - - if (enable) { - dpu_power_event_trigger_locked(phandle, - DPU_POWER_EVENT_PRE_ENABLE); - - for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { - rc = dpu_power_data_bus_update( - &phandle->data_bus_handle[i], enable); - if (rc) { - pr_err("failed to set data bus vote id=%d rc=%d\n", - i, rc); - goto data_bus_hdl_err; - } - } - - rc = dpu_power_reg_bus_update(phandle->reg_bus_hdl, - max_usecase_ndx); - if (rc) { - pr_err("failed to set reg bus vote rc=%d\n", rc); - goto reg_bus_hdl_err; - } - - dpu_power_event_trigger_locked(phandle, - DPU_POWER_EVENT_POST_ENABLE); - - } else { - dpu_power_event_trigger_locked(phandle, - DPU_POWER_EVENT_PRE_DISABLE); - - dpu_power_reg_bus_update(phandle->reg_bus_hdl, - max_usecase_ndx); - - for (i = 0 ; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) - dpu_power_data_bus_update(&phandle->data_bus_handle[i], - enable); - - dpu_power_event_trigger_locked(phandle, - DPU_POWER_EVENT_POST_DISABLE); - } - -end: - mutex_unlock(&phandle->phandle_lock); - return rc; - -reg_bus_hdl_err: - for (i = 0 ; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) - dpu_power_data_bus_update(&phandle->data_bus_handle[i], 0); -data_bus_hdl_err: - phandle->current_usecase_ndx = prev_usecase_ndx; - mutex_unlock(&phandle->phandle_lock); - return rc; -} - -struct dpu_power_event *dpu_power_handle_register_event( - struct dpu_power_handle *phandle, - u32 event_type, void (*cb_fnc)(u32 event_type, void *usr), - void *usr, char *client_name) -{ - struct dpu_power_event *event; - - if (!phandle) { - pr_err("invalid power handle\n"); - return ERR_PTR(-EINVAL); - } else if (!cb_fnc || !event_type) { - pr_err("no callback fnc or event type\n"); - return ERR_PTR(-EINVAL); - } - - event = kzalloc(sizeof(struct dpu_power_event), GFP_KERNEL); - if (!event) - return ERR_PTR(-ENOMEM); - - event->event_type = event_type; - event->cb_fnc = cb_fnc; - event->usr = usr; - strlcpy(event->client_name, client_name, MAX_CLIENT_NAME_LEN); - event->active = true; - - mutex_lock(&phandle->phandle_lock); - list_add(&event->list, &phandle->event_list); - mutex_unlock(&phandle->phandle_lock); - - return event; -} - -void dpu_power_handle_unregister_event( - struct dpu_power_handle *phandle, - struct dpu_power_event *event) -{ - if (!phandle || !event) { - pr_err("invalid phandle or event\n"); - } else if (!event->active) { - pr_err("power handle deinit already done\n"); - kfree(event); - } else { - mutex_lock(&phandle->phandle_lock); - list_del_init(&event->list); - mutex_unlock(&phandle->phandle_lock); - kfree(event); - } -} diff --git a/drivers/gpu/drm/msm/dpu_power_handle.h b/drivers/gpu/drm/msm/dpu_power_handle.h deleted file mode 100644 index 9a6d4b9..0000000 --- a/drivers/gpu/drm/msm/dpu_power_handle.h +++ /dev/null @@ -1,288 +0,0 @@ -/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef _DPU_POWER_HANDLE_H_ -#define _DPU_POWER_HANDLE_H_ - -#define MAX_CLIENT_NAME_LEN 128 - -#define DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA 0 -#define DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA 0 -#define DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA 1600000000 -#define DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA 0 - -#include <linux/dpu_io_util.h> - -/* event will be triggered before power handler disable */ -#define DPU_POWER_EVENT_PRE_DISABLE 0x1 - -/* event will be triggered after power handler disable */ -#define DPU_POWER_EVENT_POST_DISABLE 0x2 - -/* event will be triggered before power handler enable */ -#define DPU_POWER_EVENT_PRE_ENABLE 0x4 - -/* event will be triggered after power handler enable */ -#define DPU_POWER_EVENT_POST_ENABLE 0x8 - -/** - * mdss_bus_vote_type: register bus vote type - * VOTE_INDEX_DISABLE: removes the client vote - * VOTE_INDEX_LOW: keeps the lowest vote for register bus - * VOTE_INDEX_MAX: invalid - */ -enum mdss_bus_vote_type { - VOTE_INDEX_DISABLE, - VOTE_INDEX_LOW, - VOTE_INDEX_MAX, -}; - -/** - * enum dpu_power_handle_data_bus_client - type of axi bus clients - * @DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT: core real-time bus client - * @DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT: core non-real-time bus client - * @DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX: maximum number of bus client type - */ -enum dpu_power_handle_data_bus_client { - DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT, - DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT, - DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX -}; - -/** - * enum DPU_POWER_HANDLE_DBUS_ID - data bus identifier - * @DPU_POWER_HANDLE_DBUS_ID_MNOC: DPU/MNOC data bus - * @DPU_POWER_HANDLE_DBUS_ID_LLCC: MNOC/LLCC data bus - * @DPU_POWER_HANDLE_DBUS_ID_EBI: LLCC/EBI data bus - */ -enum DPU_POWER_HANDLE_DBUS_ID { - DPU_POWER_HANDLE_DBUS_ID_MNOC, - DPU_POWER_HANDLE_DBUS_ID_LLCC, - DPU_POWER_HANDLE_DBUS_ID_EBI, - DPU_POWER_HANDLE_DBUS_ID_MAX, -}; - -/** - * struct dpu_power_client: stores the power client for dpu driver - * @name: name of the client - * @usecase_ndx: current regs bus vote type - * @refcount: current refcount if multiple modules are using same - * same client for enable/disable. Power module will - * aggregate the refcount and vote accordingly for this - * client. - * @id: assigned during create. helps for debugging. - * @list: list to attach power handle master list - * @ab: arbitrated bandwidth for each bus client - * @ib: instantaneous bandwidth for each bus client - * @active: inidcates the state of dpu power handle - */ -struct dpu_power_client { - char name[MAX_CLIENT_NAME_LEN]; - short usecase_ndx; - short refcount; - u32 id; - struct list_head list; - u64 ab[DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX]; - u64 ib[DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX]; - bool active; -}; - -/** - * struct dpu_power_data_handle: power handle struct for data bus - * @data_bus_scale_table: pointer to bus scaling table - * @data_bus_hdl: current data bus handle - * @axi_port_cnt: number of rt axi ports - * @nrt_axi_port_cnt: number of nrt axi ports - * @bus_channels: number of memory bus channels - * @curr_bw_uc_idx: current use case index of data bus - * @ao_bw_uc_idx: active only use case index of data bus - * @ab_rt: realtime ab quota - * @ib_rt: realtime ib quota - * @ab_nrt: non-realtime ab quota - * @ib_nrt: non-realtime ib quota - * @enable: true if bus is enabled - */ -struct dpu_power_data_bus_handle { - struct msm_bus_scale_pdata *data_bus_scale_table; - u32 data_bus_hdl; - u32 axi_port_cnt; - u32 nrt_axi_port_cnt; - u32 bus_channels; - u32 curr_bw_uc_idx; - u32 ao_bw_uc_idx; - u64 ab_rt; - u64 ib_rt; - u64 ab_nrt; - u64 ib_nrt; - bool enable; -}; - -/* - * struct dpu_power_event - local event registration structure - * @client_name: name of the client registering - * @cb_fnc: pointer to desired callback function - * @usr: user pointer to pass to callback event trigger - * @event: refer to DPU_POWER_HANDLE_EVENT_* - * @list: list to attach event master list - * @active: indicates the state of dpu power handle - */ -struct dpu_power_event { - char client_name[MAX_CLIENT_NAME_LEN]; - void (*cb_fnc)(u32 event_type, void *usr); - void *usr; - u32 event_type; - struct list_head list; - bool active; -}; - -/** - * struct dpu_power_handle: power handle main struct - * @client_clist: master list to store all clients - * @phandle_lock: lock to synchronize the enable/disable - * @dev: pointer to device structure - * @usecase_ndx: current usecase index - * @reg_bus_hdl: current register bus handle - * @data_bus_handle: context structure for data bus control - * @event_list: current power handle event list - */ -struct dpu_power_handle { - struct list_head power_client_clist; - struct mutex phandle_lock; - struct device *dev; - u32 current_usecase_ndx; - u32 reg_bus_hdl; - struct dpu_power_data_bus_handle data_bus_handle - [DPU_POWER_HANDLE_DBUS_ID_MAX]; - struct list_head event_list; -}; - -/** - * dpu_power_resource_init() - initializes the dpu power handle - * @pdev: platform device to search the power resources - * @pdata: power handle to store the power resources - * - * Return: error code. - */ -int dpu_power_resource_init(struct platform_device *pdev, - struct dpu_power_handle *pdata); - -/** - * dpu_power_resource_deinit() - release the dpu power handle - * @pdev: platform device for power resources - * @pdata: power handle containing the resources - * - * Return: error code. - */ -void dpu_power_resource_deinit(struct platform_device *pdev, - struct dpu_power_handle *pdata); - -/** - * dpu_power_client_create() - create the client on power handle - * @pdata: power handle containing the resources - * @client_name: new client name for registration - * - * Return: error code. - */ -struct dpu_power_client *dpu_power_client_create(struct dpu_power_handle *pdata, - char *client_name); - -/** - * dpu_power_client_destroy() - destroy the client on power handle - * @pdata: power handle containing the resources - * @client_name: new client name for registration - * - * Return: none - */ -void dpu_power_client_destroy(struct dpu_power_handle *phandle, - struct dpu_power_client *client); - -/** - * dpu_power_resource_enable() - enable/disable the power resources - * @pdata: power handle containing the resources - * @client: client information to enable/disable its vote - * @enable: boolean request for enable/disable - * - * Return: error code. - */ -int dpu_power_resource_enable(struct dpu_power_handle *pdata, - struct dpu_power_client *pclient, bool enable); - -/** - * dpu_power_data_bus_state_update() - update data bus state - * @pdata: power handle containing the resources - * @enable: take enable vs disable path - * - * Return: error code. - */ -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, - bool enable); - -/** - * dpu_power_data_bus_set_quota() - set data bus quota for power client - * @phandle: power handle containing the resources - * @client: client information to set quota - * @bus_client: real-time or non-real-time bus client - * @bus_id: identifier of data bus, see DPU_POWER_HANDLE_DBUS_ID - * @ab_quota: arbitrated bus bandwidth - * @ib_quota: instantaneous bus bandwidth - * - * Return: zero if success, or error code otherwise - */ -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, - struct dpu_power_client *pclient, - int bus_client, u32 bus_id, - u64 ab_quota, u64 ib_quota); - -/** - * dpu_power_data_bus_bandwidth_ctrl() - control data bus bandwidth enable - * @phandle: power handle containing the resources - * @client: client information to bandwidth control - * @enable: true to enable bandwidth for data base - * - * Return: none - */ -void dpu_power_data_bus_bandwidth_ctrl(struct dpu_power_handle *phandle, - struct dpu_power_client *pclient, int enable); - -/** - * dpu_power_handle_register_event - register a callback function for an event. - * Clients can register for multiple events with a single register. - * Any block with access to phandle can register for the event - * notification. - * @phandle: power handle containing the resources - * @event_type: event type to register; refer DPU_POWER_HANDLE_EVENT_* - * @cb_fnc: pointer to desired callback function - * @usr: user pointer to pass to callback on event trigger - * - * Return: event pointer if success, or error code otherwise - */ -struct dpu_power_event *dpu_power_handle_register_event( - struct dpu_power_handle *phandle, - u32 event_type, void (*cb_fnc)(u32 event_type, void *usr), - void *usr, char *client_name); -/** - * dpu_power_handle_unregister_event - unregister callback for event(s) - * @phandle: power handle containing the resources - * @event: event pointer returned after power handle register - */ -void dpu_power_handle_unregister_event(struct dpu_power_handle *phandle, - struct dpu_power_event *event); - -/** - * dpu_power_handle_get_dbus_name - get name of given data bus identifier - * @bus_id: data bus identifier - * Return: Pointer to name string if success; NULL otherwise - */ -const char *dpu_power_handle_get_dbus_name(u32 bus_id); - -#endif /* _DPU_POWER_HANDLE_H_ */ diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 5c267cd..60b6919 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -340,7 +340,6 @@ static int msm_drm_uninit(struct device *dev) component_unbind_all(dev, ddev);

#ifdef CONFIG_DRM_MSM_DPU - dpu_power_resource_deinit(pdev, &priv->phandle); dpu_dbg_destroy(); #endif

@@ -519,12 +518,6 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) drm_mode_config_init(ddev);

#ifdef CONFIG_DRM_MSM_DPU - ret = dpu_power_resource_init(pdev, &priv->phandle); - if (ret) { - pr_err("dpu power resource init failed\n"); - goto power_init_fail; - } - ret = dpu_dbg_init(&pdev->dev); if (ret) { dev_err(dev, "failed to init dpu dbg: %d\n", ret); @@ -733,8 +726,6 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) #ifdef CONFIG_DRM_MSM_DPU dpu_dbg_destroy(); dbg_init_fail: - dpu_power_resource_deinit(pdev, &priv->phandle); -power_init_fail: #endif if (mdss && mdss->funcs) mdss->funcs->destroy(ddev); diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index f9ae96f..27a73a8 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -46,8 +46,6 @@ #include <drm/msm_drm.h> #include <drm/drm_gem.h>

-#include "dpu_power_handle.h" - #define GET_MAJOR_REV(rev) ((rev) >> 28) #define GET_MINOR_REV(rev) (((rev) >> 16) & 0xFFF) #define GET_STEP_REV(rev) ((rev) & 0xFFFF) @@ -375,8 +373,6 @@ struct msm_drm_private {

struct msm_kms *kms;

- struct dpu_power_handle phandle; - /* subordinate devices, if present: */ struct platform_device *gpu_pdev;