On 2017-12-31 10:17 AM, Alex Deucher wrote:

On Fri, Dec 29, 2017 at 6:11 AM, Daniel Drake drake@endlessm.com wrote:

...

From: Yue Hin Lau Yuehin.Lau@amd.com

Signed-off-by: Yue Hin Lau Yuehin.Lau@amd.com Reviewed-by: Eric Bernstein Eric.Bernstein@amd.com Acked-by: Harry Wentland harry.wentland@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com [drake@endlessm.com: backport to 4.15] Signed-off-by: Daniel Drake drake@endlessm.com

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drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h | 2 +- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c | 6 ++---- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 ++ drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-)

Testing Acer Aspire TC-380 engineering sample (Raven Ridge), the display comes up with an excessively green tint. This patch (from amd-staging-drm-next) solves the issue. Can it be included in Linux 4.15?

Looks ok to me. Unless Harry or Leo have any objections, I'll add it to my queue.

No objections. Thanks, Daniel.

Harry

Thanks!

Alex

...

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h index a9782b1aba47..34daf895f848 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h @@ -1360,7 +1360,7 @@ void dpp1_cm_set_output_csc_adjustment(

void dpp1_cm_set_output_csc_default( struct dpp *dpp_base,

•           const struct default_adjustment *default_adjust);
  

•           enum dc_color_space colorspace);
  
  

void dpp1_cm_set_gamut_remap( struct dpp *dpp, diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c index 40627c244bf5..ed1216b53465 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c @@ -225,14 +225,13 @@ void dpp1_cm_set_gamut_remap(

void dpp1_cm_set_output_csc_default( struct dpp *dpp_base,

•           const struct default_adjustment *default_adjust)
  

•           enum dc_color_space colorspace)
  

{

    struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);
    uint32_t ocsc_mode = 0;

•   if (default_adjust != NULL) {
  

•           switch (default_adjust->out_color_space) {
  

•   switch (colorspace) {
            case COLOR_SPACE_SRGB:
            case COLOR_SPACE_2020_RGB_FULLRANGE:
                    ocsc_mode = 0;
  

@@ -253,7 +252,6 @@ void dpp1_cm_set_output_csc_default( case COLOR_SPACE_UNKNOWN: default: break;

•           }
    }
  
    REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode);
  

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 961ad5c3b454..05dc01e54531 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -2097,6 +2097,8 @@ static void program_csc_matrix(struct pipe_ctx *pipe_ctx, tbl_entry.color_space = color_space; //tbl_entry.regval = matrix; pipe_ctx->plane_res.dpp->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.dpp, &tbl_entry);

•   } else {
  

•           pipe_ctx->plane_res.dpp->funcs->opp_set_csc_default(pipe_ctx->plane_res.dpp, colorspace);
    }
  

} static bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx) diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h index 83a68460edcd..9420dfb94d39 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h @@ -64,7 +64,7 @@ struct dpp_funcs {

    void (*opp_set_csc_default)(
            struct dpp *dpp,

•           const struct default_adjustment *default_adjust);
  

•           enum dc_color_space colorspace);
  
    void (*opp_set_csc_adjustment)(
            struct dpp *dpp,
  

-- 2.14.1

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