On x64 we get:
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:751:10: warning: conversion from 'long unsigned int' to 'unsigned int' changes value from '18446744073709551613' to '4294967293' [-Woverflow]
The registers are 32 bit, so fix by casting to u32.
Fixes: fb43aa0acdfd ("drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge") Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com Reported-by: Stephen Rothwell sfr@canb.auug.org.au Reviewed-by: Swapnil Jakhade sjakhade@cadence.com Acked-by: Laurent Pinchart laurent.pinchart@ideasonboard.com ---
v2:
No changes to code, added tags.
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c index 621ebdbff8a3..d0c65610ebb5 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c @@ -748,7 +748,7 @@ static int cdns_mhdp_fw_activate(const struct firmware *fw, * bridge should already be detached. */ if (mhdp->bridge_attached) - writel(~CDNS_APB_INT_MASK_SW_EVENT_INT, + writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);
spin_unlock(&mhdp->start_lock); @@ -1689,7 +1689,7 @@ static int cdns_mhdp_attach(struct drm_bridge *bridge,
/* Enable SW event interrupts */ if (hw_ready) - writel(~CDNS_APB_INT_MASK_SW_EVENT_INT, + writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);
return 0; @@ -2122,7 +2122,7 @@ static void cdns_mhdp_bridge_hpd_enable(struct drm_bridge *bridge)
/* Enable SW event interrupts */ if (mhdp->bridge_attached) - writel(~CDNS_APB_INT_MASK_SW_EVENT_INT, + writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK); }
Hi Dave,
Can you pick this up to drm-next? Fixes the x64 build warnings for the recent cdns-mhdp-5.10 pull.
Tomi
On 29/09/2020 12:19, Tomi Valkeinen wrote:
On x64 we get:
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:751:10: warning: conversion from 'long unsigned int' to 'unsigned int' changes value from '18446744073709551613' to '4294967293' [-Woverflow]
The registers are 32 bit, so fix by casting to u32.
Fixes: fb43aa0acdfd ("drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge") Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com Reported-by: Stephen Rothwell sfr@canb.auug.org.au Reviewed-by: Swapnil Jakhade sjakhade@cadence.com Acked-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
v2:
No changes to code, added tags.
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c index 621ebdbff8a3..d0c65610ebb5 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c @@ -748,7 +748,7 @@ static int cdns_mhdp_fw_activate(const struct firmware *fw, * bridge should already be detached. */ if (mhdp->bridge_attached)
writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);spin_unlock(&mhdp->start_lock);
@@ -1689,7 +1689,7 @@ static int cdns_mhdp_attach(struct drm_bridge *bridge,
/* Enable SW event interrupts */ if (hw_ready)
writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);return 0;
@@ -2122,7 +2122,7 @@ static void cdns_mhdp_bridge_hpd_enable(struct drm_bridge *bridge)
/* Enable SW event interrupts */ if (mhdp->bridge_attached)
writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);}
On Thu, Oct 01, 2020 at 12:57:46PM +0300, Tomi Valkeinen wrote:
Hi Dave,
Can you pick this up to drm-next? Fixes the x64 build warnings for the recent cdns-mhdp-5.10 pull.
Applied, hopefully that's fast enough before sfr does the next round of linux-next. -Daniel
Tomi
On 29/09/2020 12:19, Tomi Valkeinen wrote:
On x64 we get:
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:751:10: warning: conversion from 'long unsigned int' to 'unsigned int' changes value from '18446744073709551613' to '4294967293' [-Woverflow]
The registers are 32 bit, so fix by casting to u32.
Fixes: fb43aa0acdfd ("drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge") Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com Reported-by: Stephen Rothwell sfr@canb.auug.org.au Reviewed-by: Swapnil Jakhade sjakhade@cadence.com Acked-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
v2:
No changes to code, added tags.
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c index 621ebdbff8a3..d0c65610ebb5 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c @@ -748,7 +748,7 @@ static int cdns_mhdp_fw_activate(const struct firmware *fw, * bridge should already be detached. */ if (mhdp->bridge_attached)
writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);spin_unlock(&mhdp->start_lock);
@@ -1689,7 +1689,7 @@ static int cdns_mhdp_attach(struct drm_bridge *bridge,
/* Enable SW event interrupts */ if (hw_ready)
writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);return 0;
@@ -2122,7 +2122,7 @@ static void cdns_mhdp_bridge_hpd_enable(struct drm_bridge *bridge)
/* Enable SW event interrupts */ if (mhdp->bridge_attached)
writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
writel(~(u32)CDNS_APB_INT_MASK_SW_EVENT_INT, mhdp->regs + CDNS_APB_INT_MASK);}
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