v6: * Added Acked-by and Reviewed-By tags * Rebased on top of 4.0-rc1 * Added patch that marks the WiFi card as powered during suspend
v5: * Moved to use gpio-restart for reboots, had to make tegra_pmc_restart a notification handler
v4: * Added support for the system reset GPIO, for proper reboots * Moved out changes to ASOC to their own series, as requested by Mark Brown * Added patch to reset the SOR, to make sure it's in a known state * Changed nvidia,model property of the sound nodes to GoogleNyanBig and GoogleNyanBlaze so they can be told apart in userspace
v3: * Added bindings for the LTN140AT29 panel * Removed the delay in pwrseq, as what was actually needed was to add a dependency on the power supplies of the host * Uses the pinmux for the Blaze as generated by tegra-pinmux-scripts * Uses the pinmux for the Big as in the last patch from Simon Glass
Hello,
this series adds support for the Tegra-based HP Chromebook 14 (aka nyan blaze), which is very similar to the Acer Chromebook 13 (aka nyan big). Because they both include tegra124-nyan.dtsi, some improvements to Blaze support have also benefitted the Big. I have tested that USB2, the panels, HDMI, the trackpad, Wifi and sound work on both.
The leaf DTs contain the whole pinmux configuration as generated by tegra-pinmux-scripts. I chose to not put the common configuration in the common dtsi so we can paste the output as is and be sure that the kernel doesn't diverge from the canonical data.
These patches are based on top of 4.0-rc1.
http://cgit.collabora.com/git/user/tomeu/linux.git/log/?h=nyan-v6
Regards,
Tomeu
David Riley (1): soc/tegra: pmc: move to using a restart handler
Stéphane Marchesin (1): drm/panel: add support for Samsung LTN140AT29 panel
Tomeu Vizoso (10): ARM: tegra: Change model of sound card in Nyan Big ARM: tegra: Move out nyan-generic parts out from the nyan-big DT ARM: tegra: Add DTS for the nyan-blaze board ARM: tegra: Add node for trackpad in Nyan boards ARM: tegra: Use pwrseq-simple for the wifi in Nyan ARM: tegra: Use the generated pinmux data ARM: tegra: Set spi-max-frequency property to flash node drm/tegra: Reset the SOR on probe ARM: tegra: Add gpio-restart node ARM: tegra: The WiFi card is kept powered during suspend
.../bindings/panel/samsung,ltn140at29-301.txt | 7 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/tegra124-nyan-big.dts | 2119 +++++++++++--------- arch/arm/boot/dts/tegra124-nyan-blaze.dts | 1332 ++++++++++++ arch/arm/boot/dts/tegra124-nyan.dtsi | 695 +++++++ arch/arm/mach-tegra/tegra.c | 1 - drivers/gpu/drm/panel/panel-simple.c | 26 + drivers/gpu/drm/tegra/sor.c | 14 + drivers/soc/tegra/pmc.c | 31 +- 9 files changed, 3254 insertions(+), 972 deletions(-) create mode 100644 Documentation/devicetree/bindings/panel/samsung,ltn140at29-301.txt create mode 100644 arch/arm/boot/dts/tegra124-nyan-blaze.dts create mode 100644 arch/arm/boot/dts/tegra124-nyan.dtsi
From: Stéphane Marchesin marcheu@chromium.org
This panel is used by the Nyan Blaze board and supported by the simple-panel driver.
Signed-off-by: Stéphane Marchesin marcheu@chromium.org [tomeu.vizoso@collabora.com: add device tree binding document] Signed-off-by: Tomeu Vizoso tomeu.vizoso@collabora.com Acked-by: Stephen Warren swarren@nvidia.com Reviewed-by: Alexandre Courbot acourbot@nvidia.com --- .../bindings/panel/samsung,ltn140at29-301.txt | 7 ++++++ drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++ 2 files changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/panel/samsung,ltn140at29-301.txt
diff --git a/Documentation/devicetree/bindings/panel/samsung,ltn140at29-301.txt b/Documentation/devicetree/bindings/panel/samsung,ltn140at29-301.txt new file mode 100644 index 0000000..e7f969d --- /dev/null +++ b/Documentation/devicetree/bindings/panel/samsung,ltn140at29-301.txt @@ -0,0 +1,7 @@ +Samsung Electronics 14" WXGA (1366x768) TFT LCD panel + +Required properties: +- compatible: should be "samsung,ltn140at29-301" + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 39806c3..2da2285 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -779,6 +779,29 @@ static const struct panel_desc samsung_ltn101nt05 = { }, };
+static const struct drm_display_mode samsung_ltn140at29_301_mode = { + .clock = 76300, + .hdisplay = 1366, + .hsync_start = 1366 + 64, + .hsync_end = 1366 + 64 + 48, + .htotal = 1366 + 64 + 48 + 128, + .vdisplay = 768, + .vsync_start = 768 + 2, + .vsync_end = 768 + 2 + 5, + .vtotal = 768 + 2 + 5 + 17, + .vrefresh = 60, +}; + +static const struct panel_desc samsung_ltn140at29_301 = { + .modes = &samsung_ltn140at29_301_mode, + .num_modes = 1, + .bpc = 6, + .size = { + .width = 320, + .height = 187, + }, +}; + static const struct of_device_id platform_of_match[] = { { .compatible = "auo,b101aw03", @@ -841,6 +864,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "samsung,ltn101nt05", .data = &samsung_ltn101nt05, }, { + .compatible = "samsung,ltn140at29-301", + .data = &samsung_ltn140at29_301, + }, { /* sentinel */ } };
As there isn't a way for the firmware on the Nyan chromebooks to hand over the display to the kernel.
Signed-off-by: Tomeu Vizoso tomeu.vizoso@collabora.com Acked-by: Stephen Warren swarren@nvidia.com Reviewed-by: Alexandre Courbot acourbot@nvidia.com --- drivers/gpu/drm/tegra/sor.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index 2afe478..e6caacc 100644 --- a/drivers/gpu/drm/tegra/sor.c +++ b/drivers/gpu/drm/tegra/sor.c @@ -1458,6 +1458,20 @@ static int tegra_sor_probe(struct platform_device *pdev)
mutex_init(&sor->lock);
+ err = reset_control_assert(sor->rst); + if (err < 0) { + dev_err(&pdev->dev, "failed to assert SOR reset: %d\n", err); + return err; + } + + msleep(20); + + err = reset_control_deassert(sor->rst); + if (err < 0) { + dev_err(&pdev->dev, "failed to deassert SOR reset: %d\n", err); + return err; + } + err = host1x_client_register(&sor->client); if (err < 0) { dev_err(&pdev->dev, "failed to register host1x client: %d\n",
On Wed, Mar 18, 2015 at 10:52:24AM +0100, Tomeu Vizoso wrote:
As there isn't a way for the firmware on the Nyan chromebooks to hand over the display to the kernel.
Perhaps this should be more explicit. I'm assuming this somehow breaks on Nyan for you because we try to reprogram the SOR from an already initialized state and that doesn't actually work? Your current commit message doesn't make this sound like a fix for an actual problem.
If you do this in ->probe() there's a potentially long time where the screen will remain black. A better location for this is probably in the tegra_sor_init() function. That puts it closer to where the output is reinitialized and potentially reduces the time where no display is available.
Also it is a more logical place for this code, since the clocks are also enabled in tegra_sor_init(). Technically resets on Tegra are synchronous and therefore the reset should happen across the clk_prepare_enable() call of the primary module clock. So I'd expect something like this:
err = reset_control_assert(sor->rst); ...
err = clk_prepare_enable(sor->clk); ...
/* sleep */
err = reset_control_deassert(sor->rst); ...
Where sleep can probably be significantly shorter than 20 ms. I think the documentation says that 2 us are typically enough. That said, I'm fine with leaving in 20 ms, it shouldn't matter much in the overall boot-time.
Also, since this will need to be revisited once we have proper hand-over from firmware to kernel, do you mind adding a comment along these lines:
/* * XXX: Remove this reset once proper hand-over from firmware to * kernel is possible. */
?
Thanks, Thierry
As there isn't a way for the firmware on the Nyan chromebooks to hand over the display to the kernel, and the kernel isn't redoing the whole configuration at present.
With this patch, the SOR is brought to a known state and we get correct display on every boot.
Signed-off-by: Tomeu Vizoso tomeu.vizoso@collabora.com
---
v7: * Move the reset to the host1x_client_ops.init callback as suggested by Thierry * Reduced the time during which the reset line is asserted from 20ms to 2ms --- drivers/gpu/drm/tegra/sor.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index 2afe478..027a25d22 100644 --- a/drivers/gpu/drm/tegra/sor.c +++ b/drivers/gpu/drm/tegra/sor.c @@ -1354,12 +1354,30 @@ static int tegra_sor_init(struct host1x_client *client) } }
+ /* + * XXX: Remove this reset once proper hand-over from firmware to + * kernel is possible. + */ + err = reset_control_assert(sor->rst); + if (err < 0) { + dev_err(sor->dev, "failed to assert SOR reset: %d\n", err); + return err; + } + err = clk_prepare_enable(sor->clk); if (err < 0) { dev_err(sor->dev, "failed to enable clock: %d\n", err); return err; }
+ msleep(2); + + err = reset_control_deassert(sor->rst); + if (err < 0) { + dev_err(sor->dev, "failed to deassert SOR reset: %d\n", err); + return err; + } + err = clk_prepare_enable(sor->clk_safe); if (err < 0) return err;
25.03.2015 11:59, Tomeu Vizoso пишет:
According to kernel doc, you should use usleep_range() instead of msleep().
https://www.kernel.org/doc/Documentation/timers/timers-howto.txt
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