[PATCH AUTOSEL 5.17 13/23] drm/amd/display: undo clearing of z10 related function pointers
From: Eric Yang Eric.Yang2@amd.com
[ Upstream commit 9b9bd3f640640f94272a461b2dfe558f91b322c5 ]
[Why] Z10 and S0i3 have some shared path. Previous code clean up , incorrectly removed these pointers, which breaks s0i3 restore
[How] Do not clear the function pointers based on Z10 disable.
Reviewed-by: Nicholas Kazlauskas Nicholas.Kazlauskas@amd.com Acked-by: Pavle Kotarac Pavle.Kotarac@amd.com Signed-off-by: Eric Yang Eric.Yang2@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c index d7559e5a99ce..e708f07fe75a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c @@ -153,9 +153,4 @@ void dcn31_hw_sequencer_construct(struct dc *dc) dc->hwss.init_hw = dcn20_fpga_init_hw; dc->hwseq->funcs.init_pipes = NULL; } - if (dc->debug.disable_z10) { - /*hw not support z10 or sw disable it*/ - dc->hwss.z10_restore = NULL; - dc->hwss.z10_save_init = NULL; - } }
Hi,
Is S0i3 verified for DCN 3.1.6 with this?
BR, Chandan V N
From: Eric Yang Eric.Yang2@amd.com
[ Upstream commit 9b9bd3f640640f94272a461b2dfe558f91b322c5 ]
[Why] Z10 and S0i3 have some shared path. Previous code clean up , incorrectly removed these pointers, which breaks s0i3 restore
[How] Do not clear the function pointers based on Z10 disable.
Reviewed-by: Nicholas Kazlauskas Nicholas.Kazlauskas@amd.com Acked-by: Pavle Kotarac Pavle.Kotarac@amd.com Signed-off-by: Eric Yang Eric.Yang2@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Sasha Levin sashal@kernel.org
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c index d7559e5a99ce..e708f07fe75a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c @@ -153,9 +153,4 @@ void dcn31_hw_sequencer_construct(struct dc *dc) dc->hwss.init_hw = dcn20_fpga_init_hw; dc->hwseq->funcs.init_pipes = NULL; }
- if (dc->debug.disable_z10) {
/*hw not support z10 or sw disable it*/dc->hwss.z10_restore = NULL;dc->hwss.z10_save_init = NULL;- }
}
2.35.1
[Public]
DCN 3.1.6 needs it, but I don't know if yellow carp needs it. I think this is only applicable to kernel 5.18. @Kazlauskas, Nicholasmailto:Nicholas.Kazlauskas@amd.com can you verify?
Alex
________________________________ From: VURDIGERENATARAJ, CHANDAN CHANDAN.VURDIGERENATARAJ@amd.com Sent: Wednesday, May 18, 2022 8:36 AM To: Sasha Levin sashal@kernel.org; linux-kernel@vger.kernel.org linux-kernel@vger.kernel.org; stable@vger.kernel.org stable@vger.kernel.org Cc: Yang, Eric Eric.Yang2@amd.com; haonan.wang2@amd.com haonan.wang2@amd.com; Li, Sun peng (Leo) Sunpeng.Li@amd.com; Pan, Xinhui Xinhui.Pan@amd.com; Siqueira, Rodrigo Rodrigo.Siqueira@amd.com; amd-gfx@lists.freedesktop.org amd-gfx@lists.freedesktop.org; Koenig, Christian Christian.Koenig@amd.com; airlied@linux.ie airlied@linux.ie; dri-devel@lists.freedesktop.org dri-devel@lists.freedesktop.org; daniel@ffwll.ch daniel@ffwll.ch; wyatt.wood@amd.com wyatt.wood@amd.com; Deucher, Alexander Alexander.Deucher@amd.com; mikita.lipski@amd.com mikita.lipski@amd.com; Wentland, Harry Harry.Wentland@amd.com; Kazlauskas, Nicholas Nicholas.Kazlauskas@amd.com; Kotarac, Pavle Pavle.Kotarac@amd.com Subject: RE: [PATCH AUTOSEL 5.17 13/23] drm/amd/display: undo clearing of z10 related function pointers
Hi,
Is S0i3 verified for DCN 3.1.6 with this?
BR, Chandan V N
From: Eric Yang Eric.Yang2@amd.com
[ Upstream commit 9b9bd3f640640f94272a461b2dfe558f91b322c5 ]
[Why] Z10 and S0i3 have some shared path. Previous code clean up , incorrectly removed these pointers, which breaks s0i3 restore
[How] Do not clear the function pointers based on Z10 disable.
Reviewed-by: Nicholas Kazlauskas Nicholas.Kazlauskas@amd.com Acked-by: Pavle Kotarac Pavle.Kotarac@amd.com Signed-off-by: Eric Yang Eric.Yang2@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Sasha Levin sashal@kernel.org
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 ----- 1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c index d7559e5a99ce..e708f07fe75a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c @@ -153,9 +153,4 @@ void dcn31_hw_sequencer_construct(struct dc *dc) dc->hwss.init_hw = dcn20_fpga_init_hw; dc->hwseq->funcs.init_pipes = NULL; }
if (dc->debug.disable_z10) {/*hw not support z10 or sw disable it*/dc->hwss.z10_restore = NULL;dc->hwss.z10_save_init = NULL;}}
2.35.1
dri-devel@lists.freedesktop.org
-
Deucher, Alexander -
Sasha Levin -
VURDIGERENATARAJ, CHANDAN