https://bugs.freedesktop.org/show_bug.cgi?id=100105

Bug ID: 100105 Summary: Make Theano OpenCL support work on Clover and RadeonSI Product: Mesa Version: git Hardware: Other OS: All Status: NEW Severity: major Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel@lists.freedesktop.org Reporter: vedran@miletic.net QA Contact: dri-devel@lists.freedesktop.org

$ DEVICE="opencl0:0" python -c "import pygpu;pygpu.test()" pygpu is installed in /usr/lib64/python2.7/site-packages/pygpu-0.6.2-py2.7-linux-x86_64.egg/pygpu NumPy version 1.11.2 NumPy relaxed strides checking option: False NumPy is installed in /usr/lib64/python2.7/site-packages/numpy Python version 2.7.13 (default, Jan 12 2017, 17:59:37) [GCC 6.3.1 20161221 (Red Hat 6.3.1-1)] nose version 1.3.7 *** Testing for AMD FIJI (DRM 3.8.0 / 4.9.13-200.fc25.x86_64, LLVM 5.0.0)

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AN INTERNAL KERNEL BUILD ERROR OCCURRED! device name = AMD FIJI (DRM 3.8.0 / 4.9.13-200.fc25.x86_64, LLVM 5.0.0) error = -43 memory pattern = Register accumulation based swap, computing kernel generator Subproblem dimensions: dims[0].itemY = 32, dims[0].itemX = 32, dims[0].y = 32, dims[0].x = 32, dims[0].bwidth = 64; ; dims[1].itemY = 4, dims[1].itemX = 4, dims[1].y = 4, dims[1].x = 4, dims[1].bwidth = 8; ; Parallelism granularity: pgran->wgDim = 1, pgran->wgSize[0] = 64, pgran->wgSize[1] = 1, pgran->wfSize = 64 Kernel extra flags: 369130144 Source:

#ifdef DOUBLE_PRECISION #ifdef cl_khr_fp64 #pragma OPENCL EXTENSION cl_khr_fp64 : enable #else #pragma OPENCL EXTENSION cl_amd_fp64 : enable #endif #endif

__kernel void Sdot_kernel( __global float *_X, __global float *_Y, __global float *scratchBuff, uint N, uint offx, int incx, uint offy, int incy, int doConj ) { __global float *X = _X + offx; __global float *Y = _Y + offy; float dotP = (float) 0.0;

if ( incx < 0 ) { X = X + (N - 1) * abs(incx); } if ( incy < 0 ) { Y = Y + (N - 1) * abs(incy); }

int gOffset; for( gOffset=(get_global_id(0) * 4); (gOffset + 4 - 1)<N; gOffset+=( get_global_size(0) * 4 ) ) { float4 vReg1, vReg2, res;

#ifdef INCX_NONUNITY vReg1 = (float4)( (X + (gOffset*incx))[0 + ( incx * 0)], (X + (gOffset*incx))[0 + ( incx * 1)], (X + (gOffset*incx))[0 + ( incx * 2)], (X + (gOffset*incx))[0 + ( incx * 3)]); #else vReg1 = vload4( 0, (__global float *) (X + gOffset) ); #endif

#ifdef INCY_NONUNITY vReg2 = (float4)( (Y + (gOffset*incy))[0 + ( incy * 0)], (Y + (gOffset*incy))[0 + ( incy * 1)], (Y + (gOffset*incy))[0 + ( incy * 2)], (Y + (gOffset*incy))[0 + ( incy * 3)]); #else vReg2 = vload4( 0, (__global float *) (Y + gOffset) ); #endif

; res = vReg1 * vReg2 ; dotP += res .S0 + res .S1 + res .S2 + res .S3; ; // Add-up elements in the vector to give a scalar }

// Loop for the last thread to handle the tail part of the vector // Using the same gOffset used above for( ; gOffset<N; gOffset++ ) { float sReg1, sReg2, res; sReg1 = X[gOffset * incx]; sReg2 = Y[gOffset * incy];

; res = sReg1 * sReg2 ; dotP = dotP + res ; }

// Note: this has to be called outside any if-conditions- because REDUCTION uses barrier // dotP of work-item 0 will have the final reduced item of the work-group __local float viraW [ 64 ]; uint kFbwL = get_local_id(0); viraW [ kFbwL ] = dotP ; barrier(CLK_LOCAL_MEM_FENCE);

if( kFbwL < 32 ) { viraW [ kFbwL ] = viraW [ kFbwL ] + viraW [ kFbwL + 32 ]; } barrier(CLK_LOCAL_MEM_FENCE);

if( kFbwL < 16 ) { viraW [ kFbwL ] = viraW [ kFbwL ] + viraW [ kFbwL + 16 ]; } barrier(CLK_LOCAL_MEM_FENCE);

if( kFbwL < 8 ) { viraW [ kFbwL ] = viraW [ kFbwL ] + viraW [ kFbwL + 8 ]; } barrier(CLK_LOCAL_MEM_FENCE);

if( kFbwL < 4 ) { viraW [ kFbwL ] = viraW [ kFbwL ] + viraW [ kFbwL + 4 ]; } barrier(CLK_LOCAL_MEM_FENCE);

if( kFbwL < 2 ) { viraW [ kFbwL ] = viraW [ kFbwL ] + viraW [ kFbwL + 2 ]; } barrier(CLK_LOCAL_MEM_FENCE);

if( kFbwL == 0 ) { dotP = viraW [0] + viraW [1]; }

if( (get_local_id(0)) == 0 ) { scratchBuff[ get_group_id(0) ] = dotP; } }

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Build log:

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Segmentation fault (core dumped)