On Thu, Dec 09, 2021 at 03:25:03PM +0200, Andi Shyti wrote:

From: Michał Winiarski michal.winiarski@intel.com

To allow further refactoring and abstract away the fact that GT is stored inside i915 private. No functional changes.

Signed-off-by: Michał Winiarski michal.winiarski@intel.com Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

Reviewed-by: Matt Roper matthew.d.roper@intel.com

---

drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 7 +------ drivers/gpu/drm/i915/i915_drv.h | 5 +++++ 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c index acc49c56a9f3..9db3dcbd917f 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c @@ -9,11 +9,6 @@ #include "intel_engine_pm.h" #include "intel_gt_buffer_pool.h"

-static struct intel_gt *to_gt(struct intel_gt_buffer_pool *pool) -{

• return container_of(pool, struct intel_gt, buffer_pool);

-}

static struct list_head * bucket_for_size(struct intel_gt_buffer_pool *pool, size_t sz) { @@ -141,7 +136,7 @@ static struct intel_gt_buffer_pool_node * node_create(struct intel_gt_buffer_pool *pool, size_t sz, enum i915_map_type type) {

• struct intel_gt *gt = to_gt(pool);

• struct intel_gt *gt = container_of(pool, struct intel_gt, buffer_pool); struct intel_gt_buffer_pool_node *node; struct drm_i915_gem_object *obj;

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ae7dc7862b5d..c6f34ac353ff 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1080,6 +1080,11 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev) return pci_get_drvdata(pdev); }

+static inline struct intel_gt *to_gt(struct drm_i915_private *i915) +{

• return &i915->gt;

+}

/* Simple iterator over all initialised engines */ #define for_each_engine(engine__, dev_priv__, id__) \ for ((id__) = 0; \ -- 2.34.1

On Thu, Dec 09, 2021 at 03:25:04PM +0200, Andi Shyti wrote:

From: Michał Winiarski michal.winiarski@intel.com

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Michał Winiarski michal.winiarski@intel.com Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

Reviewed-by: Matt Roper matthew.d.roper@intel.com

---

.../gpu/drm/i915/display/intel_atomic_plane.c | 4 ++-- drivers/gpu/drm/i915/display/intel_display.c | 18 +++++++++--------- drivers/gpu/drm/i915/display/intel_dpt.c | 2 +- drivers/gpu/drm/i915/display/intel_overlay.c | 2 +- .../gpu/drm/i915/display/skl_universal_plane.c | 2 +- 5 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 89005628cc3a..c2c512cd8ec0 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -819,7 +819,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane, * maximum clocks following a vblank miss (see do_rps_boost()). */ if (!state->rps_interactive) {

• intel_rps_mark_interactive(&dev_priv->gt.rps, true);
  

• intel_rps_mark_interactive(&to_gt(dev_priv)->rps, true);
  

  state->rps_interactive = true; }

@@ -853,7 +853,7 @@ intel_cleanup_plane_fb(struct drm_plane *plane, return;

if (state->rps_interactive) {

• intel_rps_mark_interactive(&dev_priv->gt.rps, false);
  

• intel_rps_mark_interactive(&to_gt(dev_priv)->rps, false);
  

  state->rps_interactive = false; }

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 128d4943a43b..b5cab57a26a6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -841,7 +841,7 @@ __intel_display_resume(struct drm_device *dev, static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv) { return (INTEL_INFO(dev_priv)->gpu_reset_clobbers_display &&

• intel_has_gpu_reset(&dev_priv->gt));
  

• intel_has_gpu_reset(to_gt(dev_priv)));
  

}

void intel_display_prepare_reset(struct drm_i915_private *dev_priv) @@ -860,14 +860,14 @@ void intel_display_prepare_reset(struct drm_i915_private *dev_priv) return;

/* We have a modeset vs reset deadlock, defensively unbreak it. */

• set_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags);

• set_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags); smp_mb__after_atomic();

• wake_up_bit(&dev_priv->gt.reset.flags, I915_RESET_MODESET);

• wake_up_bit(&to_gt(dev_priv)->reset.flags, I915_RESET_MODESET);

  if (atomic_read(&dev_priv->gpu_error.pending_fb_pin)) { drm_dbg_kms(&dev_priv->drm, "Modeset potentially stuck, unbreaking through wedging\n");

• intel_gt_set_wedged(&dev_priv->gt);
  

• intel_gt_set_wedged(to_gt(dev_priv));
  

  }

  /*

@@ -918,7 +918,7 @@ void intel_display_finish_reset(struct drm_i915_private *dev_priv) return;

/* reset doesn't touch the display */

• if (!test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))

• if (!test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags)) return;

  state = fetch_and_zero(&dev_priv->modeset_restore_state);

@@ -956,7 +956,7 @@ void intel_display_finish_reset(struct drm_i915_private *dev_priv) drm_modeset_acquire_fini(ctx); mutex_unlock(&dev->mode_config.mutex);

• clear_bit_unlock(I915_RESET_MODESET, &dev_priv->gt.reset.flags);

• clear_bit_unlock(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);

}

static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state) @@ -8564,19 +8564,19 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_stat for (;;) { prepare_to_wait(&intel_state->commit_ready.wait, &wait_fence, TASK_UNINTERRUPTIBLE);

• prepare_to_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
  

• prepare_to_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
  		      I915_RESET_MODESET),
  	&wait_reset, TASK_UNINTERRUPTIBLE);
  
  
  

  if (i915_sw_fence_done(&intel_state->commit_ready) ||

•     test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
  

•     test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
  break;
  
  

  schedule(); } finish_wait(&intel_state->commit_ready.wait, &wait_fence);

• finish_wait(bit_waitqueue(&dev_priv->gt.reset.flags,

• finish_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags, I915_RESET_MODESET), &wait_reset);

} diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c index 963ca7155b06..ce760402a89a 100644 --- a/drivers/gpu/drm/i915/display/intel_dpt.c +++ b/drivers/gpu/drm/i915/display/intel_dpt.c @@ -264,7 +264,7 @@ intel_dpt_create(struct intel_framebuffer *fb)

vm = &dpt->vm;

• vm->gt = &i915->gt;

• vm->gt = to_gt(i915); vm->i915 = i915; vm->dma = i915->drm.dev; vm->total = (size / sizeof(gen8_pte_t)) * I915_GTT_PAGE_SIZE;

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c index 7e3f5c6ca484..1a376e9a1ff3 100644 --- a/drivers/gpu/drm/i915/display/intel_overlay.c +++ b/drivers/gpu/drm/i915/display/intel_overlay.c @@ -1382,7 +1382,7 @@ void intel_overlay_setup(struct drm_i915_private *dev_priv) if (!HAS_OVERLAY(dev_priv)) return;

• engine = dev_priv->gt.engine[RCS0];

• engine = to_gt(dev_priv)->engine[RCS0]; if (!engine || !engine->kernel_context) return;

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index d5359cf3d270..93a385396512 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -1737,7 +1737,7 @@ static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj) { struct drm_i915_private *i915 = to_i915(obj->base.dev);

• return intel_pxp_key_check(&i915->gt.pxp, obj, false) == 0;

• return intel_pxp_key_check(&to_gt(i915)->pxp, obj, false) == 0;

}

static bool pxp_is_borked(struct drm_i915_gem_object *obj)

2.34.1

On Thu, Dec 09, 2021 at 03:25:05PM +0200, Andi Shyti wrote:

From: Michał Winiarski michal.winiarski@intel.com

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Michał Winiarski michal.winiarski@intel.com Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

Reviewed-by: Matt Roper matthew.d.roper@intel.com

---

drivers/gpu/drm/i915/gt/intel_engine_user.c | 2 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +- drivers/gpu/drm/i915/gt/intel_rps.c | 12 ++++++------ drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- drivers/gpu/drm/i915/gt/mock_engine.c | 10 +++++----- drivers/gpu/drm/i915/gt/selftest_context.c | 2 +- drivers/gpu/drm/i915/gt/selftest_engine.c | 2 +- drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 4 ++-- drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c | 4 ++-- drivers/gpu/drm/i915/gt/selftest_execlists.c | 6 +++--- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 8 ++++---- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +- drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +- drivers/gpu/drm/i915/gt/selftest_migrate.c | 4 ++-- drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +- drivers/gpu/drm/i915/gt/selftest_reset.c | 2 +- drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 4 ++-- drivers/gpu/drm/i915/gt/selftest_slpc.c | 6 +++--- drivers/gpu/drm/i915/gt/selftest_timeline.c | 6 +++--- drivers/gpu/drm/i915/gt/selftest_workarounds.c | 4 ++-- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 +- drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 2 +- drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c | 2 +- 23 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c index 8f8bea08e734..9ce85a845105 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_user.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c @@ -116,7 +116,7 @@ static void set_scheduler_caps(struct drm_i915_private *i915) disabled |= (I915_SCHEDULER_CAP_ENABLED | I915_SCHEDULER_CAP_PRIORITY);

• if (intel_uc_uses_guc_submission(&i915->gt.uc))
  

• if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))
  enabled |= I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP;
  
  

  for (i = 0; i < ARRAY_SIZE(map); i++) {

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c index cbc6d2b1fd9e..f5c8fd3911b0 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -1229,7 +1229,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *i915) { int ret;

• ret = ggtt_probe_hw(&i915->ggtt, &i915->gt);

• ret = ggtt_probe_hw(&i915->ggtt, to_gt(i915)); if (ret) return ret;

diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 07ff7ba7b2b7..36eb980d757e 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -2302,7 +2302,7 @@ unsigned long i915_read_mch_val(void) return 0;

with_intel_runtime_pm(&i915->runtime_pm, wakeref) {

• struct intel_ips *ips = &i915->gt.rps.ips;
  

• struct intel_ips *ips = &to_gt(i915)->rps.ips;
  
  

  spin_lock_irq(&mchdev_lock); chipset_val = __ips_chipset_val(ips);

@@ -2329,7 +2329,7 @@ bool i915_gpu_raise(void) if (!i915) return false;

• rps = &i915->gt.rps;

• rps = &to_gt(i915)->rps;

  spin_lock_irq(&mchdev_lock); if (rps->max_freq_softlimit < rps->max_freq)

@@ -2356,7 +2356,7 @@ bool i915_gpu_lower(void) if (!i915) return false;

• rps = &i915->gt.rps;

• rps = &to_gt(i915)->rps;

  spin_lock_irq(&mchdev_lock); if (rps->max_freq_softlimit > rps->min_freq)

@@ -2382,7 +2382,7 @@ bool i915_gpu_busy(void) if (!i915) return false;

• ret = i915->gt.awake;

• ret = to_gt(i915)->awake;

  drm_dev_put(&i915->drm); return ret;

@@ -2405,11 +2405,11 @@ bool i915_gpu_turbo_disable(void) if (!i915) return false;

• rps = &i915->gt.rps;

• rps = &to_gt(i915)->rps;

  spin_lock_irq(&mchdev_lock); rps->max_freq_softlimit = rps->min_freq;

• ret = !__gen5_rps_set(&i915->gt.rps, rps->min_freq);

• ret = !__gen5_rps_set(&to_gt(i915)->rps, rps->min_freq); spin_unlock_irq(&mchdev_lock);

  drm_dev_put(&i915->drm);

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 3113266c286e..ab3277a3d593 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -929,7 +929,7 @@ hsw_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) static void gen9_wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal) {

• const struct sseu_dev_info *sseu = &i915->gt.info.sseu;

• const struct sseu_dev_info *sseu = &to_gt(i915)->info.sseu; unsigned int slice, subslice; u32 mcr, mcr_mask;

diff --git a/drivers/gpu/drm/i915/gt/mock_engine.c b/drivers/gpu/drm/i915/gt/mock_engine.c index bb99fc03f503..a94b8d56c4bb 100644 --- a/drivers/gpu/drm/i915/gt/mock_engine.c +++ b/drivers/gpu/drm/i915/gt/mock_engine.c @@ -345,7 +345,7 @@ struct intel_engine_cs *mock_engine(struct drm_i915_private *i915, struct mock_engine *engine;

GEM_BUG_ON(id >= I915_NUM_ENGINES);

• GEM_BUG_ON(!i915->gt.uncore);

• GEM_BUG_ON(!to_gt(i915)->uncore);

  engine = kzalloc(sizeof(*engine) + PAGE_SIZE, GFP_KERNEL); if (!engine)

@@ -353,8 +353,8 @@ struct intel_engine_cs *mock_engine(struct drm_i915_private *i915,

/* minimal engine setup for requests */ engine->base.i915 = i915;

• engine->base.gt = &i915->gt;
• engine->base.uncore = i915->gt.uncore;

• engine->base.gt = to_gt(i915);
• engine->base.uncore = to_gt(i915)->uncore; snprintf(engine->base.name, sizeof(engine->base.name), "%s", name); engine->base.id = id; engine->base.mask = BIT(id);

@@ -377,8 +377,8 @@ struct intel_engine_cs *mock_engine(struct drm_i915_private *i915,

engine->base.release = mock_engine_release;

• i915->gt.engine[id] = &engine->base;
• i915->gt.engine_class[0][id] = &engine->base;

• to_gt(i915)->engine[id] = &engine->base;

• to_gt(i915)->engine_class[0][id] = &engine->base;

  /* fake hw queue */ spin_lock_init(&engine->hw_lock);

diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c index fa7b99a671dd..76fbae358072 100644 --- a/drivers/gpu/drm/i915/gt/selftest_context.c +++ b/drivers/gpu/drm/i915/gt/selftest_context.c @@ -442,7 +442,7 @@ int intel_context_live_selftests(struct drm_i915_private *i915) SUBTEST(live_active_context), SUBTEST(live_remote_context), };

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915);

  if (intel_gt_is_wedged(gt)) return 0;

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine.c b/drivers/gpu/drm/i915/gt/selftest_engine.c index 262764f6d90a..57fea9ea1705 100644 --- a/drivers/gpu/drm/i915/gt/selftest_engine.c +++ b/drivers/gpu/drm/i915/gt/selftest_engine.c @@ -12,7 +12,7 @@ int intel_engine_live_selftests(struct drm_i915_private *i915) live_engine_pm_selftests, NULL, };

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); typeof(*tests) *fn;

  for (fn = tests; *fn; fn++) {

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c index 64abf5feabfa..1b75f478d1b8 100644 --- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c @@ -361,10 +361,10 @@ int intel_engine_cs_perf_selftests(struct drm_i915_private *i915) SUBTEST(perf_mi_noop), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

}

static int intel_mmio_bases_check(void *arg) diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c index 6e6e4d747cca..273d440a53e3 100644 --- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c +++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c @@ -378,13 +378,13 @@ int intel_heartbeat_live_selftests(struct drm_i915_private *i915) int saved_hangcheck; int err;

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  saved_hangcheck = i915->params.enable_hangcheck; i915->params.enable_hangcheck = INT_MAX;

• err = intel_gt_live_subtests(tests, &i915->gt);

• err = intel_gt_live_subtests(tests, to_gt(i915));

  i915->params.enable_hangcheck = saved_hangcheck; return err;

diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c b/drivers/gpu/drm/i915/gt/selftest_execlists.c index b367ecfa42de..e10da897e07a 100644 --- a/drivers/gpu/drm/i915/gt/selftest_execlists.c +++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c @@ -4502,11 +4502,11 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915) SUBTEST(live_virtual_reset), };

• if (i915->gt.submission_method != INTEL_SUBMISSION_ELSP)

• if (to_gt(i915)->submission_method != INTEL_SUBMISSION_ELSP) return 0;

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c index 55c5cdb99f45..8bf62a5826cc 100644 --- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c @@ -193,10 +193,10 @@ int intel_gt_pm_live_selftests(struct drm_i915_private *i915) SUBTEST(live_gt_resume), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

}

int intel_gt_pm_late_selftests(struct drm_i915_private *i915) @@ -210,8 +210,8 @@ int intel_gt_pm_late_selftests(struct drm_i915_private *i915) SUBTEST(live_rc6_ctx_wa), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c index e5ad4d5a91c0..15d63435ec4d 100644 --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c @@ -2018,7 +2018,7 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_reset_evict_fence), SUBTEST(igt_handle_error), };

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); intel_wakeref_t wakeref; int err;

diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c index b0977a3b699b..618c905daa19 100644 --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c @@ -1847,5 +1847,5 @@ int intel_lrc_live_selftests(struct drm_i915_private *i915) if (!HAS_LOGICAL_RING_CONTEXTS(i915)) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c b/drivers/gpu/drm/i915/gt/selftest_migrate.c index e21787301bbd..f637691b5bcb 100644 --- a/drivers/gpu/drm/i915/gt/selftest_migrate.c +++ b/drivers/gpu/drm/i915/gt/selftest_migrate.c @@ -442,7 +442,7 @@ int intel_migrate_live_selftests(struct drm_i915_private *i915) SUBTEST(thread_global_copy), SUBTEST(thread_global_clear), };

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915);

  if (!gt->migrate.context) return 0;

@@ -658,7 +658,7 @@ int intel_migrate_perf_selftests(struct drm_i915_private *i915) SUBTEST(perf_clear_blt), SUBTEST(perf_copy_blt), };

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915);

  if (intel_gt_is_wedged(gt)) return 0;

diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c index 13d25bf2a94a..c1d861333c44 100644 --- a/drivers/gpu/drm/i915/gt/selftest_mocs.c +++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c @@ -451,5 +451,5 @@ int intel_mocs_live_selftests(struct drm_i915_private *i915) if (!get_mocs_settings(i915, &table)) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c index 7a50c9f4071b..8a873f6bda7f 100644 --- a/drivers/gpu/drm/i915/gt/selftest_reset.c +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c @@ -376,7 +376,7 @@ int intel_reset_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_atomic_reset), SUBTEST(igt_atomic_engine_reset), };

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915);

  if (!intel_has_gpu_reset(gt)) return 0;

diff --git a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c index 041954408d0f..70f9ac1ec2c7 100644 --- a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c +++ b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c @@ -291,8 +291,8 @@ int intel_ring_submission_live_selftests(struct drm_i915_private *i915) SUBTEST(live_ctx_switch_wa), };

• if (i915->gt.submission_method > INTEL_SUBMISSION_RING)

• if (to_gt(i915)->submission_method > INTEL_SUBMISSION_RING) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c index 9334bad131a2..b768cea5943d 100644 --- a/drivers/gpu/drm/i915/gt/selftest_slpc.c +++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c @@ -39,7 +39,7 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq) static int live_slpc_clamp_min(void *arg) { struct drm_i915_private *i915 = arg;

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); struct intel_guc_slpc *slpc = &gt->uc.guc.slpc; struct intel_rps *rps = &gt->rps; struct intel_engine_cs *engine;

@@ -166,7 +166,7 @@ static int live_slpc_clamp_min(void *arg) static int live_slpc_clamp_max(void *arg) { struct drm_i915_private *i915 = arg;

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); struct intel_guc_slpc *slpc; struct intel_rps *rps; struct intel_engine_cs *engine;

@@ -304,7 +304,7 @@ int intel_slpc_live_selftests(struct drm_i915_private *i915) SUBTEST(live_slpc_clamp_min), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_live_subtests(tests, i915);

diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c index d0b6a3afcf44..e2eb686a9763 100644 --- a/drivers/gpu/drm/i915/gt/selftest_timeline.c +++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c @@ -159,7 +159,7 @@ static int mock_hwsp_freelist(void *arg) INIT_RADIX_TREE(&state.cachelines, GFP_KERNEL); state.prng = I915_RND_STATE_INITIALIZER(i915_selftest.random_seed);

• state.gt = &i915->gt;

• state.gt = to_gt(i915);

  /*

  • Create a bunch of timelines and check that their HWSP do not overlap.

@@ -1416,8 +1416,8 @@ int intel_timeline_live_selftests(struct drm_i915_private *i915) SUBTEST(live_hwsp_rollover_user), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c index 962e91ba3be4..0287c2573c51 100644 --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c @@ -1387,8 +1387,8 @@ int intel_workarounds_live_selftests(struct drm_i915_private *i915) SUBTEST(live_engine_reset_workarounds), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index 22c1c12369f2..13b27b8ff74e 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -623,7 +623,7 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc) if (unlikely(ret < 0)) return ret;

• intel_guc_pm_intrmsk_enable(&i915->gt);

• intel_guc_pm_intrmsk_enable(to_gt(i915));

  slpc_get_rp_values(slpc);

diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c index fb0e4a7bd8ca..e8cd030137e5 100644 --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c @@ -115,7 +115,7 @@ int intel_guc_live_selftests(struct drm_i915_private *i915) static const struct i915_subtest tests[] = { SUBTEST(intel_guc_scrub_ctbs), };

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915);

  if (intel_gt_is_wedged(gt)) return 0;

diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c index 50953c8e8b53..1297ddbf7f88 100644 --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c +++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c @@ -167,7 +167,7 @@ int intel_guc_multi_lrc_live_selftests(struct drm_i915_private *i915) static const struct i915_subtest tests[] = { SUBTEST(intel_guc_multi_lrc_basic), };

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915);

  if (intel_gt_is_wedged(gt)) return 0;

-- 2.34.1

On Thu, Dec 09, 2021 at 03:25:06PM +0200, Andi Shyti wrote:

From: Michał Winiarski michal.winiarski@intel.com

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Michał Winiarski michal.winiarski@intel.com Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

Reviewed-by: Matt Roper matthew.d.roper@intel.com

---

drivers/gpu/drm/i915/gem/i915_gem_context.c | 22 ++++++++-------- drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 +-- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_phys.c | 6 +++-- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 6 ++--- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_throttle.c | 3 ++- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 12 ++++----- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 4 +-- .../i915/gem/selftests/i915_gem_client_blt.c | 2 +- .../drm/i915/gem/selftests/i915_gem_context.c | 10 +++---- .../drm/i915/gem/selftests/i915_gem_migrate.c | 2 +- .../drm/i915/gem/selftests/i915_gem_mman.c | 26 ++++++++++--------- 15 files changed, 55 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index 347dab952e90..cad3f0b2be9e 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -237,7 +237,7 @@ static int proto_context_set_persistence(struct drm_i915_private *i915, * colateral damage, and we should not pretend we can by * exposing the interface. */

• if (!intel_has_reset_engine(&i915->gt))
  

• if (!intel_has_reset_engine(to_gt(i915)))
  return -ENODEV;
  
  

  pc->user_flags &= ~BIT(UCONTEXT_PERSISTENCE);

@@ -254,7 +254,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,

if (!protected) { pc->uses_protected_content = false;

• } else if (!intel_pxp_is_enabled(&i915->gt.pxp)) {

• } else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) { ret = -ENODEV; } else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) || !(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {

@@ -268,8 +268,8 @@ static int proto_context_set_protected(struct drm_i915_private *i915, */ pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);

• if (!intel_pxp_is_active(&i915->gt.pxp))
  

• 	ret = intel_pxp_start(&i915->gt.pxp);
  

• if (!intel_pxp_is_active(&to_gt(i915)->pxp))
  

• 	ret = intel_pxp_start(&to_gt(i915)->pxp);
  

  }

  return ret;

@@ -571,7 +571,7 @@ set_proto_ctx_engines_parallel_submit(struct i915_user_extension __user *base, intel_engine_mask_t prev_mask;

/* FIXME: This is NIY for execlists */

• if (!(intel_uc_uses_guc_submission(&i915->gt.uc)))

• if (!(intel_uc_uses_guc_submission(&to_gt(i915)->uc))) return -ENODEV;

  if (get_user(slot, &ext->engine_index))

@@ -833,7 +833,7 @@ static int set_proto_ctx_sseu(struct drm_i915_file_private *fpriv, sseu = &pc->legacy_rcs_sseu; }

• ret = i915_gem_user_to_context_sseu(&i915->gt, &user_sseu, sseu);

• ret = i915_gem_user_to_context_sseu(to_gt(i915), &user_sseu, sseu); if (ret) return ret;

@@ -1044,7 +1044,7 @@ static struct i915_gem_engines *alloc_engines(unsigned int count) static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx, struct intel_sseu rcs_sseu) {

• const struct intel_gt *gt = &ctx->i915->gt;

• const struct intel_gt *gt = to_gt(ctx->i915); struct intel_engine_cs *engine; struct i915_gem_engines *e, *err; enum intel_engine_id id;

@@ -1521,7 +1521,7 @@ static int __context_set_persistence(struct i915_gem_context *ctx, bool state) * colateral damage, and we should not pretend we can by * exposing the interface. */

• if (!intel_has_reset_engine(&ctx->i915->gt))
  

• if (!intel_has_reset_engine(to_gt(ctx->i915)))
  return -ENODEV;
  
  

  i915_gem_context_clear_persistence(ctx);

@@ -1559,7 +1559,7 @@ i915_gem_create_context(struct drm_i915_private *i915, } else if (HAS_FULL_PPGTT(i915)) { struct i915_ppgtt *ppgtt;

• ppgtt = i915_ppgtt_create(&i915->gt, 0);
  

• ppgtt = i915_ppgtt_create(to_gt(i915), 0);
  

  if (IS_ERR(ppgtt)) { drm_dbg(&i915->drm, "PPGTT setup failed (%ld)\n", PTR_ERR(ppgtt));

@@ -1742,7 +1742,7 @@ int i915_gem_vm_create_ioctl(struct drm_device *dev, void *data, if (args->flags) return -EINVAL;

• ppgtt = i915_ppgtt_create(&i915->gt, 0);

• ppgtt = i915_ppgtt_create(to_gt(i915), 0); if (IS_ERR(ppgtt)) return PTR_ERR(ppgtt);

@@ -2194,7 +2194,7 @@ int i915_gem_context_create_ioctl(struct drm_device *dev, void *data, if (args->flags & I915_CONTEXT_CREATE_FLAGS_UNKNOWN) return -EINVAL;

• ret = intel_gt_terminally_wedged(&i915->gt);

• ret = intel_gt_terminally_wedged(to_gt(i915)); if (ret) return ret;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c index 8955d6abcef1..9402d4bf4ffc 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c @@ -379,7 +379,7 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data if (ext.flags) return -EINVAL;

• if (!intel_pxp_is_enabled(&ext_data->i915->gt.pxp))

• if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp)) return -ENODEV;

  ext_data->flags |= I915_BO_PROTECTED;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 2213f7b613da..ec7c4a29a720 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -2372,9 +2372,9 @@ static int eb_submit(struct i915_execbuffer *eb) return err; }

-static int num_vcs_engines(const struct drm_i915_private *i915) +static int num_vcs_engines(struct drm_i915_private *i915) {

• return hweight_long(VDBOX_MASK(&i915->gt));

• return hweight_long(VDBOX_MASK(to_gt(i915)));

}

/* diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index 39bb15eafc07..1ca5c062974e 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -646,7 +646,7 @@ mmap_offset_attach(struct drm_i915_gem_object *obj, goto insert;

/* Attempt to reap some mmap space from dead objects */

• err = intel_gt_retire_requests_timeout(&i915->gt, MAX_SCHEDULE_TIMEOUT,

• err = intel_gt_retire_requests_timeout(to_gt(i915), MAX_SCHEDULE_TIMEOUT, NULL); if (err) goto err;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c b/drivers/gpu/drm/i915/gem/i915_gem_phys.c index 7986612f48fa..ca6faffcc496 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c @@ -19,6 +19,7 @@ static int i915_gem_object_get_pages_phys(struct drm_i915_gem_object *obj) { struct address_space *mapping = obj->base.filp->f_mapping;

• struct drm_i915_private *i915 = to_i915(obj->base.dev); struct scatterlist *sg; struct sg_table *st; dma_addr_t dma;

@@ -73,7 +74,7 @@ static int i915_gem_object_get_pages_phys(struct drm_i915_gem_object *obj) dst += PAGE_SIZE; }

• intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);

• intel_gt_chipset_flush(to_gt(i915));

  /* We're no longer struct page backed */ obj->mem_flags &= ~I915_BO_FLAG_STRUCT_PAGE;

@@ -140,6 +141,7 @@ int i915_gem_object_pwrite_phys(struct drm_i915_gem_object *obj, { void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; char __user *user_data = u64_to_user_ptr(args->data_ptr);

• struct drm_i915_private *i915 = to_i915(obj->base.dev); int err;

  err = i915_gem_object_wait(obj,

@@ -159,7 +161,7 @@ int i915_gem_object_pwrite_phys(struct drm_i915_gem_object *obj, return -EFAULT;

drm_clflush_virt_range(vaddr, args->size);

• intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);

• intel_gt_chipset_flush(to_gt(i915));

  i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU); return 0;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c index 726b40e1fbb0..ac56124760e1 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c @@ -35,7 +35,7 @@ void i915_gem_suspend(struct drm_i915_private *i915) * state. Fortunately, the kernel_context is disposable and we do * not rely on its state. */

• intel_gt_suspend_prepare(&i915->gt);

• intel_gt_suspend_prepare(to_gt(i915));

  i915_gem_drain_freed_objects(i915);

} @@ -153,7 +153,7 @@ void i915_gem_suspend_late(struct drm_i915_private *i915) * machine in an unusable condition. */

• intel_gt_suspend_late(&i915->gt);

• intel_gt_suspend_late(to_gt(i915));

  spin_lock_irqsave(&i915->mm.obj_lock, flags); for (phase = phases; *phase; phase++) {

@@ -223,7 +223,7 @@ void i915_gem_resume(struct drm_i915_private *i915) * guarantee that the context image is complete. So let's just reset * it and start again. */

• intel_gt_resume(&i915->gt);

• intel_gt_resume(to_gt(i915));

  ret = lmem_restore(i915, I915_TTM_BACKUP_ALLOW_GPU); GEM_WARN_ON(ret);

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c index 157a9765f483..05a1ba2f2e7b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c @@ -153,7 +153,7 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww, */ if (shrink & I915_SHRINK_ACTIVE) /* Retire requests to unpin all idle contexts */

• intel_gt_retire_requests(&i915->gt);
  

• intel_gt_retire_requests(to_gt(i915));
  
  

  /*

  • As we may completely rewrite the (un)bound list whilst unbinding

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_throttle.c b/drivers/gpu/drm/i915/gem/i915_gem_throttle.c index 1929d6cf4150..75501db71041 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_throttle.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_throttle.c @@ -38,12 +38,13 @@ i915_gem_throttle_ioctl(struct drm_device *dev, void *data, { const unsigned long recent_enough = jiffies - DRM_I915_THROTTLE_JIFFIES; struct drm_i915_file_private *file_priv = file->driver_priv;

• struct drm_i915_private *i915 = to_i915(dev); struct i915_gem_context *ctx; unsigned long idx; long ret;

  /* ABI: return -EIO if already wedged */

• ret = intel_gt_terminally_wedged(&to_i915(dev)->gt);

• ret = intel_gt_terminally_wedged(to_gt(i915)); if (ret) return ret;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c index 80df9f592407..8ad09fcf3698 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c @@ -397,7 +397,7 @@ static struct dma_fence *i915_ttm_accel_move(struct ttm_buffer_object *bo, enum i915_cache_level src_level, dst_level; int ret;

• if (!i915->gt.migrate.context || intel_gt_is_wedged(&i915->gt))

• if (!to_gt(i915)->migrate.context || intel_gt_is_wedged(to_gt(i915))) return ERR_PTR(-EINVAL);

  /* With fail_gpu_migration, we always perform a GPU clear. */

@@ -410,8 +410,8 @@ static struct dma_fence *i915_ttm_accel_move(struct ttm_buffer_object *bo, !I915_SELFTEST_ONLY(fail_gpu_migration)) return ERR_PTR(-EINVAL);

• intel_engine_pm_get(i915->gt.migrate.context->engine);
  

• ret = intel_context_migrate_clear(i915->gt.migrate.context, dep,
  

• intel_engine_pm_get(to_gt(i915)->migrate.context->engine);
  

• ret = intel_context_migrate_clear(to_gt(i915)->migrate.context, dep,
  			  dst_st->sgl, dst_level,
  			  i915_ttm_gtt_binds_lmem(dst_mem),
  			  0, &rq);
  

@@ -423,8 +423,8 @@ static struct dma_fence *i915_ttm_accel_move(struct ttm_buffer_object *bo, return ERR_CAST(src_rsgt);

src_level = i915_ttm_cache_level(i915, bo->resource, src_ttm);

• intel_engine_pm_get(i915->gt.migrate.context->engine);
  

• ret = intel_context_migrate_copy(i915->gt.migrate.context,
  

• intel_engine_pm_get(to_gt(i915)->migrate.context->engine);
  

• ret = intel_context_migrate_copy(to_gt(i915)->migrate.context,
  			 dep, src_rsgt->table.sgl,
  			 src_level,
  			 i915_ttm_gtt_binds_lmem(bo->resource),
  

@@ -435,7 +435,7 @@ static struct dma_fence *i915_ttm_accel_move(struct ttm_buffer_object *bo, i915_refct_sgt_put(src_rsgt); }

• intel_engine_pm_put(i915->gt.migrate.context->engine);

• intel_engine_pm_put(to_gt(i915)->migrate.context->engine);

  if (ret && rq) { i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT);

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c index 3173c9f9a040..3cc01c30dd62 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c @@ -529,7 +529,7 @@ i915_gem_userptr_ioctl(struct drm_device *dev, * On almost all of the older hw, we cannot tell the GPU that * a page is readonly. */

• if (!dev_priv->gt.vm->has_read_only)
  

• if (!to_gt(dev_priv)->vm->has_read_only)
  return -ENODEV;
  

  }

diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c index c69c7d45aabc..11f0aa65f8a3 100644 --- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c +++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c @@ -1705,7 +1705,7 @@ int i915_gem_huge_page_mock_selftests(void) mkwrite_device_info(dev_priv)->ppgtt_type = INTEL_PPGTT_FULL; mkwrite_device_info(dev_priv)->ppgtt_size = 48;

• ppgtt = i915_ppgtt_create(&dev_priv->gt, 0);

• ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0); if (IS_ERR(ppgtt)) { err = PTR_ERR(ppgtt); goto out_unlock;

@@ -1747,7 +1747,7 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915) return 0; }

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_live_subtests(tests, i915);

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c index 8402ed925a69..75947e9dada2 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c @@ -592,7 +592,7 @@ int i915_gem_client_blt_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_client_tiled_blits), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_live_subtests(tests, i915);

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c index 21b71568cd5f..45398adda9c8 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c @@ -90,7 +90,7 @@ static int live_nop_switch(void *arg) } if (i915_request_wait(rq, 0, 10 * HZ) < 0) { pr_err("Failed to populated %d contexts\n", nctx);

• 	intel_gt_set_wedged(&i915->gt);
  

• 	intel_gt_set_wedged(to_gt(i915));
  i915_request_put(rq);
  err = -EIO;
  goto out_file;
  

@@ -146,7 +146,7 @@ static int live_nop_switch(void *arg) if (i915_request_wait(rq, 0, HZ / 5) < 0) { pr_err("Switching between %ld contexts timed out\n", prime);

• 		intel_gt_set_wedged(&i915->gt);
  

• 		intel_gt_set_wedged(to_gt(i915));
  	i915_request_put(rq);
  	break;
  }
  

@@ -1223,7 +1223,7 @@ __igt_ctx_sseu(struct drm_i915_private *i915, return 0;

if (flags & TEST_RESET)

• igt_global_reset_lock(&i915->gt);
  

• igt_global_reset_lock(to_gt(i915));
  
  

  obj = i915_gem_object_create_internal(i915, PAGE_SIZE); if (IS_ERR(obj)) {

@@ -1306,7 +1306,7 @@ __igt_ctx_sseu(struct drm_i915_private *i915,

out_unlock: if (flags & TEST_RESET)

• igt_global_reset_unlock(&i915->gt);
  

• igt_global_reset_unlock(to_gt(i915));
  
  

  if (ret) pr_err("%s: Failed with %d!\n", name, ret);

@@ -1877,7 +1877,7 @@ int i915_gem_context_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_vm_isolation), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_live_subtests(tests, i915);

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c index 4b8e6b098659..ecb691c81d1e 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c @@ -261,5 +261,5 @@ int i915_gem_migrate_live_selftests(struct drm_i915_private *i915) if (!HAS_LMEM(i915)) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c index 6d30cdfa80f3..743e6ab2c40b 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c @@ -84,6 +84,7 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj, struct rnd_state *prng) { const unsigned long npages = obj->base.size / PAGE_SIZE;

• struct drm_i915_private *i915 = to_i915(obj->base.dev); struct i915_ggtt_view view; struct i915_vma *vma; unsigned long page;

@@ -141,7 +142,7 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj, if (offset >= obj->base.size) goto out;

• intel_gt_flush_ggtt_writes(&to_i915(obj->base.dev)->gt);

• intel_gt_flush_ggtt_writes(to_gt(i915));

  p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT); cpu = kmap(p) + offset_in_page(offset);

@@ -175,6 +176,7 @@ static int check_partial_mappings(struct drm_i915_gem_object *obj, { const unsigned int nreal = obj->scratch / PAGE_SIZE; const unsigned long npages = obj->base.size / PAGE_SIZE;

• struct drm_i915_private *i915 = to_i915(obj->base.dev); struct i915_vma *vma; unsigned long page; int err;

@@ -234,7 +236,7 @@ static int check_partial_mappings(struct drm_i915_gem_object *obj, if (offset >= obj->base.size) continue;

• intel_gt_flush_ggtt_writes(&to_i915(obj->base.dev)->gt);
  

• intel_gt_flush_ggtt_writes(to_gt(i915));
  
  

  p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT); cpu = kmap(p) + offset_in_page(offset);

@@ -616,14 +618,14 @@ static bool assert_mmap_offset(struct drm_i915_private *i915, static void disable_retire_worker(struct drm_i915_private *i915) { i915_gem_driver_unregister__shrinker(i915);

• intel_gt_pm_get(&i915->gt);
• cancel_delayed_work_sync(&i915->gt.requests.retire_work);

• intel_gt_pm_get(to_gt(i915));
• cancel_delayed_work_sync(&to_gt(i915)->requests.retire_work);

}

static void restore_retire_worker(struct drm_i915_private *i915) { igt_flush_test(i915);

• intel_gt_pm_put(&i915->gt);

• intel_gt_pm_put(to_gt(i915)); i915_gem_driver_register__shrinker(i915);

}

@@ -651,8 +653,8 @@ static int igt_mmap_offset_exhaustion(void *arg)

/* Disable background reaper */ disable_retire_worker(i915);

• GEM_BUG_ON(!i915->gt.awake);
• intel_gt_retire_requests(&i915->gt);

• GEM_BUG_ON(!to_gt(i915)->awake);

• intel_gt_retire_requests(to_gt(i915)); i915_gem_drain_freed_objects(i915);

  /* Trim the device mmap space to only a page */

@@ -728,7 +730,7 @@ static int igt_mmap_offset_exhaustion(void *arg)

/* Now fill with busy dead objects that we expect to reap */ for (loop = 0; loop < 3; loop++) {

• if (intel_gt_is_wedged(&i915->gt))
  

• if (intel_gt_is_wedged(to_gt(i915)))
  break;
  
  

  obj = i915_gem_object_create_internal(i915, PAGE_SIZE);

@@ -942,7 +944,7 @@ static int __igt_mmap(struct drm_i915_private *i915, }

if (type == I915_MMAP_TYPE_GTT)

• intel_gt_flush_ggtt_writes(&i915->gt);
  

• intel_gt_flush_ggtt_writes(to_gt(i915));
  
  

  err = wc_check(obj); if (err == -ENXIO)

@@ -1049,7 +1051,7 @@ static int __igt_mmap_access(struct drm_i915_private *i915, goto out_unmap; }

• intel_gt_flush_ggtt_writes(&i915->gt);

• intel_gt_flush_ggtt_writes(to_gt(i915));

  err = access_process_vm(current, addr, &x, sizeof(x), 0); if (err != sizeof(x)) {

@@ -1065,7 +1067,7 @@ static int __igt_mmap_access(struct drm_i915_private *i915, goto out_unmap; }

• intel_gt_flush_ggtt_writes(&i915->gt);

• intel_gt_flush_ggtt_writes(to_gt(i915));

  err = __get_user(y, ptr); if (err) {

@@ -1165,7 +1167,7 @@ static int __igt_mmap_gpu(struct drm_i915_private *i915, }

if (type == I915_MMAP_TYPE_GTT)

• intel_gt_flush_ggtt_writes(&i915->gt);
  

• intel_gt_flush_ggtt_writes(to_gt(i915));
  
  

  for_each_uabi_engine(engine, i915) { struct i915_request *rq;

-- 2.34.1

On Thu, Dec 09, 2021 at 03:25:07PM +0200, Andi Shyti wrote:

From: Michał Winiarski michal.winiarski@intel.com

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Michał Winiarski michal.winiarski@intel.com Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

Reviewed-by: Matt Roper matthew.d.roper@intel.com

---

drivers/gpu/drm/i915/gvt/gvt.c | 2 +- drivers/gpu/drm/i915/gvt/scheduler.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c index cbac409f6c8a..f0b69e4dcb52 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.c +++ b/drivers/gpu/drm/i915/gvt/gvt.c @@ -205,7 +205,7 @@ int intel_gvt_init_device(struct drm_i915_private *i915) spin_lock_init(&gvt->scheduler.mmio_context_lock); mutex_init(&gvt->lock); mutex_init(&gvt->sched_lock);

• gvt->gt = &i915->gt;

• gvt->gt = to_gt(i915); i915->gvt = gvt;

  init_device_info(gvt);

diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index 6c804102528b..42a0c9ae0a73 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c @@ -1386,7 +1386,7 @@ int intel_vgpu_setup_submission(struct intel_vgpu *vgpu) enum intel_engine_id i; int ret;

• ppgtt = i915_ppgtt_create(&i915->gt, I915_BO_ALLOC_PM_EARLY);

• ppgtt = i915_ppgtt_create(to_gt(i915), I915_BO_ALLOC_PM_EARLY); if (IS_ERR(ppgtt)) return PTR_ERR(ppgtt);

-- 2.34.1

On Thu, Dec 09, 2021 at 03:25:08PM +0200, Andi Shyti wrote:

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Andi Shyti andi.shyti@linux.intel.com Cc: Michał Winiarski michal.winiarski@intel.com

Reviewed-by: Matt Roper matthew.d.roper@intel.com

---

drivers/gpu/drm/i915/selftests/i915_active.c | 2 +- drivers/gpu/drm/i915/selftests/i915_gem.c | 2 +- .../gpu/drm/i915/selftests/i915_gem_evict.c | 6 ++-- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 +-- drivers/gpu/drm/i915/selftests/i915_perf.c | 2 +- drivers/gpu/drm/i915/selftests/i915_request.c | 10 +++---- .../gpu/drm/i915/selftests/i915_selftest.c | 4 +-- .../gpu/drm/i915/selftests/igt_flush_test.c | 2 +- .../gpu/drm/i915/selftests/igt_live_test.c | 4 +-- .../drm/i915/selftests/intel_memory_region.c | 4 +-- drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +- .../gpu/drm/i915/selftests/mock_gem_device.c | 30 +++++++++---------- drivers/gpu/drm/i915/selftests/mock_gtt.c | 6 ++-- drivers/gpu/drm/i915/selftests/mock_uncore.c | 2 +- 14 files changed, 40 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c b/drivers/gpu/drm/i915/selftests/i915_active.c index 61bf4560d8af..2dac9be1de58 100644 --- a/drivers/gpu/drm/i915/selftests/i915_active.c +++ b/drivers/gpu/drm/i915/selftests/i915_active.c @@ -254,7 +254,7 @@ int i915_active_live_selftests(struct drm_i915_private *i915) SUBTEST(live_active_barrier), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_subtests(tests, i915);

diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c index 152d9ab135b1..b5576888cd78 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c @@ -248,7 +248,7 @@ int i915_gem_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_gem_ww_ctx), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_live_subtests(tests, i915);

diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c index 7e0658a77659..75b709c26dd3 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c @@ -545,7 +545,7 @@ int i915_gem_evict_mock_selftests(void) return -ENOMEM;

with_intel_runtime_pm(&i915->runtime_pm, wakeref)

• err = i915_subtests(tests, &i915->gt);
  

• err = i915_subtests(tests, to_gt(i915));
  
  

  mock_destroy_device(i915); return err;

@@ -557,8 +557,8 @@ int i915_gem_evict_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_evict_contexts), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index 46f4236039a9..48123c3e1ff0 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -155,7 +155,7 @@ static int igt_ppgtt_alloc(void *arg) if (!HAS_PPGTT(dev_priv)) return 0;

• ppgtt = i915_ppgtt_create(&dev_priv->gt, 0);

• ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0); if (IS_ERR(ppgtt)) return PTR_ERR(ppgtt);

@@ -1053,7 +1053,7 @@ static int exercise_ppgtt(struct drm_i915_private *dev_priv, if (IS_ERR(file)) return PTR_ERR(file);

• ppgtt = i915_ppgtt_create(&dev_priv->gt, 0);

• ppgtt = i915_ppgtt_create(to_gt(dev_priv), 0); if (IS_ERR(ppgtt)) { err = PTR_ERR(ppgtt); goto out_free;

diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c b/drivers/gpu/drm/i915/selftests/i915_perf.c index 9e9a6cb1d9e5..88db2e3d81d0 100644 --- a/drivers/gpu/drm/i915/selftests/i915_perf.c +++ b/drivers/gpu/drm/i915/selftests/i915_perf.c @@ -424,7 +424,7 @@ int i915_perf_live_selftests(struct drm_i915_private *i915) if (!perf->metrics_kobj || !perf->ops.enable_metric_set) return 0;

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  err = alloc_empty_config(&i915->perf);

diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c index 9979ef9197cd..92a859b34190 100644 --- a/drivers/gpu/drm/i915/selftests/i915_request.c +++ b/drivers/gpu/drm/i915/selftests/i915_request.c @@ -841,7 +841,7 @@ static struct i915_vma *empty_batch(struct drm_i915_private *i915) __i915_gem_object_flush_map(obj, 0, 64); i915_gem_object_unpin_map(obj);

• intel_gt_chipset_flush(&i915->gt);

• intel_gt_chipset_flush(to_gt(i915));

  vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL); if (IS_ERR(vma)) {

@@ -982,7 +982,7 @@ static struct i915_vma *recursive_batch(struct drm_i915_private *i915) if (IS_ERR(obj)) return ERR_CAST(obj);

• vma = i915_vma_instance(obj, i915->gt.vm, NULL);

• vma = i915_vma_instance(obj, to_gt(i915)->vm, NULL); if (IS_ERR(vma)) { err = PTR_ERR(vma); goto err;

@@ -1014,7 +1014,7 @@ static struct i915_vma *recursive_batch(struct drm_i915_private *i915) __i915_gem_object_flush_map(obj, 0, 64); i915_gem_object_unpin_map(obj);

• intel_gt_chipset_flush(&i915->gt);

• intel_gt_chipset_flush(to_gt(i915));

  return vma;

@@ -1700,7 +1700,7 @@ int i915_request_live_selftests(struct drm_i915_private *i915) SUBTEST(live_breadcrumbs_smoketest), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_subtests(tests, i915);

@@ -3091,7 +3091,7 @@ int i915_request_perf_selftests(struct drm_i915_private *i915) SUBTEST(perf_parallel_engines), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_subtests(tests, i915);

diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c index 484759c9409c..2d6d7bd13c3c 100644 --- a/drivers/gpu/drm/i915/selftests/i915_selftest.c +++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c @@ -298,10 +298,10 @@ int __i915_live_setup(void *data) struct drm_i915_private *i915 = data;

/* The selftests expect an idle system */

• if (intel_gt_pm_wait_for_idle(&i915->gt))

• if (intel_gt_pm_wait_for_idle(to_gt(i915))) return -EIO;

• return intel_gt_terminally_wedged(&i915->gt);

• return intel_gt_terminally_wedged(to_gt(i915));

}

int __i915_live_teardown(int err, void *data) diff --git a/drivers/gpu/drm/i915/selftests/igt_flush_test.c b/drivers/gpu/drm/i915/selftests/igt_flush_test.c index a6c71fca61aa..b84594601d30 100644 --- a/drivers/gpu/drm/i915/selftests/igt_flush_test.c +++ b/drivers/gpu/drm/i915/selftests/igt_flush_test.c @@ -14,7 +14,7 @@

int igt_flush_test(struct drm_i915_private *i915) {

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); int ret = intel_gt_is_wedged(gt) ? -EIO : 0;

  cond_resched();

diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.c b/drivers/gpu/drm/i915/selftests/igt_live_test.c index 1c721542e277..72b58b66692a 100644 --- a/drivers/gpu/drm/i915/selftests/igt_live_test.c +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.c @@ -16,7 +16,7 @@ int igt_live_test_begin(struct igt_live_test *t, const char *func, const char *name) {

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); struct intel_engine_cs *engine; enum intel_engine_id id; int err;

@@ -57,7 +57,7 @@ int igt_live_test_end(struct igt_live_test *t) return -EIO; }

• for_each_engine(engine, &i915->gt, id) {

• for_each_engine(engine, to_gt(i915), id) { if (t->reset_engine[id] == i915_reset_engine_count(&i915->gpu_error, engine)) continue;

diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c b/drivers/gpu/drm/i915/selftests/intel_memory_region.c index 0d5df0dc7212..8255561ff853 100644 --- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c +++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c @@ -1217,7 +1217,7 @@ int intel_memory_region_live_selftests(struct drm_i915_private *i915) return 0; }

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_live_subtests(tests, i915);

@@ -1229,7 +1229,7 @@ int intel_memory_region_perf_selftests(struct drm_i915_private *i915) SUBTEST(perf_memcpy), };

• if (intel_gt_is_wedged(&i915->gt))

• if (intel_gt_is_wedged(to_gt(i915))) return 0;

  return i915_live_subtests(tests, i915);

diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c index bc8128170a99..cdd196783535 100644 --- a/drivers/gpu/drm/i915/selftests/intel_uncore.c +++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c @@ -344,5 +344,5 @@ int intel_uncore_live_selftests(struct drm_i915_private *i915) SUBTEST(live_forcewake_domains), };

• return intel_gt_live_subtests(tests, &i915->gt);

• return intel_gt_live_subtests(tests, to_gt(i915));

} diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c index eeb632aac4a7..8aa7b1d33865 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c @@ -45,7 +45,7 @@

void mock_device_flush(struct drm_i915_private *i915) {

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); struct intel_engine_cs *engine; enum intel_engine_id id;

@@ -64,7 +64,7 @@ static void mock_device_release(struct drm_device *dev) goto out;

mock_device_flush(i915);

• intel_gt_driver_remove(&i915->gt);

• intel_gt_driver_remove(to_gt(i915));

  i915_gem_drain_workqueue(i915); i915_gem_drain_freed_objects(i915);

@@ -73,7 +73,7 @@ static void mock_device_release(struct drm_device *dev) destroy_workqueue(i915->wq);

intel_region_ttm_device_fini(i915);

• intel_gt_driver_late_release(&i915->gt);

• intel_gt_driver_late_release(to_gt(i915)); intel_memory_regions_driver_release(i915);

  drm_mode_config_cleanup(&i915->drm);

@@ -178,11 +178,11 @@ struct drm_i915_private *mock_gem_device(void) spin_lock_init(&i915->gpu_error.lock);

i915_gem_init__mm(i915);

• intel_gt_init_early(&i915->gt, i915);
• __intel_gt_init_early(&i915->gt, i915);

• intel_gt_init_early(to_gt(i915), i915);
• __intel_gt_init_early(to_gt(i915), i915); mock_uncore_init(&i915->uncore, i915);

• atomic_inc(&i915->gt.wakeref.count); /* disable; no hw support */
• i915->gt.awake = -ENODEV;

• atomic_inc(&to_gt(i915)->wakeref.count); /* disable; no hw support */

• to_gt(i915)->awake = -ENODEV;

  ret = intel_region_ttm_device_init(i915); if (ret)

@@ -195,19 +195,19 @@ struct drm_i915_private *mock_gem_device(void) mock_init_contexts(i915);

mock_init_ggtt(i915, &i915->ggtt);

• i915->gt.vm = i915_vm_get(&i915->ggtt.vm);

• to_gt(i915)->vm = i915_vm_get(&i915->ggtt.vm);

  mkwrite_device_info(i915)->platform_engine_mask = BIT(0);

• i915->gt.info.engine_mask = BIT(0);

• to_gt(i915)->info.engine_mask = BIT(0);

• i915->gt.engine[RCS0] = mock_engine(i915, "mock", RCS0);
• if (!i915->gt.engine[RCS0])

• to_gt(i915)->engine[RCS0] = mock_engine(i915, "mock", RCS0);
• if (!to_gt(i915)->engine[RCS0]) goto err_unlock;

• if (mock_engine_init(i915->gt.engine[RCS0]))

• if (mock_engine_init(to_gt(i915)->engine[RCS0])) goto err_context;

• __clear_bit(I915_WEDGED, &i915->gt.reset.flags);

• __clear_bit(I915_WEDGED, &to_gt(i915)->reset.flags); intel_engines_driver_register(i915);

  i915->do_release = true;

@@ -216,13 +216,13 @@ struct drm_i915_private *mock_gem_device(void) return i915;

err_context:

• intel_gt_driver_remove(&i915->gt);

• intel_gt_driver_remove(to_gt(i915));

err_unlock: destroy_workqueue(i915->wq); err_drv: intel_region_ttm_device_fini(i915); err_ttm:

• intel_gt_driver_late_release(&i915->gt);

• intel_gt_driver_late_release(to_gt(i915)); intel_memory_regions_driver_release(i915); drm_mode_config_cleanup(&i915->drm); mock_destroy_device(i915);

diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c index cc047ec594f9..f0b87de0aca3 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gtt.c +++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c @@ -70,7 +70,7 @@ struct i915_ppgtt *mock_ppgtt(struct drm_i915_private *i915, const char *name) if (!ppgtt) return NULL;

• ppgtt->vm.gt = &i915->gt;

• ppgtt->vm.gt = to_gt(i915); ppgtt->vm.i915 = i915; ppgtt->vm.total = round_down(U64_MAX, PAGE_SIZE); ppgtt->vm.dma = i915->drm.dev;

@@ -109,7 +109,7 @@ void mock_init_ggtt(struct drm_i915_private *i915, struct i915_ggtt *ggtt) { memset(ggtt, 0, sizeof(*ggtt));

• ggtt->vm.gt = &i915->gt;

• ggtt->vm.gt = to_gt(i915); ggtt->vm.i915 = i915; ggtt->vm.is_ggtt = true;

@@ -130,7 +130,7 @@ void mock_init_ggtt(struct drm_i915_private *i915, struct i915_ggtt *ggtt) ggtt->vm.vma_ops.clear_pages = clear_pages;

i915_address_space_init(&ggtt->vm, VM_CLASS_GGTT);

• i915->gt.ggtt = ggtt;

• to_gt(i915)->ggtt = ggtt;

}

void mock_fini_ggtt(struct i915_ggtt *ggtt) diff --git a/drivers/gpu/drm/i915/selftests/mock_uncore.c b/drivers/gpu/drm/i915/selftests/mock_uncore.c index b3790ef137e4..f2d6be5e1230 100644 --- a/drivers/gpu/drm/i915/selftests/mock_uncore.c +++ b/drivers/gpu/drm/i915/selftests/mock_uncore.c @@ -42,7 +42,7 @@ __nop_read(64) void mock_uncore_init(struct intel_uncore *uncore, struct drm_i915_private *i915) {

• intel_uncore_init_early(uncore, &i915->gt);

• intel_uncore_init_early(uncore, to_gt(i915));

  ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, nop); ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, nop);

-- 2.34.1

On Thu, Dec 09, 2021 at 03:25:09PM +0200, Andi Shyti wrote:

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c index 5d169624ad60..726c2b5a3fa3 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c @@ -14,9 +14,11 @@ #include "intel_pxp_tee.h" #include "intel_pxp_tee_interface.h"

-static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev) +static struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)

Was dropping the inline here intentional? It doesn't seem like there's any reason to drop it, and if it was intentional the whitespace isn't quite right.

Matt

{

• return &kdev_to_i915(i915_kdev)->gt.pxp;

• struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
• return &to_gt(i915)->pxp;

}

static int intel_pxp_tee_io_message(struct intel_pxp *pxp,

2.34.1

On Fri, Dec 10, 2021 at 03:07:56AM +0200, Andi Shyti wrote:

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

Reviewed-by: Matt Roper matthew.d.roper@intel.com

---

Hi,

the inline of i915_dev_to_pxp() was accidentally removed in v6. Thanks Matt.

Andi

drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c index 5d169624ad60..195b2323ec00 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c @@ -16,7 +16,9 @@

static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev) {

• return &kdev_to_i915(i915_kdev)->gt.pxp;

• struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
• return &to_gt(i915)->pxp;

}

static int intel_pxp_tee_io_message(struct intel_pxp *pxp,

2.34.1

On Thu, Dec 09, 2021 at 03:25:10PM +0200, Andi Shyti wrote:

From: Michał Winiarski michal.winiarski@intel.com

Use to_gt() helper consistently throughout the codebase. Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Michał Winiarski michal.winiarski@intel.com Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

Reviewed-by: Matt Roper matthew.d.roper@intel.com

---

drivers/gpu/drm/i915/i915_debugfs.c | 38 +++++++-------- drivers/gpu/drm/i915/i915_debugfs_params.c | 4 +- drivers/gpu/drm/i915/i915_driver.c | 32 ++++++------- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_gem.c | 16 +++---- drivers/gpu/drm/i915/i915_getparam.c | 10 ++-- drivers/gpu/drm/i915/i915_gpu_error.c | 4 +- drivers/gpu/drm/i915/i915_irq.c | 56 +++++++++++----------- drivers/gpu/drm/i915/i915_perf.c | 2 +- drivers/gpu/drm/i915/i915_pmu.c | 14 +++--- drivers/gpu/drm/i915/i915_query.c | 2 +- drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++----- drivers/gpu/drm/i915/intel_gvt.c | 2 +- drivers/gpu/drm/i915/intel_wopcm.c | 2 +- 14 files changed, 103 insertions(+), 103 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index bafb902269de..93c3d154885b 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -65,7 +65,7 @@ static int i915_capabilities(struct seq_file *m, void *data) intel_device_info_print_static(INTEL_INFO(i915), &p); intel_device_info_print_runtime(RUNTIME_INFO(i915), &p); i915_print_iommu_status(i915, &p);

• intel_gt_info_print(&i915->gt.info, &p);

• intel_gt_info_print(&to_gt(i915)->info, &p); intel_driver_caps_print(&i915->caps, &p);

  kernel_param_lock(THIS_MODULE);

@@ -293,7 +293,7 @@ static int i915_gpu_info_open(struct inode *inode, struct file *file)

gpu = NULL; with_intel_runtime_pm(&i915->runtime_pm, wakeref)

• gpu = i915_gpu_coredump(&i915->gt, ALL_ENGINES);
  

• gpu = i915_gpu_coredump(to_gt(i915), ALL_ENGINES);
  

  if (IS_ERR(gpu)) return PTR_ERR(gpu);

@@ -351,7 +351,7 @@ static const struct file_operations i915_error_state_fops = { static int i915_frequency_info(struct seq_file *m, void *unused) { struct drm_i915_private *i915 = node_to_i915(m->private);

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); struct drm_printer p = drm_seq_file_printer(m);

  intel_gt_pm_frequency_dump(gt, &p);

@@ -439,11 +439,11 @@ static int i915_swizzle_info(struct seq_file *m, void *data) static int i915_rps_boost_info(struct seq_file *m, void *data) { struct drm_i915_private *dev_priv = node_to_i915(m->private);

• struct intel_rps *rps = &dev_priv->gt.rps;

• struct intel_rps *rps = &to_gt(dev_priv)->rps;

  seq_printf(m, "RPS enabled? %s\n", yesno(intel_rps_is_enabled(rps))); seq_printf(m, "RPS active? %s\n", yesno(intel_rps_is_active(rps)));

• seq_printf(m, "GPU busy? %s\n", yesno(dev_priv->gt.awake));

• seq_printf(m, "GPU busy? %s\n", yesno(to_gt(dev_priv)->awake)); seq_printf(m, "Boosts outstanding? %d\n", atomic_read(&rps->num_waiters)); seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive));

@@ -476,7 +476,7 @@ static int i915_runtime_pm_status(struct seq_file *m, void *unused) seq_printf(m, "Runtime power status: %s\n", enableddisabled(!dev_priv->power_domains.init_wakeref));

• seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->gt.awake));

• seq_printf(m, "GPU idle: %s\n", yesno(!to_gt(dev_priv)->awake)); seq_printf(m, "IRQs disabled: %s\n", yesno(!intel_irqs_enabled(dev_priv)));

#ifdef CONFIG_PM @@ -508,18 +508,18 @@ static int i915_engine_info(struct seq_file *m, void *unused) wakeref = intel_runtime_pm_get(&i915->runtime_pm);

seq_printf(m, "GT awake? %s [%d], %llums\n",

•    yesno(i915->gt.awake),
  

•    atomic_read(&i915->gt.wakeref.count),
  

•    ktime_to_ms(intel_gt_get_awake_time(&i915->gt)));
  

•    yesno(to_gt(i915)->awake),
  

•    atomic_read(&to_gt(i915)->wakeref.count),
  

•    ktime_to_ms(intel_gt_get_awake_time(to_gt(i915))));
  

  seq_printf(m, "CS timestamp frequency: %u Hz, %d ns\n",

•    i915->gt.clock_frequency,
  

•    i915->gt.clock_period_ns);
  

•    to_gt(i915)->clock_frequency,
  

•    to_gt(i915)->clock_period_ns);
  
  

  p = drm_seq_file_printer(m); for_each_uabi_engine(engine, i915) intel_engine_dump(engine, &p, "%s\n", engine->name);

• intel_gt_show_timelines(&i915->gt, &p, i915_request_show_with_schedule);

• intel_gt_show_timelines(to_gt(i915), &p, i915_request_show_with_schedule);

  intel_runtime_pm_put(&i915->runtime_pm, wakeref);

@@ -558,14 +558,14 @@ static int i915_wedged_get(void *data, u64 *val) { struct drm_i915_private *i915 = data;

• return intel_gt_debugfs_reset_show(&i915->gt, val);

• return intel_gt_debugfs_reset_show(to_gt(i915), val);

}

static int i915_wedged_set(void *data, u64 val) { struct drm_i915_private *i915 = data;

• return intel_gt_debugfs_reset_store(&i915->gt, val);

• return intel_gt_debugfs_reset_store(to_gt(i915), val);

}

DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops, @@ -581,7 +581,7 @@ i915_perf_noa_delay_set(void *data, u64 val) * This would lead to infinite waits as we're doing timestamp * difference on the CS with only 32bits. */

• if (intel_gt_ns_to_clock_interval(&i915->gt, val) > U32_MAX)

• if (intel_gt_ns_to_clock_interval(to_gt(i915), val) > U32_MAX) return -EINVAL;

  atomic64_set(&i915->perf.noa_programming_delay, val);

@@ -671,7 +671,7 @@ i915_drop_caches_set(void *data, u64 val) DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n", val, val & DROP_ALL);

• ret = gt_drop_caches(&i915->gt, val);

• ret = gt_drop_caches(to_gt(i915), val); if (ret) return ret;

@@ -702,7 +702,7 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops, static int i915_sseu_status(struct seq_file *m, void *unused) { struct drm_i915_private *i915 = node_to_i915(m->private);

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915);

  return intel_sseu_status(m, gt);

} @@ -711,14 +711,14 @@ static int i915_forcewake_open(struct inode *inode, struct file *file) { struct drm_i915_private *i915 = inode->i_private;

• return intel_gt_pm_debugfs_forcewake_user_open(&i915->gt);

• return intel_gt_pm_debugfs_forcewake_user_open(to_gt(i915));

}

static int i915_forcewake_release(struct inode *inode, struct file *file) { struct drm_i915_private *i915 = inode->i_private;

• return intel_gt_pm_debugfs_forcewake_user_release(&i915->gt);

• return intel_gt_pm_debugfs_forcewake_user_release(to_gt(i915));

}

static const struct file_operations i915_forcewake_fops = { diff --git a/drivers/gpu/drm/i915/i915_debugfs_params.c b/drivers/gpu/drm/i915/i915_debugfs_params.c index 20424275d41e..783c8676eee2 100644 --- a/drivers/gpu/drm/i915/i915_debugfs_params.c +++ b/drivers/gpu/drm/i915/i915_debugfs_params.c @@ -40,8 +40,8 @@ static int notify_guc(struct drm_i915_private *i915) { int ret = 0;

• if (intel_uc_uses_guc_submission(&i915->gt.uc))

• ret = intel_guc_global_policies_update(&i915->gt.uc.guc);
  

• if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))

• ret = intel_guc_global_policies_update(&to_gt(i915)->uc.guc);
  
  

  return ret;

} diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 42ae5a12040d..95174938b160 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -291,7 +291,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv) static void sanitize_gpu(struct drm_i915_private *i915) { if (!INTEL_INFO(i915)->gpu_reset_clobbers_display)

• __intel_gt_reset(&i915->gt, ALL_ENGINES);
  

• __intel_gt_reset(to_gt(i915), ALL_ENGINES);
  

}

/** @@ -314,9 +314,9 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv) intel_device_info_subplatform_init(dev_priv); intel_step_init(dev_priv);

• intel_gt_init_early(&dev_priv->gt, dev_priv);

• intel_gt_init_early(to_gt(dev_priv), dev_priv); intel_uncore_mmio_debug_init_early(&dev_priv->mmio_debug);

• intel_uncore_init_early(&dev_priv->uncore, &dev_priv->gt);

• intel_uncore_init_early(&dev_priv->uncore, to_gt(dev_priv));

  spin_lock_init(&dev_priv->irq_lock); spin_lock_init(&dev_priv->gpu_error.lock);

@@ -347,7 +347,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)

intel_wopcm_init_early(&dev_priv->wopcm);

• __intel_gt_init_early(&dev_priv->gt, dev_priv);

• __intel_gt_init_early(to_gt(dev_priv), dev_priv);

  i915_gem_init_early(dev_priv);

@@ -368,7 +368,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)

err_gem: i915_gem_cleanup_early(dev_priv);

• intel_gt_driver_late_release(&dev_priv->gt);

• intel_gt_driver_late_release(to_gt(dev_priv)); intel_region_ttm_device_fini(dev_priv);

err_ttm: vlv_suspend_cleanup(dev_priv); @@ -387,7 +387,7 @@ static void i915_driver_late_release(struct drm_i915_private *dev_priv) intel_irq_fini(dev_priv); intel_power_domains_cleanup(dev_priv); i915_gem_cleanup_early(dev_priv);

• intel_gt_driver_late_release(&dev_priv->gt);

• intel_gt_driver_late_release(to_gt(dev_priv)); intel_region_ttm_device_fini(dev_priv); vlv_suspend_cleanup(dev_priv); i915_workqueues_cleanup(dev_priv);

@@ -430,7 +430,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv) intel_setup_mchbar(dev_priv); intel_device_info_runtime_init(dev_priv);

• ret = intel_gt_init_mmio(&dev_priv->gt);

• ret = intel_gt_init_mmio(to_gt(dev_priv)); if (ret) goto err_uncore;

@@ -587,9 +587,9 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) if (ret) goto err_ggtt;

• intel_gt_init_hw_early(&dev_priv->gt, &dev_priv->ggtt);

• intel_gt_init_hw_early(to_gt(dev_priv), &dev_priv->ggtt);

• ret = intel_gt_probe_lmem(&dev_priv->gt);

• ret = intel_gt_probe_lmem(to_gt(dev_priv)); if (ret) goto err_mem_regions;

@@ -702,7 +702,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) /* Depends on sysfs having been initialized */ i915_perf_register(dev_priv);

• intel_gt_driver_register(&dev_priv->gt);

• intel_gt_driver_register(to_gt(dev_priv));

  intel_display_driver_register(dev_priv);

@@ -730,7 +730,7 @@ static void i915_driver_unregister(struct drm_i915_private *dev_priv)

intel_display_driver_unregister(dev_priv);

• intel_gt_driver_unregister(&dev_priv->gt);

• intel_gt_driver_unregister(to_gt(dev_priv));

  i915_perf_unregister(dev_priv); i915_pmu_unregister(dev_priv);

@@ -763,7 +763,7 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv) intel_device_info_print_static(INTEL_INFO(dev_priv), &p); intel_device_info_print_runtime(RUNTIME_INFO(dev_priv), &p); i915_print_iommu_status(dev_priv, &p);

• intel_gt_info_print(&dev_priv->gt.info, &p);
  

• intel_gt_info_print(&to_gt(dev_priv)->info, &p);
  

  }

  if (IS_ENABLED(CONFIG_DRM_I915_DEBUG))

@@ -1385,7 +1385,7 @@ static int i915_drm_resume_early(struct drm_device *dev)

intel_uncore_resume_early(&dev_priv->uncore);

• intel_gt_check_and_clear_faults(&dev_priv->gt);

• intel_gt_check_and_clear_faults(to_gt(dev_priv));

  intel_display_power_resume_early(dev_priv);

@@ -1568,7 +1568,7 @@ static int intel_runtime_suspend(struct device *kdev) */ i915_gem_runtime_suspend(dev_priv);

• intel_gt_runtime_suspend(&dev_priv->gt);

• intel_gt_runtime_suspend(to_gt(dev_priv));

  intel_runtime_pm_disable_interrupts(dev_priv);

@@ -1584,7 +1584,7 @@ static int intel_runtime_suspend(struct device *kdev)

intel_runtime_pm_enable_interrupts(dev_priv);

• intel_gt_runtime_resume(&dev_priv->gt);
  

• intel_gt_runtime_resume(to_gt(dev_priv));
  
  

  enable_rpm_wakeref_asserts(rpm);

@@ -1672,7 +1672,7 @@ static int intel_runtime_resume(struct device *kdev) * No point of rolling back things in case of an error, as the best * we can do is to hope that things will still work (and disable RPM). */

• intel_gt_runtime_resume(&dev_priv->gt);

• intel_gt_runtime_resume(to_gt(dev_priv));

  /*

  • On VLV/CHV display interrupts are part of the display

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index c6f34ac353ff..b0d929012ff3 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1548,7 +1548,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,

#define HAS_PXP(dev_priv) ((IS_ENABLED(CONFIG_DRM_I915_PXP) && \ INTEL_INFO(dev_priv)->has_pxp) && \

• 	    VDBOX_MASK(&dev_priv->gt))
  

• 	    VDBOX_MASK(to_gt(dev_priv)))
  
  

#define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 527228d4da7e..8ba2119092f2 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1049,7 +1049,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) if (ret) return ret;

• intel_uc_fetch_firmwares(&dev_priv->gt.uc);

• intel_uc_fetch_firmwares(&to_gt(dev_priv)->uc); intel_wopcm_init(&dev_priv->wopcm);

  ret = i915_init_ggtt(dev_priv);

@@ -1069,7 +1069,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) */ intel_init_clock_gating(dev_priv);

• ret = intel_gt_init(&dev_priv->gt);

• ret = intel_gt_init(to_gt(dev_priv)); if (ret) goto err_unlock;

@@ -1085,7 +1085,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) i915_gem_drain_workqueue(dev_priv);

if (ret != -EIO)

• intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
  

• intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
  
  

  if (ret == -EIO) { /*

@@ -1093,10 +1093,10 @@ int i915_gem_init(struct drm_i915_private *dev_priv) * as wedged. But we only want to do this when the GPU is angry, * for all other failure, such as an allocation failure, bail. */

• if (!intel_gt_is_wedged(&dev_priv->gt)) {
  

• if (!intel_gt_is_wedged(to_gt(dev_priv))) {
  i915_probe_error(dev_priv,
  		 "Failed to initialize GPU, declaring it wedged!\n");
  

• 	intel_gt_set_wedged(&dev_priv->gt);
  

• 	intel_gt_set_wedged(to_gt(dev_priv));
  

  }

  /* Minimal basic recovery for KMS */

@@ -1127,7 +1127,7 @@ void i915_gem_driver_remove(struct drm_i915_private *dev_priv) intel_wakeref_auto_fini(&dev_priv->ggtt.userfault_wakeref);

i915_gem_suspend_late(dev_priv);

• intel_gt_driver_remove(&dev_priv->gt);

• intel_gt_driver_remove(to_gt(dev_priv)); dev_priv->uabi_engines = RB_ROOT;

  /* Flush any outstanding unpin_work. */

@@ -1138,9 +1138,9 @@ void i915_gem_driver_remove(struct drm_i915_private *dev_priv)

void i915_gem_driver_release(struct drm_i915_private *dev_priv) {

• intel_gt_driver_release(&dev_priv->gt);

• intel_gt_driver_release(to_gt(dev_priv));

• intel_uc_cleanup_firmwares(&dev_priv->gt.uc);

• intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);

  i915_gem_drain_freed_objects(dev_priv);

diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c index 77490cb5ff9c..7f80ad247bc8 100644 --- a/drivers/gpu/drm/i915/i915_getparam.c +++ b/drivers/gpu/drm/i915/i915_getparam.c @@ -13,7 +13,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data, { struct drm_i915_private *i915 = to_i915(dev); struct pci_dev *pdev = to_pci_dev(dev->dev);

• const struct sseu_dev_info *sseu = &i915->gt.info.sseu;

• const struct sseu_dev_info *sseu = &to_gt(i915)->info.sseu; drm_i915_getparam_t *param = data; int value = 0;

@@ -82,8 +82,8 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data, break; case I915_PARAM_HAS_GPU_RESET: value = i915->params.enable_hangcheck &&

• 	intel_has_gpu_reset(&i915->gt);
  

• if (value && intel_has_reset_engine(&i915->gt))
  

• 	intel_has_gpu_reset(to_gt(i915));
  

• if (value && intel_has_reset_engine(to_gt(i915)))
  value = 2;
  

  break; case I915_PARAM_HAS_RESOURCE_STREAMER:

@@ -96,7 +96,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data, value = sseu->min_eu_in_pool; break; case I915_PARAM_HUC_STATUS:

• value = intel_huc_check_status(&i915->gt.uc.huc);
  

• value = intel_huc_check_status(&to_gt(i915)->uc.huc);
  

  if (value < 0) return value; break;

@@ -158,7 +158,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data, return -ENODEV; break; case I915_PARAM_CS_TIMESTAMP_FREQUENCY:

• value = i915->gt.clock_frequency;
  

• value = to_gt(i915)->clock_frequency;
  

  break; case I915_PARAM_MMAP_GTT_COHERENT: value = INTEL_INFO(i915)->has_coherent_ggtt;

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 96d2d99f5b98..90b5bbcd344c 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -505,7 +505,7 @@ static void error_print_context(struct drm_i915_error_state_buf *m, const char *header, const struct i915_gem_context_coredump *ctx) {

• const u32 period = m->i915->gt.clock_period_ns;

• const u32 period = to_gt(m->i915)->clock_period_ns;

  err_printf(m, "%s%s[%d] prio %d, guilty %d active %d, runtime total %lluns, avg %lluns\n", header, ctx->comm, ctx->pid, ctx->sched_attr.priority,

@@ -1849,7 +1849,7 @@ i915_gpu_coredump_alloc(struct drm_i915_private *i915, gfp_t gfp)

error->time = ktime_get_real(); error->boottime = ktime_get_boottime();

• error->uptime = ktime_sub(ktime_get(), i915->gt.last_init_time);

• error->uptime = ktime_sub(ktime_get(), to_gt(i915)->last_init_time); error->capture = jiffies;

  capture_gen(error);

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 5b98fb0532b5..21f75b069fa8 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1040,7 +1040,7 @@ static void ivb_parity_work(struct work_struct *work) { struct drm_i915_private *dev_priv = container_of(work, typeof(*dev_priv), l3_parity.error_work);

• struct intel_gt *gt = &dev_priv->gt;

• struct intel_gt *gt = to_gt(dev_priv); u32 error_status, row, bank, subbank; char *parity_event[6]; u32 misccpctl;

@@ -1718,9 +1718,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);

if (gt_iir)

• 	gen6_gt_irq_handler(&dev_priv->gt, gt_iir);
  

• 	gen6_gt_irq_handler(to_gt(dev_priv), gt_iir);
  

  if (pm_iir)

• 	gen6_rps_irq_handler(&dev_priv->gt.rps, pm_iir);
  

• 	gen6_rps_irq_handler(&to_gt(dev_priv)->rps, pm_iir);
  
  

  if (hotplug_status) i9xx_hpd_irq_handler(dev_priv, hotplug_status);

@@ -1777,7 +1777,7 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg) ier = intel_uncore_read(&dev_priv->uncore, VLV_IER); intel_uncore_write(&dev_priv->uncore, VLV_IER, 0);

• gen8_gt_irq_handler(&dev_priv->gt, master_ctl);
  

• gen8_gt_irq_handler(to_gt(dev_priv), master_ctl);
  
  

  if (iir & I915_DISPLAY_PORT_INTERRUPT) hotplug_status = i9xx_hpd_irq_ack(dev_priv);

@@ -2108,7 +2108,7 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv, }

if (DISPLAY_VER(dev_priv) == 5 && de_iir & DE_PCU_EVENT)

• gen5_rps_irq_handler(&dev_priv->gt.rps);
  

• gen5_rps_irq_handler(&to_gt(dev_priv)->rps);
  

}

static void ivb_display_irq_handler(struct drm_i915_private *dev_priv, @@ -2189,9 +2189,9 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg) if (gt_iir) { raw_reg_write(regs, GTIIR, gt_iir); if (GRAPHICS_VER(i915) >= 6)

• 	gen6_gt_irq_handler(&i915->gt, gt_iir);
  

• 	gen6_gt_irq_handler(to_gt(i915), gt_iir);
  

  else

• 	gen5_gt_irq_handler(&i915->gt, gt_iir);
  

• 	gen5_gt_irq_handler(to_gt(i915), gt_iir);
  

  ret = IRQ_HANDLED; }

@@ -2209,7 +2209,7 @@ static irqreturn_t ilk_irq_handler(int irq, void *arg) u32 pm_iir = raw_reg_read(regs, GEN6_PMIIR); if (pm_iir) { raw_reg_write(regs, GEN6_PMIIR, pm_iir);

• 	gen6_rps_irq_handler(&i915->gt.rps, pm_iir);
  

• 	gen6_rps_irq_handler(&to_gt(i915)->rps, pm_iir);
  ret = IRQ_HANDLED;
  

  } }

@@ -2635,7 +2635,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) }

/* Find, queue (onto bottom-halves), then clear each source */

• gen8_gt_irq_handler(&dev_priv->gt, master_ctl);

• gen8_gt_irq_handler(to_gt(dev_priv), master_ctl);

  /* IRQs are synced during runtime_suspend, we don't require a wakeref */ if (master_ctl & ~GEN8_GT_IRQS) {

@@ -2715,7 +2715,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) { struct drm_i915_private *i915 = arg; void __iomem * const regs = i915->uncore.regs;

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); u32 master_ctl; u32 gu_misc_iir;

@@ -2771,7 +2771,7 @@ static inline void dg1_master_intr_enable(void __iomem * const regs) static irqreturn_t dg1_irq_handler(int irq, void *arg) { struct drm_i915_private * const i915 = arg;

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); void __iomem * const regs = gt->uncore->regs; u32 master_tile_ctl, master_ctl; u32 gu_misc_iir;

@@ -3075,7 +3075,7 @@ static void ilk_irq_reset(struct drm_i915_private *dev_priv) intel_uncore_write(uncore, EDP_PSR_IIR, 0xffffffff); }

• gen5_gt_irq_reset(&dev_priv->gt);

• gen5_gt_irq_reset(to_gt(dev_priv));

  ibx_irq_reset(dev_priv);

} @@ -3085,7 +3085,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv) intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, 0); intel_uncore_posting_read(&dev_priv->uncore, VLV_MASTER_IER);

• gen5_gt_irq_reset(&dev_priv->gt);

• gen5_gt_irq_reset(to_gt(dev_priv));

  spin_lock_irq(&dev_priv->irq_lock); if (dev_priv->display_irqs_enabled)

@@ -3119,7 +3119,7 @@ static void gen8_irq_reset(struct drm_i915_private *dev_priv)

gen8_master_intr_disable(dev_priv->uncore.regs);

• gen8_gt_irq_reset(&dev_priv->gt);

• gen8_gt_irq_reset(to_gt(dev_priv)); gen8_display_irq_reset(dev_priv); GEN3_IRQ_RESET(uncore, GEN8_PCU_);

@@ -3173,7 +3173,7 @@ static void gen11_display_irq_reset(struct drm_i915_private *dev_priv)

static void gen11_irq_reset(struct drm_i915_private *dev_priv) {

• struct intel_gt *gt = &dev_priv->gt;

• struct intel_gt *gt = to_gt(dev_priv); struct intel_uncore *uncore = gt->uncore;

  gen11_master_intr_disable(dev_priv->uncore.regs);

@@ -3187,7 +3187,7 @@ static void gen11_irq_reset(struct drm_i915_private *dev_priv)

static void dg1_irq_reset(struct drm_i915_private *dev_priv) {

• struct intel_gt *gt = &dev_priv->gt;

• struct intel_gt *gt = to_gt(dev_priv); struct intel_uncore *uncore = gt->uncore;

  dg1_master_intr_disable(dev_priv->uncore.regs);

@@ -3252,7 +3252,7 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv) intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, 0); intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ);

• gen8_gt_irq_reset(&dev_priv->gt);

• gen8_gt_irq_reset(to_gt(dev_priv));

  GEN3_IRQ_RESET(uncore, GEN8_PCU_);

@@ -3709,7 +3709,7 @@ static void ilk_irq_postinstall(struct drm_i915_private *dev_priv)

ibx_irq_postinstall(dev_priv);

• gen5_gt_irq_postinstall(&dev_priv->gt);

• gen5_gt_irq_postinstall(to_gt(dev_priv));

  GEN3_IRQ_INIT(uncore, DE, dev_priv->irq_mask, display_mask | extra_mask);

@@ -3746,7 +3746,7 @@ void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv)

static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv) {

• gen5_gt_irq_postinstall(&dev_priv->gt);

• gen5_gt_irq_postinstall(to_gt(dev_priv));

  spin_lock_irq(&dev_priv->irq_lock); if (dev_priv->display_irqs_enabled)

@@ -3852,7 +3852,7 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv) else if (HAS_PCH_SPLIT(dev_priv)) ibx_irq_postinstall(dev_priv);

• gen8_gt_irq_postinstall(&dev_priv->gt);

• gen8_gt_irq_postinstall(to_gt(dev_priv)); gen8_de_irq_postinstall(dev_priv);

  gen8_master_intr_enable(dev_priv->uncore.regs);

@@ -3871,7 +3871,7 @@ static void gen11_de_irq_postinstall(struct drm_i915_private *dev_priv)

static void gen11_irq_postinstall(struct drm_i915_private *dev_priv) {

• struct intel_gt *gt = &dev_priv->gt;

• struct intel_gt *gt = to_gt(dev_priv); struct intel_uncore *uncore = gt->uncore; u32 gu_misc_masked = GEN11_GU_MISC_GSE;

@@ -3889,7 +3889,7 @@ static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)

static void dg1_irq_postinstall(struct drm_i915_private *dev_priv) {

• struct intel_gt *gt = &dev_priv->gt;

• struct intel_gt *gt = to_gt(dev_priv); struct intel_uncore *uncore = gt->uncore; u32 gu_misc_masked = GEN11_GU_MISC_GSE;

@@ -3910,7 +3910,7 @@ static void dg1_irq_postinstall(struct drm_i915_private *dev_priv)

static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv) {

• gen8_gt_irq_postinstall(&dev_priv->gt);

• gen8_gt_irq_postinstall(to_gt(dev_priv));

  spin_lock_irq(&dev_priv->irq_lock); if (dev_priv->display_irqs_enabled)

@@ -4073,7 +4073,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg) intel_uncore_write16(&dev_priv->uncore, GEN2_IIR, iir);

if (iir & I915_USER_INTERRUPT)

• 	intel_engine_cs_irq(dev_priv->gt.engine[RCS0], iir);
  

• 	intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir);
  
  

  if (iir & I915_MASTER_ERROR_INTERRUPT) i8xx_error_irq_handler(dev_priv, eir, eir_stuck);

@@ -4181,7 +4181,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg) intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir);

if (iir & I915_USER_INTERRUPT)

• 	intel_engine_cs_irq(dev_priv->gt.engine[RCS0], iir);
  

• 	intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir);
  
  

  if (iir & I915_MASTER_ERROR_INTERRUPT) i9xx_error_irq_handler(dev_priv, eir, eir_stuck);

@@ -4326,11 +4326,11 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir);

if (iir & I915_USER_INTERRUPT)

• 	intel_engine_cs_irq(dev_priv->gt.engine[RCS0],
  

• 	intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0],
  		    iir);
  
  

  if (iir & I915_BSD_USER_INTERRUPT)

• 	intel_engine_cs_irq(dev_priv->gt.engine[VCS0],
  

• 	intel_engine_cs_irq(to_gt(dev_priv)->engine[VCS0],
  		    iir >> 25);
  
  

  if (iir & I915_MASTER_ERROR_INTERRUPT)

@@ -4381,7 +4381,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)

/* pre-gen11 the guc irqs bits are in the upper 16 bits of the pm reg */ if (HAS_GT_UC(dev_priv) && GRAPHICS_VER(dev_priv) < 11)

• dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16;
  

• to_gt(dev_priv)->pm_guc_events = GUC_INTR_GUC2HOST << 16;
  
  

  if (!HAS_DISPLAY(dev_priv)) return;

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 2f01b8c0284c..170bba913c30 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -4443,7 +4443,7 @@ void i915_perf_init(struct drm_i915_private *i915) mutex_init(&perf->lock);

/* Choose a representative limit */

• oa_sample_rate_hard_limit = i915->gt.clock_frequency / 2;
  

• oa_sample_rate_hard_limit = to_gt(i915)->clock_frequency / 2;
  
  

  mutex_init(&perf->metrics_lock); idr_init_base(&perf->metrics_idr, 1);

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index 0b488d49694c..ea655161793e 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -210,8 +210,8 @@ static void init_rc6(struct i915_pmu *pmu) struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu); intel_wakeref_t wakeref;

• with_intel_runtime_pm(i915->gt.uncore->rpm, wakeref) {

• pmu->sample[__I915_SAMPLE_RC6].cur = __get_rc6(&i915->gt);
  

• with_intel_runtime_pm(to_gt(i915)->uncore->rpm, wakeref) {

• pmu->sample[__I915_SAMPLE_RC6].cur = __get_rc6(to_gt(i915));
  

  pmu->sample[__I915_SAMPLE_RC6_LAST_REPORTED].cur = pmu->sample[__I915_SAMPLE_RC6].cur; pmu->sleep_last = ktime_get_raw();

@@ -222,7 +222,7 @@ static void park_rc6(struct drm_i915_private *i915) { struct i915_pmu *pmu = &i915->pmu;

• pmu->sample[__I915_SAMPLE_RC6].cur = __get_rc6(&i915->gt);

• pmu->sample[__I915_SAMPLE_RC6].cur = __get_rc6(to_gt(i915)); pmu->sleep_last = ktime_get_raw();

}

@@ -419,7 +419,7 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer) struct drm_i915_private *i915 = container_of(hrtimer, struct drm_i915_private, pmu.timer); struct i915_pmu *pmu = &i915->pmu;

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); unsigned int period_ns; ktime_t now;

@@ -476,7 +476,7 @@ engine_event_status(struct intel_engine_cs *engine, static int config_status(struct drm_i915_private *i915, u64 config) {

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915);

  switch (config) { case I915_PMU_ACTUAL_FREQUENCY:

@@ -601,10 +601,10 @@ static u64 __i915_pmu_event_read(struct perf_event *event) val = READ_ONCE(pmu->irq_count); break; case I915_PMU_RC6_RESIDENCY:

• 	val = get_rc6(&i915->gt);
  

• 	val = get_rc6(to_gt(i915));
  break;
  

  case I915_PMU_SOFTWARE_GT_AWAKE_TIME:

• 	val = ktime_to_ns(intel_gt_get_awake_time(&i915->gt));
  

• 	val = ktime_to_ns(intel_gt_get_awake_time(to_gt(i915)));
  break;
  

  } }

diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index 51b368be0fc4..2dfbc22857a3 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -31,7 +31,7 @@ static int copy_query_item(void *query_hdr, size_t query_sz, static int query_topology_info(struct drm_i915_private *dev_priv, struct drm_i915_query_item *query_item) {

• const struct sseu_dev_info *sseu = &dev_priv->gt.info.sseu;

• const struct sseu_dev_info *sseu = &to_gt(dev_priv)->info.sseu; struct drm_i915_query_topology_info topo; u32 slice_length, subslice_length, eu_length, total_length; int ret;

diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 59d441cedc75..fae4d1f4f275 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -52,7 +52,7 @@ static u32 calc_residency(struct drm_i915_private *dev_priv, u64 res = 0;

with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref)

• res = intel_rc6_residency_us(&dev_priv->gt.rc6, reg);
  

• res = intel_rc6_residency_us(&to_gt(dev_priv)->rc6, reg);
  
  

  return DIV_ROUND_CLOSEST_ULL(res, 1000);

} @@ -260,7 +260,7 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) { struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);

• struct intel_rps *rps = &i915->gt.rps;

• struct intel_rps *rps = &to_gt(i915)->rps;

  return sysfs_emit(buf, "%d\n", intel_rps_read_actual_frequency(rps));

} @@ -269,7 +269,7 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) { struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);

• struct intel_rps *rps = &i915->gt.rps;

• struct intel_rps *rps = &to_gt(i915)->rps;

  return sysfs_emit(buf, "%d\n", intel_rps_get_requested_frequency(rps));

} @@ -277,7 +277,7 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev, static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) { struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);

• struct intel_rps *rps = &i915->gt.rps;

• struct intel_rps *rps = &to_gt(i915)->rps;

  return sysfs_emit(buf, "%d\n", intel_rps_get_boost_frequency(rps));

} @@ -287,7 +287,7 @@ static ssize_t gt_boost_freq_mhz_store(struct device *kdev, const char *buf, size_t count) { struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);

• struct intel_rps *rps = &dev_priv->gt.rps;

• struct intel_rps *rps = &to_gt(dev_priv)->rps; ssize_t ret; u32 val;

@@ -304,7 +304,7 @@ static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) { struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);

• struct intel_rps *rps = &dev_priv->gt.rps;

• struct intel_rps *rps = &to_gt(dev_priv)->rps;

  return sysfs_emit(buf, "%d\n", intel_gpu_freq(rps, rps->efficient_freq));

} @@ -312,7 +312,7 @@ static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev, static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) { struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);

• struct intel_gt *gt = &dev_priv->gt;

• struct intel_gt *gt = to_gt(dev_priv); struct intel_rps *rps = &gt->rps;

  return sysfs_emit(buf, "%d\n", intel_rps_get_max_frequency(rps));

@@ -323,7 +323,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, const char *buf, size_t count) { struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);

• struct intel_gt *gt = &dev_priv->gt;

• struct intel_gt *gt = to_gt(dev_priv); struct intel_rps *rps = &gt->rps; ssize_t ret; u32 val;

@@ -340,7 +340,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) { struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); struct intel_rps *rps = &gt->rps;

  return sysfs_emit(buf, "%d\n", intel_rps_get_min_frequency(rps));

@@ -351,7 +351,7 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, const char *buf, size_t count) { struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);

• struct intel_rps *rps = &i915->gt.rps;

• struct intel_rps *rps = &to_gt(i915)->rps; ssize_t ret; u32 val;

@@ -381,7 +381,7 @@ static DEVICE_ATTR(gt_RPn_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL); static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf) { struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);

• struct intel_rps *rps = &dev_priv->gt.rps;

• struct intel_rps *rps = &to_gt(dev_priv)->rps; u32 val;

  if (attr == &dev_attr_gt_RP0_freq_mhz)

diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c index 4e70c1a9ef2e..cf6e98962d82 100644 --- a/drivers/gpu/drm/i915/intel_gvt.c +++ b/drivers/gpu/drm/i915/intel_gvt.c @@ -109,7 +109,7 @@ int intel_gvt_init(struct drm_i915_private *dev_priv) return 0; }

• if (intel_uc_wants_guc_submission(&dev_priv->gt.uc)) {

• if (intel_uc_wants_guc_submission(&to_gt(dev_priv)->uc)) { drm_err(&dev_priv->drm, "i915 GVT-g loading failed due to Graphics virtualization is not yet supported with GuC submission\n"); return -EIO;

diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c index 5e511bb891f9..f06d21005106 100644 --- a/drivers/gpu/drm/i915/intel_wopcm.c +++ b/drivers/gpu/drm/i915/intel_wopcm.c @@ -220,7 +220,7 @@ static bool __wopcm_regs_locked(struct intel_uncore *uncore, void intel_wopcm_init(struct intel_wopcm *wopcm) { struct drm_i915_private *i915 = wopcm_to_i915(wopcm);

• struct intel_gt *gt = &i915->gt;

• struct intel_gt *gt = to_gt(i915); u32 guc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.guc.fw); u32 huc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.huc.fw); u32 ctx_rsvd = context_reserved_size(i915);

-- 2.34.1

On Thu, Dec 09, 2021 at 03:25:11PM +0200, Andi Shyti wrote:

From: Michał Winiarski michal.winiarski@intel.com

GGTT is currently available both through i915->ggtt and gt->ggtt, and we eventually want to get rid of the i915->ggtt one. Use to_gt() for all i915->ggtt accesses to help with the future refactoring.

I think we can also convert the two references in i915_drm_suspend() and i915_drm_resume(), right? With those converted, I think the only remaining use of i915->ggtt will be the call to intel_gt_init_hw_early() during startup that assigns the gt->ggtt pointer. Maybe we should just make that function assign a drmm_kzalloc() and drop the i915->ggtt completely?

Matt

Signed-off-by: Michał Winiarski michal.winiarski@intel.com Cc: Michal Wajdeczko michal.wajdeczko@intel.com Signed-off-by: Andi Shyti andi.shyti@linux.intel.com

---

drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- .../gpu/drm/i915/display/intel_plane_initial.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_context.h | 2 +- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 16 ++++++++-------- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 6 +++--- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +- .../drm/i915/gem/selftests/i915_gem_client_blt.c | 2 +- .../drm/i915/gem/selftests/i915_gem_context.c | 2 +- .../gpu/drm/i915/gem/selftests/i915_gem_mman.c | 16 ++++++++-------- .../gpu/drm/i915/gem/selftests/i915_gem_object.c | 2 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 14 +++++++------- drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 6 +++--- drivers/gpu/drm/i915/gt/intel_region_lmem.c | 4 ++-- drivers/gpu/drm/i915/gt/selftest_reset.c | 2 +- drivers/gpu/drm/i915/i915_driver.c | 4 ++-- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_gem.c | 16 ++++++++-------- drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++--- drivers/gpu/drm/i915/i915_getparam.c | 2 +- drivers/gpu/drm/i915/i915_perf.c | 4 ++-- drivers/gpu/drm/i915/selftests/i915_gem.c | 8 ++++---- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 6 +++--- drivers/gpu/drm/i915/selftests/i915_request.c | 2 +- drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 4 ++-- drivers/gpu/drm/i915/selftests/mock_gtt.c | 2 +- 28 files changed, 70 insertions(+), 70 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 8be01b93015f..98319c0322d7 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -595,7 +595,7 @@ static void ivb_fbc_activate(struct intel_fbc *fbc) else if (DISPLAY_VER(i915) == 9) skl_fbc_program_cfb_stride(fbc);

• if (i915->ggtt.num_fences)

• if (to_gt(i915)->ggtt->num_fences) snb_fbc_program_fence(fbc);

  intel_de_write(i915, ILK_DPFC_CONTROL,

diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c b/drivers/gpu/drm/i915/display/intel_plane_initial.c index 01ce1d72297f..e4186a0b8edb 100644 --- a/drivers/gpu/drm/i915/display/intel_plane_initial.c +++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c @@ -94,7 +94,7 @@ initial_plane_vma(struct drm_i915_private *i915, goto err_obj; }

• vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);

• vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL); if (IS_ERR(vma)) goto err_obj;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h b/drivers/gpu/drm/i915/gem/i915_gem_context.h index babfecb17ad1..e5b0f66ea1fe 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h @@ -174,7 +174,7 @@ i915_gem_context_get_eb_vm(struct i915_gem_context *ctx)

vm = ctx->vm; if (!vm)

• vm = &ctx->i915->ggtt.vm;
  

• vm = &to_gt(ctx->i915)->ggtt->vm;
  

  vm = i915_vm_get(vm);

  return vm;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index ec7c4a29a720..3078611d5bfe 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -1106,7 +1106,7 @@ static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache) { struct drm_i915_private *i915 = container_of(cache, struct i915_execbuffer, reloc_cache)->i915;

• return &i915->ggtt;

• return to_gt(i915)->ggtt;

}

static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer *eb) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index 1ca5c062974e..bd5890780810 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -295,7 +295,7 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) struct drm_device *dev = obj->base.dev; struct drm_i915_private *i915 = to_i915(dev); struct intel_runtime_pm *rpm = &i915->runtime_pm;

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; bool write = area->vm_flags & VM_WRITE; struct i915_gem_ww_ctx ww; intel_wakeref_t wakeref;

@@ -388,16 +388,16 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) assert_rpm_wakelock_held(rpm);

/* Mark as being mmapped into userspace for later revocation */

• mutex_lock(&i915->ggtt.vm.mutex);

• mutex_lock(&to_gt(i915)->ggtt->vm.mutex); if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)

• list_add(&obj->userfault_link, &i915->ggtt.userfault_list);
  

• mutex_unlock(&i915->ggtt.vm.mutex);

• list_add(&obj->userfault_link, &to_gt(i915)->ggtt->userfault_list);
  

• mutex_unlock(&to_gt(i915)->ggtt->vm.mutex);

  /* Track the mmo associated with the fenced vma */ vma->mmo = mmo;

  if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)

• intel_wakeref_auto(&i915->ggtt.userfault_wakeref,
  

• intel_wakeref_auto(&to_gt(i915)->ggtt->userfault_wakeref,
  	   msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
  
  

  if (write) {

@@ -512,7 +512,7 @@ void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj) * wakeref. */ wakeref = intel_runtime_pm_get(&i915->runtime_pm);

• mutex_lock(&i915->ggtt.vm.mutex);

• mutex_lock(&to_gt(i915)->ggtt->vm.mutex);

  if (!obj->userfault_count) goto out;

@@ -530,7 +530,7 @@ void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj) wmb();

out:

• mutex_unlock(&i915->ggtt.vm.mutex);

• mutex_unlock(&to_gt(i915)->ggtt->vm.mutex); intel_runtime_pm_put(&i915->runtime_pm, wakeref);

}

@@ -787,7 +787,7 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,

switch (args->flags) { case I915_MMAP_OFFSET_GTT:

• if (!i915_ggtt_has_aperture(&i915->ggtt))
  

• if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
  return -ENODEV;
  

  type = I915_MMAP_TYPE_GTT; break;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c index ac56124760e1..6da68b38f00f 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c @@ -23,7 +23,7 @@ void i915_gem_suspend(struct drm_i915_private *i915) { GEM_TRACE("%s\n", dev_name(i915->drm.dev));

• intel_wakeref_auto(&i915->ggtt.userfault_wakeref, 0);

• intel_wakeref_auto(&to_gt(i915)->ggtt->userfault_wakeref, 0); flush_workqueue(i915->wq);

  /*

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c index 05a1ba2f2e7b..793fbf3da46b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c @@ -403,9 +403,9 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned long event, void *ptr I915_SHRINK_VMAPS);

/* We also want to clear any cached iomaps as they wrap vmap */

• mutex_lock(&i915->ggtt.vm.mutex);

• mutex_lock(&to_gt(i915)->ggtt->vm.mutex); list_for_each_entry_safe(vma, next,

• 		 &i915->ggtt.vm.bound_list, vm_link) {
  

• 		 &to_gt(i915)->ggtt->vm.bound_list, vm_link) {
  

  unsigned long count = vma->node.size >> PAGE_SHIFT;

  if (!vma->iomap || i915_vma_is_active(vma))

@@ -414,7 +414,7 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned long event, void *ptr if (__i915_vma_unbind(vma) == 0) freed_pages += count; }

• mutex_unlock(&i915->ggtt.vm.mutex);

• mutex_unlock(&to_gt(i915)->ggtt->vm.mutex);

  *(unsigned long *)ptr += freed_pages; return NOTIFY_DONE;

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c index bce03d74a0b4..eb6bf6779d2c 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c @@ -71,7 +71,7 @@ void i915_gem_stolen_remove_node(struct drm_i915_private *i915, static int i915_adjust_stolen(struct drm_i915_private *i915, struct resource *dsm) {

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; struct intel_uncore *uncore = ggtt->vm.gt->uncore; struct resource *r;

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c index 75947e9dada2..c08f766e6e15 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c @@ -543,7 +543,7 @@ static bool has_bit17_swizzle(int sw)

static bool bad_swizzling(struct drm_i915_private *i915) {

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt;

  if (i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) return true;

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c index 45398adda9c8..250fe3ba6def 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c @@ -1374,7 +1374,7 @@ static int igt_ctx_readonly(void *arg) goto out_file; }

• vm = ctx->vm ?: &i915->ggtt.alias->vm;

• vm = ctx->vm ?: &to_gt(i915)->ggtt->alias->vm; if (!vm || !vm->has_read_only) { err = 0; goto out_file;

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c index 743e6ab2c40b..ebe41a8ea36c 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c @@ -307,7 +307,7 @@ static int igt_partial_tiling(void *arg) int tiling; int err;

• if (!i915_ggtt_has_aperture(&i915->ggtt))

• if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt)) return 0;

  /* We want to check the page mapping and fencing of a large object

@@ -320,7 +320,7 @@ static int igt_partial_tiling(void *arg)

obj = huge_gem_object(i915, nreal << PAGE_SHIFT,

• 	      (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
  

• 	      (1 + next_prime_number(to_gt(i915)->ggtt->vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
  

  if (IS_ERR(obj)) return PTR_ERR(obj);

@@ -366,10 +366,10 @@ static int igt_partial_tiling(void *arg) tile.tiling = tiling; switch (tiling) { case I915_TILING_X:

• 	tile.swizzle = i915->ggtt.bit_6_swizzle_x;
  

• 	tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_x;
  break;
  

  case I915_TILING_Y:

• 	tile.swizzle = i915->ggtt.bit_6_swizzle_y;
  

• 	tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_y;
  break;
  

  }

@@ -440,7 +440,7 @@ static int igt_smoke_tiling(void *arg) IGT_TIMEOUT(end); int err;

• if (!i915_ggtt_has_aperture(&i915->ggtt))

• if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt)) return 0;

  /*

@@ -457,7 +457,7 @@ static int igt_smoke_tiling(void *arg)

obj = huge_gem_object(i915, nreal << PAGE_SHIFT,

• 	      (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
  

• 	      (1 + next_prime_number(to_gt(i915)->ggtt->vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
  

  if (IS_ERR(obj)) return PTR_ERR(obj);

@@ -486,10 +486,10 @@ static int igt_smoke_tiling(void *arg) break;

case I915_TILING_X:

• 	tile.swizzle = i915->ggtt.bit_6_swizzle_x;
  

• 	tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_x;
  break;
  

  case I915_TILING_Y:

• 	tile.swizzle = i915->ggtt.bit_6_swizzle_y;
  

• 	tile.swizzle = to_gt(i915)->ggtt->bit_6_swizzle_y;
  break;
  

  }

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c index 740ee8086a27..fe0a890775e2 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c @@ -43,7 +43,7 @@ static int igt_gem_huge(void *arg)

obj = huge_gem_object(i915, nreal * PAGE_SIZE,

• 	      i915->ggtt.vm.total + PAGE_SIZE);
  

• 	      to_gt(i915)->ggtt->vm.total + PAGE_SIZE);
  

  if (IS_ERR(obj)) return PTR_ERR(obj);

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c index f5c8fd3911b0..75e99160b31f 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -89,7 +89,7 @@ int i915_ggtt_init_hw(struct drm_i915_private *i915) * beyond the end of the batch buffer, across the page boundary, * and beyond the end of the GTT if we do not provide a guard. */

• ret = ggtt_init_hw(&i915->ggtt);

• ret = ggtt_init_hw(to_gt(i915)->ggtt); if (ret) return ret;

@@ -725,14 +725,14 @@ int i915_init_ggtt(struct drm_i915_private *i915) { int ret;

• ret = init_ggtt(&i915->ggtt);

• ret = init_ggtt(to_gt(i915)->ggtt); if (ret) return ret;

  if (INTEL_PPGTT(i915) == INTEL_PPGTT_ALIASING) {

• ret = init_aliasing_ppgtt(&i915->ggtt);
  

• ret = init_aliasing_ppgtt(to_gt(i915)->ggtt);
  

  if (ret)

• 	cleanup_init_ggtt(&i915->ggtt);
  

• 	cleanup_init_ggtt(to_gt(i915)->ggtt);
  

  }

  return 0;

@@ -775,7 +775,7 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt) */ void i915_ggtt_driver_release(struct drm_i915_private *i915) {

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt;

  fini_aliasing_ppgtt(ggtt);

@@ -790,7 +790,7 @@ void i915_ggtt_driver_release(struct drm_i915_private *i915) */ void i915_ggtt_driver_late_release(struct drm_i915_private *i915) {

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt;

  GEM_WARN_ON(kref_read(&ggtt->vm.resv_ref) != 1); dma_resv_fini(&ggtt->vm._resv);

@@ -1229,7 +1229,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *i915) { int ret;

• ret = ggtt_probe_hw(&i915->ggtt, to_gt(i915));

• ret = ggtt_probe_hw(to_gt(i915)->ggtt, to_gt(i915)); if (ret) return ret;

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c index f8948de72036..beabf3bc9b75 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c @@ -728,8 +728,8 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt) swizzle_y = I915_BIT_6_SWIZZLE_NONE; }

• i915->ggtt.bit_6_swizzle_x = swizzle_x;
• i915->ggtt.bit_6_swizzle_y = swizzle_y;

• to_gt(i915)->ggtt->bit_6_swizzle_x = swizzle_x;
• to_gt(i915)->ggtt->bit_6_swizzle_y = swizzle_y;

}

/* @@ -896,7 +896,7 @@ void intel_gt_init_swizzling(struct intel_gt *gt) struct intel_uncore *uncore = gt->uncore;

if (GRAPHICS_VER(i915) < 5 ||

•    i915->ggtt.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
  

•    to_gt(i915)->ggtt->bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
  

  return;

  intel_uncore_rmw(uncore, DISP_ARB_CTL, 0, DISP_TILE_SURFACE_SWIZZLING);

diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c index 9ea49e0a27c0..b255cf4c26e6 100644 --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c @@ -15,7 +15,7 @@ static int init_fake_lmem_bar(struct intel_memory_region *mem) { struct drm_i915_private *i915 = mem->i915;

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; unsigned long n; int ret;

@@ -131,7 +131,7 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt) if (!i915->params.fake_lmem_start) return ERR_PTR(-ENODEV);

• GEM_BUG_ON(i915_ggtt_has_aperture(&i915->ggtt));

• GEM_BUG_ON(i915_ggtt_has_aperture(to_gt(i915)->ggtt));

  /* Your mappable aperture belongs to me now! */ mappable_end = pci_resource_len(pdev, 2);

diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c index 8a873f6bda7f..37c38bdd5f47 100644 --- a/drivers/gpu/drm/i915/gt/selftest_reset.c +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c @@ -19,7 +19,7 @@ __igt_reset_stolen(struct intel_gt *gt, intel_engine_mask_t mask, const char *msg) {

• struct i915_ggtt *ggtt = &gt->i915->ggtt;

• struct i915_ggtt *ggtt = gt->ggtt; const struct resource *dsm = &gt->i915->dsm; resource_size_t num_pages, page; struct intel_engine_cs *engine;

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 95174938b160..60f8cbf24de7 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -571,6 +571,8 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)

i915_perf_init(dev_priv);

• intel_gt_init_hw_early(to_gt(dev_priv), &dev_priv->ggtt);
• ret = i915_ggtt_probe_hw(dev_priv); if (ret) goto err_perf;

@@ -587,8 +589,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) if (ret) goto err_ggtt;

• intel_gt_init_hw_early(to_gt(dev_priv), &dev_priv->ggtt);
• ret = intel_gt_probe_lmem(to_gt(dev_priv)); if (ret) goto err_mem_regions;

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b0d929012ff3..96e3553838ef 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1757,7 +1757,7 @@ static inline bool i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_objec { struct drm_i915_private *i915 = to_i915(obj->base.dev);

• return i915->ggtt.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&

• return to_gt(i915)->ggtt->bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 && i915_gem_object_is_tiled(obj);

}

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 8ba2119092f2..d94f901ea61f 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -289,7 +289,7 @@ static struct i915_vma *i915_gem_gtt_prepare(struct drm_i915_gem_object *obj, bool write) { struct drm_i915_private *i915 = to_i915(obj->base.dev);

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; struct i915_vma *vma; struct i915_gem_ww_ctx ww; int ret;

@@ -350,7 +350,7 @@ static void i915_gem_gtt_cleanup(struct drm_i915_gem_object *obj, struct i915_vma *vma) { struct drm_i915_private *i915 = to_i915(obj->base.dev);

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt;

  i915_gem_object_unpin_pages(obj); if (drm_mm_node_allocated(node)) {

@@ -366,7 +366,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj, const struct drm_i915_gem_pread *args) { struct drm_i915_private *i915 = to_i915(obj->base.dev);

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; intel_wakeref_t wakeref; struct drm_mm_node node; void __user *user_data;

@@ -522,7 +522,7 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj, const struct drm_i915_gem_pwrite *args) { struct drm_i915_private *i915 = to_i915(obj->base.dev);

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; struct intel_runtime_pm *rpm = &i915->runtime_pm; intel_wakeref_t wakeref; struct drm_mm_node node;

@@ -823,7 +823,7 @@ void i915_gem_runtime_suspend(struct drm_i915_private *i915) */

list_for_each_entry_safe(obj, on,

• 		 &i915->ggtt.userfault_list, userfault_link)
  

• 		 &to_gt(i915)->ggtt->userfault_list, userfault_link)
  

  __i915_gem_object_release_mmap_gtt(obj);

  /*

@@ -831,8 +831,8 @@ void i915_gem_runtime_suspend(struct drm_i915_private *i915) * in use by hardware (i.e. they are pinned), we should not be powering * down! All other fences will be reacquired by the user upon waking. */

• for (i = 0; i < i915->ggtt.num_fences; i++) {

• struct i915_fence_reg *reg = &i915->ggtt.fence_regs[i];
  

• for (i = 0; i < to_gt(i915)->ggtt->num_fences; i++) {

• struct i915_fence_reg *reg = &to_gt(i915)->ggtt->fence_regs[i];
  
  

  /*

  • Ideally we want to assert that the fence register is not

@@ -873,7 +873,7 @@ i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj, u64 size, u64 alignment, u64 flags) { struct drm_i915_private *i915 = to_i915(obj->base.dev);

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; struct i915_vma *vma; int ret;

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index cd5f2348a187..2f2ba7a2955d 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -56,7 +56,7 @@ void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj, struct sg_table *pages) { struct drm_i915_private *i915 = to_i915(obj->base.dev);

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt;

  /* XXX This does not prevent more requests being submitted! */ if (unlikely(ggtt->do_idle_maps))

@@ -103,7 +103,7 @@ int i915_gem_gtt_reserve(struct i915_address_space *vm, GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE)); GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT)); GEM_BUG_ON(range_overflows(offset, size, vm->total));

• GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm);

• GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm); GEM_BUG_ON(drm_mm_node_allocated(node));

  node->size = size;

@@ -201,7 +201,7 @@ int i915_gem_gtt_insert(struct i915_address_space *vm, GEM_BUG_ON(start >= end); GEM_BUG_ON(start > 0 && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE)); GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));

• GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm);

• GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm); GEM_BUG_ON(drm_mm_node_allocated(node));

  if (unlikely(range_overflows(start, size, end)))

diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c index 7f80ad247bc8..5b8a2157d797 100644 --- a/drivers/gpu/drm/i915/i915_getparam.c +++ b/drivers/gpu/drm/i915/i915_getparam.c @@ -31,7 +31,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data, value = pdev->revision; break; case I915_PARAM_NUM_FENCES_AVAIL:

• value = i915->ggtt.num_fences;
  

• value = to_gt(i915)->ggtt->num_fences;
  

  break; case I915_PARAM_HAS_OVERLAY: value = !!i915->overlay;

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 170bba913c30..128315aec517 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1630,7 +1630,7 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) struct drm_i915_gem_object *bo; struct i915_vma *vma; const u64 delay_ticks = 0xffffffffffffffff -

• intel_gt_ns_to_clock_interval(stream->perf->i915->ggtt.vm.gt,
  

• intel_gt_ns_to_clock_interval(to_gt(stream->perf->i915)->ggtt->vm.gt,
  		      atomic64_read(&stream->perf->noa_programming_delay));
  

  const u32 base = stream->engine->mmio_base;

#define CS_GPR(x) GEN8_RING_CS_GPR(base, x) @@ -3542,7 +3542,7 @@ i915_perf_open_ioctl_locked(struct i915_perf *perf,

static u64 oa_exponent_to_ns(struct i915_perf *perf, int exponent) {

• return intel_gt_clock_interval_to_ns(perf->i915->ggtt.vm.gt,

• return intel_gt_clock_interval_to_ns(to_gt(perf->i915)->ggtt->vm.gt, 2ULL << exponent);

}

diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c index b5576888cd78..1628b81d0a35 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c @@ -41,7 +41,7 @@ static int switch_to_context(struct i915_gem_context *ctx)

static void trash_stolen(struct drm_i915_private *i915) {

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; const u64 slot = ggtt->error_capture.start; const resource_size_t size = resource_size(&i915->dsm); unsigned long page;

@@ -99,7 +99,7 @@ static void igt_pm_suspend(struct drm_i915_private *i915) intel_wakeref_t wakeref;

with_intel_runtime_pm(&i915->runtime_pm, wakeref) {

• i915_ggtt_suspend(&i915->ggtt);
  

• i915_ggtt_suspend(to_gt(i915)->ggtt);
  

  i915_gem_suspend_late(i915); }

} @@ -109,7 +109,7 @@ static void igt_pm_hibernate(struct drm_i915_private *i915) intel_wakeref_t wakeref;

with_intel_runtime_pm(&i915->runtime_pm, wakeref) {

• i915_ggtt_suspend(&i915->ggtt);
  

• i915_ggtt_suspend(to_gt(i915)->ggtt);
  
  

  i915_gem_freeze(i915); i915_gem_freeze_late(i915);

@@ -125,7 +125,7 @@ static void igt_pm_resume(struct drm_i915_private *i915) * that runtime-pm just works. */ with_intel_runtime_pm(&i915->runtime_pm, wakeref) {

• i915_ggtt_resume(&i915->ggtt);
  

• i915_ggtt_resume(to_gt(i915)->ggtt);
  

  i915_gem_resume(i915); }

} diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index 48123c3e1ff0..9afe7cf9d068 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -1122,7 +1122,7 @@ static int exercise_ggtt(struct drm_i915_private *i915, u64 hole_start, u64 hole_end, unsigned long end_time)) {

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; u64 hole_start, hole_end, last = 0; struct drm_mm_node *node; IGT_TIMEOUT(end_time);

@@ -1182,7 +1182,7 @@ static int igt_ggtt_page(void *arg) const unsigned int count = PAGE_SIZE/sizeof(u32); I915_RND_STATE(prng); struct drm_i915_private *i915 = arg;

• struct i915_ggtt *ggtt = &i915->ggtt;

• struct i915_ggtt *ggtt = to_gt(i915)->ggtt; struct drm_i915_gem_object *obj; intel_wakeref_t wakeref; struct drm_mm_node tmp;

@@ -2110,7 +2110,7 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_cs_tlb), };

• GEM_BUG_ON(offset_in_page(i915->ggtt.vm.total));

• GEM_BUG_ON(offset_in_page(to_gt(i915)->ggtt->vm.total));

  return i915_subtests(tests, i915);

} diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c index 92a859b34190..7f66f6d299b2 100644 --- a/drivers/gpu/drm/i915/selftests/i915_request.c +++ b/drivers/gpu/drm/i915/selftests/i915_request.c @@ -843,7 +843,7 @@ static struct i915_vma *empty_batch(struct drm_i915_private *i915)

intel_gt_chipset_flush(to_gt(i915));

• vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);

• vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL); if (IS_ERR(vma)) { err = PTR_ERR(vma); goto err;

diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c index 1f10fe36619b..6ac15d3bc5bc 100644 --- a/drivers/gpu/drm/i915/selftests/i915_vma.c +++ b/drivers/gpu/drm/i915/selftests/i915_vma.c @@ -967,7 +967,7 @@ static int igt_vma_remapped_gtt(void *arg) intel_wakeref_t wakeref; int err = 0;

• if (!i915_ggtt_has_aperture(&i915->ggtt))

• if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt)) return 0;

  obj = i915_gem_object_create_internal(i915, 10 * 10 * PAGE_SIZE);

diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c index 8aa7b1d33865..2f12f8748262 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c @@ -69,7 +69,7 @@ static void mock_device_release(struct drm_device *dev) i915_gem_drain_workqueue(i915); i915_gem_drain_freed_objects(i915);

• mock_fini_ggtt(&i915->ggtt);

• mock_fini_ggtt(to_gt(i915)->ggtt); destroy_workqueue(i915->wq);

  intel_region_ttm_device_fini(i915);

@@ -195,7 +195,7 @@ struct drm_i915_private *mock_gem_device(void) mock_init_contexts(i915);

mock_init_ggtt(i915, &i915->ggtt);

• to_gt(i915)->vm = i915_vm_get(&i915->ggtt.vm);

• to_gt(i915)->vm = i915_vm_get(&to_gt(i915)->ggtt->vm);

  mkwrite_device_info(i915)->platform_engine_mask = BIT(0); to_gt(i915)->info.engine_mask = BIT(0);

diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c index f0b87de0aca3..41fae5c9ea34 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gtt.c +++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c @@ -130,7 +130,7 @@ void mock_init_ggtt(struct drm_i915_private *i915, struct i915_ggtt *ggtt) ggtt->vm.vma_ops.clear_pages = clear_pages;

i915_address_space_init(&ggtt->vm, VM_CLASS_GGTT);

• to_gt(i915)->ggtt = ggtt;

• intel_gt_init_hw_early(to_gt(i915), ggtt);

}

void mock_fini_ggtt(struct i915_ggtt *ggtt)

2.34.1