dri-devel June 2013

dri-devel@lists.freedesktop.org

132 participants
727 discussions

[PATCH 01/11] drm: Added SDP and VSC structures for handling PSR for eDP
by Rodrigo Vivi 26 Jun '13

26 Jun '13

From: Shobhit Kumar <shobhit.kumar(a)intel.com> SDP header and SDP VSC header as per eDP 1.3 spec, section 3.5, chapter "PSR Secondary Data Package Support". v2: Modified and corrected the structures to be more in line for kernel coding guidelines and rebased the code on Paulo's DP patchset v3: removing unecessary identation at DP_RECEIVER_CAP_SIZE v4: moving them to include/drm/drm_dp_helper.h and also already icluding EDP_PSR_RECEIVER_CAP_SIZE to add everything needed for PSR at once at drm_dp_helper.h v5: Fix SDP VSC header and identation by (Paulo Zanoni) and remove i915 from title (Daniel Vetter) v6: Fix spec version and move comments from code to commit message since numbers might change in the future (by Paulo Zanoni). CC: Paulo Zanoni <paulo.r.zanoni(a)intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni(a)intel.com> Signed-off-by: Sateesh Kavuri <sateesh.kavuri(a)intel.com> Signed-off-by: Shobhit Kumar <shobhit.kumar(a)intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi(a)gmail.com> --- include/drm/drm_dp_helper.h | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index e8e1417..ae8dbfb 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -342,13 +342,42 @@ u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], int lane); -#define DP_RECEIVER_CAP_SIZE 0xf +#define DP_RECEIVER_CAP_SIZE 0xf +#define EDP_PSR_RECEIVER_CAP_SIZE 2 + void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]); void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]); u8 drm_dp_link_rate_to_bw_code(int link_rate); int drm_dp_bw_code_to_link_rate(u8 link_bw); +struct edp_sdp_header { + u8 HB0; /* Secondary Data Packet ID */ + u8 HB1; /* Secondary Data Packet Type */ + u8 HB2; /* 7:5 reserved, 4:0 revision number */ + u8 HB3; /* 7:5 reserved, 4:0 number of valid data bytes */ +} __packed; + +#define EDP_SDP_HEADER_REVISION_MASK 0x1F +#define EDP_SDP_HEADER_VALID_PAYLOAD_BYTES 0x1F + +struct edp_vsc_psr { + struct edp_sdp_header sdp_header; + u8 DB0; /* Stereo Interface */ + u8 DB1; /* 0 - PSR State; 1 - Update RFB; 2 - CRC Valid */ + u8 DB2; /* CRC value bits 7:0 of the R or Cr component */ + u8 DB3; /* CRC value bits 15:8 of the R or Cr component */ + u8 DB4; /* CRC value bits 7:0 of the G or Y component */ + u8 DB5; /* CRC value bits 15:8 of the G or Y component */ + u8 DB6; /* CRC value bits 7:0 of the B or Cb component */ + u8 DB7; /* CRC value bits 15:8 of the B or Cb component */ + u8 DB8_31[24]; /* Reserved */ +} __packed; + +#define EDP_VSC_PSR_STATE_ACTIVE (1<<0) +#define EDP_VSC_PSR_UPDATE_RFB (1<<1) +#define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2) + static inline int drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { -- 1.8.1.4

1 0

drm-next build fail with gcc 4.6.3
by Andy Furniss 26 Jun '13

26 Jun '13

CC drivers/video/console/vgacon.o drivers/video/console/vgacon.c: In function ‘vgacon_do_font_op’: drivers/video/console/vgacon.c:1129:5: error: implicit declaration of function ‘cond_resched’ [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors make[3]: *** [drivers/video/console/vgacon.o] Error 1

1 0

'Timed out waiting for forcewake old ack to clear' and hangup on IvyBridge system
by Guenter Roeck 26 Jun '13

26 Jun '13

Hi all, after upgrading one of my servers to 3.8, then 3.9.7 and 3.10-rc6, I started to see lots of "Timed out waiting for forcewake old ack to clear" error messages, including hang-ups especially if the system was highly loaded. With 3.5.24 everything was fine. After backing out commit 36ec8f877 (drm/i915: unconditionally use mt forcewake on hsw/ivb), everything is back to normal. The log message is still there, but only once during boot, and the system runs stable. CPU is "Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", mainboard is Supermicro C7H61, BIOS version 2.00 dated 11/02/2012. Configuration file is whatever comes with Ubuntu; I'll be happy to provide a copy if anyone thinks it might help. Any idea what else I can do besides using a special kernel with the backed out commit ? Is it possible that others have the same problem ? Thanks, Guenter

2 4

[PATCH] drm: drm_stub: Fixing return value if driver master_set call failed
by Benjamin GAIGNARD 26 Jun '13

26 Jun '13

From: Benjamin Gaignard <benjamin.gaignard(a)linaro.org> When dev->driver->master_set() failed ioctl call return 0 but the caller is not the DRM-Master because file_priv->is_master = 0. Fix that by returning to ioctl caller the driver master_set error code. Signed-off-by: Benjamin Gaignard <benjamin.gaignard(a)linaro.org> --- drivers/gpu/drm/drm_stub.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c index 16f3ec5..a2f8c92 100644 --- a/drivers/gpu/drm/drm_stub.c +++ b/drivers/gpu/drm/drm_stub.c @@ -203,7 +203,7 @@ EXPORT_SYMBOL(drm_master_put); int drm_setmaster_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv) { - int ret; + int ret = 0; if (file_priv->is_master) return 0; @@ -229,7 +229,7 @@ int drm_setmaster_ioctl(struct drm_device *dev, void *data, } mutex_unlock(&dev->struct_mutex); - return 0; + return ret; } int drm_dropmaster_ioctl(struct drm_device *dev, void *data, -- 1.7.9.5

1 0

[PATCH V2 0/7] drm/tilcdc: bug fixes, mode selection improvements
by Darren Etheridge 26 Jun '13

26 Jun '13

The series of patches that follow are intended to address issues that have been found in the tilcdc drm driver. The patchset enables support for screen resolutions with horizontal resolutions greater than 1024 pixels. The patchset also addresses a limitation where certain monitor timings would overflow LCD controller timing registers causing either no monitor signal or a very corrupted display. This patchset will stop monitor modes from being reported as valid if the lcd controller cannot support them. V2: Fix typos in commit messages Add a patch that enables runtime modesetting to work correctly Fix an issue where the slave encoder can initialize before the i2c subsystem, resulting in no displays being configured. Applies cleanly on drm-next. Darren Etheridge (6): drm/tilcdc: support pixel widths greater than 1024 drm/tilcdc: adding some more devicetree config drm/tilcdc: fixing off by one errors found on analyzer drm/tilcdc: adding more guards to prevent selection of invalid modes drm/tilcdc: whitespace fixes and tidyup drm/tilcdc fixing i2c/slave initialization race Pantelis Antoniou (1): drm/tilcdc: Clear bits of register we're going to set. .../devicetree/bindings/drm/tilcdc/tilcdc.txt | 8 ++ drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 117 +++++++++++++++++-- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 25 ++++- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 24 ++++- drivers/gpu/drm/tilcdc/tilcdc_regs.h | 1 + drivers/gpu/drm/tilcdc/tilcdc_slave.c | 53 +++++---- 6 files changed, 189 insertions(+), 39 deletions(-)

3 10

[PATCH] Bootup regression of v3.10-rc6 + SWIOTLB + Intel 4000.
by Konrad Rzeszutek Wilk 26 Jun '13

26 Jun '13

Hey Dave, Chris, Imre, Attached is a fix that makes v3.10-rc6 boot on Intel HD 4000 when SWIOTLB bounce buffer is in usage. The SWIOTLB can only handle up to 512KB swath of memory to create bounce buffers for and Imre's patch made it possible to provide more than to the DMA API which caused it to fail with dma_map_sg. Since this is rc7 time I did the less risky way of fixing it - by just doing what said code did before 90797e6d1ec0dfde6ba62a48b9ee3803887d6ed4 ("drm/i915: create compact dma scatter lists for gem objects") was introduced by using a check to see if SWIOTLB is enabled. It is not the best fix but I figured the less risky. drivers/gpu/drm/i915/i915_gem.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) I think that a better approach (in v3.11?) would be to do some form of retry mechanism: (not compile tested, not run at all): diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index b9d00dc..0f9079d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1110,8 +1110,12 @@ struct drm_i915_gem_object_ops { * will therefore most likely be called when the object itself is * being released or under memory pressure (where we attempt to * reap pages for the shrinker). + * + * max is the maximum size an sg entry can be. Usually it is + * PAGE_SIZE but if the backend (IOMMU) can deal with larger + * then a larger value might be used as well. */ - int (*get_pages)(struct drm_i915_gem_object *); + int (*get_pages)(struct drm_i915_gem_object *, unsigned long max); void (*put_pages)(struct drm_i915_gem_object *); }; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 7045f45..a29e7db 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1738,7 +1738,7 @@ i915_gem_shrink_all(struct drm_i915_private *dev_priv) } static int -i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj) +i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj, unsigned long max) { struct drm_i915_private *dev_priv = obj->base.dev->dev_private; int page_count, i; @@ -1809,7 +1809,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj) continue; } #endif - if (!i || page_to_pfn(page) != last_pfn + 1) { + if ((!i || (page_to_pfn(page) != last_pfn + 1)) && (sg->length < max)) { if (i) sg = sg_next(sg); st->nents++; @@ -1847,7 +1847,7 @@ err_pages: * or as the object is itself released. */ int -i915_gem_object_get_pages(struct drm_i915_gem_object *obj) +i915_gem_object_get_pages(struct drm_i915_gem_object *obj, unsigned int max) { struct drm_i915_private *dev_priv = obj->base.dev->dev_private; const struct drm_i915_gem_object_ops *ops = obj->ops; @@ -1863,7 +1863,7 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj) BUG_ON(obj->pages_pin_count); - ret = ops->get_pages(obj); + ret = ops->get_pages(obj, max); if (ret) return ret; @@ -2942,7 +2942,12 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj, u32 size, fence_size, fence_alignment, unfenced_alignment; bool mappable, fenceable; int ret; + static unsigned int max_size = 4 * 1024 * 1024; /* 4MB */ +#ifdef CONFIG_SWIOTLB + if (swiotlb_nr_tbl()) + max_size = PAGE_SIZE; +#endif fence_size = i915_gem_get_gtt_size(dev, obj->base.size, obj->tiling_mode); @@ -2972,8 +2977,8 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj, DRM_ERROR("Attempting to bind an object larger than the aperture\n"); return -E2BIG; } - - ret = i915_gem_object_get_pages(obj); + retry: + ret = i915_gem_object_get_pages(obj, max_size); if (ret) return ret; @@ -3015,6 +3020,10 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj, if (ret) { i915_gem_object_unpin_pages(obj); drm_mm_put_block(node); + if (max_size > PAGE_SIZE) { + max_size >> 1; + goto retry; + } return ret; } diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c index dc53a52..8101387 100644 --- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c +++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c @@ -230,7 +230,8 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev, return dma_buf_export(obj, &i915_dmabuf_ops, obj->base.size, flags); } -static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj) +static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj, + unsigned long max) { struct sg_table *sg; diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c index 130d1db..9077ea9 100644 --- a/drivers/gpu/drm/i915/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c @@ -231,7 +231,8 @@ i915_pages_create_for_stolen(struct drm_device *dev, return st; } -static int i915_gem_object_get_pages_stolen(struct drm_i915_gem_object *obj) +static int i915_gem_object_get_pages_stolen(struct drm_i915_gem_object *obj, + unsigned long max) { BUG(); return -EINVAL;

3 10

linux-next: manual merge of the drm-intel tree with Linus' tree
by Stephen Rothwell 26 Jun '13

26 Jun '13

Hi all, Today's linux-next merge of the drm-intel tree got a conflict in drivers/gpu/drm/i915/intel_display.c between commits 2d05eae1c92f ("drm/i915: Propagate errors back from fb set-base") and d62cf62ad07d ("drm/i915: Quirk the pipe A quirk in the modeset state checker") from Linus' tree and commits 6c49f24180c3 ("drm/i915: hw state readout support for pixel_multiplier") and 9222be993921 ("drm/i915: don't scream into dmesg when a modeset fails") from the drm-intel tree. I fixed it up (I think - see below) and can carry the fix as necessary (no action is required). -- Cheers, Stephen Rothwell sfr(a)canb.auug.org.au diff --cc drivers/gpu/drm/i915/intel_display.c index 6eb99e1,8f746d9..0000000 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@@ -8177,11 -8264,14 +8264,19 @@@ check_crtc_state(struct drm_device *dev active = dev_priv->display.get_pipe_config(crtc, &pipe_config); + + /* hw state is inconsistent with the pipe A quirk */ + if (crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) + active = crtc->active; + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, + base.head) { + if (encoder->base.crtc != &crtc->base) + continue; + if (encoder->get_config) + encoder->get_config(encoder, &pipe_config); + } + WARN(crtc->active != active, "crtc active state doesn't match with hw state " "(expected %i, found %i)\n", crtc->active, active);

1 0

[PATCH 0/3] fix error routine of exporting dma_buf
by Seung-Woo Kim 26 Jun '13

26 Jun '13

During exporting dma_buf, it can fail after dma_buf is exported. In this case, exported dma_buf should be release with putting. Also dma_buf_fd can be failed to get fd, but failure cases are not handled. Error handling routine is not quite clean, so I send this patch set as RFC. Seung-Woo Kim (1): drm/prime: reorder drm_prime_add_buf_handle and remove prototype YoungJun Cho (2): drm/prime: fix to put an exported dma_buf for adding handle failure drm/prime: add return check for dma_buf_fd drivers/gpu/drm/drm_prime.c | 79 +++++++++++++++++++++++++++--------------- 1 files changed, 51 insertions(+), 28 deletions(-) -- 1.7.4.1

1 3

[Bug 57381] Radeon HD6950: Resuming from hibernation fails sometimes
by bugzilla-daemon＠bugzilla.kernel.org 25 Jun '13

25 Jun '13

https://bugzilla.kernel.org/show_bug.cgi?id=57381 Nigel Cunningham <nigel(a)tuxonice.net> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |nigel(a)tuxonice.net --- Comment #20 from Nigel Cunningham <nigel(a)tuxonice.net> 2013-06-25 20:54:06 --- If you install the userui binary in the initramfs, you'll be able to single step through the process and modify the TuxOnIce debugging settings as you go - perhaps this will help. Press 'P' to pause between steps, 0-9 to modify the level of debugging info that's displayed (9 = max info, including all kernel messages). -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are watching the assignee of the bug.

1 0

[Bug 57381] Radeon HD6950: Resuming from hibernation fails sometimes
by bugzilla-daemon＠bugzilla.kernel.org 25 Jun '13

25 Jun '13

https://bugzilla.kernel.org/show_bug.cgi?id=57381 --- Comment #19 from Harald Judt <h.judt(a)gmx.at> 2013-06-25 19:10:07 --- > echo disabled > "/sys/devices/pci0000:00/0000:00:01.0/0000:01:00.0/power/async" > echo disabled > "/sys/devices/pci0000:00/0000:00:01.0/0000:01:00.1/power/async" > > This seems to have a similar effect as "echo 0 > /sys/power/pm_async". I believe I was wrong with this assumption. However, I got serial console debugging working now. Unfortunately, it does not reveal much, but here is the output anyway. Linux version 3.8.13+ (user@localhost) (gcc version 4.7.3 (Gentoo 4.7.3 p1.0, pie-0.5.5) ) #142 SMP PREEMPT Tue Jun 25 18:56:39 CEST 2013^M^J Command line: root=/dev/sda6 rootfstype=ext4 video=DVI-I-1:1920x1080 radeon.pcie_gen2=1 radeon.audio=1 pci=nocrs console=ttyS0,115200n8 console=tty0 no_console_suspend=1^M^J e820: BIOS-provided physical RAM map:^M^J BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff] usable^M^J BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff] reserved^M^J BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved^M^J BIOS-e820: [mem 0x0000000000100000-0x00000000dd49dfff] usable^M^J BIOS-e820: [mem 0x00000000dd49e000-0x00000000de048fff] reserved^M^J BIOS-e820: [mem 0x00000000de049000-0x00000000de0d5fff] usable^M^J BIOS-e820: [mem 0x00000000de0d6000-0x00000000de177fff] ACPI NVS^M^J BIOS-e820: [mem 0x00000000de178000-0x00000000de976fff] reserved^M^J BIOS-e820: [mem 0x00000000de977000-0x00000000de977fff] usable^M^J BIOS-e820: [mem 0x00000000de978000-0x00000000de9bafff] ACPI NVS^M^J BIOS-e820: [mem 0x00000000de9bb000-0x00000000df3f5fff] usable^M^J BIOS-e820: [mem 0x00000000df3f6000-0x00000000df7f1fff] reserved^M^J BIOS-e820: [mem 0x00000000df7f2000-0x00000000df7fffff] usable^M^J BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved^M^J BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved^M^J BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved^M^J BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved^M^J BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved^M^J BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved^M^J BIOS-e820: [mem 0x0000000100000000-0x000000041effffff] usable^M^J NX (Execute Disable) protection: active^M^J SMBIOS 2.7 present.^M^J No AGP bridge found^M^J e820: last_pfn = 0x41f000 max_arch_pfn = 0x400000000^M^J x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106^M^J e820: last_pfn = 0xdf800 max_arch_pfn = 0x400000000^M^J found SMP MP-table at [mem 0x000fd8e0-0x000fd8ef] mapped at [ffff8800000fd8e0]^M^J init_memory_mapping: [mem 0x00000000-0xdf7fffff]^M^J init_memory_mapping: [mem 0x100000000-0x41effffff]^M^J ACPI: RSDP 00000000000f0490 00024 (v02 ALASKA)^M^J ACPI: XSDT 00000000de169078 0006C (v01 ALASKA A M I 01072009 AMI 00010013)^M^J ACPI: FACP 00000000de172f58 0010C (v05 ALASKA A M I 01072009 AMI 00010013)^M^J ACPI: DSDT 00000000de169178 09DDD (v02 ALASKA A M I 00000022 INTL 20051117)^M^J ACPI: FACS 00000000de176080 00040^M^J ACPI: APIC 00000000de173068 00092 (v03 ALASKA A M I 01072009 AMI 00010013)^M^J ACPI: FPDT 00000000de173100 00044 (v01 ALASKA A M I 01072009 AMI 00010013)^M^J ACPI: MCFG 00000000de173148 0003C (v01 ALASKA A M I 01072009 MSFT 00000097)^M^J ACPI: AAFT 00000000de173188 00112 (v01 ALASKA OEMAAFT 01072009 MSFT 00000097)^M^J ACPI: HPET 00000000de1732a0 00038 (v01 ALASKA A M I 01072009 AMI. 00000005)^M^J ACPI: SSDT 00000000de1732d8 0036D (v01 SataRe SataTabl 00001000 INTL 20091112)^M^J ACPI: SSDT 00000000de173648 00A92 (v01 PmRef CpuPm 00003000 INTL 20051117)^M^J ACPI: BGRT 00000000de1740e0 00038 (v00 ALASKA A M I 01072009 AMI 00010013)^M^J No NUMA configuration found^M^J Faking a node at [mem 0x0000000000000000-0x000000041effffff]^M^J Initmem setup node 0 [mem 0x00000000-0x41effffff]^M^J NODE_DATA [mem 0x41effc000-0x41effffff]^M^J Zone ranges:^M^J DMA [mem 0x00010000-0x00ffffff]^M^J DMA32 [mem 0x01000000-0xffffffff]^M^J Normal [mem 0x100000000-0x41effffff]^M^J Movable zone start for each node^M^J Early memory node ranges^M^J node 0: [mem 0x00010000-0x0009cfff]^M^J node 0: [mem 0x00100000-0xdd49dfff]^M^J node 0: [mem 0xde049000-0xde0d5fff]^M^J node 0: [mem 0xde977000-0xde977fff]^M^J node 0: [mem 0xde9bb000-0xdf3f5fff]^M^J node 0: [mem 0xdf7f2000-0xdf7fffff]^M^J node 0: [mem 0x100000000-0x41effffff]^M^J ACPI: PM-Timer IO Port: 0x408^M^J ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)^M^J ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)^M^J ACPI: LAPIC (acpi_id[0x03] lapic_id[0x04] enabled)^M^J ACPI: LAPIC (acpi_id[0x04] lapic_id[0x06] enabled)^M^J ACPI: LAPIC (acpi_id[0x05] lapic_id[0x01] enabled)^M^J ACPI: LAPIC (acpi_id[0x06] lapic_id[0x03] enabled)^M^J ACPI: LAPIC (acpi_id[0x07] lapic_id[0x05] enabled)^M^J ACPI: LAPIC (acpi_id[0x08] lapic_id[0x07] enabled)^M^J ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1])^M^J ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])^M^J IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23^M^J ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)^M^J ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)^M^J Using ACPI (MADT) for SMP configuration information^M^J ACPI: HPET id: 0x8086a701 base: 0xfed00000^M^J smpboot: Allowing 8 CPUs, 0 hotplug CPUs^M^J PM: Registered nosave memory: 000000000009d000 - 000000000009e000^M^J PM: Registered nosave memory: 000000000009e000 - 00000000000a0000^M^J PM: Registered nosave memory: 00000000000a0000 - 00000000000e0000^M^J PM: Registered nosave memory: 00000000000e0000 - 0000000000100000^M^J PM: Registered nosave memory: 00000000dd49e000 - 00000000de049000^M^J PM: Registered nosave memory: 00000000de0d6000 - 00000000de178000^M^J PM: Registered nosave memory: 00000000de178000 - 00000000de977000^M^J PM: Registered nosave memory: 00000000de978000 - 00000000de9bb000^M^J PM: Registered nosave memory: 00000000df3f6000 - 00000000df7f2000^M^J PM: Registered nosave memory: 00000000df800000 - 00000000f8000000^M^J PM: Registered nosave memory: 00000000f8000000 - 00000000fc000000^M^J PM: Registered nosave memory: 00000000fc000000 - 00000000fec00000^M^J PM: Registered nosave memory: 00000000fec00000 - 00000000fec01000^M^J PM: Registered nosave memory: 00000000fec01000 - 00000000fed00000^M^J PM: Registered nosave memory: 00000000fed00000 - 00000000fed04000^M^J PM: Registered nosave memory: 00000000fed04000 - 00000000fed1c000^M^J PM: Registered nosave memory: 00000000fed1c000 - 00000000fed20000^M^J PM: Registered nosave memory: 00000000fed20000 - 00000000fee00000^M^J PM: Registered nosave memory: 00000000fee00000 - 00000000fee01000^M^J PM: Registered nosave memory: 00000000fee01000 - 00000000ff000000^M^J PM: Registered nosave memory: 00000000ff000000 - 0000000100000000^M^J e820: [mem 0xdf800000-0xf7ffffff] available for PCI devices^M^J setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:8 nr_node_ids:1^M^J PERCPU: Embedded 25 pages/cpu @ffff88041ec00000 s70592 r8192 d23616 u262144^M^J Built 1 zonelists in Zone order, mobility grouping on. Total pages: 4116414^M^J Policy zone: Normal^M^J Kernel command line: root=/dev/sda6 rootfstype=ext4 video=DVI-I-1:1920x1080 radeon.pcie_gen2=1 radeon.audio=1 pci=nocrs console=ttyS0,115200n8 console=tty0 no_console_suspend=1^M^J PID hash table entries: 4096 (order: 3, 32768 bytes)^M^J __ex_table already sorted, skipping sort^M^J xsave: enabled xstate_bv 0x7, cntxt size 0x340^M^J Checking aperture...^M^J No AGP bridge found^M^J Memory: 16388024k/17285120k available (4498k kernel code, 558072k absent, 339024k reserved, 4128k data, 496k init)^M^J SLUB: Genslabs=15, HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1^M^J Preemptible hierarchical RCU implementation.^M^J ^ICONFIG_RCU_FANOUT set to non-default value of 32^M^J NR_IRQS:4352 nr_irqs:744 16^M^J Extended CMOS year: 2000^M^J Console: colour VGA+ 80x25^M^J console [tty0] enabled^M^J console [ttyS0] enabled^M^J tsc: Fast TSC calibration using PIT^M^J tsc: Detected 3400.073 MHz processor^M^J Calibrating delay loop (skipped), value calculated using timer frequency.. 6800.14 BogoMIPS (lpj=3400073)^M^J pid_max: default: 32768 minimum: 301^M^J Dentry cache hash table entries: 2097152 (order: 12, 16777216 bytes)^M^J Inode-cache hash table entries: 1048576 (order: 11, 8388608 bytes)^M^J Mount-cache hash table entries: 256^M^J CPU: Physical Processor ID: 0^M^J CPU: Processor Core ID: 0^M^J ENERGY_PERF_BIAS: Set to 'normal', was 'performance'^M^J ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)^M^J mce: CPU supports 9 MCE banks^M^J CPU0: Thermal monitoring enabled (TM1)^M^J process: using mwait in idle threads^M^J Last level iTLB entries: 4KB 512, 2MB 0, 4MB 0^M^J Last level dTLB entries: 4KB 512, 2MB 32, 4MB 32^M^J tlb_flushall_shift: 5^M^J Freeing SMP alternatives: 20k freed^M^J ACPI: Core revision 20121018^M^J ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1^M^J smpboot: CPU0: Intel(R) Core(TM) i7-2600K CPU @ 3.40GHz (fam: 06, model: 2a, stepping: 07)^M^J Performance Events: PEBS fmt1+, 16-deep LBR, SandyBridge events, Intel PMU driver.^M^J ... version: 3^M^J ... bit width: 48^M^J ... generic registers: 4^M^J ... value mask: 0000ffffffffffff^M^J ... max period: 000000007fffffff^M^J ... fixed-purpose events: 3^M^J ... event mask: 000000070000000f^M^J smpboot: Booting Node 0, Processors #1 #2 #3 #4 #5 #6 #7 OK^M^J Brought up 8 CPUs^M^J smpboot: Total of 8 processors activated (54401.16 BogoMIPS)^M^J devtmpfs: initialized^M^J PM: Registering ACPI NVS region [mem 0xde0d6000-0xde177fff] (663552 bytes)^M^J PM: Registering ACPI NVS region [mem 0xde978000-0xde9bafff] (274432 bytes)^M^J NET: Registered protocol family 16^M^J ACPI FADT declares the system doesn't support PCIe ASPM, so disable it^M^J ACPI: bus type pci registered^M^J PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)^M^J PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820^M^J PCI: Using configuration type 1 for base access^M^J bio: create slab <bio-0> at 0^M^J ACPI: Added _OSI(Module Device)^M^J ACPI: Added _OSI(Processor Device)^M^J ACPI: Added _OSI(3.0 _SCP Extensions)^M^J ACPI: Added _OSI(Processor Aggregator Device)^M^J ACPI: Executed 1 blocks of module-level executable AML code^M^J ACPI Error: [\_PR_.CPU0._PPC] Namespace lookup failure, AE_NOT_FOUND (20121018/psargs-359)^M^J ACPI Error: Method parse/execution failed [\_PR_.CPU0._PDC] (Node ffff88040c4a1280), AE_NOT_FOUND (20121018/psparse-537)^M^J ACPI: SSDT 00000000ddff8c18 00119 (v01 PmRef ApCst 00003000 INTL 20051117)^M^J ACPI: Dynamic OEM Table Load:^M^J ACPI: SSDT (null) 00119 (v01 PmRef ApCst 00003000 INTL 20051117)^M^J ACPI: Interpreter enabled^M^J ACPI: (supports S0 S3 S4 S5)^M^J ACPI: Using IOAPIC for interrupt routing^M^J ACPI: No dock devices found.^M^J PCI: Ignoring host bridge windows from ACPI; if necessary, use "pci=use_crs" and report a bug^M^J ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e])^M^J PCI host bridge to bus 0000:00^M^J pci_bus 0000:00: root bus resource [bus 00-3e]^M^J pci_bus 0000:00: root bus resource [io 0x0000-0xffff]^M^J pci_bus 0000:00: root bus resource [mem 0x00000000-0xfffffffff]^M^J pci 0000:00:01.0: PCI bridge to [bus 01]^M^J pci 0000:00:1c.0: PCI bridge to [bus 02]^M^J pci 0000:00:1c.3: PCI bridge to [bus 03]^M^J pci 0000:00:1c.4: PCI bridge to [bus 04]^M^J pci 0000:00:1c.5: PCI bridge to [bus 05-06]^M^J pci 0000:05:00.0: PCI bridge to [bus 06] (subtractive decode)^M^J pci 0000:00:1c.7: PCI bridge to [bus 07]^M^J pci0000:00: Requesting ACPI _OSC control (0x1d)^M^J pci0000:00: ACPI _OSC control (0x18) granted^M^J ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 *11 12 14 15)^M^J ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 *10 11 12 14 15)^M^J ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 10 *11 12 14 15)^M^J ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 *5 6 10 11 12 14 15)^M^J ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.^M^J ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.^M^J ACPI: PCI Interrupt Link [LNKG] (IRQs *3 4 5 6 10 11 12 14 15)^M^J ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 *10 11 12 14 15)^M^J vgaarb: device added: PCI:0000:01:00.0,decodes=io+mem,owns=io+mem,locks=none^M^J vgaarb: loaded^M^J vgaarb: bridge control possible 0000:01:00.0^M^J SCSI subsystem initialized^M^J ACPI: bus type scsi registered^M^J pps_core: LinuxPPS API ver. 1 registered^M^J pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti(a)linux.it>^M^J PTP clock support registered^M^J PCI: Using ACPI for IRQ routing^M^J hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0^M^J hpet0: 8 comparators, 64-bit 14.318180 MHz counter^M^J Switching to clocksource hpet^M^J pnp: PnP ACPI init^M^J ACPI: bus type pnp registered^M^J system 00:00: [mem 0xfed40000-0xfed44fff] has been reserved^M^J system 00:04: [io 0x0680-0x069f] has been reserved^M^J system 00:04: [io 0x1000-0x100f] has been reserved^M^J system 00:04: [io 0xffff] has been reserved^M^J system 00:04: [io 0xffff] has been reserved^M^J system 00:04: [io 0x0400-0x0453] has been reserved^M^J system 00:04: [io 0x0458-0x047f] has been reserved^M^J system 00:04: [io 0x0500-0x057f] has been reserved^M^J system 00:04: [io 0x164e-0x164f] has been reserved^M^J system 00:06: [io 0x0454-0x0457] has been reserved^M^J system 00:07: [io 0x0290-0x029f] has been reserved^M^J system 00:08: [io 0x04d0-0x04d1] has been reserved^M^J system 00:0c: [mem 0xfed1c000-0xfed1ffff] has been reserved^M^J system 00:0c: [mem 0xfed10000-0xfed17fff] has been reserved^M^J system 00:0c: [mem 0xfed18000-0xfed18fff] has been reserved^M^J system 00:0c: [mem 0xfed19000-0xfed19fff] has been reserved^M^J system 00:0c: [mem 0xf8000000-0xfbffffff] has been reserved^M^J system 00:0c: [mem 0xfed20000-0xfed3ffff] has been reserved^M^J system 00:0c: [mem 0xfed90000-0xfed93fff] has been reserved^M^J system 00:0c: [mem 0xfed45000-0xfed8ffff] has been reserved^M^J system 00:0c: [mem 0xff000000-0xffffffff] has been reserved^M^J system 00:0c: [mem 0xfee00000-0xfeefffff] could not be reserved^M^J system 00:0c: [mem 0xf0200000-0xf0200fff] has been reserved^M^J pnp: PnP ACPI: found 13 devices^M^J ACPI: ACPI bus type pnp unregistered^M^J pci 0000:00:01.0: PCI bridge to [bus 01]^M^J pci 0000:00:01.0: bridge window [io 0xe000-0xefff]^M^J pci 0000:00:01.0: bridge window [mem 0xf7e00000-0xf7efffff]^M^J pci 0000:00:01.0: bridge window [mem 0xe0000000-0xefffffff 64bit pref]^M^J pci 0000:00:1c.0: PCI bridge to [bus 02]^M^J pci 0000:00:1c.3: PCI bridge to [bus 03]^M^J pci 0000:00:1c.3: bridge window [io 0xd000-0xdfff]^M^J pci 0000:00:1c.3: bridge window [mem 0xf7d00000-0xf7dfffff]^M^J pci 0000:00:1c.4: PCI bridge to [bus 04]^M^J pci 0000:00:1c.4: bridge window [mem 0xf7c00000-0xf7cfffff]^M^J pci 0000:00:1c.4: bridge window [mem 0xf0100000-0xf01fffff 64bit pref]^M^J pci 0000:05:00.0: PCI bridge to [bus 06]^M^J pci 0000:05:00.0: bridge window [io 0xc000-0xcfff]^M^J pci 0000:05:00.0: bridge window [mem 0xf7b00000-0xf7bfffff]^M^J pci 0000:05:00.0: bridge window [mem 0xf0000000-0xf00fffff 64bit pref]^M^J pci 0000:00:1c.5: PCI bridge to [bus 05-06]^M^J pci 0000:00:1c.5: bridge window [io 0xc000-0xcfff]^M^J pci 0000:00:1c.5: bridge window [mem 0xf7b00000-0xf7bfffff]^M^J pci 0000:00:1c.5: bridge window [mem 0xf0000000-0xf00fffff 64bit pref]^M^J pci 0000:00:1c.7: PCI bridge to [bus 07]^M^J pci 0000:00:1c.7: bridge window [mem 0xf7a00000-0xf7afffff]^M^J NET: Registered protocol family 2^M^J TCP established hash table entries: 131072 (order: 9, 2097152 bytes)^M^J TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)^M^J TCP: Hash tables configured (established 131072 bind 65536)^M^J TCP: reno registered^M^J UDP hash table entries: 8192 (order: 6, 262144 bytes)^M^J UDP-Lite hash table entries: 8192 (order: 6, 262144 bytes)^M^J NET: Registered protocol family 1^M^J PCI-DMA: Using software bounce buffering for IO (SWIOTLB)^M^J software IO TLB [mem 0xd949e000-0xdd49e000] (64MB) mapped at [ffff8800d949e000-ffff8800dd49dfff]^M^J audit: initializing netlink socket (disabled)^M^J type=2000 audit(1372193434.673:1): initialized^M^J HugeTLB registered 2 MB page size, pre-allocated 0 pages^M^J NTFS driver 2.1.30 [Flags: R/O].^M^J fuse init (API version 7.20)^M^J Btrfs loaded^M^J msgmni has been set to 32007^M^J Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)^M^J io scheduler noop registered^M^J io scheduler deadline registered^M^J io scheduler cfq registered^M^J io scheduler bfq registered (default)^M^J Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled^M^J 00:0b: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A^M^J [drm] Initialized drm 1.1.0 20060810^M^J [drm] radeon defaulting to kernel modesetting.^M^J [drm] radeon kernel modesetting enabled.^M^J [drm] initializing kernel modesetting (CAYMAN 0x1002:0x6719 0x1002:0x0B00).^M^J [drm] register mmio base: 0xF7E20000^M^J [drm] register mmio size: 131072^M^J ATOM BIOS: CAYMAN^M^J radeon 0000:01:00.0: VRAM: 2048M 0x0000000000000000 - 0x000000007FFFFFFF (2048M used)^M^J radeon 0000:01:00.0: GTT: 512M 0x0000000080000000 - 0x000000009FFFFFFF^M^J mtrr: type mismatch for e0000000,10000000 old: write-back new: write-combining^M^J [drm] Detected VRAM RAM=2048M, BAR=256M^M^J [drm] RAM width 256bits DDR^M^J [TTM] Zone kernel: Available graphics memory: 8194022 kiB^M^J [TTM] Zone dma32: Available graphics memory: 2097152 kiB^M^J [TTM] Initializing pool allocator^M^J [TTM] Initializing DMA pool allocator^M^J [drm] radeon: 2048M of VRAM memory ready^M^J [drm] radeon: 512M of GTT memory ready.^M^J [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).^M^J [drm] Driver supports precise vblank timestamp query.^M^J radeon 0000:01:00.0: radeon: using MSI.^M^J [drm] radeon: irq initialized.^M^J [drm] GART: num cpu pages 131072, num gpu pages 131072^M^J [drm] probing gen 2 caps for device 8086:101 = 2/0^M^J [drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0^M^J [drm] Loading CAYMAN Microcode^M^J [drm] PCIE GART of 512M enabled (table at 0x0000000000040000).^M^J radeon 0000:01:00.0: WB enabled^M^J radeon 0000:01:00.0: fence driver on ring 0 use gpu addr 0x0000000080000c00 and cpu addr 0xffff88040bd6cc00^M^J radeon 0000:01:00.0: fence driver on ring 1 use gpu addr 0x0000000080000c04 and cpu addr 0xffff88040bd6cc04^M^J radeon 0000:01:00.0: fence driver on ring 2 use gpu addr 0x0000000080000c08 and cpu addr 0xffff88040bd6cc08^M^J radeon 0000:01:00.0: fence driver on ring 3 use gpu addr 0x0000000080000c0c and cpu addr 0xffff88040bd6cc0c^M^J radeon 0000:01:00.0: fence driver on ring 4 use gpu addr 0x0000000080000c10 and cpu addr 0xffff88040bd6cc10^M^J [drm] ring test on 0 succeeded in 3 usecs^M^J [drm] ring test on 3 succeeded in 2 usecs^M^J [drm] ring test on 4 succeeded in 1 usecs^M^J [drm] Enabling audio support^M^J [drm] ib test on ring 0 succeeded in 0 usecs^M^J [drm] ib test on ring 3 succeeded in 0 usecs^M^J [drm] ib test on ring 4 succeeded in 1 usecs^M^J [drm] Radeon Display Connectors^M^J [drm] Connector 0:^M^J [drm] DP-1^M^J [drm] HPD5^M^J [drm] DDC: 0x6430 0x6430 0x6434 0x6434 0x6438 0x6438 0x643c 0x643c^M^J [drm] Encoders:^M^J [drm] DFP1: INTERNAL_UNIPHY2^M^J [drm] Connector 1:^M^J [drm] DP-2^M^J [drm] HPD4^M^J [drm] DDC: 0x6440 0x6440 0x6444 0x6444 0x6448 0x6448 0x644c 0x644c^M^J [drm] Encoders:^M^J [drm] DFP2: INTERNAL_UNIPHY2^M^J [drm] Connector 2:^M^J [drm] HDMI-A-1^M^J [drm] HPD6^M^J [drm] DDC: 0x6460 0x6460 0x6464 0x6464 0x6468 0x6468 0x646c 0x646c^M^J [drm] Encoders:^M^J [drm] DFP3: INTERNAL_UNIPHY1^M^J [drm] Connector 3:^M^J [drm] DVI-D-1^M^J [drm] HPD1^M^J [drm] DDC: 0x6450 0x6450 0x6454 0x6454 0x6458 0x6458 0x645c 0x645c^M^J [drm] Encoders:^M^J [drm] DFP4: INTERNAL_UNIPHY1^M^J [drm] Connector 4:^M^J [drm] DVI-I-1^M^J [drm] HPD3^M^J [drm] DDC: 0x6470 0x6470 0x6474 0x6474 0x6478 0x6478 0x647c 0x647c^M^J [drm] Encoders:^M^J [drm] DFP5: INTERNAL_UNIPHY^M^J [drm] CRT1: INTERNAL_KLDSCP_DAC1^M^J [drm] Internal thermal controller with fan control^M^J [drm] radeon: power management initialized^M^J [drm] fb mappable at 0xE114A000^M^J [drm] vram apper at 0xE0000000^M^J [drm] size 8294400^M^J [drm] fb depth is 24^M^J [drm] pitch is 7680^M^J fbcon: radeondrmfb (fb0) is primary device^M^J Console: switching to colour frame buffer device 240x67^M^J radeon 0000:01:00.0: fb0: radeondrmfb frame buffer device^M^J radeon 0000:01:00.0: registered panic notifier^M^J [drm] Initialized radeon 2.29.0 20080528 for 0000:01:00.0 on minor 0^M^J ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3f impl SATA mode^M^J ahci 0000:00:1f.2: flags: 64bit ncq pm led clo pio slum part ems apst ^M^J scsi0 : ahci^M^J scsi1 : ahci^M^J scsi2 : ahci^M^J scsi3 : ahci^M^J scsi4 : ahci^M^J scsi5 : ahci^M^J ata1: SATA max UDMA/133 abar m2048@0xf7f16000 port 0xf7f16100 irq 42^M^J ata2: SATA max UDMA/133 abar m2048@0xf7f16000 port 0xf7f16180 irq 42^M^J ata3: SATA max UDMA/133 abar m2048@0xf7f16000 port 0xf7f16200 irq 42^M^J ata4: SATA max UDMA/133 abar m2048@0xf7f16000 port 0xf7f16280 irq 42^M^J ata5: SATA max UDMA/133 abar m2048@0xf7f16000 port 0xf7f16300 irq 42^M^J ata6: SATA max UDMA/133 abar m2048@0xf7f16000 port 0xf7f16380 irq 42^M^J ahci: SSS flag set, parallel bus scan disabled^M^J ahci 0000:03:00.0: AHCI 0001.0200 32 slots 2 ports 6 Gbps 0x3 impl SATA mode^M^J ahci 0000:03:00.0: flags: 64bit ncq sntf stag led clo pmp pio slum part ccc sxs ^M^J scsi6 : ahci^M^J scsi7 : ahci^M^J ata7: SATA max UDMA/133 abar m512@0xf7d00000 port 0xf7d00100 irq 43^M^J ata8: SATA max UDMA/133 abar m512@0xf7d00000 port 0xf7d00180 irq 43^M^J tg3.c:v3.128 (December 03, 2012)^M^J tg3 0000:04:00.0 eth0: Tigon3 [partno(BCM57781) rev 57785100] (PCI Express) MAC address bc:5f:f4:43:92:27^M^J tg3 0000:04:00.0 eth0: attached PHY is 57765 (10/100/1000Base-T Ethernet) (WireSpeed[1], EEE[1])^M^J tg3 0000:04:00.0 eth0: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[0] TSOcap[1]^M^J tg3 0000:04:00.0 eth0: dma_rwctrl[00000001] dma_mask[64-bit]^M^J i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1^M^J i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp^M^J serio: i8042 KBD port at 0x60,0x64 irq 1^M^J mousedev: PS/2 mouse device common for all mice^M^J rtc_cmos 00:05: RTC can wake from S4^M^J rtc_cmos 00:05: rtc core: registered rtc_cmos as rtc0^M^J rtc0: alarms up to one month, y3k, 242 bytes nvram, hpet irqs^M^J cpuidle: using governor ladder^M^J cpuidle: using governor menu^M^J TCP: cubic registered^M^J NET: Registered protocol family 17^M^J TuxOnIce 3.3 (http://tuxonice.net)^M^J input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0^M^J tsc: Refined TSC clocksource calibration: 3400.023 MHz^M^J Switching to clocksource tsc^M^J ata3: SATA link up 3.0 Gbps (SStatus 123 SControl 300)^M^J ata5: SATA link down (SStatus 0 SControl 300)^M^J ata2: SATA link down (SStatus 0 SControl 300)^M^J ata4: SATA link up 3.0 Gbps (SStatus 123 SControl 300)^M^J ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)^M^J ata6: SATA link up 1.5 Gbps (SStatus 113 SControl 300)^M^J ata1.00: ACPI cmd f5/00:00:00:00:00:00 (SECURITY FREEZE LOCK) filtered out^M^J ata7: SATA link down (SStatus 0 SControl 300)^M^J ata1.00: ACPI cmd b1/c1:00:00:00:00:00 (DEVICE CONFIGURATION OVERLAY) filtered out^M^J ata3.00: ACPI cmd f5/00:00:00:00:00:00 (SECURITY FREEZE LOCK) filtered out^M^J ata3.00: ACPI cmd b1/c1:00:00:00:00:00 (DEVICE CONFIGURATION OVERLAY) filtered out^M^J ata4.00: ACPI cmd f5/00:00:00:00:00:00 (SECURITY FREEZE LOCK) filtered out^M^J ata4.00: ACPI cmd b1/c1:00:00:00:00:00 (DEVICE CONFIGURATION OVERLAY) filtered out^M^J ata6.00: ACPI cmd f5/00:00:00:00:00:00 (SECURITY FREEZE LOCK) filtered out^M^J ata6.00: ACPI cmd b1/c1:00:00:00:00:00 (DEVICE CONFIGURATION OVERLAY) filtered out^M^J ata1.00: ATA-9: M4-CT256M4SSD2, 040H, max UDMA/100^M^J ata1.00: 500118192 sectors, multi 16: LBA48 NCQ (depth 31/32), AA^M^J ata6.00: ATAPI: Optiarc DVD RW AD-7260S, 1.03, max UDMA/100^M^J ata4.00: HPA detected: current 976771055, native 976773168^M^J ata3.00: HPA detected: current 1953523055, native 1953525168^M^J ata4.00: ATA-8: SAMSUNG HD501LJ, CR100-10, max UDMA7^M^J ata4.00: 976771055 sectors, multi 16: LBA48 NCQ (depth 31/32), AA^M^J ata1.00: ACPI cmd f5/00:00:00:00:00:00 (SECURITY FREEZE LOCK) filtered out^M^J ata1.00: ACPI cmd b1/c1:00:00:00:00:00 (DEVICE CONFIGURATION OVERLAY) filtered out^M^J ata3.00: ATA-8: WDC WD10EADS-00M2B0, 01.00A01, max UDMA/133^M^J ata3.00: 1953523055 sectors, multi 16: LBA48 NCQ (depth 31/32), AA^M^J ata6.00: ACPI cmd f5/00:00:00:00:00:00 (SECURITY FREEZE LOCK) filtered out^M^J ata6.00: ACPI cmd b1/c1:00:00:00:00:00 (DEVICE CONFIGURATION OVERLAY) filtered out^M^J ata4.00: ACPI cmd f5/00:00:00:00:00:00 (SECURITY FREEZE LOCK) filtered out^M^J ata4.00: ACPI cmd b1/c1:00:00:00:00:00 (DEVICE CONFIGURATION OVERLAY) filtered out^M^J ata1.00: configured for UDMA/100^M^J ata3.00: ACPI cmd f5/00:00:00:00:00:00 (SECURITY FREEZE LOCK) filtered out^M^J scsi 0:0:0:0: Direct-Access ATA M4-CT256M4SSD2 040H PQ: 0 ANSI: 5^M^J sd 0:0:0:0: [sda] 500118192 512-byte logical blocks: (256 GB/238 GiB)^M^J sd 0:0:0:0: [sda] Write Protect is off^M^J sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA^M^J ata3.00: ACPI cmd b1/c1:00:00:00:00:00 (DEVICE CONFIGURATION OVERLAY) filtered out^M^J ata6.00: configured for UDMA/100^M^J ata4.00: configured for UDMA/133^M^J ata3.00: configured for UDMA/133^M^J scsi 2:0:0:0: Direct-Access ATA WDC WD10EADS-00M 01.0 PQ: 0 ANSI: 5^M^J sd 2:0:0:0: [sdb] 1953523055 512-byte logical blocks: (1.00 TB/931 GiB)^M^J scsi 3:0:0:0: Direct-Access ATA SAMSUNG HD501LJ CR10 PQ: 0 ANSI: 5^M^J sda: sda1 sda2 < sda5 sda6 sda7 sda8 sda9 sda10 sda11 >^M^J sd 3:0:0:0: [sdc] 976771055 512-byte logical blocks: (500 GB/465 GiB)^M^J sd 3:0:0:0: [sdc] Write Protect is off^M^J sd 3:0:0:0: [sdc] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA^M^J sd 0:0:0:0: [sda] Attached SCSI disk^M^J scsi 5:0:0:0: CD-ROM Optiarc DVD RW AD-7260S 1.03 PQ: 0 ANSI: 5^M^J sdc: sdc1 sdc3 < sdc5 sdc6 >^M^J sd 3:0:0:0: [sdc] Attached SCSI disk^M^J sd 2:0:0:0: [sdb] Write Protect is off^M^J sd 2:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA^M^J ata8: SATA link down (SStatus 0 SControl 300)^M^J sdb: sdb2 < sdb5 sdb6 sdb7 sdb8 sdb9 sdb10 sdb11 >^M^J sd 2:0:0:0: [sdb] Attached SCSI dis^M^J TuxOnIce: Image found.^M^J Using dev_t 8:9, returned by blk_lookup_fs_info.^M^J Failed to launch userspace program '/sbin/tuxoniceui': Error -2^M Launch userspace program failed.zing user space processes ... (elapsed 0.00 seconds) done.^M^J Reading kernel & process data...^M^J ...20%...40%...60%...80%^M^J Atomic restore.^M^J Doing atomic copy/restore.^M^J And that's all, the computer hangs here. Any way to get more output? -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are watching the assignee of the bug.

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dri-devel June 2013