dri-devel March 2014

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[PATCH 1/1] drm/gma500: Code cleanup and adding inline documentation
by Arthur Borsboom 12 Mar '14

12 Mar '14

drm/gma500: Cleanup of code by following i915 constant/variable names and ordering drm/gma500: Cleanup of code by following directions from kernel documentation: Codingstyle drm/gma500: Cleanup of code by following directions from kernel documentation: DRM drm/gma500: Improve readability by adding inline documentation drm/gma500: Removed centralized exiting of function (goto statement), since it was the only used in one single location with only a return statement. CC: Patrik Jakobsson <patrik.r.jakobsson(a)gmail.com> Signed-off-by: Arthur Borsboom <arthurborsboom(a)gmail.com> --- drivers/gpu/drm/gma500/psb_drv.c | 162 +++++++++++++++++++++------------------ drivers/gpu/drm/gma500/psb_drv.h | 58 ++++++-------- 2 files changed, 111 insertions(+), 109 deletions(-) diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c index 1199180..0432136 100644 --- a/drivers/gpu/drm/gma500/psb_drv.c +++ b/drivers/gpu/drm/gma500/psb_drv.c @@ -37,28 +37,42 @@ #include <acpi/video.h> #include <linux/module.h> +static struct drm_driver driver; + static int drm_psb_trap_pagefaults; -static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent); +static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent); MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults"); module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600); - +/* + * The table below contains a mapping of the PCI vendor ID and the PCI Device ID + * to the different groups of PowerVR 5-series chip designs + * + * 0x8086 = Intel Coorperation + * + * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx + * PowerVR SGX535 - Moorestown - Intel GMA 600 + * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx + * PowerVR SGX540 - Medfield - Intel Atom Z2460 + * PowerVR SGX544MP2 - Medfield - + * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600 + * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700, N2800 + */ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = { - { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, - { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops }, + {0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops}, + {0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops}, #if defined(CONFIG_DRM_GMA600) - { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, - { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, - { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, - { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, - { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, - { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, - { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, - { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, - /* Atom E620 */ - { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, + {0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops}, #endif #if defined(CONFIG_DRM_MEDFIELD) {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops}, @@ -71,31 +85,30 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = { {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops}, #endif #if defined(CONFIG_DRM_GMA3600) - { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, - { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, + {0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops}, #endif - { 0, } + {0,} }; MODULE_DEVICE_TABLE(pci, pciidlist); /* * Standard IOCTLs. */ - #define DRM_IOCTL_GMA_ADB \ DRM_IOWR(DRM_GMA_ADB + DRM_COMMAND_BASE, uint32_t) #define DRM_IOCTL_GMA_MODE_OPERATION \ @@ -147,7 +160,7 @@ static const struct drm_ioctl_desc psb_ioctls[] = { DRM_UNLOCKED | DRM_AUTH), }; -static void psb_lastclose(struct drm_device *dev) +static void psb_driver_lastclose(struct drm_device *dev) { int ret; struct drm_psb_private *dev_priv = dev->dev_private; @@ -169,19 +182,14 @@ static int psb_do_init(struct drm_device *dev) uint32_t stolen_gtt; - int ret = -ENOMEM; - if (pg->mmu_gatt_start & 0x0FFFFFFF) { dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n"); - ret = -EINVAL; - goto out_err; + return -EINVAL; } - stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4; stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT; - stolen_gtt = - (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages; + stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages; dev_priv->gatt_free_offset = pg->mmu_gatt_start + (stolen_gtt << PAGE_SHIFT) * 1024; @@ -192,23 +200,19 @@ static int psb_do_init(struct drm_device *dev) PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0); PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1); PSB_RSGX32(PSB_CR_BIF_BANK1); - PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK, - PSB_CR_BIF_CTRL); + PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK, PSB_CR_BIF_CTRL); psb_spank(dev_priv); /* mmu_gatt ?? */ PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); return 0; -out_err: - return ret; } static int psb_driver_unload(struct drm_device *dev) { struct drm_psb_private *dev_priv = dev->dev_private; - /* Kill vblank etc here */ - + /* TODO: Kill vblank etc here */ if (dev_priv) { if (dev_priv->backlight_device) @@ -268,7 +272,6 @@ static int psb_driver_unload(struct drm_device *dev) return 0; } - static int psb_driver_load(struct drm_device *dev, unsigned long chipset) { struct drm_psb_private *dev_priv; @@ -416,11 +419,11 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset) return ret; psb_intel_opregion_enable_asle(dev); #if 0 - /*enable runtime pm at last*/ + /* Enable runtime pm at last */ pm_runtime_enable(&dev->pdev->dev); pm_runtime_set_active(&dev->pdev->dev); #endif - /*Intel drm driver load is done, continue doing pvr load*/ + /* Intel drm driver load is done, continue doing pvr load */ return 0; out_err: psb_driver_unload(dev); @@ -561,7 +564,7 @@ static int psb_mode_operation_ioctl(struct drm_device *dev, void *data, arg->data = resp; } - /*do some clean up work*/ + /* Do some clean up work */ if (mode) drm_mode_destroy(dev, mode); mode_op_out: @@ -593,7 +596,7 @@ static int psb_driver_open(struct drm_device *dev, struct drm_file *priv) return 0; } -static void psb_driver_close(struct drm_device *dev, struct drm_file *priv) +static void psb_driver_postclose(struct drm_device *dev, struct drm_file *priv) { } @@ -614,15 +617,21 @@ static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd, /* FIXME: do we need to wrap the other side of this */ } - -/* When a client dies: +/* + * When a client dies: * - Check for and clean up flipped page state */ static void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv) { } -static void psb_remove(struct pci_dev *pdev) +static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) +{ + return drm_get_pci_dev(pdev, ent, &driver); +} + + +static void psb_pci_remove(struct pci_dev *pdev) { struct drm_device *dev = pci_get_drvdata(pdev); drm_put_dev(dev); @@ -655,13 +664,23 @@ static const struct file_operations psb_gem_fops = { .read = drm_read, }; +/* + * DRM driver structure initialization + * + * The drm_driver structure contains static information that describes + * the driver and features it supports, and pointers to methods that DRM + * core will call to implement DRM API. + */ static struct drm_driver driver = { .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \ - DRIVER_MODESET | DRIVER_GEM , + DRIVER_MODESET | DRIVER_GEM, .load = psb_driver_load, .unload = psb_driver_unload, + .open = psb_driver_open, + .lastclose = psb_driver_lastclose, + .preclose = psb_driver_preclose, + .postclose = psb_driver_postclose, - .ioctls = psb_ioctls, .num_ioctls = DRM_ARRAY_SIZE(psb_ioctls), .device_is_agp = psb_driver_device_is_agp, .irq_preinstall = psb_irq_preinstall, @@ -671,40 +690,31 @@ static struct drm_driver driver = { .enable_vblank = psb_enable_vblank, .disable_vblank = psb_disable_vblank, .get_vblank_counter = psb_get_vblank_counter, - .lastclose = psb_lastclose, - .open = psb_driver_open, - .preclose = psb_driver_preclose, - .postclose = psb_driver_close, .gem_free_object = psb_gem_free_object, .gem_vm_ops = &psb_gem_vm_ops, + .dumb_create = psb_gem_dumb_create, .dumb_map_offset = psb_gem_dumb_map_gtt, .dumb_destroy = drm_gem_dumb_destroy, + .ioctls = psb_ioctls, .fops = &psb_gem_fops, .name = DRIVER_NAME, .desc = DRIVER_DESC, - .date = PSB_DRM_DRIVER_DATE, - .major = PSB_DRM_DRIVER_MAJOR, - .minor = PSB_DRM_DRIVER_MINOR, - .patchlevel = PSB_DRM_DRIVER_PATCHLEVEL + .date = DRIVER_DATE, + .major = DRIVER_MAJOR, + .minor = DRIVER_MINOR, + .patchlevel = DRIVER_PATCHLEVEL }; static struct pci_driver psb_pci_driver = { .name = DRIVER_NAME, .id_table = pciidlist, - .probe = psb_probe, - .remove = psb_remove, - .driver = { - .pm = &psb_pm_ops, - } + .probe = psb_pci_probe, + .remove = psb_pci_remove, + .driver.pm = &psb_pm_ops, }; -static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) -{ - return drm_get_pci_dev(pdev, ent, &driver); -} - static int __init psb_init(void) { return drm_pci_init(&driver, &psb_pci_driver); @@ -718,6 +728,6 @@ static void __exit psb_exit(void) late_initcall(psb_init); module_exit(psb_exit); -MODULE_AUTHOR("Alan Cox <alan(a)linux.intel.com> and others"); +MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESC); -MODULE_LICENSE("GPL"); +MODULE_LICENSE(DRIVER_LICENSE); diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h index 5ad6a03..3535640 100644 --- a/drivers/gpu/drm/gma500/psb_drv.h +++ b/drivers/gpu/drm/gma500/psb_drv.h @@ -34,6 +34,25 @@ #include "opregion.h" #include "oaktrail.h" +/* + * Driver definitions + */ +#define DRIVER_AUTHOR "Alan Cox <alan(a)linux.intel.com> and others" +#define DRIVER_LICENSE "GPL" + +#define DRIVER_NAME "gma500" +#define DRIVER_DESC "DRM driver for the Intel GMA500, GMA600, GMA3600, GMA3650" +#define DRIVER_DATE "20140311" + +/* + * Driver history + * + * 1.0: Original. Frambuffer only, no 2D/3D acceleration, no video acceleration, no power management. + */ +#define DRIVER_MAJOR 1 +#define DRIVER_MINOR 0 +#define DRIVER_PATCHLEVEL 1 + /* Append new drm mode definition here, align with libdrm definition */ #define DRM_MODE_SCALE_NO_SCALE 2 @@ -50,18 +69,6 @@ enum { #define IS_CDV(dev) (((dev)->pdev->device & 0xfff0) == 0x0be0) /* - * Driver definitions - */ - -#define DRIVER_NAME "gma500" -#define DRIVER_DESC "DRM driver for the Intel GMA500" - -#define PSB_DRM_DRIVER_DATE "2011-06-06" -#define PSB_DRM_DRIVER_MAJOR 1 -#define PSB_DRM_DRIVER_MINOR 0 -#define PSB_DRM_DRIVER_PATCHLEVEL 0 - -/* * Hardware offsets */ #define PSB_VDC_OFFSET 0x00000000 @@ -71,6 +78,7 @@ enum { #define PSB_SGX_SIZE 0x8000 #define PSB_SGX_OFFSET 0x00040000 #define MRST_SGX_OFFSET 0x00080000 + /* * PCI resource identifiers */ @@ -78,6 +86,7 @@ enum { #define PSB_AUX_RESOURCE 0 #define PSB_GATT_RESOURCE 2 #define PSB_GTT_RESOURCE 3 + /* * PCI configuration */ @@ -88,26 +97,24 @@ enum { #define _PSB_PGETBL_ENABLED 0x00000001 #define PSB_SGX_2D_SLAVE_PORT 0x4000 -/* To get rid of */ +/* TODO: To get rid of */ #define PSB_TT_PRIV0_LIMIT (256*1024*1024) #define PSB_TT_PRIV0_PLIMIT (PSB_TT_PRIV0_LIMIT >> PAGE_SHIFT) /* - * SGX side MMU definitions (these can probably go) - */ - -/* * Flags for external memory type field. */ #define PSB_MMU_CACHED_MEMORY 0x0001 /* Bind to MMU only */ #define PSB_MMU_RO_MEMORY 0x0002 /* MMU RO memory */ #define PSB_MMU_WO_MEMORY 0x0004 /* MMU WO memory */ + /* * PTE's and PDE's */ #define PSB_PDE_MASK 0x003FFFFF #define PSB_PDE_SHIFT 22 #define PSB_PTE_SHIFT 12 + /* * Cache control */ @@ -286,7 +293,6 @@ struct intel_gmbus { /* * Register offset maps */ - struct psb_offset { u32 fp0; u32 fp1; @@ -485,7 +491,6 @@ struct drm_psb_private { /* * Register base */ - uint8_t __iomem *sgx_reg; uint8_t __iomem *vdc_reg; uint8_t __iomem *aux_reg; /* Auxillary vdc pipe regs */ @@ -494,7 +499,6 @@ struct drm_psb_private { /* * Fencing / irq. */ - uint32_t vdc_irq_mask; uint32_t pipestat[PSB_NUM_PIPE]; @@ -503,7 +507,6 @@ struct drm_psb_private { /* * Power */ - bool suspended; bool display_power; int display_count; @@ -526,7 +529,6 @@ struct drm_psb_private { /* * Sizes info */ - u32 fuse_reg_value; u32 video_device_fuse; @@ -585,7 +587,6 @@ struct drm_psb_private { /* * Register state */ - struct psb_save_area regs; /* MSI reg save */ @@ -595,7 +596,6 @@ struct drm_psb_private { /* * Hotplug handling */ - struct work_struct hotplug_work; /* @@ -609,7 +609,6 @@ struct drm_psb_private { /* * Watchdog */ - uint32_t apm_reg; uint16_t apm_base; @@ -667,7 +666,6 @@ struct drm_psb_private { /* * Operations for each board type */ - struct psb_ops { const char *name; unsigned int accel_2d:1; @@ -726,7 +724,6 @@ static inline struct drm_psb_private *psb_priv(struct drm_device *dev) /* * MMU stuff. */ - extern struct psb_mmu_driver *psb_mmu_driver_init(uint8_t __iomem * registers, int trap_pagefaults, int invalid_type, @@ -754,8 +751,6 @@ extern int psb_mmu_virtual_to_pfn(struct psb_mmu_pd *pd, uint32_t virtual, /* * Enable / disable MMU for different requestors. */ - - extern void psb_mmu_set_pd_context(struct psb_mmu_pd *pd, int hw_context); extern int psb_mmu_insert_pages(struct psb_mmu_pd *pd, struct page **pages, unsigned long address, uint32_t num_pages, @@ -766,9 +761,8 @@ extern void psb_mmu_remove_pages(struct psb_mmu_pd *pd, uint32_t desired_tile_stride, uint32_t hw_tile_stride); /* - *psb_irq.c + * psb_irq.c */ - extern irqreturn_t psb_irq_handler(int irq, void *arg); extern int psb_irq_enable_dpst(struct drm_device *dev); extern int psb_irq_disable_dpst(struct drm_device *dev); @@ -808,7 +802,6 @@ extern void psb_spank(struct drm_psb_private *dev_priv); /* * psb_reset.c */ - extern void psb_lid_timer_init(struct drm_psb_private *dev_priv); extern void psb_lid_timer_takedown(struct drm_psb_private *dev_priv); extern void psb_print_pagefault(struct drm_psb_private *dev_priv); @@ -888,7 +881,6 @@ extern int drm_idle_check_interval; /* * Utilities */ - static inline u32 MRST_MSG_READ32(uint port, uint offset) { int mcr = (0xD0<<24) | (port << 16) | (offset << 8); -- 1.9.0

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[Bug 44301] New: [i915g] regression 37b62cc35435a704d33c1814fbdbd0e807699e21 results in solid color fills in 3Dmark01 and flatout in wine
by bugzilla-daemon＠freedesktop.org 11 Mar '14

11 Mar '14

https://bugs.freedesktop.org/show_bug.cgi?id=44301 Bug #: 44301 Summary: [i915g] regression 37b62cc35435a704d33c1814fbdbd0e807699e21 results in solid color fills in 3Dmark01 and flatout in wine Classification: Unclassified Product: Mesa Version: git Platform: x86 (IA32) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/i915g AssignedTo: dri-devel(a)lists.freedesktop.org ReportedBy: cme3000(a)gmail.com Commit 37b62cc35435a704d33c1814fbdbd0e807699e21 breaks 3DMark01 and flatout in wine - I915_LIE=1 (default) results in a black rectangle when 3dmark shows the logo while starting, it's rendered correctly with I915_LIE=0 - I915_LIE=1 results in a solid color fill when using 32bpp and a 32bit zbuffer in game test 1 (i haven't tried the other tests), choosing 16bpp or a 16 or 24bit zbuffer works fine. no rendering errors with I915_LIE=0 - flatout results in a solid color fill, no matter if with I915_LIE or without all those solid color fills look like if it picks the rgb values of one pixel at some corner. mesa ded02bd54b5925ee222d7f426850312236b4f59d wine-1.3.34-202-gb0f704d 00:02.0 VGA compatible controller: Intel Corporation Mobile 945GME Express Integrated Graphics Controller (rev 03) -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the assignee for the bug.

1 1

[PATCH v2] drm/fb-helper: Do the 'max_conn_count' zero check
by Xiubo Li 11 Mar '14

11 Mar '14

Since we cannot make sure the 'max_conn_count' will always be none zero from the users, and then if max_conn_count equals to zero, the kcalloc() will return ZERO_SIZE_PTR, which equals to ((void *)16). So this patch fix this with just doing the 'max_conn_count' zero check in the front of drm_fb_helper_init(). Signed-off-by: Xiubo Li <Li.Xiubo(a)freescale.com> CC: Jani Nikula <jani.nikula(a)linux.intel.com> --- drivers/gpu/drm/drm_fb_helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 3d13ca6e2..a0d286c 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -514,6 +514,9 @@ int drm_fb_helper_init(struct drm_device *dev, struct drm_crtc *crtc; int i; + if (!max_conn_count) + return -EINVAL; + fb_helper->dev = dev; INIT_LIST_HEAD(&fb_helper->kernel_fb_list); -- 1.8.4

2 1

[Bug 76037] New: [r600g] Corruption with radeon upload manager for buffer downloads commit
by bugzilla-daemon＠freedesktop.org 11 Mar '14

11 Mar '14

https://bugs.freedesktop.org/show_bug.cgi?id=76037 Priority: medium Bug ID: 76037 Assignee: dri-devel(a)lists.freedesktop.org Summary: [r600g] Corruption with radeon upload manager for buffer downloads commit Severity: normal Classification: Unclassified OS: Linux (All) Reporter: swanson(a)ukfsn.org Hardware: x86-64 (AMD64) Status: NEW Version: git Component: Drivers/Gallium/r600 Product: Mesa Created attachment 95610 --> https://bugs.freedesktop.org/attachment.cgi?id=95610&action=edit starsector-emp-normal.jpg Commit f112ba03bbd6072df9f8879bb231f7f0abb14d2e "radeon: Use upload manager for buffer downloads" is causing corruption in the game Starsector with my A10-5700. Not observed in other applications yet but not extensively tested yet. In the game, there is a visual effect of electrical arcing over the enemy ship when hit with an weapon with EMP. However starting with this commit triangles of the effects base colour are rendered over entire screen from source location. Even when game paused, triangles are still randomly flashing away. Reverting the commit resolves the issue. -- You are receiving this mail because: You are the assignee for the bug.

1 4

[RFC 00/12] Support render-node only drivers
by Thierry Reding 11 Mar '14

11 Mar '14

From: Thierry Reding <treding(a)nvidia.com> This series builds on top of David's reliable DRM minor series: [PATCH 00/13] DRM Reliable Minor-IDs Tegra K1 has a Kepler-type GPU without any display engine. Instead it reuses the Tegra display engine. That means that effectively the GPU becomes a render-node only device. In order to reflect that, it would be preferable for the associated /dev/dri/cardX node not to show up. To achieve that, the DRIVER_MODESET feature needs to be removed from the GPU driver, but that unfortunately implies activating a bunch of legacy behaviour for pre-KMS drivers. To allow for drivers that don't support modesetting IOCTLs (because they drive no output) but which aren't legacy either, the meaning of the DRIVER_MODESET needs to be redefined. This series attempts to do so by first renaming DRM_MINOR_LEGACY to DRM_MINOR_PRIMARY to more accurately reflect its purpose. Legacy and modesetting are then decoupled by introducing a DRIVER_LEGACY driver feature that can be set by truly legacy drivers. This allows the old DRIVER_MODESET feature to advertise support only for modesetting functionality, without implying that it is a non-legacy driver. After all the drivers have been updated, the core can be modified to create the primary minor only when DRIVER_MODESET is available. The remainder of the series cleans up some drm_core_check_feature() usage and drop some unused code related to that. Thierry Thierry Reding (12): drm: Rename DRM_MINOR_LEGACY to DRM_MINOR_PRIMARY drm: Introduce DRIVER_LEGACY feature drm/i915: Mark as legacy if KMS is disabled drm: Separate DRIVER_MODESET and DRIVER_LEGACY drm: Create primary minor only if mode-setting is supported drm: Remove gratuituous blank line drm: Use drm_core_check_feature() where possible drm/exynos: Remove dead code drm/gma500: Remove dead code drm/i810: Remove dead code drm/i915: Remove dead code drm/qxl: Remove dead code drivers/gpu/drm/drm_bufs.c | 12 +++++------ drivers/gpu/drm/drm_crtc.c | 1 - drivers/gpu/drm/drm_dma.c | 4 ++-- drivers/gpu/drm/drm_fops.c | 14 ++++++------ drivers/gpu/drm/drm_gem.c | 6 +++--- drivers/gpu/drm/drm_irq.c | 12 +++++------ drivers/gpu/drm/drm_pci.c | 12 +++++------ drivers/gpu/drm/drm_scatter.c | 6 +++--- drivers/gpu/drm/drm_stub.c | 24 +++++++++++---------- drivers/gpu/drm/drm_sysfs.c | 8 +++---- drivers/gpu/drm/exynos/exynos_drm_gem.c | 10 --------- drivers/gpu/drm/gma500/gem.c | 3 --- drivers/gpu/drm/i810/i810_dma.c | 7 ------ drivers/gpu/drm/i810/i810_drv.c | 3 ++- drivers/gpu/drm/i915/i915_dma.c | 38 ++++++++++++++++----------------- drivers/gpu/drm/i915/i915_drv.c | 18 ++++++++++------ drivers/gpu/drm/i915/i915_gem.c | 17 +++++++-------- drivers/gpu/drm/i915/i915_gem_context.c | 6 ------ drivers/gpu/drm/i915/i915_irq.c | 6 +++--- drivers/gpu/drm/i915/i915_suspend.c | 15 ++++++------- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- drivers/gpu/drm/mga/mga_drv.c | 3 ++- drivers/gpu/drm/qxl/qxl_kms.c | 4 ---- drivers/gpu/drm/radeon/radeon_drv.c | 3 ++- drivers/gpu/drm/savage/savage_drv.c | 2 +- drivers/gpu/drm/sis/sis_drv.c | 2 +- drivers/gpu/drm/tdfx/tdfx_drv.c | 1 + drivers/gpu/drm/via/via_drv.c | 2 +- include/drm/drmP.h | 3 ++- 29 files changed, 112 insertions(+), 132 deletions(-) -- 1.8.4.2

5 20

[patch] drm/gma500: cleanup in psb_mode_operation_ioctl()
by Dan Carpenter 11 Mar '14

11 Mar '14

It looks like the "mode" test was changed at some point and but it wasn't totally cleaned up. I've removed the unneeded indent block and the duplicative test for "if (mode)". Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c index 1199180667c9..411ed5b80d53 100644 --- a/drivers/gpu/drm/gma500/psb_drv.c +++ b/drivers/gpu/drm/gma500/psb_drv.c @@ -534,24 +534,22 @@ static int psb_mode_operation_ioctl(struct drm_device *dev, void *data, } /* drm_crtc_convert_umode(mode, umode); */ - { - mode->clock = umode->clock; - mode->hdisplay = umode->hdisplay; - mode->hsync_start = umode->hsync_start; - mode->hsync_end = umode->hsync_end; - mode->htotal = umode->htotal; - mode->hskew = umode->hskew; - mode->vdisplay = umode->vdisplay; - mode->vsync_start = umode->vsync_start; - mode->vsync_end = umode->vsync_end; - mode->vtotal = umode->vtotal; - mode->vscan = umode->vscan; - mode->vrefresh = umode->vrefresh; - mode->flags = umode->flags; - mode->type = umode->type; - strncpy(mode->name, umode->name, DRM_DISPLAY_MODE_LEN); - mode->name[DRM_DISPLAY_MODE_LEN-1] = 0; - } + mode->clock = umode->clock; + mode->hdisplay = umode->hdisplay; + mode->hsync_start = umode->hsync_start; + mode->hsync_end = umode->hsync_end; + mode->htotal = umode->htotal; + mode->hskew = umode->hskew; + mode->vdisplay = umode->vdisplay; + mode->vsync_start = umode->vsync_start; + mode->vsync_end = umode->vsync_end; + mode->vtotal = umode->vtotal; + mode->vscan = umode->vscan; + mode->vrefresh = umode->vrefresh; + mode->flags = umode->flags; + mode->type = umode->type; + strncpy(mode->name, umode->name, DRM_DISPLAY_MODE_LEN); + mode->name[DRM_DISPLAY_MODE_LEN-1] = 0; connector_funcs = (struct drm_connector_helper_funcs *) connector->helper_private; @@ -562,8 +560,7 @@ static int psb_mode_operation_ioctl(struct drm_device *dev, void *data, } /*do some clean up work*/ - if (mode) - drm_mode_destroy(dev, mode); + drm_mode_destroy(dev, mode); mode_op_out: drm_modeset_unlock_all(dev); return ret;

2 1

upstream bug, WLAN connection break under load (iwl3945)
by Timo Siltanen 11 Mar '14

11 Mar '14

[1.] WLAN connection break under load (iwl3945) [2.] Start to watch a fullscreen YouTube flash video with Opera/Netscape, then jump back and forth in the video and observe WLAN connection break. Also sound is bad while watching the video and processor load is high. WORKAROUND: set "radeon.modeset=0" to /etc/default/grub. This is why suspecting Radeon. [3.] [4.] Linux version 3.14.0-031400rc5-generic (apw@gomeisa) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #201403022235 SMP Mon Mar 3 03:56:52 UTC 2014 [5.] [6.] [7.] Description: Linux Mint 13 Maya Release: 13 [7.1.] If some fields are empty or look unusual you may have an old version. Compare to the current minimal requirements in Documentation/Changes. Linux tisiltan-ThinkPad-T60 3.14.0-031400rc5-generic #201403022235 SMP Mon Mar 3 03:56:52 UTC 2014 i686 i686 i386 GNU/Linux Gnu C 4.6 Gnu make 3.81 binutils 2.22 util-linux 2.20.1 mount support module-init-tools 3.16 e2fsprogs 1.42 pcmciautils 018 PPP 2.4.5 Linux C Library 2.15 Dynamic linker (ldd) 2.15 Procps 3.2.8 Net-tools 1.60 Kbd 1.15.2 Sh-utils 8.13 wireless-tools 30 Modules Loaded ctr ccm bnep rfcomm bluetooth 6lowpan_iphc binfmt_misc snd_hda_codec_analog snd_hda_codec_generic radeon snd_hda_intel snd_hda_codec arc4 thinkpad_acpi snd_hwdep snd_pcm iwl3945 snd_seq_midi joydev snd_rawmidi iwlegacy ttm snd_seq_midi_event drm_kms_helper snd_seq mac80211 snd_timer drm snd_seq_device psmouse pcmcia nsc_ircc i2c_algo_bit snd serio_raw video lpc_ich cfg80211 yenta_socket soundcore irda mac_hid pcmcia_rsrc pcmcia_core crc_ccitt ppdev nvram parport_pc lp parport e1000e ptp pps_core where <VERSION> is the version of the kernel you are using, found in the directory /usr/src. You may run the script by changing to the directory via a terminal, and paste the results: sh ver_linux [7.2.] processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 15 model name : Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz stepping : 6 microcode : 0xc7 cpu MHz : 1000.000 cache size : 4096 KB physical id : 0 siblings : 2 core id : 0 cpu cores : 2 apicid : 0 initial apicid : 0 fdiv_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 10 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc arch_perfmon pebs bts aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm lahf_lm dtherm tpr_shadow bogomips : 3989.61 clflush size : 64 cache_alignment : 64 address sizes : 36 bits physical, 48 bits virtual power management: processor : 1 vendor_id : GenuineIntel cpu family : 6 model : 15 model name : Intel(R) Core(TM)2 CPU T7200 @ 2.00GHz stepping : 6 microcode : 0xc7 cpu MHz : 1000.000 cache size : 4096 KB physical id : 0 siblings : 2 core id : 1 cpu cores : 2 apicid : 1 initial apicid : 1 fdiv_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 10 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc arch_perfmon pebs bts aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm lahf_lm dtherm tpr_shadow bogomips : 3989.61 clflush size : 64 cache_alignment : 64 address sizes : 36 bits physical, 48 bits virtual power management: [7.3.] ctr 13025 2 - Live 0x00000000 ccm 17596 2 - Live 0x00000000 bnep 19107 2 - Live 0x00000000 rfcomm 59012 0 - Live 0x00000000 bluetooth 375778 10 bnep,rfcomm, Live 0x00000000 6lowpan_iphc 18480 1 bluetooth, Live 0x00000000 binfmt_misc 13172 1 - Live 0x00000000 snd_hda_codec_analog 14537 1 - Live 0x00000000 snd_hda_codec_generic 63224 1 snd_hda_codec_analog, Live 0x00000000 radeon 1466388 1 - Live 0x00000000 snd_hda_intel 43398 2 - Live 0x00000000 snd_hda_codec 119362 3 snd_hda_codec_analog,snd_hda_codec_generic,snd_hda_intel, Live 0x00000000 arc4 12509 2 - Live 0x00000000 thinkpad_acpi 74024 0 - Live 0x00000000 snd_hwdep 13276 1 snd_hda_codec, Live 0x00000000 snd_pcm 96053 2 snd_hda_intel,snd_hda_codec, Live 0x00000000 iwl3945 64640 0 - Live 0x00000000 snd_seq_midi 13132 0 - Live 0x00000000 joydev 17299 0 - Live 0x00000000 snd_rawmidi 25198 1 snd_seq_midi, Live 0x00000000 iwlegacy 88257 1 iwl3945, Live 0x00000000 ttm 77673 1 radeon, Live 0x00000000 snd_seq_midi_event 14475 1 snd_seq_midi, Live 0x00000000 drm_kms_helper 47293 1 radeon, Live 0x00000000 snd_seq 55716 2 snd_seq_midi,snd_seq_midi_event, Live 0x00000000 mac80211 578698 2 iwl3945,iwlegacy, Live 0x00000000 snd_timer 28971 2 snd_pcm,snd_seq, Live 0x00000000 drm 249035 4 radeon,ttm,drm_kms_helper, Live 0x00000000 snd_seq_device 14137 3 snd_seq_midi,snd_rawmidi,snd_seq, Live 0x00000000 psmouse 97104 0 - Live 0x00000000 pcmcia 56297 0 - Live 0x00000000 nsc_ircc 22631 0 - Live 0x00000000 i2c_algo_bit 13316 1 radeon, Live 0x00000000 snd 61456 16 snd_hda_codec_analog,snd_hda_codec_generic,snd_hda_intel,snd_hda_codec,thinkpad_acpi,snd_hwdep,snd_pcm,snd_seq_midi,snd_rawmidi,snd_seq,snd_timer,snd_seq_device, Live 0x00000000 serio_raw 13230 0 - Live 0x00000000 video 19330 0 - Live 0x00000000 lpc_ich 16987 0 - Live 0x00000000 cfg80211 447796 3 iwl3945,iwlegacy,mac80211, Live 0x00000000 yenta_socket 44622 0 - Live 0x00000000 soundcore 12600 1 snd, Live 0x00000000 irda 108061 1 nsc_ircc, Live 0x00000000 mac_hid 13077 0 - Live 0x00000000 pcmcia_rsrc 18495 1 yenta_socket, Live 0x00000000 pcmcia_core 22396 3 pcmcia,yenta_socket,pcmcia_rsrc, Live 0x00000000 crc_ccitt 12627 1 irda, Live 0x00000000 ppdev 17423 0 - Live 0x00000000 nvram 14070 1 thinkpad_acpi, Live 0x00000000 parport_pc 32114 0 - Live 0x00000000 lp 13359 0 - Live 0x00000000 parport 40945 3 ppdev,parport_pc,lp, Live 0x00000000 e1000e 225784 0 - Live 0x00000000 ptp 18488 1 e1000e, Live 0x00000000 pps_core 18768 1 ptp, Live 0x00000000 [7.4.] 0000-0cf7 : PCI Bus 0000:00 0000-001f : dma1 0020-0021 : pic1 0040-0043 : timer0 0050-0053 : timer1 0060-0060 : keyboard 0062-0062 : EC data 0064-0064 : keyboard 0066-0066 : EC cmd 0070-0071 : rtc0 0080-008f : dma page reg 00a0-00a1 : pic2 00c0-00df : dma2 00f0-00ff : fpu 0170-0177 : 0000:00:1f.2 0170-0177 : ata_piix 01f0-01f7 : 0000:00:1f.2 01f0-01f7 : ata_piix 02f8-02ff : nsc-ircc 0376-0376 : 0000:00:1f.2 0376-0376 : ata_piix 03c0-03df : vesafb 03f6-03f6 : 0000:00:1f.2 03f6-03f6 : ata_piix 0800-080f : pnp 00:01 0cf8-0cff : PCI conf1 0d00-ffff : PCI Bus 0000:00 1000-1003 : ACPI PM1a_EVT_BLK 1004-1005 : ACPI PM1a_CNT_BLK 1008-100b : ACPI PM_TMR 1010-1015 : ACPI CPU throttle 1020-1020 : ACPI PM2_CNT_BLK 1028-102f : ACPI GPE0_BLK 1030-1033 : iTCO_wdt 1060-107f : iTCO_wdt 1180-11bf : 0000:00:1f.0 1180-11bf : pnp 00:01 15e0-15ef : pnp 00:01 164e-164f : pnp 00:01 1800-181f : 0000:00:1d.0 1800-181f : uhci_hcd 1820-183f : 0000:00:1d.1 1820-183f : uhci_hcd 1840-185f : 0000:00:1d.2 1840-185f : uhci_hcd 1860-187f : 0000:00:1d.3 1860-187f : uhci_hcd 18b0-18bf : 0000:00:1f.2 18b0-18bf : ata_piix 18e0-18ff : 0000:00:1f.3 2000-2fff : PCI Bus 0000:01 2000-20ff : 0000:01:00.0 3000-3fff : PCI Bus 0000:02 3000-301f : 0000:02:00.0 4000-5fff : PCI Bus 0000:03 6000-7fff : PCI Bus 0000:04 8000-9fff : PCI Bus 0000:0c a000-dfff : PCI Bus 0000:15 a000-a0ff : PCI CardBus 0000:16 a400-a4ff : PCI CardBus 0000:16 00000000-00000fff : reserved 00001000-0009efff : System RAM 0009f000-0009ffff : reserved 000a0000-000bffff : PCI Bus 0000:00 000a0000-000bffff : Video RAM area 000c0000-000cfdff : Video ROM 000d0000-000d0fff : Adapter ROM 000d1000-000d1fff : Adapter ROM 000d2000-000d3fff : reserved 000d4000-000d7fff : PCI Bus 0000:00 000d8000-000dbfff : PCI Bus 0000:00 000dc000-000fffff : reserved 000f0000-000fffff : System ROM 00100000-bfecffff : System RAM 01000000-0169c6f4 : Kernel code 0169c6f5-01a16e7f : Kernel data 01afd000-01be1fff : Kernel bss bfed0000-bfedefff : ACPI Tables bfedf000-bfefffff : ACPI Non-volatile Storage bff00000-bfffffff : reserved c0000000-febfffff : PCI Bus 0000:00 c0000000-c01fffff : PCI Bus 0000:02 c4000000-c7ffffff : PCI CardBus 0000:16 d8000000-dfffffff : PCI Bus 0000:01 d8000000-dfffffff : 0000:01:00.0 d8000000-d85affff : vesafb e0000000-e3ffffff : PCI Bus 0000:15 e0000000-e3ffffff : PCI CardBus 0000:16 e4000000-e40fffff : PCI Bus 0000:03 e4100000-e41fffff : PCI Bus 0000:04 e4200000-e42fffff : PCI Bus 0000:0c e4300000-e7ffffff : PCI Bus 0000:15 e4300000-e4300fff : 0000:15:00.0 e4300000-e4300fff : yenta_socket e8000000-e9ffffff : PCI Bus 0000:04 ea000000-ebffffff : PCI Bus 0000:0c ec000000-edffffff : PCI Bus 0000:03 edf00000-edf00fff : 0000:03:00.0 edf00000-edf00fff : iwl3945 ee000000-ee0fffff : PCI Bus 0000:02 ee000000-ee01ffff : 0000:02:00.0 ee000000-ee01ffff : e1000e ee100000-ee1fffff : PCI Bus 0000:01 ee100000-ee10ffff : 0000:01:00.0 ee120000-ee13ffff : 0000:01:00.0 ee400000-ee403fff : 0000:00:1b.0 ee400000-ee403fff : ICH HD audio ee404000-ee4043ff : 0000:00:1d.7 ee404000-ee4043ff : ehci_hcd f0000000-f3ffffff : PCI MMCONFIG 0000 [bus 00-3f] f0000000-f3ffffff : reserved f0000000-f3ffffff : pnp 00:01 fec00000-fec0ffff : reserved fec00000-fec003ff : IOAPIC 0 fed00000-fed003ff : HPET 0 fed00000-fed003ff : reserved fed14000-fed19fff : reserved fed14000-fed17fff : pnp 00:01 fed18000-fed18fff : pnp 00:01 fed19000-fed19fff : pnp 00:01 fed1c000-fed8ffff : reserved fed1c000-fed1ffff : pnp 00:01 fed1f410-fed1f414 : iTCO_wdt fed40000-fed40fff : pnp 00:01 fee00000-fee00fff : Local APIC fee00000-fee00fff : reserved ff800000-ffffffff : reserved [7.5.] 00:00.0 Host bridge: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub (rev 03) Subsystem: Lenovo ThinkPad T60 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information: Len=09 <?> 00:01.0 PCI bridge: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and 945GT Express PCI Express Root Port (rev 03) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 00002000-00002fff Memory behind bridge: ee100000-ee1fffff Prefetchable memory behind bridge: 00000000d8000000-00000000dfffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [88] Subsystem: Lenovo Device 2014 Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 4181 Capabilities: [a0] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- Slot #1, PowerLimit 75.000W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed+ WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- Capabilities: [140 v1] Root Complex Link Desc: PortNumber=02 ComponentID=01 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=01 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed19000 Kernel driver in use: pcieport Kernel modules: shpchp 00:1b.0 Audio device: Intel Corporation NM10/ICH7 Family High Definition Audio Controller (rev 02) Subsystem: Lenovo ThinkPad T60/R60 series Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin B routed to IRQ 47 Region 0: Memory at ee400000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0300c Data: 4172 Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed- WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=1 ArbSelect=Fixed TC/VC=80 Status: NegoPending- InProgress- Capabilities: [130 v1] Root Complex Link Desc: PortNumber=0f ComponentID=02 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c000 Kernel driver in use: snd_hda_intel Kernel modules: snd-hda-intel 00:1c.0 PCI bridge: Intel Corporation NM10/ICH7 Family PCI Express Port 1 (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 00003000-00003fff Memory behind bridge: ee000000-ee0fffff Prefetchable memory behind bridge: 00000000c0000000-00000000c01fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #2, PowerLimit 6.500W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 41a1 Capabilities: [90] Subsystem: Lenovo Device 2011 Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed+ WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 Status: NegoPending- InProgress- Capabilities: [180 v1] Root Complex Link Desc: PortNumber=01 ComponentID=02 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c001 Kernel driver in use: pcieport Kernel modules: shpchp 00:1c.1 PCI bridge: Intel Corporation NM10/ICH7 Family PCI Express Port 2 (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 00004000-00005fff Memory behind bridge: ec000000-edffffff Prefetchable memory behind bridge: 00000000e4000000-00000000e40fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #2, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #3, PowerLimit 6.500W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet- LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 41c1 Capabilities: [90] Subsystem: Lenovo Device 2011 Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed+ WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01 Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 Status: NegoPending- InProgress- Capabilities: [180 v1] Root Complex Link Desc: PortNumber=02 ComponentID=02 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c001 Kernel driver in use: pcieport Kernel modules: shpchp 00:1c.2 PCI bridge: Intel Corporation NM10/ICH7 Family PCI Express Port 3 (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=04, subordinate=0b, sec-latency=0 I/O behind bridge: 00006000-00007fff Memory behind bridge: e8000000-e9ffffff Prefetchable memory behind bridge: 00000000e4100000-00000000e41fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #3, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #4, PowerLimit 6.500W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 41e1 Capabilities: [90] Subsystem: Lenovo Device 2011 Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed+ WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 Status: NegoPending- InProgress- Capabilities: [180 v1] Root Complex Link Desc: PortNumber=03 ComponentID=02 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c001 Kernel driver in use: pcieport Kernel modules: shpchp 00:1c.3 PCI bridge: Intel Corporation NM10/ICH7 Family PCI Express Port 4 (rev 02) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=0c, subordinate=13, sec-latency=0 I/O behind bridge: 00008000-00009fff Memory behind bridge: ea000000-ebffffff Prefetchable memory behind bridge: 00000000e4200000-00000000e42fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk- ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot #5, PowerLimit 6.500W; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock- Changed: MRL- PresDet- LinkState- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit- Address: fee0300c Data: 4142 Capabilities: [90] Subsystem: Lenovo Device 2011 Capabilities: [a0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [100 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntryBits=1 Arb: Fixed+ WRR32- WRR64- WRR128- Ctrl: ArbSelect=Fixed Status: InProgress- VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Ctrl: Enable- ID=0 ArbSelect=Fixed TC/VC=00 Status: NegoPending- InProgress- Capabilities: [180 v1] Root Complex Link Desc: PortNumber=04 ComponentID=02 EltType=Config Link0: Desc: TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+ Addr: 00000000fed1c001 Kernel driver in use: pcieport Kernel modules: shpchp 00:1d.0 USB controller: Intel Corporation NM10/ICH7 Family USB UHCI Controller #1 (rev 02) (prog-if 00 [UHCI]) Subsystem: Lenovo ThinkPad T60/R60 series Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 4: I/O ports at 1800 [size=32] Kernel driver in use: uhci_hcd 00:1d.1 USB controller: Intel Corporation NM10/ICH7 Family USB UHCI Controller #2 (rev 02) (prog-if 00 [UHCI]) Subsystem: Lenovo ThinkPad T60/R60 series Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 17 Region 4: I/O ports at 1820 [size=32] Kernel driver in use: uhci_hcd 00:1d.2 USB controller: Intel Corporation NM10/ICH7 Family USB UHCI Controller #3 (rev 02) (prog-if 00 [UHCI]) Subsystem: Lenovo ThinkPad T60/R60 series Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at 1840 [size=32] Kernel driver in use: uhci_hcd 00:1d.3 USB controller: Intel Corporation NM10/ICH7 Family USB UHCI Controller #4 (rev 02) (prog-if 00 [UHCI]) Subsystem: Lenovo ThinkPad T60/R60 series Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 19 Region 4: I/O ports at 1860 [size=32] Kernel driver in use: uhci_hcd 00:1d.7 USB controller: Intel Corporation NM10/ICH7 Family USB2 EHCI Controller (rev 02) (prog-if 20 [EHCI]) Subsystem: Lenovo ThinkPad T60/R60 series Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 19 Region 0: Memory at ee404000 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Debug port: BAR=1 offset=00a0 Kernel driver in use: ehci-pci 00:1e.0 PCI bridge: Intel Corporation 82801 Mobile PCI Bridge (rev e2) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=15, subordinate=18, sec-latency=32 I/O behind bridge: 0000a000-0000dfff Memory behind bridge: e4300000-e7ffffff Prefetchable memory behind bridge: 00000000e0000000-00000000e3ffffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [50] Subsystem: Lenovo Device 2013 00:1f.0 ISA bridge: Intel Corporation 82801GBM (ICH7-M) LPC Interface Bridge (rev 02) Subsystem: Lenovo ThinkPad T60/R60 series Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [e0] Vendor Specific Information: Len=0c <?> Kernel driver in use: lpc_ich Kernel modules: leds-ss4200, lpc_ich, intel-rng 00:1f.2 IDE interface: Intel Corporation 82801GBM/GHM (ICH7-M Family) SATA Controller [IDE mode] (rev 02) (prog-if 80 [Master]) Subsystem: Lenovo Thinkpad T60 model 2007 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 16 Region 0: I/O ports at 01f0 [size=8] Region 1: I/O ports at 03f4 [size=1] Region 2: I/O ports at 0170 [size=8] Region 3: I/O ports at 0374 [size=1] Region 4: I/O ports at 18b0 [size=16] Capabilities: [70] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ata_piix 00:1f.3 SMBus: Intel Corporation NM10/ICH7 Family SMBus Controller (rev 02) Subsystem: Lenovo ThinkPad T60/R60 series Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 11 Region 4: I/O ports at 18e0 [size=32] Kernel modules: i2c-i801 01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] RV515/M54 [Mobility Radeon X1400] (prog-if 00 [VGA controller]) Subsystem: Lenovo Thinkpad T60 model 2007 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at d8000000 (32-bit, prefetchable) [size=128M] Region 1: I/O ports at 2000 [size=256] Region 2: Memory at ee100000 (32-bit, non-prefetchable) [size=64K] [virtual] Expansion ROM at ee120000 [disabled] [size=128K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v1) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag+ AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Kernel modules: radeon 02:00.0 Ethernet controller: Intel Corporation 82573L Gigabit Ethernet Controller Subsystem: Lenovo ThinkPad T60 Physical Slot: 2 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 45 Region 0: Memory at ee000000 (32-bit, non-prefetchable) [size=128K] Region 2: I/O ports at 3000 [size=32] Capabilities: [c8] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0100c Data: 4192 Capabilities: [e0] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us ClockPM+ Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn- Capabilities: [140 v1] Device Serial Number 00-15-58-ff-ff-c9-37-71 Kernel driver in use: e1000e Kernel modules: e1000e 03:00.0 Network controller: Intel Corporation PRO/Wireless 3945ABG [Golan] Network Connection (rev 02) Subsystem: Intel Corporation ThinkPad R60e/X60s Physical Slot: 3 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 46 Region 0: Memory at edf00000 (32-bit, non-prefetchable) [size=4K] Capabilities: [c8] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0100c Data: 4162 Capabilities: [e0] Express (v1) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 unlimited ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us ClockPM+ Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn- Capabilities: [140 v1] Device Serial Number 00-1b-77-ff-ff-6e-f9-a3 Kernel driver in use: iwl3945 Kernel modules: iwl3945 15:00.0 CardBus bridge: Texas Instruments PCI1510 PC card Cardbus Controller Subsystem: Lenovo ThinkPad T60/R60 series Physical Slot: 1 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 168, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at e4300000 (32-bit, non-prefetchable) [size=4K] Bus: primary=15, secondary=16, subordinate=17, sec-latency=176 Memory window 0: e0000000-e3fff000 (prefetchable) Memory window 1: c4000000-c7fff000 I/O window 0: 0000a000-0000a0ff I/O window 1: 0000a400-0000a4ff BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset+ 16bInt+ PostWrite+ 16-bit legacy interface ports at 0001 Kernel driver in use: yenta_cardbus Kernel modules: yenta_socket [7.6.] Attached devices: Host: scsi0 Channel: 00 Id: 00 Lun: 00 Vendor: ATA Model: ST910021AS Rev: 4.06 Type: Direct-Access ANSI SCSI revision: 05 Host: scsi1 Channel: 00 Id: 00 Lun: 00 Vendor: MATSHITA Model: DVD-RAM UJ-842 Rev: RB01 Type: CD-ROM ANSI SCSI revision: 05 [7.7.] 1 12 1619 1744 1775 1832 2066 2536 31 52 7 861 asound execdomains kpagecount pagetypeinfo sysvipc 10 1227 17 1746 1779 19 2078 2539 33 53 701 872 buddyinfo fb kpageflags partitions timer_list 1094 1245 1702 1748 1780 1960 2090 2540 333 54 709 875 bus filesystems latency_stats sched_debug timer_stats 11 1257 1705 1750 1782 1962 2094 26 337 55 729 884 cgroups fs loadavg schedstat tty 1100 1281 1706 1754 1787 1965 21 262 34 56 75 885 cmdline interrupts locks scsi uptime 1141 13 1711 1756 1788 1966 2107 263 35 585 76 892 consoles iomem mdstat self version 1143 1413 1719 1757 1794 1968 22 27 36 587 78 895 cpuinfo ioports meminfo slabinfo vmallocinfo 1146 1437 1721 1760 1795 1976 23 2734 37 625 8 897 crypto irq misc softirqs vmstat 1183 1452 1727 1762 1799 2 24 28 4 649 816 9 devices kallsyms modules stat zoneinfo 1184 15 1729 1764 18 20 2499 29 49 668 823 900 diskstats kcore mounts swaps 1185 1530 1738 1766 1802 2014 25 3 5 670 824 911 dma key-users mtrr sys 1187 1546 1740 1774 1804 2023 2502 30 50 674 849 acpi driver kmsg net sysrq-trigger [X.] https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1277598 Workaround = radeon.modeset=0 @ /etc/default/grub makes the problem disappear. .................................................................... Luukku Plus -paketilla pääset eroon tila- ja turvallisuusongelmista. Hanki Luukku Plus ja helpotat elämääsi. http://www.mtv3.fi/luukku

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[PATCH v4 1/1] Documentation: drm: describing drm properties exposed by various drivers
by sagar.a.kamble＠intel.com 11 Mar '14

11 Mar '14

From: Sagar Kamble <sagar.a.kamble(a)intel.com> Started documenting drm properties for drm drivers. This patch provides information about properties in drm, i915, psb and cdv/gma-500. Information about other properties can be added on top of these. v2: Added description of drm properties in armada, exynos, i2c/ch7006, noveau, omap, qxl, radeon, rcar-du v3: Removed "Property Object" column since it is implementation related. Property type column refined.[Ville's review comments] v4: Removed whitespace warnings and minor nits. Cc: Rob Landley <rob(a)landley.net> Cc: Dave Airlie <airlied(a)redhat.com> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Laurent Pinchart <laurent.pinchart+renesas(a)ideasonboard.com> Cc: David Herrmann <dh.herrmann(a)gmail.com> Cc: Alex Deucher <alexander.deucher(a)amd.com> Cc: "Ville Syrjälä" <ville.syrjala(a)linux.intel.com> Cc: Sagar Kamble <sagar.a.kamble(a)intel.com> Cc: "Purushothaman, Vijay A" <vijay.a.purushothaman(a)intel.com> Cc: linux-doc(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org Signed-off-by: Sagar Kamble <sagar.a.kamble(a)intel.com> --- Documentation/DocBook/drm.tmpl | 913 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 913 insertions(+) diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl index ed1d6d2..b810c77 100644 --- a/Documentation/DocBook/drm.tmpl +++ b/Documentation/DocBook/drm.tmpl @@ -2317,6 +2317,919 @@ void intel_crt_init(struct drm_device *dev) pointer to the target object, a pointer to the previously created property and an initial instance value. </para> + <para> + The following table gives description of drm properties exposed by various + modules/drivers. + </para> +<table border="1" cellpadding="0" cellspacing="0" > +<tbody> +<tr style="font-weight: bold;"> +<td valign="top" >Owner Module/Drivers</td> +<td valign="top" >Group</td> +<td valign="top" >Property Name</td> +<td valign="top" >Type</td> +<td valign="top" >Property Values</td> +<td valign="top" >Object attached</td> +<td valign="top" >Description/Restrictions</td> +</tr> +<tr> +<td rowspan="19" valign="top" >DRM</td> +<td rowspan="2" valign="top" >Generic</td> +<td valign="top" >“EDID”</td> +<td valign="top" >BLOB | IMMUTABLE</td> +<td valign="top" >0</td> +<td valign="top" >Connector</td> +<td valign="top" >Contains id of edid blob ptr object.</td> +</tr> +<tr> +<td valign="top" >“DPMS”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ DRM_MODE_DPMS_ON, “On”}, +{ DRM_MODE_DPMS_STANDBY, “Standby”}, +{ DRM_MODE_DPMS_SUSPEND, “Suspend”}, +{ DRM_MODE_DPMS_OFF, “Off”}</td> +<td valign="top" >Connector</td> +<td valign="top" >Contains DPMS operation mode value.</td> +</tr> +<tr> +<td rowspan="2" valign="top" >DVI-I</td> +<td valign="top" >“subconnector”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ DRM_MODE_SUBCONNECTOR_Unknown, “Unknown”}, +{ DRM_MODE_SUBCONNECTOR_DVID, “DVI-D”}, +{ DRM_MODE_SUBCONNECTOR_DVIA, “DVI-A”}</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“select subconnector”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ DRM_MODE_SUBCONNECTOR_Automatic, “Automatic”}, +{ DRM_MODE_SUBCONNECTOR_DVID, “DVI-D”}, +{ DRM_MODE_SUBCONNECTOR_DVIA, “DVI-A”}</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="13" valign="top" >TV</td> +<td valign="top" >“subconnector”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ DRM_MODE_SUBCONNECTOR_Unknown, "Unknown"}, +{ DRM_MODE_SUBCONNECTOR_Composite, "Composite" }, +{ DRM_MODE_SUBCONNECTOR_SVIDEO, "SVIDEO"}, +{ DRM_MODE_SUBCONNECTOR_Component , "Component"}, +{ DRM_MODE_SUBCONNECTOR_SCART, "SCART"}</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“select subconnector”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{DRM_MODE_SUBCONNECTOR_Automatic, "Automatic"}, +{DRM_MODE_SUBCONNECTOR_Composite, "Composite"}, +{DRM_MODE_SUBCONNECTOR_SVIDEO, "SVIDEO"}, +{DRM_MODE_SUBCONNECTOR_Component, "Component"}, +{DRM_MODE_SUBCONNECTOR_SCART, "SCART"}</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“mode”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{0, "NTSC_M"} , {1, "NTSC_J"} , +{2, "NTSC_443"}, {3, "PAL_B"} etc.</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“left margin”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“right margin”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“top margin”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“bottom margin”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“brightness”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“contrast”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“flicker reduction”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“overscan”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“saturation”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“hue”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="2" valign="top" >Optional</td> +<td valign="top" >“scaling mode”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ DRM_MODE_SCALE_NONE, "None" }, +{ DRM_MODE_SCALE_FULLSCREEN, "Full" }, +{ DRM_MODE_SCALE_CENTER, "Center" }, +{ DRM_MODE_SCALE_ASPECT, "Full aspect" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“dirty”</td> +<td valign="top" >ENUM | IMMUTABLE</td> +<td valign="top" >{ DRM_MODE_DIRTY_OFF, "Off" }, +{ DRM_MODE_DIRTY_ON, "On" }, +{ DRM_MODE_DIRTY_ANNOTATE, "Annotate" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="21" valign="top" >i915</td> +<td rowspan="3" valign="top" >Generic</td> +<td valign="top" >"Broadcast RGB"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ INTEL_BROADCAST_RGB_AUTO, "Automatic" }, +{ INTEL_BROADCAST_RGB_FULL, "Full" }, +{ INTEL_BROADCAST_RGB_LIMITED, "Limited 16:235" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“audio”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ HDMI_AUDIO_OFF_DVI, "force-dvi" }, +{ HDMI_AUDIO_OFF, "off" }, +{ HDMI_AUDIO_AUTO, "auto" }, +{ HDMI_AUDIO_ON, "on" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >Standard name as in DRM</td> +<td valign="top" >Standard type as in DRM</td> +<td valign="top" >Standard value as in DRM</td> +<td valign="top" >Standard Object as in DRM</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="17" valign="top" >SDVO-TV</td> +<td valign="top" >“mode”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{0, "NTSC_M"} , {1, "NTSC_J"} , +{2, "NTSC_443"}, {3, "PAL_B"} etc.</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"left_margin"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"right_margin"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"top_margin"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"bottom_margin"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“hpos”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“vpos”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“contrast”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“saturation”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“hue”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“sharpness”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“flicker_filter”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“flicker_filter_adaptive”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“flicker_filter_2d”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“tv_chroma_filter”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“tv_luma_filter”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“dot_crawl”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=1</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >SDVO-TV/LVDS</td> +<td valign="top" >“brightness”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="3" valign="top" >CDV gma-500</td> +<td rowspan="3" valign="top" >Generic</td> +<td valign="top" >"Broadcast RGB"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ 0, “Full”}, +{ 1, “Limited 16:235”}</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"Broadcast RGB"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ -1, “off”}, +{ 0, “auto”}, +{ 1, “on”}</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >Standard name as in DRM</td> +<td valign="top" >Standard type as in DRM</td> +<td valign="top" >Standard value as in DRM</td> +<td valign="top" >Standard Object as in DRM</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="20" valign="top" >Poulsbo</td> +<td rowspan="2" valign="top" >Generic</td> +<td valign="top" >“backlight”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=100</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >Standard name as in DRM</td> +<td valign="top" >Standard type as in DRM</td> +<td valign="top" >Standard value as in DRM</td> +<td valign="top" >Standard Object as in DRM</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="17" valign="top" >SDVO-TV</td> +<td valign="top" >“mode”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{0, "NTSC_M"} , {1, "NTSC_J"} , +{2, "NTSC_443"}, {3, "PAL_B"} etc.</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"left_margin"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"right_margin"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"top_margin"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"bottom_margin"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“hpos”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“vpos”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“contrast”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“saturation”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“hue”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“sharpness”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“flicker_filter”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“flicker_filter_adaptive”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“flicker_filter_2d”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“tv_chroma_filter”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“tv_luma_filter”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“dot_crawl”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=1</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >SDVO-TV/LVDS</td> +<td valign="top" >“brightness”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max= SDVO dependent</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="11" valign="top" >armada</td> +<td rowspan="2" valign="top" >CRTC</td> +<td valign="top" >"CSC_YUV"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ CSC_AUTO, "Auto" }, +{ CSC_YUV_CCIR601, "CCIR601" }, +{ CSC_YUV_CCIR709, "CCIR709" }</td> +<td valign="top" >CRTC</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"CSC_RGB"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ CSC_AUTO, "Auto" }, +{ CSC_RGB_COMPUTER, "Computer system" }, +{ CSC_RGB_STUDIO, "Studio" }</td> +<td valign="top" >CRTC</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="9" valign="top" >Overlay</td> +<td valign="top" >"colorkey"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0xffffff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"colorkey_min"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0xffffff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"colorkey_max"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0xffffff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"colorkey_val"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0xffffff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"colorkey_alpha"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0xffffff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"colorkey_mode"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ CKMODE_DISABLE, "disabled" }, +{ CKMODE_Y, "Y component" }, +{ CKMODE_U, "U component" }, +{ CKMODE_V, "V component" }, +{ CKMODE_RGB, "RGB" }, +{ CKMODE_R, “R component" }, +{ CKMODE_G, "G component" }, +{ CKMODE_B, "B component" }</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"brightness"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=256 + 255</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"contrast"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0x7fff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"saturation"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0x7fff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="2" valign="top" >exynos</td> +<td valign="top" >CRTC</td> +<td valign="top" >“mode”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ CRTC_MODE_NORMAL, "normal" }, +{ CRTC_MODE_BLANK, "blank" }</td> +<td valign="top" >CRTC</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >Overlay</td> +<td valign="top" >“zpos”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=MAX_PLANE-1</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="3" valign="top" >i2c/ch7006_drv</td> +<td valign="top" >Generic</td> +<td valign="top" >“scale”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=2</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="2" valign="top" >TV</td> +<td valign="top" >Standard names as in DRM</td> +<td valign="top" >Standard types as in DRM</td> +<td valign="top" >Standard Values as in DRM</td> +<td valign="top" >Standard object as in DRM</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“mode”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{0, "PAL"}, {1, "PAL-M"}, {2,"PAL-N"}, +{2,”PAL-Nc"}, {3, "PAL-60"}, {4, "NTSC-M"}, +{5,"NTSC-J"}</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="16" valign="top" >noveau</td> +<td rowspan="6" valign="top" >NV10 Overlay</td> +<td valign="top" >"colorkey"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0x01ffffff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“contrast”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=8192-1</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“brightness”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=1024</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“hue”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=359</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“saturation”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=8192-1</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“iturbt_709”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=1</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="2" valign="top" >Nv04 Overlay</td> +<td valign="top" >“colorkey”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0x01ffffff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“brightness”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=1024</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="7" valign="top" >Display</td> +<td valign="top" >“dithering mode”</td> +<td valign="top" >ENUM</td> +<td valign="top" >Custom values which has gen info as well. +{ 6, UNDERSCAN_AUTO, "auto" }, +{ 6, UNDERSCAN_OFF, "off" }, +{ 6, UNDERSCAN_ON, "on" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“dithering depth”</td> +<td valign="top" >ENUM</td> +<td valign="top" >Custom values which has gen info as well. +{ 7, DITHERING_MODE_AUTO, "auto" }, +{ 7, DITHERING_MODE_OFF, "off" }, +{ 1, DITHERING_MODE_ON, "on" }, +{ 6, DITHERING_MODE_STATIC2X2, "static 2x2" }, +{ 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" }, +{ 4, DITHERING_MODE_TEMPORAL, "temporal" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“underscan”</td> +<td valign="top" >ENUM</td> +<td valign="top" >Custom values which has gen info as well. +{ 6, DITHERING_DEPTH_AUTO, "auto" }, +{ 6, DITHERING_DEPTH_6BPC, "6 bpc" }, +{ 6, DITHERING_DEPTH_8BPC, "8 bpc" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“underscan hborder”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=128</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“underscan vborder”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=128</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“vibrant hue”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=180</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“color vibrance”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=200</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >Generic</td> +<td valign="top" >Standard name as in DRM</td> +<td valign="top" >Standard type as in DRM</td> +<td valign="top" >Standard value as in DRM</td> +<td valign="top" >Standard Object as in DRM</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="2" valign="top" >omap</td> +<td rowspan="2" valign="top" >Generic</td> +<td valign="top" >“rotation”</td> +<td valign="top" >BITMASK</td> +<td valign="top" >{ 0, "rotate-0" }, +{ 1, "rotate-90" }, +{ 2, "rotate-180" }, +{ 3, "rotate-270" }, +{ 4, "reflect-x" }, +{ 5, "reflect-y" }</td> +<td valign="top" >CRTC, Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >“zorder”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=3</td> +<td valign="top" >CRTC, Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >qxl</td> +<td valign="top" >Generic</td> +<td valign="top" >“hotplug_mode_update"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=1</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="10" valign="top" >radeon</td> +<td valign="top" >DVI-I</td> +<td valign="top" >“coherent”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=1</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >DAC enable load detect</td> +<td valign="top" >“load detection”</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=1</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >TV Standard</td> +<td valign="top" >"tv standard"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ TV_STD_NTSC, "ntsc" }, +{ TV_STD_PAL, "pal" }, +{ TV_STD_PAL_M, "pal-m" }, +{ TV_STD_PAL_60, "pal-60" }, +{ TV_STD_NTSC_J, "ntsc-j" }, +{ TV_STD_SCART_PAL, "scart-pal" }, +{ TV_STD_PAL_CN, "pal-cn" }, +{ TV_STD_SECAM, "secam" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >legacy TMDS PLL detect</td> +<td valign="top" >"tmds_pll"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ 0, "driver" }, +{ 1, "bios" }</td> +<td valign="top" >-</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="3" valign="top" >Underscan</td> +<td valign="top" >"underscan"</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ UNDERSCAN_OFF, "off" }, +{ UNDERSCAN_ON, "on" }, +{ UNDERSCAN_AUTO, "auto" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"underscan hborder"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=128</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"underscan vborder"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=128</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >Audio</td> +<td valign="top" >“audio”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ RADEON_AUDIO_DISABLE, "off" }, +{ RADEON_AUDIO_ENABLE, "on" }, +{ RADEON_AUDIO_AUTO, "auto" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >FMT Dithering</td> +<td valign="top" >“dither”</td> +<td valign="top" >ENUM</td> +<td valign="top" >{ RADEON_FMT_DITHER_DISABLE, "off" }, +{ RADEON_FMT_DITHER_ENABLE, "on" }</td> +<td valign="top" >Connector</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >Generic</td> +<td valign="top" >Standard name as in DRM</td> +<td valign="top" >Standard type as in DRM</td> +<td valign="top" >Standard value as in DRM</td> +<td valign="top" >Standard Object as in DRM</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td rowspan="3" valign="top" >rcar-du</td> +<td rowspan="3" valign="top" >Generic</td> +<td valign="top" >"alpha"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=255</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"colorkey"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=0, Max=0x01ffffff</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +<tr> +<td valign="top" >"zpos"</td> +<td valign="top" >RANGE</td> +<td valign="top" >Min=1, Max=7</td> +<td valign="top" >Plane</td> +<td valign="top" >TBD</td> +</tr> +</tbody> +</table> </sect1>  -- 1.8.5

4 8

[PATCH trivial 03/16] drm/exynos: Spelling s/contro/control/
by Geert Uytterhoeven 11 Mar '14

11 Mar '14

From: Geert Uytterhoeven <geert+renesas(a)linux-m68k.org> Signed-off-by: Geert Uytterhoeven <geert+renesas(a)linux-m68k.org> Cc: David Airlie <airlied(a)linux.ie> Cc: dri-devel(a)lists.freedesktop.org --- drivers/gpu/drm/exynos/exynos_drm_ipp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c b/drivers/gpu/drm/exynos/exynos_drm_ipp.c index 09312b877470..3d78144387ac 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c +++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c @@ -284,7 +284,7 @@ static struct exynos_drm_ippdrv *ipp_find_drv_by_handle(u32 prop_id) /* * This case is search ipp driver by prop_id handle. * sometimes, ipp subsystem find driver by prop_id. - * e.g PAUSE state, queue buf, command contro. + * e.g PAUSE state, queue buf, command control. */ list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) { DRM_DEBUG_KMS("count[%d]ippdrv[0x%x]\n", count++, (int)ippdrv); -- 1.7.9.5

1 0

[PATCH] drm/exynos: set the active aspect ratio as per mode
by Shirish S 11 Mar '14

11 Mar '14

now that the drm_display_mode also provides aspect ratio for all resolutions, this patch adds its usage to set the active aspect ratio of AVI info frame packets as per CEA-861-D standard's Table 9. This is also needed to abide by the 7-27 compliance test of HDMI. V2: rebased it to TODO branch, and made the orr'ing logic correct Signed-off-by: Shirish S <s.shirish(a)samsung.com> --- drivers/gpu/drm/exynos/exynos_hdmi.c | 38 +++++++++++++++++++++++++++------- 1 file changed, 31 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index c021ddc..bba54c9 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -53,8 +53,6 @@ /* AVI header and aspect ratio */ #define HDMI_AVI_VERSION 0x02 #define HDMI_AVI_LENGTH 0x0D -#define AVI_PIC_ASPECT_RATIO_16_9 (2 << 4) -#define AVI_SAME_AS_PIC_ASPECT_RATIO 8 /* AUI header info */ #define HDMI_AUI_VERSION 0x01 @@ -65,6 +63,12 @@ enum hdmi_type { HDMI_TYPE14, }; +enum active_aspect_ratio { + AVI_SAME_AS_PIC_ASPECT_RATIO = 8, + AVI_4_3_Center_RATIO, + AVI_16_9_Center_RATIO, +}; + struct hdmi_resources { struct clk *hdmi; struct clk *sclk_hdmi; @@ -162,6 +166,7 @@ struct hdmi_v14_conf { struct hdmi_conf_regs { int pixel_clock; int cea_video_id; + enum hdmi_picture_aspect aspect_ratio; union { struct hdmi_v13_conf v13_conf; struct hdmi_v14_conf v14_conf; @@ -668,7 +673,6 @@ static void hdmi_reg_infoframe(struct hdmi_context *hdata, { u32 hdr_sum; u8 chksum; - u32 aspect_ratio; u32 mod; u32 vic; @@ -697,10 +701,28 @@ static void hdmi_reg_infoframe(struct hdmi_context *hdata, AVI_ACTIVE_FORMAT_VALID | AVI_UNDERSCANNED_DISPLAY_VALID); - aspect_ratio = AVI_PIC_ASPECT_RATIO_16_9; - - hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(2), aspect_ratio | - AVI_SAME_AS_PIC_ASPECT_RATIO); + /* + * Set the aspect ratio as per the mode, mentioned in + * Table 9 AVI InfoFrame Data Byte 2 of CEA-861-D Standard + */ + switch (hdata->mode_conf.aspect_ratio) { + case HDMI_PICTURE_ASPECT_4_3: + hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(2), + (hdata->mode_conf.aspect_ratio << 4) | + AVI_4_3_Center_RATIO); + break; + case HDMI_PICTURE_ASPECT_16_9: + hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(2), + (hdata->mode_conf.aspect_ratio << 4) | + AVI_16_9_Center_RATIO); + break; + case HDMI_PICTURE_ASPECT_NONE: + default: + hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(2), + (hdata->mode_conf.aspect_ratio << 4) | + AVI_SAME_AS_PIC_ASPECT_RATIO); + break; + } vic = hdata->mode_conf.cea_video_id; hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(4), vic); @@ -1421,6 +1443,7 @@ static void hdmi_v13_mode_set(struct hdmi_context *hdata, hdata->mode_conf.cea_video_id = drm_match_cea_mode((struct drm_display_mode *)m); hdata->mode_conf.pixel_clock = m->clock * 1000; + hdata->mode_conf.aspect_ratio = m->picture_aspect_ratio; hdmi_set_reg(core->h_blank, 2, m->htotal - m->hdisplay); hdmi_set_reg(core->h_v_line, 3, (m->htotal << 12) | m->vtotal); @@ -1517,6 +1540,7 @@ static void hdmi_v14_mode_set(struct hdmi_context *hdata, hdata->mode_conf.cea_video_id = drm_match_cea_mode((struct drm_display_mode *)m); hdata->mode_conf.pixel_clock = m->clock * 1000; + hdata->mode_conf.aspect_ratio = m->picture_aspect_ratio; hdmi_set_reg(core->h_blank, 2, m->htotal - m->hdisplay); hdmi_set_reg(core->v_line, 2, m->vtotal); -- 1.7.10.4

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dri-devel March 2014