dri-devel September 2014

dri-devel@lists.freedesktop.org

173 participants
1045 discussions

[PATCH/RESEND 0/8] tilcdc-panel: Backlight and GPIO devicetree support
by Ezequiel Garcia 17 Sep '14

17 Sep '14

Dave, I'm resending this, hoping it can be pushed for v3.18. The patchset was ready for v3.17, but it got no maintainer feedback or review. Maybe it fell through some crack? Just for reference, here goes the details about this series and why it's needed: This patchset adds the required changes to support an optional backlight and GPIO for the tilcdc panel driver. There was some code to support a backlight, but it was broken and undocumented. I've followed the nice implementation in panel-simple and added a similar one here. The enable GPIO is required to turn on and off devices with such capability. Also here, I've followed panel-simple which looks correct. In addition to this there are very minor cosmetic cleanups and a larger fix for the error path in tilcdc's DRM driver .load error path. Ezequiel Garcia (8): drm/tilcdc: Fix the error path in tilcdc_load() drm/tilcdc: panel: Add missing of_node_put drm/tilcdc: panel: Remove unused variable drm/tilcdc: panel: Spurious whitespace removal drm/tilcdc: panel: Use devm_kzalloc to simplify the error path drm/tilcdc: panel: Fix backlight devicetree support drm/tilcdc: panel: Set return value explicitly drm/tilcdc: panel: Add support for enable GPIO .../devicetree/bindings/drm/tilcdc/panel.txt | 7 ++ drivers/gpu/drm/tilcdc/tilcdc_drv.c | 60 +++++++++++++++--- drivers/gpu/drm/tilcdc/tilcdc_panel.c | 74 +++++++++++++++++----- 3 files changed, 114 insertions(+), 27 deletions(-) -- 2.0.1

3 14

[PATCH] drm/radeon: delete unused PTE_* defines
by Kyle McMartin 16 Sep '14

16 Sep '14

They don't appear to be used anywhere... elsewhere uses R*_PTE_*. master@linux:U:.% git grep PTE_ -- drivers/gpu/drm/radeon | grep -v _PTE_ master@linux:U:.% (kyle@redacted:~/linux) ./arch/arm64/include/asm/pgtable.h:27:0: note: this is the location of the previous definition #define PTE_VALID (_AT(pteval_t, 1) << 0) ^ In file included from drivers/gpu/drm/radeon/r600_cs.c:31:0: drivers/gpu/drm/radeon/r600d.h:48:0: warning: "PTE_VALID" redefined [enabled by default] #define PTE_VALID (1 << 0) ^ In file included from ./arch/arm64/include/asm/io.h:29:0, from include/linux/clocksource.h:19, from include/clocksource/arm_arch_timer.h:19, from ./arch/arm64/include/asm/arch_timer.h:27, from ./arch/arm64/include/asm/timex.h:19, from include/linux/timex.h:65, <snip> from include/drm/drmP.h:51, from drivers/gpu/drm/radeon/r600_cs.c:29: ./arch/arm64/include/asm/pgtable.h:27:0: note: this is the location of the previous definition #define PTE_VALID (_AT(pteval_t, 1) << 0) ^ Signed-off-by: Kyle McMartin <kyle(a)redhat.com> --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h @@ -44,13 +44,6 @@ #define R6XX_MAX_PIPES 8 #define R6XX_MAX_PIPES_MASK 0xff -/* PTE flags */ -#define PTE_VALID (1 << 0) -#define PTE_SYSTEM (1 << 1) -#define PTE_SNOOPED (1 << 2) -#define PTE_READABLE (1 << 5) -#define PTE_WRITEABLE (1 << 6) - /* tiling bits */ #define ARRAY_LINEAR_GENERAL 0x00000000 #define ARRAY_LINEAR_ALIGNED 0x00000001

2 1

3.14 radeon regression: radeon is broken (pci bug?)
by Andy Lutomirski 16 Sep '14

16 Sep '14

My system works on a 3.13 Fedora kernel. It does not work on a more-or-less identically configured 3.14-rc7+ kernel. The symptom is that the Plymouth password prompt flashes and them the screen goes blank. Hitting escape brings back the text console, and all is well until X tries to start. Then I get a blank screen. killall -9 Xorg from ssh causes these errors to be logged: [ 226.239747] [drm:atom_op_jump] *ERROR* atombios stuck in loop for more than 5secs aborting [ 226.239751] [drm:atom_execute_table_locked] *ERROR* atombios stuck executing CD34 (len 55, WS 0, PS 0) @ 0xCD57 [ 231.241492] [drm:atom_op_jump] *ERROR* atombios stuck in loop for more than 5secs aborting [ 231.241496] [drm:atom_execute_table_locked] *ERROR* atombios stuck executing CD6C (len 62, WS 0, PS 0) @ 0xCD88 [ 236.243111] [drm:atom_op_jump] *ERROR* atombios stuck in loop for more than 5secs aborting [ 236.243115] [drm:atom_execute_table_locked] *ERROR* atombios stuck executing CD6C (len 62, WS 0, PS 0) @ 0xCD88 [ 241.244625] [drm:atom_op_jump] *ERROR* atombios stuck in loop for more than 5secs aborting [ 241.244628] [drm:atom_execute_table_locked] *ERROR* atombios stuck executing CD6C (len 62, WS 0, PS 0) @ 0xCD88 lspci -vvvxxxnn on 3.14-rc7+ says: 09:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Caicos [Radeon HD 6450/7450/8450 / R5 230 OEM] [1002:6779] (rev ff) (prog-if ff) !!! Unknown header type 7f Kernel driver in use: radeon 00: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 10: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 09:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] Caicos HDMI Audio [Radeon HD 6400 Series] [1002:aa98] (rev ff) (prog-if ff) !!! Unknown header type 7f Kernel driver in use: snd_hda_intel 00: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 10: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff (oops!) On 3.13, it says: 09:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Caicos [Radeon HD 6450/7450/8450 / R5 230 OEM] [1002:6779] (prog-if 00 [VGA controller]) Subsystem: PC Partner Limited / Sapphire Technology Radeon HD 6450 1 GB DDR3 [174b:e164] Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 92 Region 0: Memory at e0000000 (64-bit, prefetchable) [size=256M] Region 2: Memory at f4a20000 (64-bit, non-prefetchable) [size=128K] Region 4: I/O ports at c000 [size=256] Expansion ROM at f4a00000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: radeon 00: 02 10 79 67 07 04 10 00 00 00 00 03 10 00 80 00 10: 0c 00 00 e0 00 00 00 00 04 00 a2 f4 00 00 00 00 20: 01 c0 00 00 00 00 00 00 00 00 00 00 4b 17 64 e1 30: 00 00 a0 f4 50 00 00 00 00 00 00 00 0a 01 00 00 09:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] Caicos HDMI Audio [Radeon HD 6400 Series] [1002:aa98] Subsystem: PC Partner Limited / Sapphire Technology Radeon HD 6450 1GB DDR3 [174b:aa98] Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin B routed to IRQ 96 Region 0: Memory at f4a40000 (64-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: snd_hda_intel 00: 02 10 98 aa 06 04 10 00 00 00 03 04 10 00 80 00 10: 04 00 a4 f4 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 4b 17 98 aa 30: 00 00 00 00 50 00 00 00 00 00 00 00 05 02 00 00 Logs attached. Unfortunately, I'll be away from this computer until Wednesday.

3 8

[PATCH 00/18] Final batch of Android related fixes
by Emil Velikov 16 Sep '14

16 Sep '14

Hello list, Here is the final batch that I've been planning to get upstreamed. Everything else that remains are some custom downstream "hacks" that will get upstreamed by their original authors in due time :) Highlights: - Drop a few unneeded Makefiles. - Android support for libkms & modetest. Inspired by Benjamin Gaignard's work. - Private mmap/munmap wrappers to hide all the love that bionic has for us :) The series is available in branch 'android-final-fixes' at https://github.com/evelikov/libdrm Any comments, reviews, it builds or it works are appreciated. -Emil

3 25

PATCH: radeondrm x86_64 and android32
by Sergey Korshunoff 16 Sep '14

16 Sep '14

Android-x86 4.0-r1 (32 bit) have problems with x86_64 kernel when he trying to use a radeon kms. The following change correct a problem: drivers/gpu/drm/radeon_kms.c (function radeon_info_ioctl): - value_ptr = (uint32_t *)((unsigned long)info->value); + value_ptr = (uint32_t *)((unsigned)info->value); Looks like a userspace data in android running under x86_64 is located above 4 Gb. I don't think so. But after this change android run fine.

2 4

[PATCH 00/11] Spinlock use clarification in i915
by Daniel Vetter 16 Sep '14

16 Sep '14

Hi all, So I've tried to figure out a way how to clear up our irq setup mess, but instead only managed to get sidetracked on a spinlock usage review. Review highly welcome. Cheers, Daniel Daniel Vetter (11): drm/i915: Clarify event_lock locking, process context drm/i915: Clarify event_lock locking, irq&mixed context drm/i915: Clarify gpu_error.lock locking drm/i915: Clarify irq_lock locking, intel_tv_detect drm/i915: Clarify irq_lock locking, work functions drm/i915: Clarify irq_lock locking, interrupt install/uninstall drm/i915: Clarify irq_lock locking, irq handlers drm/i915: Clarify irq_lock locking, special cases drm/i915: Convert backlight_lock to a mutex drm/i915: Clarify uncore.lock locking drm/i915: Clarify mmio_flip_lock locking drivers/gpu/drm/i915/i915_debugfs.c | 5 +- drivers/gpu/drm/i915/i915_dma.c | 2 +- drivers/gpu/drm/i915/i915_drv.c | 5 +- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 10 ++-- drivers/gpu/drm/i915/i915_irq.c | 101 ++++++++++++++-------------------- drivers/gpu/drm/i915/intel_display.c | 67 +++++++++++----------- drivers/gpu/drm/i915/intel_panel.c | 30 ++++------ drivers/gpu/drm/i915/intel_tv.c | 9 ++- 9 files changed, 103 insertions(+), 128 deletions(-) -- 1.9.3

4 16

DRM encoder/bridge architecture questions
by Sean Cross 15 Sep '14

15 Sep '14

Hi, We've got an IT6251 LVDS -> eDP bridge chip we're hanging off of a dual-lane LVDS port on an i.MX6. We have a driver we're using internally that's little more than a series of register pokes to boot the chip, but I'd like to clean it up for submission. What kind of device is this? It's externally connected to the main SoC via LVDS and I2C. It's conceptually hanging off of the ldb "LVDS Display Bridge" encoder, which means it's an encoder attached to an encoder. Is that allowed in the DRM model? With the current driver, I have it just sitting in drivers/gpu/drm/i2c/, and it's not "attached" to anything. The encoder chip automatically figures out display timings and the like. Where should the file actually go? Finally, how would the driver get attached to the system? I see there's an Exynos bridge device that appears to go the other way, but it's explicitly loaded by the Exynos display adapter. Since most devices will have an LVDS panel attached directly to the LDB port, it seems silly to have it explicitly look for an additional bridge device to plug in as this is a special case. Is there any way I could pass the it6251 a handle to the ldb in device tree and have it hang itselff of the end that way? Sean

2 1

[PULL] drm-intel-next
by Daniel Vetter 15 Sep '14

15 Sep '14

Hi Dave, So final feature pull request for 3.18. QA isn't really done yet with the manul testing, but this help up a week of soaking so should be fairly ok-ish. And I think holding up merging doesn't really help anyone, especially since I want to rebase my 3.19 queue on top of drm-next with all the branches that just landed. drm-intel-next-2014-09-05: - final bits (again) for the rotation support (Sonika Jindal) - support bl_power in the intel backlight (Jani) - vdd handling improvements from Ville - i830M fixes from Ville - piles of prep work all over to make skl enabling just plug in (Damien, Sonika) - rename DP training defines to reflect latest edp standards, this touches all drm drivers supporting DP (Sonika Jindal) - cache edids during single detect cycle to avoid re-reading it for e.g. audio, from Chris - move w/a for registers which are stored in the hw context to the context init code (Arun&Damien) - edp panel power sequencer fixes, helps chv a lot (Ville) - piles of other chv fixes all over - much more paranoid pageflip handling with stall detection and better recovery from Chris - small things all over, as usual Aside: A backmerge of latest drm-fixes would be good to baseline 3.19 stuff on top. Note that there's a conflict in i915 which gcc will catch - you need to add a local dev_prive = dev->dev_private somewhere. Cheers, Daniel The following changes since commit 47c1296829505d119d7d58dd23d39cc5db344f12: drm/qxl: enables gem prime helpers for qxl using dummy driver callbacks (2014-09-03 15:36:52 +1000) are available in the git repository at: git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-09-05 for you to fetch changes up to a12624959ad4e3bfa8c344ad71728ffc9a379158: drm/i915: Update DRIVER_DATE to 20140905 (2014-09-05 14:57:29 +0200) ---------------------------------------------------------------- - final bits (again) for the rotation support (Sonika Jindal) - support bl_power in the intel backlight (Jani) - vdd handling improvements from Ville - i830M fixes from Ville - piles of prep work all over to make skl enabling just plug in (Damien, Sonika) - rename DP training defines to reflect latest edp standards, this touches all drm drivers supporting DP (Sonika Jindal) - cache edids during single detect cycle to avoid re-reading it for e.g. audio, from Chris - move w/a for registers which are stored in the hw context to the context init code (Arun&Damien) - edp panel power sequencer fixes, helps chv a lot (Ville) - piles of other chv fixes all over - much more paranoid pageflip handling with stall detection and better recovery from Chris - small things all over, as usual ---------------------------------------------------------------- Andy Shevchenko (1): drm: i915: reduce memory footprint when debugging Arun Siluvery (2): drm/i915/bdw: Apply workarounds in render ring init function drm/i915/bdw: Export workaround data to debugfs Ben Widawsky (1): drm/i915: Don't save/restore RS when not used Chris Wilson (15): drm/i915: Do not access stolen memory directly by the CPU, even for error capture drm/i915: Remove num_pages parameter to i915_error_object_create() drm/i915: Suppress a WARN on reading an object back for a GPU hang drm/i915: honour forced connector modes drm/i915: Make wait-for-pending-flips more defensive drm/i915: Differentiate between LLC or snooped for the user drm/i915/dp: Refactor common eDP lid detection drm/i915/dp: Cache EDID for a detection cycle drm/i915/hdmi: Cache EDID for a detection cycle drm/i915: Rename global latency_ns variable drm/i915: Remove shadowed local variable 'i' from i915_interrupt_info drm/i915: Fix unsafe vma iteration in i915_drop_caches drm/i915: Reset the HEAD pointer for the ring after writing START drm/i915: Check for a stalled page flip after each vblank drm/i915: Decouple the stuck pageflip on modeset Daisy Sun (1): drm/i915/bdw: BDW Software Turbo Damien Lespiau (12): drm/i915: Use dev_priv as first argument of for_each_pipe() drm/i915: Print the pipe on which the vblank wait times out drm/i915: Don't use a define when it's clearer to just put the value drm/i915: Add "Intel Corporation" as module author drm/i915/bdw: Let the memory controller do all the swizzling drm/i915: Rename intel_wa_registers with a i915_ prefix drm/i915: Don't overrun the intel_wa_regs array drm/i915: Don't silently discard workarounds drm/i915: Remove unneeded brackets drm/i915: Don't restrict i915_wa_registers to BDW drm/i915: Rewrite ABS_DIFF() in a safer manner drm/i915: Introduce a for_each_plane() macro Daniel Vetter (2): MAINTAINERS: Update Daniel Vetter's email address drm/i915: Update DRIVER_DATE to 20140905 Deepak S (2): drm/i915: Bring UP Power Wells before disabling RC6. drm/i915: Fix to Enable GT/PM Interrupts Derek Foreman (1): drm/i915: init sprites with univeral plane init function Gustavo Padovan (1): drm/i915: trivial: remove unneed set to NULL Jani Nikula (10): drm/i915/dp: split up panel power control from backlight pwm control drm/i915: add some framework for backlight bl_power support drm/i915/dp: make backlight bl_power control power sequencer backlight drm/i915: switch off backlight for backlight class 0 brightness drm/i915: don't check for i830 in vlv specific code drm/i915: fix panel unlock register mask drm/i915: improve assert_panel_unlocked drm/i915/dp: debug log whether backlight is being enabled or disabled drm/i915/ddi: use struct for ddi buf translation tables drm/i915: debug sink dpms aux errors also on enable Jesse Barnes (1): drm/i915: make fbdev initialization asynchronous v2 McAulay, Alistair (1): drm/i915: Rework GPU reset sequence to match driver load & thaw Michel Thierry (1): drm/i915: Handle i915_ppgtt_put correctly Oscar Mateo (2): drm/i915/bdw: Make sure error capture keeps working with Execlists drm/i915/bdw: Render state init for Execlists Paulo Zanoni (5): drm/i915: fix i915_frequency_info on BDW drm/i915: call lpt_init_clock_gating on BDW too drm/i915: rename gen8_init_clock_gating to broadwell_init_clock_gating drm/i915: send PCI_D3hot adapter opregion message on BDW RPM suspend drm/i915: change CHV write_eld/global_resources function pointers Rodrigo Vivi (1): drm/i915: FBC flush nuke for BDW Sonika Jindal (10): drm/i915: Updating plane parameters for primary plane in setplane drm/i915: Add 180 degree primary plane rotation support drm/i915: Rename defines for selection of ddi buffer translation slot drm: Renaming DP training vswing pre emph defines drm/exynos: Renaming DP training vswing pre emph defines drm/gma500: Renaming DP training vswing pre emph defines drm/radeon: Renaming DP training vswing pre emph defines drm/tegra: Renaming DP training vswing pre emph defines drm/i915: Renaming DP training vswing pre emph defines drm: Remove old defines for vswing and pre-emph values Thomas Daniel (3): drm/i915/bdw: Populate lrc with aliasing ppgtt if required drm/i915/bdw: Do not initialize PPGTT in the legacy way for execlists drm/i915/bdw: Don't execute context reset and switch with Execlists Vedang Patel (1): drm/i915/bdw: Add BDW support in the i915 debugfs entry Ville Syrjälä (41): drm/i915: Parametrize PANEL_PORT_SELECT_VLV drm/i915: Use intel_edp_panel_vdd_on() in intel_dp_probe_mst() drm/i915: Rename edp vdd funcs for consistency drm/i915: Add a note explaining vdd on/off handling in intel_dp_aux_ch() drm/i915: Replace big nested if block with early return drm/i915: Warn about want_panel_vdd in edp_panel_vdd_off_sync() drm/i915: Flatten intel_edp_panel_vdd_on() drm/i915: Don't dereference fb when disabling primary plane drm/i915: s, fb->bits_per_pixel/8, pixel_size, in primary plane code drm/i915: Populate mem_freq in init_gt_powerwave() drm/i915: Warn about odd rps values on CHV drm/i915: Init some CHV workarounds via LRIs in ring->init_context() drm/i915: Fix gen2 planes B and C max watermark value drm/i915: Disable trickle feed for gen2/3 drm/i915: Idle unused rings on gen2/3 during init/resume drm/i915: Pass intel_crtc to intel_disable_pipe() and intel_wait_for_pipe_off() drm/i915: Disable double wide even when leaving the pipe on drm/i915: ns2501 is on DVOB drm/i915: Enable DVO between mode_set and dpms hooks drm/i915: Don't call DVO mode_set hook on DPMS changes drm/i915: Kill useless ns2501_dump_regs drm/i915: Rewrite ns2501 driver a bit drm/i915: Init important ns2501 registers drm/i915: Check pixel clock in ns2501 mode_valid hook Revert "drm/i915: Nuke pipe A quirk on i830M" drm/i915: Add pipe B force quirk for 830M drm/i915: Preserve VGACNTR bits from the BIOS drm/i915: Don't use WaGsvRC0ResidenncyMethod on chv drm/i915: Don't call intel_plane_restore() when the prop value didn't change drm/i915: Don't call gen8_fbc_sw_flush() on chv drm/i915: Use IS_BROADWELL() instead of IS_GEN8() in forcewake code drm/i915: Use HAS_GMCH_DISPLAY un underrun reporting code drm/i915: Check of !HAS_PCH_SPLIT() in PCH transcoder funcs drm/i915: Fix edp vdd locking drm/i915: Track which port is using which pipe's power sequencer drm/i915: Reset power sequencer pipe tracking when disp2d is off drm/i915: Be more careful when picking the initial power sequencer pipe drm/i915: Turn on panel power before doing aux transfers drm/i915: Enable DP port earlier drm/i915: Move DP port disable to post_disable for pch platforms drm/i915: Add comments explaining the vdd on/off functions MAINTAINERS | 2 +- drivers/gpu/drm/exynos/exynos_dp_core.c | 4 +- drivers/gpu/drm/gma500/cdv_intel_dp.c | 4 +- drivers/gpu/drm/gma500/intel_bios.c | 16 +- drivers/gpu/drm/i915/dvo_ns2501.c | 560 +++++++----- drivers/gpu/drm/i915/i915_debugfs.c | 124 ++- drivers/gpu/drm/i915/i915_dma.c | 7 +- drivers/gpu/drm/i915/i915_drv.c | 38 +- drivers/gpu/drm/i915/i915_drv.h | 63 +- drivers/gpu/drm/i915/i915_gem.c | 51 +- drivers/gpu/drm/i915/i915_gem_context.c | 65 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 82 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 3 +- drivers/gpu/drm/i915/i915_gem_render_state.c | 40 +- drivers/gpu/drm/i915/i915_gem_render_state.h | 47 + drivers/gpu/drm/i915/i915_gem_tiling.c | 9 +- drivers/gpu/drm/i915/i915_gpu_error.c | 106 ++- drivers/gpu/drm/i915/i915_irq.c | 185 ++-- drivers/gpu/drm/i915/i915_reg.h | 35 +- drivers/gpu/drm/i915/i915_sysfs.c | 2 +- drivers/gpu/drm/i915/intel_bios.c | 16 +- drivers/gpu/drm/i915/intel_ddi.c | 217 +++-- drivers/gpu/drm/i915/intel_display.c | 478 +++++++--- drivers/gpu/drm/i915/intel_dp.c | 1236 +++++++++++++++++--------- drivers/gpu/drm/i915/intel_drv.h | 24 +- drivers/gpu/drm/i915/intel_dvo.c | 11 +- drivers/gpu/drm/i915/intel_fbdev.c | 39 +- drivers/gpu/drm/i915/intel_hdmi.c | 145 +-- drivers/gpu/drm/i915/intel_lrc.c | 78 +- drivers/gpu/drm/i915/intel_lrc.h | 2 + drivers/gpu/drm/i915/intel_panel.c | 29 +- drivers/gpu/drm/i915/intel_pm.c | 508 +++++++---- drivers/gpu/drm/i915/intel_renderstate.h | 8 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 161 +++- drivers/gpu/drm/i915/intel_ringbuffer.h | 2 + drivers/gpu/drm/i915/intel_sprite.c | 19 +- drivers/gpu/drm/i915/intel_uncore.c | 6 +- drivers/gpu/drm/radeon/atombios_dp.c | 4 +- drivers/gpu/drm/tegra/dpaux.c | 4 +- include/drm/drm_dp_helper.h | 16 +- 40 files changed, 2929 insertions(+), 1517 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_gem_render_state.h -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch

1 0

Shareable bufmgr objects v4
by Lionel Landwerlin 15 Sep '14

15 Sep '14

This is getting bigger than expected. Adding the locking that Chris suggested on IRC. Thanks for taking time to review Chris. - Lionel

3 6

[PATCH] drm: Improve debug output for drm_wait_one_vblank
by Daniel Vetter 15 Sep '14

15 Sep '14

This replicates what we've done in i915 in commit 31e4b89acbd7b19c9a8557e6e660a583a0b97daa Author: Damien Lespiau <damien.lespiau(a)intel.com> Date: Mon Aug 18 13:51:00 2014 +0100 drm/i915: Print the pipe on which the vblank wait times out to make sure that when we switch i915 to drm_wait_one_vblank that the debug output doesn't regress. Cc: Damien Lespiau <damien.lespiau(a)intel.com> Cc: Thomas Wood <thomas.wood(a)intel.com> Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com> --- drivers/gpu/drm/drm_irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c index e73cbdaa18df..5ef03c216a27 100644 --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c @@ -1077,7 +1077,7 @@ void drm_wait_one_vblank(struct drm_device *dev, int crtc) u32 last; ret = drm_vblank_get(dev, crtc); - if (WARN_ON(ret)) + if (WARN(ret, "vblank not available on crtc %i, ret=%i\n", crtc, ret)) return; last = drm_vblank_count(dev, crtc); @@ -1086,7 +1086,7 @@ void drm_wait_one_vblank(struct drm_device *dev, int crtc) last != drm_vblank_count(dev, crtc), msecs_to_jiffies(100)); - WARN_ON(ret == 0); + WARN(ret == 0, "vblank wait timed out on crtc %i\n", crtc); drm_vblank_put(dev, crtc); } -- 2.0.1

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dri-devel September 2014