dri-devel May 2016

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[PATCH 1/2] drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
by Alex Deucher 06 May '16

06 May '16

From: Tom St Denis <tom.stdenis(a)amd.com> Add name that we can print out in kernel messages to aid in debugging. v2: drop DAL changes for upstream Signed-off-by: Tom St Denis <tom.stdenis(a)amd.com> Reviewed-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c |… [View More] 1 + drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 1 + drivers/gpu/drm/amd/amdgpu/cik.c | 1 + drivers/gpu/drm/amd/amdgpu/cik_ih.c | 1 + drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 1 + drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 1 + drivers/gpu/drm/amd/amdgpu/cz_ih.c | 1 + drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 1 + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 1 + drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 1 + drivers/gpu/drm/amd/amdgpu/fiji_dpm.c | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 1 + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 1 + drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 1 + drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 1 + drivers/gpu/drm/amd/amdgpu/iceland_dpm.c | 1 + drivers/gpu/drm/amd/amdgpu/iceland_ih.c | 1 + drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 1 + drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 1 + drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 1 + drivers/gpu/drm/amd/amdgpu/tonga_dpm.c | 1 + drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 1 + drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 1 + drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 1 + drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 1 + drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 1 + drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 1 + drivers/gpu/drm/amd/amdgpu/vi.c | 1 + drivers/gpu/drm/amd/include/amd_shared.h | 2 ++ drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 1 + 32 files changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c index da764e1..568782d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c @@ -476,6 +476,7 @@ static int acp_set_powergating_state(void *handle, } const struct amd_ip_funcs acp_ip_funcs = { + .name = "acp_ip", .early_init = acp_early_init, .late_init = NULL, .sw_init = acp_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 17689f0..740d535 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1202,7 +1202,7 @@ static int amdgpu_early_init(struct amdgpu_device *adev) if (r == -ENOENT) { adev->ip_block_status[i].valid = false; } else if (r) { - DRM_ERROR("early_init %d failed %d\n", i, r); + DRM_ERROR("early_init of IP block <%s> failed %d\n", adev->ip_blocks[i].funcs->name, r); return r; } else { adev->ip_block_status[i].valid = true; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c index be56595..6bd961f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c @@ -304,6 +304,7 @@ static int amdgpu_pp_soft_reset(void *handle) } const struct amd_ip_funcs amdgpu_pp_ip_funcs = { + .name = "amdgpu_powerplay", .early_init = amdgpu_pp_early_init, .late_init = amdgpu_pp_late_init, .sw_init = amdgpu_pp_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c index 31b38bd..ea407db 100644 --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c @@ -6402,6 +6402,7 @@ static int ci_dpm_set_powergating_state(void *handle, } const struct amd_ip_funcs ci_dpm_ip_funcs = { + .name = "ci_dpm", .early_init = ci_dpm_early_init, .late_init = ci_dpm_late_init, .sw_init = ci_dpm_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c index 68e5698..07bc795 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik.c +++ b/drivers/gpu/drm/amd/amdgpu/cik.c @@ -2232,6 +2232,7 @@ static int cik_common_set_powergating_state(void *handle, } const struct amd_ip_funcs cik_common_ip_funcs = { + .name = "cik_common", .early_init = cik_common_early_init, .late_init = NULL, .sw_init = cik_common_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/cik_ih.c b/drivers/gpu/drm/amd/amdgpu/cik_ih.c index 7e750a4..845c21b 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/cik_ih.c @@ -415,6 +415,7 @@ static int cik_ih_set_powergating_state(void *handle, } const struct amd_ip_funcs cik_ih_ip_funcs = { + .name = "cik_ih", .early_init = cik_ih_early_init, .late_init = NULL, .sw_init = cik_ih_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c index d54fb19..6c2aa2b 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c @@ -1223,6 +1223,7 @@ static int cik_sdma_set_powergating_state(void *handle, } const struct amd_ip_funcs cik_sdma_ip_funcs = { + .name = "cik_sdma", .early_init = cik_sdma_early_init, .late_init = NULL, .sw_init = cik_sdma_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c index bf1847b..fa4449e 100644 --- a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c @@ -2230,6 +2230,7 @@ static void cz_dpm_powergate_vce(struct amdgpu_device *adev, bool gate) } const struct amd_ip_funcs cz_dpm_ip_funcs = { + .name = "cz_dpm", .early_init = cz_dpm_early_init, .late_init = cz_dpm_late_init, .sw_init = cz_dpm_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c index 874b928..863cb16 100644 --- a/drivers/gpu/drm/amd/amdgpu/cz_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/cz_ih.c @@ -396,6 +396,7 @@ static int cz_ih_set_powergating_state(void *handle, } const struct amd_ip_funcs cz_ih_ip_funcs = { + .name = "cz_ih", .early_init = cz_ih_early_init, .late_init = NULL, .sw_init = cz_ih_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c index 7b12e9e..929c933 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c @@ -3499,6 +3499,7 @@ static int dce_v10_0_set_powergating_state(void *handle, } const struct amd_ip_funcs dce_v10_0_ip_funcs = { + .name = "dce_v10_0", .early_init = dce_v10_0_early_init, .late_init = NULL, .sw_init = dce_v10_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c index fca80ea..4dfd8b4 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c @@ -3559,6 +3559,7 @@ static int dce_v11_0_set_powergating_state(void *handle, } const struct amd_ip_funcs dce_v11_0_ip_funcs = { + .name = "dce_v11_0", .early_init = dce_v11_0_early_init, .late_init = NULL, .sw_init = dce_v11_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c index a78a2d9..8bea127 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c @@ -3424,6 +3424,7 @@ static int dce_v8_0_set_powergating_state(void *handle, } const struct amd_ip_funcs dce_v8_0_ip_funcs = { + .name = "dce_v8_0", .early_init = dce_v8_0_early_init, .late_init = NULL, .sw_init = dce_v8_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c b/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c index 6d13345..245cabf 100644 --- a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c @@ -143,6 +143,7 @@ static int fiji_dpm_set_powergating_state(void *handle, } const struct amd_ip_funcs fiji_dpm_ip_funcs = { + .name = "fiji_dpm", .early_init = fiji_dpm_early_init, .late_init = NULL, .sw_init = fiji_dpm_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c index 13d3e96..e18f401 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c @@ -4893,6 +4893,7 @@ static int gfx_v7_0_set_powergating_state(void *handle, } const struct amd_ip_funcs gfx_v7_0_ip_funcs = { + .name = "gfx_v7_0", .early_init = gfx_v7_0_early_init, .late_init = gfx_v7_0_late_init, .sw_init = gfx_v7_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index feda7f7..775541a 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -6065,6 +6065,7 @@ static int gfx_v8_0_priv_inst_irq(struct amdgpu_device *adev, } const struct amd_ip_funcs gfx_v8_0_ip_funcs = { + .name = "gfx_v8_0", .early_init = gfx_v8_0_early_init, .late_init = gfx_v8_0_late_init, .sw_init = gfx_v8_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c index 3b620a8..ffd44c6 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c @@ -1258,6 +1258,7 @@ static int gmc_v7_0_set_powergating_state(void *handle, } const struct amd_ip_funcs gmc_v7_0_ip_funcs = { + .name = "gmc_v7_0", .early_init = gmc_v7_0_early_init, .late_init = gmc_v7_0_late_init, .sw_init = gmc_v7_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index c0de22f..73ad70d 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c @@ -1420,6 +1420,7 @@ static int gmc_v8_0_set_powergating_state(void *handle, } const struct amd_ip_funcs gmc_v8_0_ip_funcs = { + .name = "gmc_v8_0", .early_init = gmc_v8_0_early_init, .late_init = gmc_v8_0_late_init, .sw_init = gmc_v8_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c b/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c index 57a9613..460bc8a 100644 --- a/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/iceland_dpm.c @@ -157,6 +157,7 @@ static int iceland_dpm_set_powergating_state(void *handle, } const struct amd_ip_funcs iceland_dpm_ip_funcs = { + .name = "iceland_dpm", .early_init = iceland_dpm_early_init, .late_init = NULL, .sw_init = iceland_dpm_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c index 5c4001e..39bfc52 100644 --- a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c @@ -394,6 +394,7 @@ static int iceland_ih_set_powergating_state(void *handle, } const struct amd_ip_funcs iceland_ih_ip_funcs = { + .name = "iceland_ih", .early_init = iceland_ih_early_init, .late_init = NULL, .sw_init = iceland_ih_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c index bc7997b..b45f547 100644 --- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c @@ -3238,6 +3238,7 @@ static int kv_dpm_set_powergating_state(void *handle, } const struct amd_ip_funcs kv_dpm_ip_funcs = { + .name = "kv_dpm", .early_init = kv_dpm_early_init, .late_init = kv_dpm_late_init, .sw_init = kv_dpm_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c index abe39024..de94adb 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c @@ -1230,6 +1230,7 @@ static int sdma_v2_4_set_powergating_state(void *handle, } const struct amd_ip_funcs sdma_v2_4_ip_funcs = { + .name = "sdma_v2_4", .early_init = sdma_v2_4_early_init, .late_init = NULL, .sw_init = sdma_v2_4_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index e222762..ca2aee3 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -1542,6 +1542,7 @@ static int sdma_v3_0_set_powergating_state(void *handle, } const struct amd_ip_funcs sdma_v3_0_ip_funcs = { + .name = "sdma_v3_0", .early_init = sdma_v3_0_early_init, .late_init = NULL, .sw_init = sdma_v3_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c b/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c index 552f0f4..b7615ce 100644 --- a/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/tonga_dpm.c @@ -143,6 +143,7 @@ static int tonga_dpm_set_powergating_state(void *handle, } const struct amd_ip_funcs tonga_dpm_ip_funcs = { + .name = "tonga_dpm", .early_init = tonga_dpm_early_init, .late_init = NULL, .sw_init = tonga_dpm_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c index dd9e5e3..592b438 100644 --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c @@ -417,6 +417,7 @@ static int tonga_ih_set_powergating_state(void *handle, } const struct amd_ip_funcs tonga_ih_ip_funcs = { + .name = "tonga_ih", .early_init = tonga_ih_early_init, .late_init = NULL, .sw_init = tonga_ih_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c index b9c2a49..a75ffb5b 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c @@ -739,6 +739,7 @@ static int uvd_v4_2_set_powergating_state(void *handle, } const struct amd_ip_funcs uvd_v4_2_ip_funcs = { + .name = "uvd_v4_2", .early_init = uvd_v4_2_early_init, .late_init = NULL, .sw_init = uvd_v4_2_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c index 465b77c..ecb8101 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c @@ -791,6 +791,7 @@ static int uvd_v5_0_set_powergating_state(void *handle, } const struct amd_ip_funcs uvd_v5_0_ip_funcs = { + .name = "uvd_v5_0", .early_init = uvd_v5_0_early_init, .late_init = NULL, .sw_init = uvd_v5_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c index c2f790b..a43f1a7 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c @@ -895,6 +895,7 @@ static int uvd_v6_0_set_powergating_state(void *handle, } const struct amd_ip_funcs uvd_v6_0_ip_funcs = { + .name = "uvd_v6_0", .early_init = uvd_v6_0_early_init, .late_init = NULL, .sw_init = uvd_v6_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c index 95f6e57..45d92ac 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c @@ -567,6 +567,7 @@ static int vce_v2_0_set_powergating_state(void *handle, } const struct amd_ip_funcs vce_v2_0_ip_funcs = { + .name = "vce_v2_0", .early_init = vce_v2_0_early_init, .late_init = NULL, .sw_init = vce_v2_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c index 55b35da..30e8099 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c @@ -674,6 +674,7 @@ static int vce_v3_0_set_powergating_state(void *handle, } const struct amd_ip_funcs vce_v3_0_ip_funcs = { + .name = "vce_v3_0", .early_init = vce_v3_0_early_init, .late_init = NULL, .sw_init = vce_v3_0_sw_init, diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index b7da094..2c88d0b 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c @@ -1408,6 +1408,7 @@ static int vi_common_set_powergating_state(void *handle, } const struct amd_ip_funcs vi_common_ip_funcs = { + .name = "vi_common", .early_init = vi_common_early_init, .late_init = NULL, .sw_init = vi_common_sw_init, diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index ea9ee46..6080951 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h @@ -143,6 +143,8 @@ enum amd_pm_state_type { }; struct amd_ip_funcs { + /* Name of IP block */ + char *name; /* sets up early driver state (pre sw_init), does not configure hw - Optional */ int (*early_init)(void *handle); /* sets up late driver/hw state (post hw_init) - Optional */ diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c index aba587c..9f2d4069 100644 --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c @@ -340,6 +340,7 @@ static int pp_resume(void *handle) } const struct amd_ip_funcs pp_ip_funcs = { + .name = "powerplay", .early_init = pp_early_init, .late_init = NULL, .sw_init = pp_sw_init, -- 2.5.5 [View Less]

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[PATCH] drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)
by Alex Deucher 06 May '16

06 May '16

When this flag is set, we program the hardware to execute the flip during horizontal blank (i.e. for the next scanline) instead of during vertical blank (i.e. for the next frame). Ported from radeon commit: drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC v2: drop DAL change for upstream Reviewed-by: Michel Dänzer <michel.daenzer(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ++- drivers/gpu/drm/amd/amdgpu/… [View More]amdgpu_display.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 +- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 25 +++++++++++++++++-------- drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 26 ++++++++++++++++++-------- drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 20 ++++++++++++-------- 6 files changed, 52 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index f549474..83f2d8d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -727,6 +727,7 @@ struct amdgpu_flip_work { unsigned shared_count; struct fence **shared; struct fence_cb cb; + bool async; }; @@ -2241,7 +2242,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) #define amdgpu_display_hpd_set_polarity(adev, h) (adev)->mode_info.funcs->hpd_set_polarity((adev), (h)) #define amdgpu_display_hpd_get_gpio_reg(adev) (adev)->mode_info.funcs->hpd_get_gpio_reg((adev)) #define amdgpu_display_bandwidth_update(adev) (adev)->mode_info.funcs->bandwidth_update((adev)) -#define amdgpu_display_page_flip(adev, crtc, base) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base)) +#define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base), (async)) #define amdgpu_display_page_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev), (crtc), (vbl), (pos)) #define amdgpu_display_add_encoder(adev, e, s, c) (adev)->mode_info.funcs->add_encoder((adev), (e), (s), (c)) #define amdgpu_display_add_connector(adev, ci, sd, ct, ib, coi, h, r) (adev)->mode_info.funcs->add_connector((adev), (ci), (sd), (ct), (ib), (coi), (h), (r)) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c index c835abe..7268030 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c @@ -132,7 +132,7 @@ static void amdgpu_flip_work_func(struct work_struct *__work) vblank->linedur_ns / 1000, stat, vpos, hpos); /* Do the flip (mmio) */ - adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base); + adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base, work->async); /* Set the flip status */ amdgpuCrtc->pflip_status = AMDGPU_FLIP_SUBMITTED; @@ -197,6 +197,7 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc, work->event = event; work->adev = adev; work->crtc_id = amdgpu_crtc->crtc_id; + work->async = (page_flip_flags & DRM_MODE_PAGE_FLIP_ASYNC) != 0; /* schedule unpin of the old buffer */ old_amdgpu_fb = to_amdgpu_framebuffer(crtc->primary->fb); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h index 8a253aa..6b1d7d3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h @@ -283,7 +283,7 @@ struct amdgpu_display_funcs { u32 (*hpd_get_gpio_reg)(struct amdgpu_device *adev); /* pageflipping */ void (*page_flip)(struct amdgpu_device *adev, - int crtc_id, u64 crtc_base); + int crtc_id, u64 crtc_base, bool async); int (*page_flip_get_scanoutpos)(struct amdgpu_device *adev, int crtc, u32 *vbl, u32 *position); /* display topology setup */ diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c index f7f67f3..7b12e9e 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c @@ -284,10 +284,16 @@ static void dce_v10_0_pageflip_interrupt_fini(struct amdgpu_device *adev) * surface base address. */ static void dce_v10_0_page_flip(struct amdgpu_device *adev, - int crtc_id, u64 crtc_base) + int crtc_id, u64 crtc_base, bool async) { struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; + u32 tmp; + /* flip at hsync for async, default is vsync */ + tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); + tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, + GRPH_SURFACE_UPDATE_H_RETRACE_EN, async ? 1 : 0); + WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); /* update the primary scanout address */ WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, upper_32_bits(crtc_base)); @@ -2211,6 +2217,14 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc, dce_v10_0_vga_enable(crtc, false); + /* Make sure surface address is updated at vertical blank rather than + * horizontal blank + */ + tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); + tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, + GRPH_SURFACE_UPDATE_H_RETRACE_EN, 0); + WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); + WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, upper_32_bits(fb_location)); WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, @@ -2261,13 +2275,6 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc, WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset, (viewport_w << 16) | viewport_h); - /* pageflip setup */ - /* make sure flip is at vb rather than hb */ - tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); - tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, - GRPH_SURFACE_UPDATE_H_RETRACE_EN, 0); - WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); - /* set pageflip to happen only at start of vblank interval (front porch) */ WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 3); @@ -2992,6 +2999,8 @@ static int dce_v10_0_sw_init(void *handle) adev->ddev->mode_config.funcs = &amdgpu_mode_funcs; + adev->ddev->mode_config.async_page_flip = true; + adev->ddev->mode_config.max_width = 16384; adev->ddev->mode_config.max_height = 16384; diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c index b5464ca3..fca80ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c @@ -302,10 +302,17 @@ static void dce_v11_0_pageflip_interrupt_fini(struct amdgpu_device *adev) * surface base address. */ static void dce_v11_0_page_flip(struct amdgpu_device *adev, - int crtc_id, u64 crtc_base) + int crtc_id, u64 crtc_base, bool async) { struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; + u32 tmp; + /* flip at hsync for async, default is vsync */ + /* use UPDATE_IMMEDIATE_EN instead for async? */ + tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); + tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, + GRPH_SURFACE_UPDATE_H_RETRACE_EN, async ? 1 : 0); + WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); /* update the scanout addresses */ WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, upper_32_bits(crtc_base)); @@ -2185,6 +2192,14 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc, dce_v11_0_vga_enable(crtc, false); + /* Make sure surface address is updated at vertical blank rather than + * horizontal blank + */ + tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); + tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, + GRPH_SURFACE_UPDATE_H_RETRACE_EN, 0); + WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); + WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, upper_32_bits(fb_location)); WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, @@ -2235,13 +2250,6 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc, WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset, (viewport_w << 16) | viewport_h); - /* pageflip setup */ - /* make sure flip is at vb rather than hb */ - tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); - tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, - GRPH_SURFACE_UPDATE_H_RETRACE_EN, 0); - WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); - /* set pageflip to happen only at start of vblank interval (front porch) */ WREG32(mmCRTC_MASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 3); @@ -3042,6 +3050,8 @@ static int dce_v11_0_sw_init(void *handle) adev->ddev->mode_config.funcs = &amdgpu_mode_funcs; + adev->ddev->mode_config.async_page_flip = true; + adev->ddev->mode_config.max_width = 16384; adev->ddev->mode_config.max_height = 16384; diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c index 429e98a..a78a2d9 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c @@ -233,10 +233,13 @@ static void dce_v8_0_pageflip_interrupt_fini(struct amdgpu_device *adev) * surface base address. */ static void dce_v8_0_page_flip(struct amdgpu_device *adev, - int crtc_id, u64 crtc_base) + int crtc_id, u64 crtc_base, bool async) { struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; + /* flip at hsync for async, default is vsync */ + WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, async ? + GRPH_FLIP_CONTROL__GRPH_SURFACE_UPDATE_H_RETRACE_EN_MASK : 0); /* update the primary scanout addresses */ WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, upper_32_bits(crtc_base)); @@ -1999,7 +2002,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc, uint32_t fb_format, fb_pitch_pixels; u32 fb_swap = (GRPH_ENDIAN_NONE << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); u32 pipe_config; - u32 tmp, viewport_w, viewport_h; + u32 viewport_w, viewport_h; int r; bool bypass_lut = false; @@ -2135,6 +2138,11 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc, dce_v8_0_vga_enable(crtc, false); + /* Make sure surface address is updated at vertical blank rather than + * horizontal blank + */ + WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, 0); + WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, upper_32_bits(fb_location)); WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset, @@ -2182,12 +2190,6 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc, WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset, (viewport_w << 16) | viewport_h); - /* pageflip setup */ - /* make sure flip is at vb rather than hb */ - tmp = RREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset); - tmp &= ~GRPH_FLIP_CONTROL__GRPH_SURFACE_UPDATE_H_RETRACE_EN_MASK; - WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp); - /* set pageflip to happen only at start of vblank interval (front porch) */ WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 3); @@ -2902,6 +2904,8 @@ static int dce_v8_0_sw_init(void *handle) adev->ddev->mode_config.funcs = &amdgpu_mode_funcs; + adev->ddev->mode_config.async_page_flip = true; + adev->ddev->mode_config.max_width = 16384; adev->ddev->mode_config.max_height = 16384; -- 2.5.5 [View Less]

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[PATCH] drm/i915: Correctly refcount connectors in hw state readou
by Daniel Vetter 06 May '16

06 May '16

This was forgotten when adding the the refcounting to drm_connector_state. Cc: Gabriel Feceoru <gabriel.feceoru(a)intel.com> Cc: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Marius Vlad <marius.c.vlad(a)intel.com> Cc: Dave Airlie <airlied(a)redhat.com> Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)") --- drivers/gpu/drm/i915/intel_display.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/… [View More]

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[Bug 94891] BUG: unable to handle kernel NULL pointer dereference
by bugzilla-daemon＠freedesktop.org 06 May '16

06 May '16

https://bugs.freedesktop.org/show_bug.cgi?id=94891 Trek <trek00(a)inbox.ru> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |trek00(a)inbox.ru --- Comment #1 from Trek <trek00(a)inbox.ru> --- I think to have caught the same bug, dragging some text in firefox amd a4-4000 processor with radeon 7480d Debian jessie+backports, mesa 11.1.3, … [View More]libdrm 2.4.67, linux 3.16.7-ckt25 (--) RADEON(0): Chipset: "ARUBA" (ChipID = 0x9993) first crash log: May 6 13:36:51 illusion kernel: [ 1436.382236] BUG: unable to handle kernel NULL pointer dereference at 0000000000000008 May 6 13:36:51 illusion kernel: [ 1436.382280] IP: [<ffffffffa035fc3d>] radeon_fence_ref+0xd/0x50 [radeon] May 6 13:36:51 illusion kernel: [ 1436.382333] PGD 0 May 6 13:36:51 illusion kernel: [ 1436.382343] Oops: 0002 [#1] SMP May 6 13:36:51 illusion kernel: [ 1436.382360] Modules linked in: ipt_REJECT xt_owner xt_tcpudp xt_LOG xt_limit xt_conntrack iptable_mangle iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_filter ip_tables x_tables nls_utf8 nls_cp437 vfat it87 hwmon_vid fat fuse sha256_ssse3 sha256_generic dm_crypt dm_mod eeepc_wmi asus_wmi sparse_keymap rfkill snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi kvm_amd kvm crc32_pclmul aesni_intel aes_x86_64 lrw gf128mul glue_helper ablk_helper cryptd shpchp evdev snd_hda_intel snd_hda_controller snd_hda_codec efi_pstore snd_hwdep radeon pcspkr serio_raw efivars k10temp snd_pcm i2c_piix4 snd_timer ttm drm_kms_helper snd drm soundcore i2c_algo_bit i2c_core acpi_cpufreq tpm_infineon video wmi tpm_tis tpm processor button thermal_sys ext4 crc16 mbcache jbd2 raid1 md_mod sg sd_mod crc_t10dif crct10dif_generic hid_generic usbhid hid ohci_pci crct10dif_pclmul crct10dif_common crc32c_intel r8169 mii ohci_hcd ehci_pci ehci_hcd xhci_hcd ahci libahci libata usbcore usb_common scsi_mod May 6 13:36:51 illusion kernel: [ 1436.382836] CPU: 0 PID: 2248 Comm: Xorg Not tainted 3.16.0-4-amd64 #1 Debian 3.16.7-ckt25-1 May 6 13:36:51 illusion kernel: [ 1436.382870] Hardware name: System manufacturer System Product Name/A88XM-E, BIOS 0801 07/15/2014 May 6 13:36:51 illusion kernel: [ 1436.382904] task: ffff88021312c0d0 ti: ffff880213ac4000 task.ti: ffff880213ac4000 May 6 13:36:51 illusion kernel: [ 1436.382933] RIP: 0010:[<ffffffffa035fc3d>] [<ffffffffa035fc3d>] radeon_fence_ref+0xd/0x50 [radeon] May 6 13:36:51 illusion kernel: [ 1436.382979] RSP: 0018:ffff880213ac7b18 EFLAGS: 00010292 May 6 13:36:51 illusion kernel: [ 1436.383000] RAX: 0000000000000000 RBX: ffff880036b8d5f8 RCX: ffff880036b8cd08 May 6 13:36:51 illusion kernel: [ 1436.383027] RDX: 0000000000000001 RSI: 0000000000000000 RDI: 0000000000000000 May 6 13:36:51 illusion kernel: [ 1436.383054] RBP: ffff880036b8d550 R08: ffff880036b8c000 R09: 0000000000000000 May 6 13:36:51 illusion kernel: [ 1436.383082] R10: 0000000000000002 R11: ffff880213ac7e08 R12: 0000000000000020 May 6 13:36:51 illusion kernel: [ 1436.383109] R13: ffff880213ac7be0 R14: ffff880213ac7bb0 R15: ffff880036b8d5f8 May 6 13:36:51 illusion kernel: [ 1436.383137] FS: 00007fc64e0bb980(0000) GS:ffff88021ec00000(0000) knlGS:0000000000000000 May 6 13:36:51 illusion kernel: [ 1436.384649] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 May 6 13:36:51 illusion kernel: [ 1436.386161] CR2: 0000000000000008 CR3: 0000000213a66000 CR4: 00000000000407f0 May 6 13:36:51 illusion kernel: [ 1436.387685] Stack: May 6 13:36:51 illusion kernel: [ 1436.389191] ffffffffa03c00bc 002000000002d8c0 0000f2a000000100 ffff880213ac7cd0 May 6 13:36:51 illusion kernel: [ 1436.390726] ffff880036b8c000 ffff88021312c0d0 ffff88021312c0d0 0000000000000001 May 6 13:36:51 illusion kernel: [ 1436.392278] 0000000000000000 0000000000000000 0000000000000000 0000000000000000 May 6 13:36:51 illusion kernel: [ 1436.393834] Call Trace: May 6 13:36:51 illusion kernel: [ 1436.395381] [<ffffffffa03c00bc>] ? radeon_sa_bo_new+0x25c/0x460 [radeon] May 6 13:36:51 illusion kernel: [ 1436.396936] [<ffffffffa0374f3e>] ? radeon_ib_get+0x2e/0xd0 [radeon] May 6 13:36:51 illusion kernel: [ 1436.398479] [<ffffffffa037747c>] ? radeon_cs_ioctl+0x13c/0x730 [radeon] May 6 13:36:51 illusion kernel: [ 1436.400014] [<ffffffffa02b28b7>] ? drm_ioctl+0x1c7/0x5b0 [drm] May 6 13:36:51 illusion kernel: [ 1436.401533] [<ffffffff811571d9>] ? shmem_truncate_range+0x19/0x30 May 6 13:36:51 illusion kernel: [ 1436.403059] [<ffffffffa0344046>] ? radeon_drm_ioctl+0x46/0x80 [radeon] May 6 13:36:51 illusion kernel: [ 1436.404572] [<ffffffff811bacdf>] ? do_vfs_ioctl+0x2cf/0x4b0 May 6 13:36:51 illusion kernel: [ 1436.406078] [<ffffffff810852e1>] ? task_work_run+0x91/0xb0 May 6 13:36:51 illusion kernel: [ 1436.407585] [<ffffffff811baf41>] ? SyS_ioctl+0x81/0xa0 May 6 13:36:51 illusion kernel: [ 1436.409096] [<ffffffff81514a0d>] ? system_call_fast_compare_end+0x10/0x15 May 6 13:36:51 illusion kernel: [ 1436.410624] Code: e4 48 8b 3b 89 c1 89 ea 48 c7 c6 80 f6 44 a0 31 c0 e8 68 17 04 e1 eb cb 66 0f 1f 44 00 00 66 66 66 66 90 48 89 f8 ba 01 00 00 00 <f0> 0f c1 57 08 83 c2 01 83 fa 01 7e 01 c3 80 3d 0e 43 11 00 00 May 6 13:36:51 illusion kernel: [ 1436.413886] RIP [<ffffffffa035fc3d>] radeon_fence_ref+0xd/0x50 [radeon] May 6 13:36:51 illusion kernel: [ 1436.415509] RSP <ffff880213ac7b18> May 6 13:36:51 illusion kernel: [ 1436.417113] CR2: 0000000000000008 May 6 13:36:51 illusion kernel: [ 1436.424690] ---[ end trace 6ff48a6a8b3b834b ]--- other crash log: May 6 13:47:55 illusion kernel: [ 79.715856] BUG: unable to handle kernel NULL pointer dereference at 0000000000000008 May 6 13:47:55 illusion kernel: [ 79.715903] IP: [<ffffffffa0315c3d>] radeon_fence_ref+0xd/0x50 [radeon] May 6 13:47:55 illusion kernel: [ 79.715959] PGD 0 May 6 13:47:55 illusion kernel: [ 79.715970] Oops: 0002 [#1] SMP May 6 13:47:55 illusion kernel: [ 79.715988] Modules linked in: ipt_REJECT xt_owner xt_tcpudp xt_LOG xt_limit xt_conntrack iptable_mangle iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_filter nls_utf8 nls_cp437 ip_tables x_tables it87 hwmon_vid vfat fat fuse sha256_ssse3 sha256_generic dm_crypt dm_mod eeepc_wmi asus_wmi sparse_keymap rfkill snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi kvm_amd kvm crc32_pclmul aesni_intel aes_x86_64 lrw gf128mul glue_helper ablk_helper cryptd efi_pstore snd_hda_intel snd_hda_controller snd_hda_codec snd_hwdep k10temp efivars pcspkr snd_pcm snd_timer snd soundcore evdev i2c_piix4 shpchp serio_raw radeon ttm drm_kms_helper drm wmi i2c_algo_bit i2c_core tpm_infineon tpm_tis video tpm button acpi_cpufreq processor thermal_sys ext4 crc16 mbcache jbd2 raid1 md_mod hid_generic sg sd_mod crc_t10dif crct10dif_generic usbhid hid ohci_pci crct10dif_pclmul crct10dif_common crc32c_intel r8169 mii ehci_pci ohci_hcd xhci_hcd ehci_hcd ahci libahci usbcore usb_common libata scsi_mod May 6 13:47:55 illusion kernel: [ 79.716495] CPU: 1 PID: 2249 Comm: Xorg Not tainted 3.16.0-4-amd64 #1 Debian 3.16.7-ckt25-1 May 6 13:47:55 illusion kernel: [ 79.716530] Hardware name: System manufacturer System Product Name/A88XM-E, BIOS 0801 07/15/2014 May 6 13:47:55 illusion kernel: [ 79.716566] task: ffff880215b08010 ti: ffff8802162d8000 task.ti: ffff8802162d8000 May 6 13:47:55 illusion kernel: [ 79.716597] RIP: 0010:[<ffffffffa0315c3d>] [<ffffffffa0315c3d>] radeon_fence_ref+0xd/0x50 [radeon] May 6 13:47:55 illusion kernel: [ 79.716647] RSP: 0018:ffff8802162dbb18 EFLAGS: 00010292 May 6 13:47:55 illusion kernel: [ 79.716669] RAX: 0000000000000000 RBX: ffff880036b9d5f8 RCX: ffff880036b9cd08 May 6 13:47:55 illusion kernel: [ 79.716699] RDX: 0000000000000001 RSI: 0000000000000000 RDI: 0000000000000000 May 6 13:47:55 illusion kernel: [ 79.716728] RBP: ffff880036b9d550 R08: ffff880036b9c000 R09: 0000000000000000 May 6 13:47:55 illusion kernel: [ 79.716757] R10: 0000000000000002 R11: ffff8802162dbe08 R12: 0000000000000020 May 6 13:47:55 illusion kernel: [ 79.716786] R13: ffff8802162dbbe0 R14: ffff8802162dbbb0 R15: ffff880036b9d5f8 May 6 13:47:55 illusion kernel: [ 79.716816] FS: 00007fc86aed3980(0000) GS:ffff88021ec80000(0000) knlGS:0000000000000000 May 6 13:47:55 illusion kernel: [ 79.718434] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 May 6 13:47:55 illusion kernel: [ 79.720051] CR2: 0000000000000008 CR3: 0000000213b38000 CR4: 00000000000407e0 May 6 13:47:55 illusion kernel: [ 79.721681] Stack: May 6 13:47:55 illusion kernel: [ 79.723296] ffffffffa03760bc 002000000006a4c0 0000f2a000000100 ffff8802162dbcd0 May 6 13:47:55 illusion kernel: [ 79.724938] ffff880036b9c000 ffff880215b08010 ffff880215b08010 0000000000000001 May 6 13:47:55 illusion kernel: [ 79.726597] 0000000000000000 0000000000000000 0000000000000000 0000000000000000 May 6 13:47:55 illusion kernel: [ 79.728258] Call Trace: May 6 13:47:55 illusion kernel: [ 79.729913] [<ffffffffa03760bc>] ? radeon_sa_bo_new+0x25c/0x460 [radeon] May 6 13:47:55 illusion kernel: [ 79.731581] [<ffffffffa032af3e>] ? radeon_ib_get+0x2e/0xd0 [radeon] May 6 13:47:55 illusion kernel: [ 79.733232] [<ffffffffa032d47c>] ? radeon_cs_ioctl+0x13c/0x730 [radeon] May 6 13:47:55 illusion kernel: [ 79.734872] [<ffffffffa02be8b7>] ? drm_ioctl+0x1c7/0x5b0 [drm] May 6 13:47:55 illusion kernel: [ 79.736497] [<ffffffff813cbf71>] ? input_event_to_user+0x51/0xa0 May 6 13:47:55 illusion kernel: [ 79.738119] [<ffffffff810125b9>] ? do_signal+0x199/0xa10 May 6 13:47:55 illusion kernel: [ 79.739736] [<ffffffff8101e5c2>] ? __restore_xstate_sig+0x82/0x570 May 6 13:47:55 illusion kernel: [ 79.741352] [<ffffffffa049c6d9>] ? evdev_read+0x109/0x3b0 [evdev] May 6 13:47:55 illusion kernel: [ 79.742981] [<ffffffffa02fa046>] ? radeon_drm_ioctl+0x46/0x80 [radeon] May 6 13:47:55 illusion kernel: [ 79.744610] [<ffffffff811bacdf>] ? do_vfs_ioctl+0x2cf/0x4b0 May 6 13:47:55 illusion kernel: [ 79.746252] [<ffffffff81079765>] ? restore_altstack+0x15/0x30 May 6 13:47:55 illusion kernel: [ 79.747898] [<ffffffff81013056>] ? sys_rt_sigreturn+0xa6/0xb0 May 6 13:47:55 illusion kernel: [ 79.749546] [<ffffffff811baf41>] ? SyS_ioctl+0x81/0xa0 May 6 13:47:55 illusion kernel: [ 79.751195] [<ffffffff81514a0d>] ? system_call_fast_compare_end+0x10/0x15 May 6 13:47:55 illusion kernel: [ 79.752845] Code: e4 48 8b 3b 89 c1 89 ea 48 c7 c6 80 56 40 a0 31 c0 e8 68 b7 08 e1 eb cb 66 0f 1f 44 00 00 66 66 66 66 90 48 89 f8 ba 01 00 00 00 <f0> 0f c1 57 08 83 c2 01 83 fa 01 7e 01 c3 80 3d 0e 43 11 00 00 May 6 13:47:55 illusion kernel: [ 79.756288] RIP [<ffffffffa0315c3d>] radeon_fence_ref+0xd/0x50 [radeon] May 6 13:47:55 illusion kernel: [ 79.757954] RSP <ffff8802162dbb18> May 6 13:47:55 illusion kernel: [ 79.759598] CR2: 0000000000000008 May 6 13:47:55 illusion kernel: [ 79.767667] ---[ end trace 2b7760e180a03b61 ]--- -- You are receiving this mail because: You are the assignee for the bug. [View Less]

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[PATCH] drm/exynos: fimd: harden fimd_calc_clkdiv()
by Tobias Jakobi 06 May '16

06 May '16

Don't use the vrefresh field of the DRM mode since this one is supposed to only be used for debug purpose. Instead use the clock field which should also provide much more precise information. Also sanitize the case in which the clock value should be zero. We then just default to the maximum clock divisor. Signed-off-by: Tobias Jakobi <tjakobi(a)math.uni-bielefeld.de> --- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/… [View More]

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[git pull] drm fixes
by Dave Airlie 06 May '16

06 May '16

Hi Linus, Fixes for i915, amdgpu/radeon and imx. The IMX fix is for an autoloading regression found in Fedora. The radeon fixes, are the same fix to amdgpu/radeon to avoid a hardware lockup in some circumstances with a bad mode, and a double free bug I took a few hours chasing down the other morning. The i915 fixes are across the board, all stable material, and fixing some hangs and suspend/resume issues, along with a live status regressions. Dave. The following changes since commit … [View More]4810d9682971e8eee659f96e4f9d9154e3c6c0b4: Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security (2016-05-04 11:14:00 -0700) are available in the git repository at: git://people.freedesktop.org/~airlied/linux drm-fixes for you to fetch changes up to fca097169faf8b9cfe92d8926da7a1fa2d3cd452: Merge tag 'drm-intel-fixes-2016-05-02' of git://anongit.freedesktop.org/drm-intel into drm-fixes (2016-05-05 12:12:09 +1000) ---------------------------------------------------------------- Alex Deucher (2): drm/radeon: make sure vertical front porch is at least 1 drm/amdgpu: make sure vertical front porch is at least 1 Chris Wilson (1): drm/i915: Avoid stalling on pending flips for legacy cursor updates Dave Airlie (3): drm/amdgpu: set metadata pointer to NULL after freeing. Merge branch 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-fixes Merge tag 'drm-intel-fixes-2016-05-02' of git://anongit.freedesktop.org/drm-intel into drm-fixes Imre Deak (2): drm/i915: Fix system resume if PCI device remained enabled drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resume Mika Kahola (1): drm/i915: Fix eDP low vswing for Broadwell Philipp Zabel (1): gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading Shashank Sharma (1): drm/i915: Fake HDMI live status Ville Syrjälä (1): drm/i915: Make RPS EI/thresholds multiple of 25 on SNB-BDW drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 1 + drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 4 ++++ drivers/gpu/drm/i915/i915_drv.c | 32 +++++++++++++++++++++++++- drivers/gpu/drm/i915/i915_reg.h | 9 +++++++- drivers/gpu/drm/i915/intel_ddi.c | 22 ++++++++++-------- drivers/gpu/drm/i915/intel_display.c | 3 +++ drivers/gpu/drm/i915/intel_dp.c | 4 ++-- drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_hdmi.c | 12 ++++++++-- drivers/gpu/drm/radeon/atombios_encoders.c | 4 ++++ drivers/gpu/ipu-v3/ipu-common.c | 7 +++++- 11 files changed, 84 insertions(+), 16 deletions(-) [View Less]

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[PATCH] drm/panel: Add display timings for TPK U.S.A. LLC Fusion 7", 10.1" panels
by Bhuvanchandra DV 05 May '16

05 May '16

Add support for TPK U.S.A. LLC Fusion 7", 10.1" panels to the DRM simple panel driver. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv(a)toradex.com> --- This patch is based on top of Stefan's clock polarity patches[1] [1] https://lkml.org/lkml/2016/5/5/20 .../bindings/display/panel/tpk,f07a-0102.txt | 8 ++++ .../bindings/display/panel/tpk,f10a-0102.txt | 8 ++++ .../devicetree/bindings/vendor-prefixes.txt | 1 + drivers/gpu/drm/panel/panel-simple.c … [View More] | 51 ++++++++++++++++++++++ 4 files changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/tpk,f07a-0102.txt create mode 100644 Documentation/devicetree/bindings/display/panel/tpk,f10a-0102.txt diff --git a/Documentation/devicetree/bindings/display/panel/tpk,f07a-0102.txt b/Documentation/devicetree/bindings/display/panel/tpk,f07a-0102.txt new file mode 100644 index 0000000..a2613b9 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/tpk,f07a-0102.txt @@ -0,0 +1,8 @@ +TPK U.S.A. LLC Fusion 7" integrated projected capacitive touch display with, +800 x 480 (WVGA) LCD panel. + +Required properties: +- compatible: should be "tpk,f07a-0102" + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/Documentation/devicetree/bindings/display/panel/tpk,f10a-0102.txt b/Documentation/devicetree/bindings/display/panel/tpk,f10a-0102.txt new file mode 100644 index 0000000..b9d0511 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/tpk,f10a-0102.txt @@ -0,0 +1,8 @@ +TPK U.S.A. LLC Fusion 10.1" integrated projected capacitive touch display with, +1024 x 600 (WSVGA) LCD panel. + +Required properties: +- compatible: should be "tpk,f10a-0102" + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 86740d4..141aae4 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -247,6 +247,7 @@ toradex Toradex AG toshiba Toshiba Corporation toumaz Toumaz tplink TP-LINK Technologies Co., Ltd. +tpk TPK U.S.A. LLC tronfy Tronfy tronsmart Tronsmart truly Truly Semiconductors Limited diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index b19c88f..b8778b1 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1204,6 +1204,51 @@ static const struct panel_desc shelly_sca07010_bfn_lnn = { .bus_format = MEDIA_BUS_FMT_RGB666_1X18, }; +static const struct drm_display_mode tpk_f07a_0102_mode = { + .clock = 33260, + .hdisplay = 800, + .hsync_start = 800 + 40, + .hsync_end = 800 + 40 + 128, + .htotal = 800 + 40 + 128 + 88, + .vdisplay = 480, + .vsync_start = 480 + 10, + .vsync_end = 480 + 10 + 2, + .vtotal = 480 + 10 + 2 + 33, + .vrefresh = 60, +}; + +static const struct panel_desc tpk_f07a_0102 = { + .modes = &tpk_f07a_0102_mode, + .num_modes = 1, + .size = { + .width = 152, + .height = 91, + }, + .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, +}; + +static const struct drm_display_mode tpk_f10a_0102_mode = { + .clock = 45000, + .hdisplay = 1024, + .hsync_start = 1024 + 176, + .hsync_end = 1024 + 176 + 5, + .htotal = 1024 + 176 + 5 + 88, + .vdisplay = 600, + .vsync_start = 600 + 20, + .vsync_end = 600 + 20 + 5, + .vtotal = 600 + 20 + 5 + 25, + .vrefresh = 60, +}; + +static const struct panel_desc tpk_f10a_0102 = { + .modes = &tpk_f10a_0102_mode, + .num_modes = 1, + .size = { + .width = 223, + .height = 125, + }, +}; + static const struct display_timing urt_umsh_8596md_timing = { .pixelclock = { 33260000, 33260000, 33260000 }, .hactive = { 800, 800, 800 }, @@ -1347,6 +1392,12 @@ static const struct of_device_id platform_of_match[] = { .compatible = "shelly,sca07010-bfn-lnn", .data = &shelly_sca07010_bfn_lnn, }, { + .compatible = "tpk,f07a-0102", + .data = &tpk_f07a_0102, + }, { + .compatible = "tpk,f10a-0102", + .data = &tpk_f10a_0102, + }, { .compatible = "urt,umsh-8596md-t", .data = &urt_umsh_8596md_parallel, }, { -- 2.8.2 [View Less]

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[Bug 95285] [radeonsi] Tomb Raider: enabling TressFX makes hair disappear
by bugzilla-daemon＠freedesktop.org 05 May '16

05 May '16

https://bugs.freedesktop.org/show_bug.cgi?id=95285 Bug ID: 95285 Summary: [radeonsi] Tomb Raider: enabling TressFX makes hair disappear Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel(a)lists.freedesktop.org Reporter: kai(a)… [View More]

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[PATCH] drm/radeon: fix PLL sharing on DCE6.1
by Lucas Stach 05 May '16

05 May '16

On DCE6.1 PPLL2 is exclusively available to UNIPHYA, so it should not be taken into consideration when looking for an already enabled PLL to be shared with other outputs. This fixes the broken VGA port (TRAVIS DP->VGA bridge) on my Richland based laptop, where the internal display is connected to UNIPHYA through a TRAVIS DP->LVDS bridge. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=78987 Signed-off-by: Lucas Stach <dev(a)lynxeye.de> --- drivers/gpu/drm/radeon/atombios_crtc.… [View More]c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index b80b08f..401bcbd 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -1739,7 +1739,8 @@ static u32 radeon_get_pll_use_mask(struct drm_crtc *crtc) * also in DP mode. For DP, a single PPLL can be used for all DP * crtcs/encoders. */ -static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc) +static int radeon_get_shared_dp_ppll(struct radeon_device *rdev, + struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct drm_crtc *test_crtc; @@ -1751,6 +1752,10 @@ static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc) test_radeon_crtc = to_radeon_crtc(test_crtc); if (test_radeon_crtc->encoder && ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_radeon_crtc->encoder))) { + /* PPLL2 is exclusive to UNIPHYA on DCE61 */ + if (ASIC_IS_DCE61(rdev) && !ASIC_IS_DCE8(rdev) && + test_radeon_crtc->pll_id == ATOM_PPLL2) + continue; /* for DP use the same PLL for all */ if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) return test_radeon_crtc->pll_id; @@ -1859,7 +1864,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) return ATOM_PPLL_INVALID; else { /* use the same PPLL for all DP monitors */ - pll = radeon_get_shared_dp_ppll(crtc); + pll = radeon_get_shared_dp_ppll(rdev, crtc); if (pll != ATOM_PPLL_INVALID) return pll; } @@ -1907,7 +1912,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) return ATOM_PPLL_INVALID; else { /* use the same PPLL for all DP monitors */ - pll = radeon_get_shared_dp_ppll(crtc); + pll = radeon_get_shared_dp_ppll(rdev, crtc); if (pll != ATOM_PPLL_INVALID) return pll; } @@ -1962,7 +1967,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) return ATOM_DCPLL; else { /* use the same PPLL for all DP monitors */ - pll = radeon_get_shared_dp_ppll(crtc); + pll = radeon_get_shared_dp_ppll(rdev, crtc); if (pll != ATOM_PPLL_INVALID) return pll; } -- 2.5.5 [View Less]

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[REGRESSION] *ERROR* Cannot create /sys/kernel/debug/dri/0
by Gabriel Feceoru 05 May '16

05 May '16

Hi Dave, Daniel, This is a regression causing many failures in intel-gfx CI. [ 295.164523] [drm:drm_debugfs_init] *ERROR* Cannot create /sys/kernel/debug/dri/0 [ 295.164531] [drm:drm_minor_register] *ERROR* DRM: Failed to initialize /sys/kernel/debug/dri. [ 295.167544] i915: probe of 0000:00:02.0 failed with error -1 After bisect: commit d2307dea14a4f14a4b5db01b6d40a30fa6117e6c Author: Dave Airlie <airlied(a)redhat.com> Date: Wed Apr 27 11:27:39 2016 +1000 drm/atomic: … [View More]

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dri-devel May 2016