dri-devel January 2018

dri-devel@lists.freedesktop.org

226 participants
1677 discussions

[PULL] drm-misc-fixes
by Daniel Vetter 17 Jan '18

17 Jan '18

Hi Dave, drm-misc-fixes-2018-01-17: Final 4.15 drm-misc pull: Just 3 sun4i patches to fix clock computation/checks. Cheers, Daniel The following changes since commit b0bb222440a5c8273f67dd37946707e6ba6ad832: Merge branch 'linux-4.15' of git://github.com/skeggsb/linux into drm-fixes (2018-01-09 12:03:10 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2018-01-17 for you to fetch changes up to 3b9c57cef4de80f29885e1edf69828de8d3fae6b: drm/sun4i: hdmi: Add missing rate halving check in sun4i_tmds_determine_rate (2018-01-11 13:25:43 +0100) ---------------------------------------------------------------- Final 4.15 drm-misc pull: Just 3 sun4i patches to fix clock computation/checks. ---------------------------------------------------------------- Jonathan Liu (3): drm/sun4i: hdmi: Check for unset best_parent in sun4i_tmds_determine_rate drm/sun4i: hdmi: Fix incorrect assignment in sun4i_tmds_determine_rate drm/sun4i: hdmi: Add missing rate halving check in sun4i_tmds_determine_rate drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch

1 0

[PATCH] drm: Fix PANEL_ORIENTATION_QUIRKS breaking the Kconfig DRM menuconfig
by Hans de Goede 17 Jan '18

17 Jan '18

All Kconfig menu menu entries should have a depends on MENU_OPTION, the menu stops after the first Kconfig entry without this depends on. Since the PANEL_ORIENTATION_QUIRKS option is also used outside of DRM, it deliberately does not have a depends on DRM, but this causes all items after it to show as separate items rather then under the DRM menuconfig. This commit moves PANEL_ORIENTATION_QUIRKS to the end of the drm Kconfig file, grouping it with DRM_LIB_RANDOM which also does not depend on DRM, fixing the DRM menuconfig. Fixes: 404d1a3edc38 ("drm: Add panel orientation quirks, v6.") Cc: Chris Wilson <chris(a)chris-wilson.co.uk> Reported-by: Chris Wilson <chris(a)chris-wilson.co.uk> Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- drivers/gpu/drm/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 0bc374459440..deeefa7a1773 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -27,10 +27,6 @@ config DRM_MIPI_DSI bool depends on DRM -# Separate option because drm_panel_orientation_quirks.c is shared with fbdev -config DRM_PANEL_ORIENTATION_QUIRKS - tristate - config DRM_DP_AUX_CHARDEV bool "DRM DP AUX Interface" depends on DRM @@ -372,6 +368,10 @@ config DRM_SAVAGE endif # DRM_LEGACY +# Separate option because drm_panel_orientation_quirks.c is shared with fbdev +config DRM_PANEL_ORIENTATION_QUIRKS + tristate + config DRM_LIB_RANDOM bool default n -- 2.14.3

3 4

[PATCH] drm/vmwgfx: Fix a boot time warning
by Thomas Hellstrom 17 Jan '18

17 Jan '18

From: Woody Suwalski <terraluna977(a)gmail.com> The 4.15 vmwgfx driver shows a warning during boot. It is caused by a mismatch between the result of vmw_enable_vblank() and what the drm_atomic_helper expects. Signed-off by: Woody Suwalski <terraluna977(a)gmail.com> Signed-off-by: Thomas Hellstrom <thellstrom(a)vmware.com> --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 641294a..fcd5814 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c @@ -1863,7 +1863,7 @@ u32 vmw_get_vblank_counter(struct drm_device *dev, unsigned int pipe) */ int vmw_enable_vblank(struct drm_device *dev, unsigned int pipe) { - return -ENOSYS; + return -EINVAL; } /** -- 2.7.4

2 2

[PATCH 0/7] drm/vmwgfx: Various atomic modesetting fixes
by Thomas Hellstrom 17 Jan '18

17 Jan '18

Part of the pageflip functionality that was intended to be performed using atomic commit was only present in the legacy pageflip ioctl. That problem is fixed in this series. We also better support nonblocking commits as some time-consuming operations previously were performed in the calling process even if that process had requested a non-blocking commit. Finally we fix an issue where cursor image updates were performed on each cursor move.

2 8

[PATCH] [RESEND] vmwgfx: use monotonic event timestamps
by Arnd Bergmann 17 Jan '18

17 Jan '18

DRM_VMW_EVENT_FENCE_SIGNALED (struct drm_vmw_event_fence) and DRM_EVENT_VBLANK (struct drm_event_vblank) pass timestamps in 32-bit seconds/microseconds format. As of commit c61eef726a78 ("drm: add support for monotonic vblank timestamps"), other DRM drivers use monotonic times for drm_event_vblank, but vmwgfx still uses CLOCK_REALTIME for both events, which suffers from the y2038/y2106 overflow as well as time jumps. For consistency, this changes vmwgfx to use ktime_get_ts64 as well, which solves those problems and avoids the deprecated do_gettimeofday() function. This should be transparent to to user space, as long as it doesn't compare the time against the result of gettimeofday(). Link: https://patchwork.kernel.org/patch/10076599/ Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- Originally sent on Nov 27. Sinclair Yeh said he'd pick it up for the next pull request, but it's not in linux-next yet. Resending the unchanged patch, please pick it up when you have time, or feel free to ignore this email in case it's already in some tree that just isn't part of linux-next but will be sent during the next merge window. --- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c index 6c5c75cf5e6c..9ed544f8958f 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c @@ -901,11 +901,12 @@ static void vmw_event_fence_action_seq_passed(struct vmw_fence_action *action) spin_lock_irq(&dev->event_lock); if (likely(eaction->tv_sec != NULL)) { - struct timeval tv; + struct timespec64 ts; - do_gettimeofday(&tv); - *eaction->tv_sec = tv.tv_sec; - *eaction->tv_usec = tv.tv_usec; + ktime_get_ts64(&ts); + /* monotonic time, so no y2038 overflow */ + *eaction->tv_sec = ts.tv_sec; + *eaction->tv_usec = ts.tv_nsec / NSEC_PER_USEC; } drm_send_event_locked(dev, eaction->event); -- 2.9.0

4 5

[PATCH 1/3] dma-buf: make returning the exclusive fence optional
by Christian König 17 Jan '18

17 Jan '18

Change reservation_object_get_fences_rcu to make the exclusive fence pointer optional. If not specified the exclusive fence is put into the fence array as well. This is helpful for a couple of cases where we need all fences in a single array. Signed-off-by: Christian König <christian.koenig(a)amd.com> --- drivers/dma-buf/reservation.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c index b759a569b7b8..461afa9febd4 100644 --- a/drivers/dma-buf/reservation.c +++ b/drivers/dma-buf/reservation.c @@ -374,8 +374,9 @@ EXPORT_SYMBOL(reservation_object_copy_fences); * @pshared: the array of shared fence ptrs returned (array is krealloc'd to * the required size, and must be freed by caller) * - * RETURNS - * Zero or -errno + * Retrieve all fences from the reservation object. If the pointer for the + * exclusive fence is not specified the fence is put into the array of the + * shared fences as well. Returns either zero or -ENOMEM. */ int reservation_object_get_fences_rcu(struct reservation_object *obj, struct dma_fence **pfence_excl, @@ -389,8 +390,8 @@ int reservation_object_get_fences_rcu(struct reservation_object *obj, do { struct reservation_object_list *fobj; - unsigned seq; - unsigned int i; + unsigned int i, seq; + size_t sz = 0; shared_count = i = 0; @@ -402,9 +403,14 @@ int reservation_object_get_fences_rcu(struct reservation_object *obj, goto unlock; fobj = rcu_dereference(obj->fence); - if (fobj) { + if (fobj) + sz += sizeof(*shared) * fobj->shared_max; + + if (!pfence_excl && fence_excl) + sz += sizeof(*shared); + + if (sz) { struct dma_fence **nshared; - size_t sz = sizeof(*shared) * fobj->shared_max; nshared = krealloc(shared, sz, GFP_NOWAIT | __GFP_NOWARN); @@ -420,13 +426,19 @@ int reservation_object_get_fences_rcu(struct reservation_object *obj, break; } shared = nshared; - shared_count = fobj->shared_count; - + shared_count = fobj ? fobj->shared_count : 0; for (i = 0; i < shared_count; ++i) { shared[i] = rcu_dereference(fobj->shared[i]); if (!dma_fence_get_rcu(shared[i])) break; } + + if (!pfence_excl && fence_excl) { + shared[i] = fence_excl; + fence_excl = NULL; + ++i; + ++shared_count; + } } if (i != shared_count || read_seqcount_retry(&obj->seq, seq)) { @@ -448,7 +460,8 @@ int reservation_object_get_fences_rcu(struct reservation_object *obj, *pshared_count = shared_count; *pshared = shared; - *pfence_excl = fence_excl; + if (pfence_excl) + *pfence_excl = fence_excl; return ret; } -- 2.14.1

2 4

[PATCH] drm/ttm: add updated_glob_count in dma_page
by Roger He 17 Jan '18

17 Jan '18

add this for correctly updating global mem count in ttm_mem_zone. before that when ttm_mem_global_alloc_page fails, we would update all dma_page's global mem count in ttm_dma->pages_list. but actually here we should not update for the last dma_page. Signed-off-by: Roger He <Hongbo.He(a)amd.com> --- drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 57 +++++++++++++++++--------------- 1 file changed, 31 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c index c7f01a4..3e78ea4 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c @@ -121,6 +121,8 @@ struct dma_pool { * @vaddr: The virtual address of the page and a flag if the page belongs to a * huge pool * @dma: The bus address of the page. If the page is not allocated + * @updated_glob_count: to indicate whether we already updated global + * memory count in ttm_mem_zone * via the DMA API, it will be -1. */ struct dma_page { @@ -128,6 +130,7 @@ struct dma_page { unsigned long vaddr; struct page *p; dma_addr_t dma; + bool updated_glob_count; }; /* @@ -874,18 +877,18 @@ static int ttm_dma_page_pool_fill_locked(struct dma_pool *pool, } /* - * @return count of pages still required to fulfill the request. * The populate list is actually a stack (not that is matters as TTM * allocates one page at a time. + * return dma_page pointer if success, otherwise NULL. */ -static int ttm_dma_pool_get_pages(struct dma_pool *pool, +static struct dma_page *ttm_dma_pool_get_pages(struct dma_pool *pool, struct ttm_dma_tt *ttm_dma, unsigned index) { - struct dma_page *d_page; + struct dma_page *d_page = NULL; struct ttm_tt *ttm = &ttm_dma->ttm; unsigned long irq_flags; - int count, r = -ENOMEM; + int count; spin_lock_irqsave(&pool->lock, irq_flags); count = ttm_dma_page_pool_fill_locked(pool, &irq_flags); @@ -894,12 +897,11 @@ static int ttm_dma_pool_get_pages(struct dma_pool *pool, ttm->pages[index] = d_page->p; ttm_dma->dma_address[index] = d_page->dma; list_move_tail(&d_page->page_list, &ttm_dma->pages_list); - r = 0; pool->npages_in_use += 1; pool->npages_free -= 1; } spin_unlock_irqrestore(&pool->lock, irq_flags); - return r; + return d_page; } static gfp_t ttm_dma_pool_gfp_flags(struct ttm_dma_tt *ttm_dma, bool huge) @@ -934,6 +936,7 @@ int ttm_dma_populate(struct ttm_dma_tt *ttm_dma, struct device *dev, struct ttm_mem_global *mem_glob = ttm->glob->mem_glob; unsigned long num_pages = ttm->num_pages; struct dma_pool *pool; + struct dma_page *d_page; enum pool_type type; unsigned i; int ret; @@ -962,8 +965,8 @@ int ttm_dma_populate(struct ttm_dma_tt *ttm_dma, struct device *dev, while (num_pages >= HPAGE_PMD_NR) { unsigned j; - ret = ttm_dma_pool_get_pages(pool, ttm_dma, i); - if (ret != 0) + d_page = ttm_dma_pool_get_pages(pool, ttm_dma, i); + if (!d_page) break; ret = ttm_mem_global_alloc_page(mem_glob, ttm->pages[i], @@ -973,6 +976,7 @@ int ttm_dma_populate(struct ttm_dma_tt *ttm_dma, struct device *dev, return -ENOMEM; } + d_page->updated_glob_count = true; for (j = i + 1; j < (i + HPAGE_PMD_NR); ++j) { ttm->pages[j] = ttm->pages[j - 1] + 1; ttm_dma->dma_address[j] = ttm_dma->dma_address[j - 1] + @@ -996,8 +1000,8 @@ int ttm_dma_populate(struct ttm_dma_tt *ttm_dma, struct device *dev, } while (num_pages) { - ret = ttm_dma_pool_get_pages(pool, ttm_dma, i); - if (ret != 0) { + d_page = ttm_dma_pool_get_pages(pool, ttm_dma, i); + if (!d_page) { ttm_dma_unpopulate(ttm_dma, dev); return -ENOMEM; } @@ -1009,6 +1013,7 @@ int ttm_dma_populate(struct ttm_dma_tt *ttm_dma, struct device *dev, return -ENOMEM; } + d_page->updated_glob_count = true; ++i; --num_pages; } @@ -1049,8 +1054,11 @@ void ttm_dma_unpopulate(struct ttm_dma_tt *ttm_dma, struct device *dev) continue; count++; - ttm_mem_global_free_page(ttm->glob->mem_glob, - d_page->p, pool->size); + if (d_page->updated_glob_count) { + ttm_mem_global_free_page(ttm->glob->mem_glob, + d_page->p, pool->size); + d_page->updated_glob_count = false; + } ttm_dma_page_put(pool, d_page); } @@ -1070,9 +1078,19 @@ void ttm_dma_unpopulate(struct ttm_dma_tt *ttm_dma, struct device *dev) /* make sure pages array match list and count number of pages */ count = 0; - list_for_each_entry(d_page, &ttm_dma->pages_list, page_list) { + list_for_each_entry_safe(d_page, next, &ttm_dma->pages_list, + page_list) { ttm->pages[count] = d_page->p; count++; + + if (d_page->updated_glob_count) { + ttm_mem_global_free_page(ttm->glob->mem_glob, + d_page->p, pool->size); + d_page->updated_glob_count = false; + } + + if (is_cached) + ttm_dma_page_put(pool, d_page); } spin_lock_irqsave(&pool->lock, irq_flags); @@ -1092,19 +1110,6 @@ void ttm_dma_unpopulate(struct ttm_dma_tt *ttm_dma, struct device *dev) } spin_unlock_irqrestore(&pool->lock, irq_flags); - if (is_cached) { - list_for_each_entry_safe(d_page, next, &ttm_dma->pages_list, page_list) { - ttm_mem_global_free_page(ttm->glob->mem_glob, - d_page->p, pool->size); - ttm_dma_page_put(pool, d_page); - } - } else { - for (i = 0; i < count; i++) { - ttm_mem_global_free_page(ttm->glob->mem_glob, - ttm->pages[i], pool->size); - } - } - INIT_LIST_HEAD(&ttm_dma->pages_list); for (i = 0; i < ttm->num_pages; i++) { ttm->pages[i] = NULL; -- 2.7.4

3 2

[PATCH 0/4] drm/msm/dsi: Add DSI 10nm PLL/PHY drivers
by Archit Taneja 17 Jan '18

17 Jan '18

Add the 10nm DSI PHY/PLL drivers. This will be used on the SDM845 SoC. Most of the code is based on the corresponding downstream PLL [1] and PHY [2] drivers. The PHY driver has a few TODOs which would be resolved in future patches. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.9/tree/drivers/clk/qcom/… [2] https://source.codeaurora.org/quic/la/kernel/msm-4.9/tree/drivers/gpu/drm/m… Archit Taneja (4): drm/msm/dsi: Update generated headers for 10nm PLL/PHY drm/msm/dsi: Add skeleton 10nm PHY/PLL code drm/msm/dsi: Populate PLL 10nm clock ops drm/msm/dsi: Populate the 10nm PHY funcs drivers/gpu/drm/msm/Kconfig | 7 + drivers/gpu/drm/msm/Makefile | 2 + drivers/gpu/drm/msm/dsi/dsi.h | 1 + drivers/gpu/drm/msm/dsi/dsi.xml.h | 187 ++++++- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 4 + drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 251 +++++++++ drivers/gpu/drm/msm/dsi/pll/dsi_pll.c | 3 + drivers/gpu/drm/msm/dsi/pll/dsi_pll.h | 9 + drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 822 +++++++++++++++++++++++++++++ 10 files changed, 1274 insertions(+), 13 deletions(-) create mode 100644 drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c create mode 100644 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation

1 4

[PATCH] rnndb: dsi: Add DSI 10nm PLL/PHY registers
by Archit Taneja 17 Jan '18

17 Jan '18

Signed-off-by: Archit Taneja <architt(a)codeaurora.org> --- rnndb/dsi/dsi.xml | 95 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/rnndb/dsi/dsi.xml b/rnndb/dsi/dsi.xml index c7052378..fdcc2d3e 100644 --- a/rnndb/dsi/dsi.xml +++ b/rnndb/dsi/dsi.xml @@ -814,4 +814,99 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <reg32 offset="0x108" name="PLL_BANDGAP"/> </domain> +<domain name="DSI_10nm_PHY_CMN" width="32"> + <reg32 offset="0x00000" name="REVISION_ID0"/> + <reg32 offset="0x00004" name="REVISION_ID1"/> + <reg32 offset="0x00008" name="REVISION_ID2"/> + <reg32 offset="0x0000c" name="REVISION_ID3"/> + <reg32 offset="0x00010" name="CLK_CFG0"/> + <reg32 offset="0x00014" name="CLK_CFG1"/> + <reg32 offset="0x00018" name="GLBL_CTRL"/> + <reg32 offset="0x0001c" name="RBUF_CTRL"/> + <reg32 offset="0x00020" name="VREG_CTRL"/> + <reg32 offset="0x00024" name="CTRL_0"/> + <reg32 offset="0x00028" name="CTRL_1"/> + <reg32 offset="0x0002c" name="CTRL_2"/> + <reg32 offset="0x00030" name="LANE_CFG0"/> + <reg32 offset="0x00034" name="LANE_CFG1"/> + <reg32 offset="0x00038" name="PLL_CNTRL"/> + <reg32 offset="0x00098" name="LANE_CTRL0"/> + <reg32 offset="0x0009c" name="LANE_CTRL1"/> + <reg32 offset="0x000a0" name="LANE_CTRL2"/> + <reg32 offset="0x000a4" name="LANE_CTRL3"/> + <reg32 offset="0x000a8" name="LANE_CTRL4"/> + <reg32 offset="0x000ac" name="TIMING_CTRL_0"/> + <reg32 offset="0x000b0" name="TIMING_CTRL_1"/> + <reg32 offset="0x000b4" name="TIMING_CTRL_2"/> + <reg32 offset="0x000b8" name="TIMING_CTRL_3"/> + <reg32 offset="0x000bc" name="TIMING_CTRL_4"/> + <reg32 offset="0x000c0" name="TIMING_CTRL_5"/> + <reg32 offset="0x000c4" name="TIMING_CTRL_6"/> + <reg32 offset="0x000c8" name="TIMING_CTRL_7"/> + <reg32 offset="0x000cc" name="TIMING_CTRL_8"/> + <reg32 offset="0x000d0" name="TIMING_CTRL_9"/> + <reg32 offset="0x000d4" name="TIMING_CTRL_10"/> + <reg32 offset="0x000d8" name="TIMING_CTRL_11"/> + <reg32 offset="0x000ec" name="PHY_STATUS"/> + <reg32 offset="0x000f4" name="LANE_STATUS0"/> + <reg32 offset="0x000f8" name="LANE_STATUS1"/> +</domain> + +<domain name="DSI_10nm_PHY" width="32"> + <array offset="0x00000" name="LN" length="5" stride="0x80"> + <reg32 offset="0x00" name="CFG0"/> + <reg32 offset="0x04" name="CFG1"/> + <reg32 offset="0x08" name="CFG2"/> + <reg32 offset="0x0c" name="CFG3"/> + <reg32 offset="0x10" name="TEST_DATAPATH"/> + <reg32 offset="0x14" name="PIN_SWAP"/> + <reg32 offset="0x18" name="HSTX_STR_CTRL"/> + <reg32 offset="0x1c" name="OFFSET_TOP_CTRL"/> + <reg32 offset="0x20" name="OFFSET_BOT_CTRL"/> + <reg32 offset="0x24" name="LPTX_STR_CTRL"/> + <reg32 offset="0x28" name="LPRX_CTRL"/> + <reg32 offset="0x2c" name="TX_DCTRL"/> + </array> +</domain> + +<domain name="DSI_10nm_PHY_PLL" width="32"> + <reg32 offset="0x0000" name="ANALOG_CONTROLS_ONE"/> + <reg32 offset="0x0004" name="ANALOG_CONTROLS_TWO"/> + <reg32 offset="0x0010" name="ANALOG_CONTROLS_THREE"/> + <reg32 offset="0x001c" name="DSM_DIVIDER"/> + <reg32 offset="0x0020" name="FEEDBACK_DIVIDER"/> + <reg32 offset="0x0024" name="SYSTEM_MUXES"/> + <reg32 offset="0x002c" name="CMODE"/> + <reg32 offset="0x0030" name="CALIBRATION_SETTINGS"/> + <reg32 offset="0x0054" name="BAND_SEL_CAL_SETTINGS_THREE"/> + <reg32 offset="0x0064" name="FREQ_DETECT_SETTINGS_ONE"/> + <reg32 offset="0x007c" name="PFILT"/> + <reg32 offset="0x0080" name="IFILT"/> + <reg32 offset="0x0094" name="OUTDIV"/> + <reg32 offset="0x00a4" name="CORE_OVERRIDE"/> + <reg32 offset="0x00a8" name="CORE_INPUT_OVERRIDE"/> + <reg32 offset="0x00b4" name="PLL_DIGITAL_TIMERS_TWO"/> + <reg32 offset="0x00cc" name="DECIMAL_DIV_START_1"/> + <reg32 offset="0x00d0" name="FRAC_DIV_START_LOW_1"/> + <reg32 offset="0x00d4" name="FRAC_DIV_START_MID_1"/> + <reg32 offset="0x00d8" name="FRAC_DIV_START_HIGH_1"/> + <reg32 offset="0x010c" name="SSC_STEPSIZE_LOW_1"/> + <reg32 offset="0x0110" name="SSC_STEPSIZE_HIGH_1"/> + <reg32 offset="0x0114" name="SSC_DIV_PER_LOW_1"/> + <reg32 offset="0x0118" name="SSC_DIV_PER_HIGH_1"/> + <reg32 offset="0x011c" name="SSC_DIV_ADJPER_LOW_1"/> + <reg32 offset="0x0120" name="SSC_DIV_ADJPER_HIGH_1"/> + <reg32 offset="0x013c" name="SSC_CONTROL"/> + <reg32 offset="0x0140" name="PLL_OUTDIV_RATE"/> + <reg32 offset="0x0144" name="PLL_LOCKDET_RATE_1"/> + <reg32 offset="0x014c" name="PLL_PROP_GAIN_RATE_1"/> + <reg32 offset="0x0154" name="PLL_BAND_SET_RATE_1"/> + <reg32 offset="0x015c" name="PLL_INT_GAIN_IFILT_BAND_1"/> + <reg32 offset="0x0164" name="PLL_FL_INT_GAIN_PFILT_BAND_1"/> + <reg32 offset="0x0180" name="PLL_LOCK_OVERRIDE"/> + <reg32 offset="0x0184" name="PLL_LOCK_DELAY"/> + <reg32 offset="0x018c" name="CLOCK_INVERTERS"/> + <reg32 offset="0x01a0" name="COMMON_STATUS_ONE"/> +</domain> + </database> -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation

1 0

[PATCH] drm: Make PANEL_ORIENTATION_QUIRKS depend on DRM
by Chris Wilson 17 Jan '18

17 Jan '18

Commit 404d1a3edc38 ("drm: Add panel orientation quirks, v6.") introduced a new internal Kconfig option for DRM and placed in the middle of the DRM option sequence without including a depends on DRM. This has the unfortunate side-effect of breaking the DRM menuconfig to not include the existing DRM options. Fixes: 404d1a3edc38 ("drm: Add panel orientation quirks, v6.") Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Hans de Goede <hdegoede(a)redhat.com> --- drivers/gpu/drm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 0bc374459440..3218d0e8fb1b 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -30,6 +30,7 @@ config DRM_MIPI_DSI # Separate option because drm_panel_orientation_quirks.c is shared with fbdev config DRM_PANEL_ORIENTATION_QUIRKS tristate + depends on DRM config DRM_DP_AUX_CHARDEV bool "DRM DP AUX Interface" -- 2.15.1

3 3

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel January 2018