dri-devel March 2018

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1856 discussions

[PATCH] drm/dp: only accept valid DP_TRAINING_AUX_RD_INTERVAL values
by matthew.s.atwood＠intel.com 17 Mar '18

17 Mar '18

From: Matt Atwood <matthew.s.atwood(a)intel.com> For panels that do not follow Display Port specifications mask off invalid values for DP_TRAINING_AUX_RD_INTERVAL. Specification lists acceptable values 0-4 all other values are reserved and bit 7 of DPCD 0x0000e describes another feature. Currently the code uses all of DPCD 0x0000e and can cause max wait for 1024 ms instead of 16 ms as specified table 2-158. This address is read for both clock recovery and channel equalization. Signed-off-by: Matt Atwood <matthew.s.atwood(a)intel.com> --- drivers/gpu/drm/drm_dp_helper.c | 4 ++-- include/drm/drm_dp_helper.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index adf79be..a7e9b75 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -122,7 +122,7 @@ void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) udelay(100); else - mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); + mdelay((dpcd[DP_TRAINING_AUX_RD_INTERVAL] & DP_TRAINING_AUX_RD_MASK) * 4); } EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); @@ -130,7 +130,7 @@ void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) udelay(400); else - mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); + mdelay((dpcd[DP_TRAINING_AUX_RD_INTERVAL] & DP_TRAINING_AUX_RD_MASK) * 4); } EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index da58a42..77ba003 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -118,6 +118,7 @@ # define DP_DPCD_DISPLAY_CONTROL_CAPABLE (1 << 3) /* edp v1.2 or higher */ #define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */ +# define DP_TRAINING_AUX_RD_MASK 0x7 /* 1.4 */ #define DP_ADAPTER_CAP 0x00f /* 1.2 */ # define DP_FORCE_LOAD_SENSE_CAP (1 << 0) -- 2.7.4

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[PATCH v6 1/5] drm: xlnx: Xilinx DRM KMS module
by Hyun Kwon 17 Mar '18

17 Mar '18

Xilinx has various platforms for display, where users can create using multiple IPs in the programmable FPGA fabric, or where some hardened pipeline is available on the chip. Furthermore, hardened pipeline can also interact with soft logics in FPGA. The Xilinx DRM KMS module is to integrate multiple subdevices and to represent the entire pipeline as a single DRM device. The module includes helper (ex, framebuffer and gem helpers) and glue logic (ex, crtc interface) functions. Signed-off-by: Hyun Kwon <hyun.kwon(a)xilinx.com> Acked-by: Daniel Vetter <daniel.vetter(a)ffwll.ch> --- v6 - Fix the function desc for pipeline calls - Rebase on drm-misc-next - Fix typos in documentation - Match types for return and internal variables - Remove use of 'tmp' variables - Protect any crtc list iteration with mutex - Remove a check for drm device in crtc unregistration - Split the crtc ops as a separate struct to constify - Embed xlnx_crtc_helper into xlnx_drm - Move to_xlnx_crtc macro close to xlnx_crtc - Remove unneeded include - Replace custom vres module param with CONFIG_DRM_FBDEV_OVERALLOC - Rename crtc to crtc_helper to make it clearer - Use 'DRM device' instead of 'DRM core' - Remove unused function, xlnx_get_format() - Use device instead of platform device for the logical master - Inline xlnx_of_component_probe() - Use of_get_parent() - Remove the port binding handling in the driver - Do complete forward-declarations in headers - Constify all function pointers - Use the default ioctl from fb helper - Return the minimum pitch always - Clean up the duplicate license paragraphs - Get common bits for dma mask instead of minimum value - Remove dummy function declaration from header - Fix a typo in the commit message with some re-organization v5 - Redefine xlnx_pipeline_init() v4 - Fix a bug in of graph binding handling - Remove vblank callbacks from xlnx_crtc - Remove the dt binding. This module becomes more like a library. - Rephrase the commit message v3 - Add Laurent as a maintainer - Fix multiple-reference on gem objects v2 - Change the SPDX identifier format - Merge patches(crtc, gem, fb) into single one v2 of xlnx_drv - Rename kms to display in xlnx_drv - Replace some xlnx specific fb helper with common helpers in xlnx_drv - Don't set the commit tail callback in xlnx_drv - Support 'ports' graph binding in xlnx_drv v2 of xlnx_fb - Remove wrappers in xlnx_fb - Replace some functions with drm core helpers in xlnx_fb --- --- MAINTAINERS | 9 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/xlnx/Kconfig | 12 ++ drivers/gpu/drm/xlnx/Makefile | 2 + drivers/gpu/drm/xlnx/xlnx_crtc.c | 142 +++++++++++++ drivers/gpu/drm/xlnx/xlnx_crtc.h | 83 ++++++++ drivers/gpu/drm/xlnx/xlnx_drv.c | 430 +++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/xlnx/xlnx_drv.h | 23 +++ drivers/gpu/drm/xlnx/xlnx_fb.c | 249 +++++++++++++++++++++++ drivers/gpu/drm/xlnx/xlnx_fb.h | 27 +++ drivers/gpu/drm/xlnx/xlnx_gem.c | 36 ++++ drivers/gpu/drm/xlnx/xlnx_gem.h | 21 ++ 13 files changed, 1037 insertions(+) create mode 100644 drivers/gpu/drm/xlnx/Kconfig create mode 100644 drivers/gpu/drm/xlnx/Makefile create mode 100644 drivers/gpu/drm/xlnx/xlnx_crtc.c create mode 100644 drivers/gpu/drm/xlnx/xlnx_crtc.h create mode 100644 drivers/gpu/drm/xlnx/xlnx_drv.c create mode 100644 drivers/gpu/drm/xlnx/xlnx_drv.h create mode 100644 drivers/gpu/drm/xlnx/xlnx_fb.c create mode 100644 drivers/gpu/drm/xlnx/xlnx_fb.h create mode 100644 drivers/gpu/drm/xlnx/xlnx_gem.c create mode 100644 drivers/gpu/drm/xlnx/xlnx_gem.h diff --git a/MAINTAINERS b/MAINTAINERS index 2afba90..44cac79 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4810,6 +4810,15 @@ F: drivers/gpu/drm/etnaviv/ F: include/uapi/drm/etnaviv_drm.h F: Documentation/devicetree/bindings/display/etnaviv/ +DRM DRIVERS FOR XILINX +M: Hyun Kwon <hyun.kwon(a)xilinx.com> +M: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> +L: dri-devel(a)lists.freedesktop.org +S: Maintained +F: drivers/gpu/drm/xlnx/ +F: Documentation/devicetree/bindings/display/xlnx/ +T: git git://anongit.freedesktop.org/drm/drm-misc + DRM DRIVERS FOR ZTE ZX M: Shawn Guo <shawnguo(a)kernel.org> L: dri-devel(a)lists.freedesktop.org diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index deeefa7..5a3ec66 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -289,6 +289,8 @@ source "drivers/gpu/drm/pl111/Kconfig" source "drivers/gpu/drm/tve200/Kconfig" +source "drivers/gpu/drm/xlnx/Kconfig" + # Keep legacy drivers last menuconfig DRM_LEGACY diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 50093ff..f93557e 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -103,3 +103,4 @@ obj-$(CONFIG_DRM_MXSFB) += mxsfb/ obj-$(CONFIG_DRM_TINYDRM) += tinydrm/ obj-$(CONFIG_DRM_PL111) += pl111/ obj-$(CONFIG_DRM_TVE200) += tve200/ +obj-$(CONFIG_DRM_XLNX) += xlnx/ diff --git a/drivers/gpu/drm/xlnx/Kconfig b/drivers/gpu/drm/xlnx/Kconfig new file mode 100644 index 0000000..19fd7cd --- /dev/null +++ b/drivers/gpu/drm/xlnx/Kconfig @@ -0,0 +1,12 @@ +config DRM_XLNX + tristate "Xilinx DRM KMS Driver" + depends on DRM && OF + select DRM_KMS_HELPER + select DRM_KMS_CMA_HELPER + select DRM_GEM_CMA_HELPER + help + Xilinx DRM KMS driver. Choose this option if you have + a Xilinx SoCs with hardened display pipeline or soft + display pipeline using Xilinx IPs in FPGA. This module + provides the kernel mode setting functionalities + for Xilinx display drivers. diff --git a/drivers/gpu/drm/xlnx/Makefile b/drivers/gpu/drm/xlnx/Makefile new file mode 100644 index 0000000..c60a281 --- /dev/null +++ b/drivers/gpu/drm/xlnx/Makefile @@ -0,0 +1,2 @@ +xlnx_drm-objs += xlnx_crtc.o xlnx_drv.o xlnx_fb.o xlnx_gem.o +obj-$(CONFIG_DRM_XLNX) += xlnx_drm.o diff --git a/drivers/gpu/drm/xlnx/xlnx_crtc.c b/drivers/gpu/drm/xlnx/xlnx_crtc.c new file mode 100644 index 0000000..06f1d70 --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_crtc.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx DRM crtc driver + * + * Copyright (C) 2017 - 2018 Xilinx, Inc. + * + * Author: Hyun Woo Kwon <hyun.kwon(a)xilinx.com> + */ + +#include <drm/drmP.h> + +#include "xlnx_crtc.h" +#include "xlnx_drv.h" + +/* + * Overview + * -------- + * + * The Xilinx CRTC layer is to enable the custom interface to CRTC drivers. + * The interface is used by Xilinx DRM driver where it needs CRTC + * functionality. CRTC drivers should attach the desired callbacks + * to struct xlnx_crtc and register the xlnx_crtc with corresponding + * drm_device. It's highly recommended CRTC drivers register all callbacks + * even though many of them are optional. + * The CRTC helper simply walks through the registered CRTC device, + * and calls the callbacks. + */ + +unsigned int xlnx_crtc_helper_get_align(struct xlnx_crtc_helper *helper) +{ + struct xlnx_crtc *crtc; + unsigned int align = 1; + + mutex_lock(&helper->lock); + list_for_each_entry(crtc, &helper->xlnx_crtcs, list) { + if (crtc->ops->get_align) + align = ALIGN(align, crtc->ops->get_align(crtc)); + } + mutex_unlock(&helper->lock); + + return align; +} + +u64 xlnx_crtc_helper_get_dma_mask(struct xlnx_crtc_helper *helper) +{ + struct xlnx_crtc *crtc; + u64 mask = DMA_BIT_MASK(sizeof(dma_addr_t) * 8); + + mutex_lock(&helper->lock); + list_for_each_entry(crtc, &helper->xlnx_crtcs, list) { + if (crtc->ops->get_dma_mask) + mask &= crtc->ops->get_dma_mask(crtc); + } + mutex_unlock(&helper->lock); + + return mask; +} + +int xlnx_crtc_helper_get_max_width(struct xlnx_crtc_helper *helper) +{ + struct xlnx_crtc *crtc; + int width = S32_MAX; + + mutex_lock(&helper->lock); + list_for_each_entry(crtc, &helper->xlnx_crtcs, list) { + if (crtc->ops->get_max_width) + width = min(width, crtc->ops->get_max_width(crtc)); + } + mutex_unlock(&helper->lock); + + return width; +} + +int xlnx_crtc_helper_get_max_height(struct xlnx_crtc_helper *helper) +{ + struct xlnx_crtc *crtc; + int height = S32_MAX; + + mutex_lock(&helper->lock); + list_for_each_entry(crtc, &helper->xlnx_crtcs, list) { + if (crtc->ops->get_max_height) + height = min(height, crtc->ops->get_max_height(crtc)); + } + mutex_unlock(&helper->lock); + + return height; +} + +u32 xlnx_crtc_helper_get_format(struct xlnx_crtc_helper *helper) +{ + struct xlnx_crtc *crtc; + u32 result = 0, format; + + mutex_lock(&helper->lock); + list_for_each_entry(crtc, &helper->xlnx_crtcs, list) { + if (crtc->ops->get_format) { + format = crtc->ops->get_format(crtc); + if (result && result != format) { + mutex_unlock(&helper->lock); + return 0; + } + result = format; + } + } + mutex_unlock(&helper->lock); + + return result; +} + +void xlnx_crtc_helper_init(struct xlnx_crtc_helper *helper) +{ + INIT_LIST_HEAD(&helper->xlnx_crtcs); + mutex_init(&helper->lock); +} + +void xlnx_crtc_helper_fini(struct xlnx_crtc_helper *helper) +{ + if (WARN_ON(!list_empty(&helper->xlnx_crtcs))) + return; + + mutex_destroy(&helper->lock); +} + +void xlnx_crtc_register(struct drm_device *drm, struct xlnx_crtc *crtc) +{ + struct xlnx_crtc_helper *helper = xlnx_get_crtc_helper(drm); + + mutex_lock(&helper->lock); + list_add_tail(&crtc->list, &helper->xlnx_crtcs); + mutex_unlock(&helper->lock); +} +EXPORT_SYMBOL_GPL(xlnx_crtc_register); + +void xlnx_crtc_unregister(struct drm_device *drm, struct xlnx_crtc *crtc) +{ + struct xlnx_crtc_helper *helper = xlnx_get_crtc_helper(drm); + + mutex_lock(&helper->lock); + list_del(&crtc->list); + mutex_unlock(&helper->lock); +} +EXPORT_SYMBOL_GPL(xlnx_crtc_unregister); diff --git a/drivers/gpu/drm/xlnx/xlnx_crtc.h b/drivers/gpu/drm/xlnx/xlnx_crtc.h new file mode 100644 index 0000000..a6b5f59 --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_crtc.h @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx DRM crtc header + * + * Copyright (C) 2017 - 2018 Xilinx, Inc. + * + * Author: Hyun Woo Kwon <hyun.kwon(a)xilinx.com> + */ + +#ifndef _XLNX_CRTC_H_ +#define _XLNX_CRTC_H_ + +#include <drm/drm_crtc.h> +#include <linux/list.h> +#include <linux/mutex.h> + +struct drm_device; +struct xlnx_crtc; + +/** + * struct xlnx_crtc_ops - Xilinx CRTC operations + * @get_align: Get the alignment requirement of CRTC device + * @get_dma_mask: Get the dma mask of CRTC device + * @get_max_width: Get the maximum supported width + * @get_max_height: Get the maximum supported height + * @get_format: Get the current format of CRTC device + */ +struct xlnx_crtc_ops { + unsigned int (*get_align)(struct xlnx_crtc *crtc); + u64 (*get_dma_mask)(struct xlnx_crtc *crtc); + int (*get_max_width)(struct xlnx_crtc *crtc); + int (*get_max_height)(struct xlnx_crtc *crtc); + u32 (*get_format)(struct xlnx_crtc *crtc); +}; + +/** + * struct xlnx_crtc - Xilinx CRTC device + * @crtc: DRM CRTC device + * @list: list node for Xilinx CRTC device list + * @ops: Xilinx CRTC ops + */ +struct xlnx_crtc { + struct drm_crtc crtc; + struct list_head list; + const struct xlnx_crtc_ops *ops; +}; + +static inline struct xlnx_crtc *to_xlnx_crtc(struct drm_crtc *crtc) +{ + return container_of(crtc, struct xlnx_crtc, crtc); +} + +/* + * Helper functions: used within Xlnx DRM + */ + +/** + * struct xlnx_crtc_helper - Xilinx CRTC helper + * @xlnx_crtcs: list of Xilinx CRTC devices + * @lock: lock to protect @xlnx_crtcs + */ +struct xlnx_crtc_helper { + struct list_head xlnx_crtcs; + struct mutex lock; /* lock for @xlnx_crtcs */ +}; + +unsigned int xlnx_crtc_helper_get_align(struct xlnx_crtc_helper *helper); +u64 xlnx_crtc_helper_get_dma_mask(struct xlnx_crtc_helper *helper); +int xlnx_crtc_helper_get_max_width(struct xlnx_crtc_helper *helper); +int xlnx_crtc_helper_get_max_height(struct xlnx_crtc_helper *helper); +u32 xlnx_crtc_helper_get_format(struct xlnx_crtc_helper *helper); + +void xlnx_crtc_helper_init(struct xlnx_crtc_helper *helper); +void xlnx_crtc_helper_fini(struct xlnx_crtc_helper *helper); + +/* + * CRTC registration: used by other sub-driver modules + */ + +void xlnx_crtc_register(struct drm_device *drm, struct xlnx_crtc *crtc); +void xlnx_crtc_unregister(struct drm_device *drm, struct xlnx_crtc *crtc); + +#endif /* _XLNX_CRTC_H_ */ diff --git a/drivers/gpu/drm/xlnx/xlnx_drv.c b/drivers/gpu/drm/xlnx/xlnx_drv.c new file mode 100644 index 0000000..8a2e6c8 --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_drv.c @@ -0,0 +1,430 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx DRM KMS Driver + * + * Copyright (C) 2013 - 2018 Xilinx, Inc. + * + * Author: Hyun Woo Kwon <hyun.kwon(a)xilinx.com> + */ + +#include <drm/drmP.h> +#include <drm/drm_atomic.h> +#include <drm/drm_atomic_helper.h> +#include <drm/drm_crtc_helper.h> +#include <drm/drm_fb_helper.h> +#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_of.h> + +#include <linux/component.h> +#include <linux/device.h> +#include <linux/dma-buf.h> +#include <linux/module.h> +#include <linux/of_graph.h> + +#include "xlnx_crtc.h" +#include "xlnx_fb.h" +#include "xlnx_gem.h" + +#define DRIVER_NAME "xlnx" +#define DRIVER_DESC "Xilinx DRM KMS Driver" +#define DRIVER_DATE "20130509" +#define DRIVER_MAJOR 1 +#define DRIVER_MINOR 0 + +/** + * struct xlnx_drm - Xilinx DRM private data + * @drm: DRM device + * @crtc_helper: Helper to access Xilinx CRTCs + * @fb: DRM fb helper + * @master: logical master device for pipeline + * @suspend_state: atomic state for suspend / resume + */ +struct xlnx_drm { + struct drm_device *drm; + struct xlnx_crtc_helper crtc_helper; + struct drm_fb_helper *fb; + struct device *master; + struct drm_atomic_state *suspend_state; +}; + +/** + * xlnx_get_crtc_helper - Return the crtc helper instance + * @drm: DRM device + * + * Return: the crtc helper instance + */ +struct xlnx_crtc_helper *xlnx_get_crtc_helper(struct drm_device *drm) +{ + struct xlnx_drm *xlnx_drm = drm->dev_private; + + return &xlnx_drm->crtc_helper; +} + +/** + * xlnx_get_align - Return the align requirement through CRTC helper + * @drm: DRM device + * + * Return: the alignment requirement + */ +unsigned int xlnx_get_align(struct drm_device *drm) +{ + struct xlnx_drm *xlnx_drm = drm->dev_private; + + return xlnx_crtc_helper_get_align(&xlnx_drm->crtc_helper); +} + +static void xlnx_output_poll_changed(struct drm_device *drm) +{ + struct xlnx_drm *xlnx_drm = drm->dev_private; + + if (xlnx_drm->fb) + drm_fb_helper_hotplug_event(xlnx_drm->fb); +} + +static const struct drm_mode_config_funcs xlnx_mode_config_funcs = { + .fb_create = xlnx_fb_create, + .output_poll_changed = xlnx_output_poll_changed, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = drm_atomic_helper_commit, +}; + +static void xlnx_mode_config_init(struct drm_device *drm) +{ + struct xlnx_drm *xlnx_drm = drm->dev_private; + struct xlnx_crtc_helper *crtc_helper = &xlnx_drm->crtc_helper; + + drm->mode_config.min_width = 0; + drm->mode_config.min_height = 0; + drm->mode_config.max_width = + xlnx_crtc_helper_get_max_width(crtc_helper); + drm->mode_config.max_height = + xlnx_crtc_helper_get_max_height(crtc_helper); +} + +static void xlnx_lastclose(struct drm_device *drm) +{ + struct xlnx_drm *xlnx_drm = drm->dev_private; + + if (xlnx_drm->fb) + drm_fb_helper_restore_fbdev_mode_unlocked(xlnx_drm->fb); +} + +static const struct file_operations xlnx_fops = { + .owner = THIS_MODULE, + .open = drm_open, + .release = drm_release, + .unlocked_ioctl = drm_ioctl, + .mmap = drm_gem_cma_mmap, + .poll = drm_poll, + .read = drm_read, +#ifdef CONFIG_COMPAT + .compat_ioctl = drm_compat_ioctl, +#endif + .llseek = noop_llseek, +}; + +static struct drm_driver xlnx_drm_driver = { + .driver_features = DRIVER_MODESET | DRIVER_GEM | + DRIVER_ATOMIC | DRIVER_PRIME, + .lastclose = xlnx_lastclose, + + .prime_handle_to_fd = drm_gem_prime_handle_to_fd, + .prime_fd_to_handle = drm_gem_prime_fd_to_handle, + .gem_prime_export = drm_gem_prime_export, + .gem_prime_import = drm_gem_prime_import, + .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, + .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, + .gem_prime_vmap = drm_gem_cma_prime_vmap, + .gem_prime_vunmap = drm_gem_cma_prime_vunmap, + .gem_prime_mmap = drm_gem_cma_prime_mmap, + .gem_free_object = drm_gem_cma_free_object, + .gem_vm_ops = &drm_gem_cma_vm_ops, + .dumb_create = xlnx_gem_cma_dumb_create, + .dumb_destroy = drm_gem_dumb_destroy, + + .fops = &xlnx_fops, + + .name = DRIVER_NAME, + .desc = DRIVER_DESC, + .date = DRIVER_DATE, + .major = DRIVER_MAJOR, + .minor = DRIVER_MINOR, +}; + +static int xlnx_bind(struct device *master) +{ + struct xlnx_drm *xlnx_drm; + struct drm_device *drm; + const struct drm_format_info *info; + int ret; + u32 format; + + drm = drm_dev_alloc(&xlnx_drm_driver, master->parent); + if (IS_ERR(drm)) + return PTR_ERR(drm); + + xlnx_drm = devm_kzalloc(drm->dev, sizeof(*xlnx_drm), GFP_KERNEL); + if (!xlnx_drm) { + ret = -ENOMEM; + goto err_drm; + } + + drm_mode_config_init(drm); + drm->mode_config.funcs = &xlnx_mode_config_funcs; + + ret = drm_vblank_init(drm, 1); + if (ret) { + dev_err(master->parent, "failed to initialize vblank\n"); + goto err_xlnx_drm; + } + + drm->irq_enabled = 1; + drm->dev_private = xlnx_drm; + xlnx_drm->drm = drm; + xlnx_drm->master = master; + drm_kms_helper_poll_init(drm); + dev_set_drvdata(master, xlnx_drm); + + xlnx_crtc_helper_init(&xlnx_drm->crtc_helper); + + ret = component_bind_all(master, drm); + if (ret) + goto err_crtc; + + xlnx_mode_config_init(drm); + drm_mode_config_reset(drm); + dma_set_mask(drm->dev, + xlnx_crtc_helper_get_dma_mask(&xlnx_drm->crtc_helper)); + + format = xlnx_crtc_helper_get_format(&xlnx_drm->crtc_helper); + info = drm_format_info(format); + if (info && info->depth && info->cpp[0]) { + unsigned int align; + + align = xlnx_crtc_helper_get_align(&xlnx_drm->crtc_helper); + xlnx_drm->fb = xlnx_fb_init(drm, info->cpp[0] * 8, 1, align); + if (IS_ERR(xlnx_drm->fb)) { + dev_err(master->parent, + "failed to initialize drm fb\n"); + xlnx_drm->fb = NULL; + } + } else { + /* fbdev emulation is optional */ + dev_info(master->parent, "fbdev is not initialized\n"); + } + + ret = drm_dev_register(drm, 0); + if (ret < 0) + goto err_fb; + + return 0; + +err_fb: + if (xlnx_drm->fb) + xlnx_fb_fini(xlnx_drm->fb); + component_unbind_all(drm->dev, drm); +err_crtc: + xlnx_crtc_helper_fini(&xlnx_drm->crtc_helper); +err_xlnx_drm: + drm_mode_config_cleanup(drm); +err_drm: + drm_dev_unref(drm); + return ret; +} + +static void xlnx_unbind(struct device *master) +{ + struct xlnx_drm *xlnx_drm = dev_get_drvdata(master); + struct drm_device *drm = xlnx_drm->drm; + + drm_dev_unregister(drm); + if (xlnx_drm->fb) + xlnx_fb_fini(xlnx_drm->fb); + component_unbind_all(master, drm); + xlnx_crtc_helper_fini(&xlnx_drm->crtc_helper); + drm_kms_helper_poll_fini(drm); + drm_mode_config_cleanup(drm); + drm_dev_unref(drm); +} + +static const struct component_master_ops xlnx_master_ops = { + .bind = xlnx_bind, + .unbind = xlnx_unbind, +}; + +static int xlnx_compare_of(struct device *dev, void *data) +{ + return dev->of_node == data; +} + +static int xlnx_probe(struct device *master_dev) +{ + struct device *dev = master_dev->parent; + struct component_match *match = NULL; + + if (!dev->of_node) + return -EINVAL; + + component_match_add(master_dev, &match, xlnx_compare_of, dev->of_node); + + return component_master_add_with_match(master_dev, &xlnx_master_ops, + match); +} + +static int xlnx_remove(struct device *dev) +{ + component_master_del(dev, &xlnx_master_ops); + return 0; +} + +static void xlnx_shutdown(struct device *dev) +{ + struct xlnx_drm *xlnx_drm = dev_get_drvdata(dev); + + drm_put_dev(xlnx_drm->drm); +} + +static int __maybe_unused xlnx_pm_suspend(struct device *dev) +{ + struct xlnx_drm *xlnx_drm = dev_get_drvdata(dev); + struct drm_device *drm = xlnx_drm->drm; + + drm_kms_helper_poll_disable(drm); + + xlnx_drm->suspend_state = drm_atomic_helper_suspend(drm); + if (IS_ERR(xlnx_drm->suspend_state)) { + drm_kms_helper_poll_enable(drm); + return PTR_ERR(xlnx_drm->suspend_state); + } + + return 0; +} + +static int __maybe_unused xlnx_pm_resume(struct device *dev) +{ + struct xlnx_drm *xlnx_drm = dev_get_drvdata(dev); + struct drm_device *drm = xlnx_drm->drm; + + drm_atomic_helper_resume(drm, xlnx_drm->suspend_state); + drm_kms_helper_poll_enable(drm); + + return 0; +} + +static const struct dev_pm_ops xlnx_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(xlnx_pm_suspend, xlnx_pm_resume) +}; + +static int xlnx_drv_bus_match(struct device *dev, struct device_driver *drv) +{ + return !strncmp(dev_name(dev), drv->name, strlen(drv->name)); +} + +struct bus_type xlnx_driver_bus_type = { + .name = "xlnx-drm-bus", + .match = &xlnx_drv_bus_match, +}; + +static struct device_driver xlnx_driver = { + .probe = xlnx_probe, + .remove = xlnx_remove, + .shutdown = xlnx_shutdown, + .name = "xlnx-drm", + .pm = &xlnx_pm_ops, + .bus = &xlnx_driver_bus_type, + .owner = THIS_MODULE, +}; + +/* bitmap for master id */ +static u32 xlnx_master_ids = GENMASK(31, 0); + +/** + * xlnx_drm_pipeline_init - Initialize the drm pipeline for the device + * @dev: The device to initialize the drm pipeline device + * + * This function initializes the drm pipeline device, struct drm_device, + * on @dev by creating a logical master device. The logical device acts + * as a master device to bind slave devices and represents the entire + * pipeline. + * The logical master uses the port bindings of the calling device to + * figure out the pipeline topology. + * + * Return: the logical master device if the drm device is initialized + * on @dev. Error code otherwise. + */ +struct device *xlnx_drm_pipeline_init(struct device *dev) +{ + struct device *master; + int id, ret; + + id = ffs(xlnx_master_ids); + if (!id) + return ERR_PTR(-ENOSPC); + + master = kzalloc(sizeof(*master), GFP_KERNEL); + if (!master) + return ERR_PTR(-ENOMEM); + device_initialize(master); + master->parent = dev; + master->bus = &xlnx_driver_bus_type; + + ret = dev_set_name(master, "xlnx-drm.%d", id); + if (ret) + goto err_kfree; + + ret = device_add(master); + if (ret) + goto err_kfree; + + xlnx_master_ids &= ~BIT(master->id); + return master; + +err_kfree: + kfree(master); + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(xlnx_drm_pipeline_init); + +/** + * xlnx_drm_pipeline_exit - Release the drm pipeline for the device + * @master: The master pipeline device to release + * + * Release the logical pipeline device returned by xlnx_drm_pipeline_init(). + */ +void xlnx_drm_pipeline_exit(struct device *master) +{ + xlnx_master_ids |= BIT(master->id); + device_unregister(master); + kfree(master); +} +EXPORT_SYMBOL_GPL(xlnx_drm_pipeline_exit); + +static int __init xlnx_drm_drv_init(void) +{ + int ret; + + ret = bus_register(&xlnx_driver_bus_type); + if (ret) + return ret; + + ret = driver_register(&xlnx_driver); + if (ret) { + bus_unregister(&xlnx_driver_bus_type); + return ret; + } + + return 0; +} + +static void __exit xlnx_drm_drv_exit(void) +{ + bus_unregister(&xlnx_driver_bus_type); + driver_unregister(&xlnx_driver); +} + +module_init(xlnx_drm_drv_init); +module_exit(xlnx_drm_drv_exit); + +MODULE_AUTHOR("Xilinx, Inc."); +MODULE_DESCRIPTION("Xilinx DRM KMS Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpu/drm/xlnx/xlnx_drv.h b/drivers/gpu/drm/xlnx/xlnx_drv.h new file mode 100644 index 0000000..b38ff2a --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_drv.h @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx DRM KMS Header for Xilinx + * + * Copyright (C) 2013 - 2018 Xilinx, Inc. + * + * Author: Hyun Woo Kwon <hyunk(a)xilinx.com> + */ + +#ifndef _XLNX_DRV_H_ +#define _XLNX_DRV_H_ + +struct device; +struct drm_device; +struct xlnx_crtc_helper; + +struct device *xlnx_drm_pipeline_init(struct device *parent); +void xlnx_drm_pipeline_exit(struct device *pipeline); + +unsigned int xlnx_get_align(struct drm_device *drm); +struct xlnx_crtc_helper *xlnx_get_crtc_helper(struct drm_device *drm); + +#endif /* _XLNX_DRV_H_ */ diff --git a/drivers/gpu/drm/xlnx/xlnx_fb.c b/drivers/gpu/drm/xlnx/xlnx_fb.c new file mode 100644 index 0000000..8e8ab14 --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_fb.c @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx DRM KMS Framebuffer helper + * + * Copyright (C) 2015 - 2018 Xilinx, Inc. + * + * Author: Hyun Woo Kwon <hyun.kwon(a)xilinx.com> + * + * Based on drm_fb_cma_helper.c + * + * Copyright (C) 2012 Analog Device Inc. + */ + +#include <drm/drmP.h> +#include <drm/drm_crtc.h> +#include <drm/drm_crtc_helper.h> +#include <drm/drm_fb_helper.h> +#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_framebuffer_helper.h> + +#include "xlnx_drv.h" +#include "xlnx_fb.h" + +#define XLNX_MAX_PLANES 4 + +struct xlnx_fbdev { + struct drm_fb_helper fb_helper; + struct drm_framebuffer *fb; + unsigned int align; +}; + +static inline struct xlnx_fbdev *to_fbdev(struct drm_fb_helper *fb_helper) +{ + return container_of(fb_helper, struct xlnx_fbdev, fb_helper); +} + +static const struct drm_framebuffer_funcs xlnx_fb_funcs = { + .destroy = drm_gem_fb_destroy, + .create_handle = drm_gem_fb_create_handle, +}; + +static struct fb_ops xlnx_fbdev_ops = { + .owner = THIS_MODULE, + .fb_fillrect = sys_fillrect, + .fb_copyarea = sys_copyarea, + .fb_imageblit = sys_imageblit, + DRM_FB_HELPER_DEFAULT_OPS, +}; + +/** + * xlnx_fbdev_create - Create the fbdev with a framebuffer + * @fb_helper: fb helper structure + * @size: framebuffer size info + * + * This function is based on drm_fbdev_cma_create(). + * + * Return: 0 if successful, or the error code. + */ +static int xlnx_fbdev_create(struct drm_fb_helper *fb_helper, + struct drm_fb_helper_surface_size *size) +{ + struct xlnx_fbdev *fbdev = to_fbdev(fb_helper); + struct drm_device *drm = fb_helper->dev; + struct drm_gem_cma_object *obj; + struct drm_framebuffer *fb; + unsigned int bytes_per_pixel; + unsigned long offset; + struct fb_info *fbi; + size_t bytes; + int ret; + + dev_dbg(drm->dev, "surface width(%d), height(%d) and bpp(%d)\n", + size->surface_width, size->surface_height, size->surface_bpp); + + bytes_per_pixel = DIV_ROUND_UP(size->surface_bpp, 8); + bytes = ALIGN(size->surface_width * bytes_per_pixel, fbdev->align); + bytes *= size->surface_height; + + obj = drm_gem_cma_create(drm, bytes); + if (IS_ERR(obj)) + return PTR_ERR(obj); + + fbi = framebuffer_alloc(0, drm->dev); + if (!fbi) { + dev_err(drm->dev, "Failed to allocate framebuffer info.\n"); + ret = -ENOMEM; + goto err_drm_gem_cma_free_object; + } + + fbdev->fb = drm_gem_fbdev_fb_create(drm, size, fbdev->align, &obj->base, + &xlnx_fb_funcs); + if (IS_ERR(fbdev->fb)) { + dev_err(drm->dev, "Failed to allocate DRM framebuffer.\n"); + ret = PTR_ERR(fbdev->fb); + goto err_framebuffer_release; + } + + fb = fbdev->fb; + fb_helper->fb = fb; + fb_helper->fbdev = fbi; + fbi->par = fb_helper; + fbi->flags = FBINFO_FLAG_DEFAULT; + fbi->fbops = &xlnx_fbdev_ops; + + ret = fb_alloc_cmap(&fbi->cmap, 256, 0); + if (ret) { + dev_err(drm->dev, "Failed to allocate color map.\n"); + goto err_fb_destroy; + } + + drm_fb_helper_fill_fix(fbi, fb->pitches[0], fb->format->depth); + drm_fb_helper_fill_var(fbi, fb_helper, size->fb_width, size->fb_height); + + offset = fbi->var.xoffset * bytes_per_pixel; + offset += fbi->var.yoffset * fb->pitches[0]; + + drm->mode_config.fb_base = (resource_size_t)obj->paddr; + fbi->screen_base = (char __iomem *)(obj->vaddr + offset); + fbi->fix.smem_start = (unsigned long)(obj->paddr + offset); + fbi->screen_size = bytes; + fbi->fix.smem_len = bytes; + + return 0; + +err_fb_destroy: + drm_framebuffer_unregister_private(fb); + drm_gem_fb_destroy(fb); +err_framebuffer_release: + framebuffer_release(fbi); +err_drm_gem_cma_free_object: + drm_gem_cma_free_object(&obj->base); + return ret; +} + +static const struct drm_fb_helper_funcs xlnx_fb_helper_funcs = { + .fb_probe = xlnx_fbdev_create, +}; + +/** + * xlnx_fb_init - Allocate and initializes the Xilinx framebuffer + * @drm: DRM device + * @preferred_bpp: preferred bits per pixel for the device + * @max_conn_count: maximum number of connectors + * @align: alignment value for pitch + * + * This function is based on drm_fbdev_cma_init(). + * + * Return: a newly allocated drm_fb_helper struct or a ERR_PTR. + */ +struct drm_fb_helper * +xlnx_fb_init(struct drm_device *drm, int preferred_bpp, + unsigned int max_conn_count, unsigned int align) +{ + struct xlnx_fbdev *fbdev; + struct drm_fb_helper *fb_helper; + int ret; + + fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL); + if (!fbdev) + return ERR_PTR(-ENOMEM); + + fbdev->align = align; + fb_helper = &fbdev->fb_helper; + drm_fb_helper_prepare(drm, fb_helper, &xlnx_fb_helper_funcs); + + ret = drm_fb_helper_init(drm, fb_helper, max_conn_count); + if (ret < 0) { + dev_err(drm->dev, "Failed to initialize drm fb helper.\n"); + goto err_free; + } + + ret = drm_fb_helper_single_add_all_connectors(fb_helper); + if (ret < 0) { + dev_err(drm->dev, "Failed to add connectors.\n"); + goto err_drm_fb_helper_fini; + } + + ret = drm_fb_helper_initial_config(fb_helper, preferred_bpp); + if (ret < 0) { + dev_err(drm->dev, "Failed to set initial hw configuration.\n"); + goto err_drm_fb_helper_fini; + } + + return fb_helper; + +err_drm_fb_helper_fini: + drm_fb_helper_fini(fb_helper); +err_free: + kfree(fbdev); + return ERR_PTR(ret); +} + +/** + * xlnx_fbdev_defio_fini - Free the defio fb + * @fbi: fb_info struct + * + * This function is based on drm_fbdev_cma_defio_fini(). + */ +static void xlnx_fbdev_defio_fini(struct fb_info *fbi) +{ + if (!fbi->fbdefio) + return; + + fb_deferred_io_cleanup(fbi); + kfree(fbi->fbdefio); + kfree(fbi->fbops); +} + +/** + * xlnx_fbdev_fini - Free the Xilinx framebuffer + * @fb_helper: drm_fb_helper struct + * + * This function is based on drm_fbdev_cma_fini(). + */ +void xlnx_fb_fini(struct drm_fb_helper *fb_helper) +{ + struct xlnx_fbdev *fbdev = to_fbdev(fb_helper); + + drm_fb_helper_unregister_fbi(&fbdev->fb_helper); + if (fbdev->fb_helper.fbdev) + xlnx_fbdev_defio_fini(fbdev->fb_helper.fbdev); + + if (fbdev->fb_helper.fb) + drm_framebuffer_remove(fbdev->fb_helper.fb); + + drm_fb_helper_fini(&fbdev->fb_helper); + kfree(fbdev); +} + +/** + * xlnx_fb_create - (struct drm_mode_config_funcs *)->fb_create callback + * @drm: DRM device + * @file_priv: drm file private data + * @mode_cmd: mode command for fb creation + * + * This functions creates a drm_framebuffer with xlnx_fb_funcs for given mode + * @mode_cmd. This functions is intended to be used for the fb_create callback + * function of drm_mode_config_funcs. + * + * Return: a drm_framebuffer object if successful, or + * ERR_PTR from drm_gem_fb_create_with_funcs(). + */ +struct drm_framebuffer * +xlnx_fb_create(struct drm_device *drm, struct drm_file *file_priv, + const struct drm_mode_fb_cmd2 *mode_cmd) +{ + return drm_gem_fb_create_with_funcs(drm, file_priv, mode_cmd, + &xlnx_fb_funcs); +} diff --git a/drivers/gpu/drm/xlnx/xlnx_fb.h b/drivers/gpu/drm/xlnx/xlnx_fb.h new file mode 100644 index 0000000..e41738e --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_fb.h @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx DRM KMS Framebuffer helper header + * + * Copyright (C) 2015 - 2018 Xilinx, Inc. + * + * Author: Hyun Woo Kwon <hyun.kwon(a)xilinx.com> + */ + +#ifndef _XLNX_FB_H_ +#define _XLNX_FB_H_ + +struct drm_device; +struct drm_file; +struct drm_fb_helper; +struct drm_framebuffer; +struct drm_mode_fb_cmd2; + +struct drm_framebuffer * +xlnx_fb_create(struct drm_device *drm, struct drm_file *file_priv, + const struct drm_mode_fb_cmd2 *mode_cmd); +struct drm_fb_helper * +xlnx_fb_init(struct drm_device *drm, int preferred_bpp, + unsigned int max_conn_count, unsigned int align); +void xlnx_fb_fini(struct drm_fb_helper *fb_helper); + +#endif /* _XLNX_FB_H_ */ diff --git a/drivers/gpu/drm/xlnx/xlnx_gem.c b/drivers/gpu/drm/xlnx/xlnx_gem.c new file mode 100644 index 0000000..6748dc1 --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_gem.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx DRM KMS GEM helper + * + * Copyright (C) 2015 - 2018 Xilinx, Inc. + * + * Author: Hyun Woo Kwon <hyun.kwon(a)xilinx.com> + */ + +#include <drm/drmP.h> +#include <drm/drm_gem_cma_helper.h> + +#include "xlnx_drv.h" +#include "xlnx_gem.h" + +/* + * xlnx_gem_cma_dumb_create - (struct drm_driver)->dumb_create callback + * @file_priv: drm_file object + * @drm: DRM object + * @args: info for dumb scanout buffer creation + * + * This function is for dumb_create callback of drm_driver struct. Simply + * it wraps around drm_gem_cma_dumb_create() and sets the pitch value + * by retrieving the value from the device. + * + * Return: The return value from drm_gem_cma_dumb_create() + */ +int xlnx_gem_cma_dumb_create(struct drm_file *file_priv, struct drm_device *drm, + struct drm_mode_create_dumb *args) +{ + unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8); + + args->pitch = ALIGN(pitch, xlnx_get_align(drm)); + + return drm_gem_cma_dumb_create_internal(file_priv, drm, args); +} diff --git a/drivers/gpu/drm/xlnx/xlnx_gem.h b/drivers/gpu/drm/xlnx/xlnx_gem.h new file mode 100644 index 0000000..3c9ed5f --- /dev/null +++ b/drivers/gpu/drm/xlnx/xlnx_gem.h @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx DRM KMS GEM helper header + * + * Copyright (C) 2015 - 2018 Xilinx, Inc. + * + * Author: Hyun Woo Kwon <hyun.kwon(a)xilinx.com> + */ + +#ifndef _XLNX_GEM_H_ +#define _XLNX_GEM_H_ + +struct drm_device; +struct drm_file; +struct drm_mode_create_dumb; + +int xlnx_gem_cma_dumb_create(struct drm_file *file_priv, + struct drm_device *drm, + struct drm_mode_create_dumb *args); + +#endif /* _XLNX_GEM_H_ */ -- 2.7.4

1 4

[PATCH v3 0/2] Chunk splitting of spi transfers
by Meghana Madhyastha 16 Mar '18

16 Mar '18

-Call spi_split_transfers_maxsize in __spi_pump_messages to split large chunks for spi dma transfers. -Remove chunk splitting in the tinydrm spi helper (as now the core is handling the chunk splitting). Changes in v3: -Remove max_chunk -Remove tinydrm_spi_max_transfer_size() -Change master->max_dma_len in patch 0/2 and explain why it is changed Meghana Madhyastha (2): spi: Split spi message into chunks of <65535 in the spi subsystem drm/tinydrm: Remove chunk splitting in tinydrm_spi_transfer drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c | 80 ++------------------------ drivers/gpu/drm/tinydrm/mipi-dbi.c | 10 +--- drivers/spi/spi-bcm2835.c | 22 +++---- 3 files changed, 16 insertions(+), 96 deletions(-) -- 2.11.0

2 3

[PATCH] drm/vc4_validate: Remove VLA usage
by Gustavo A. R. Silva 16 Mar '18

16 Mar '18

In preparation to enabling -Wvla, remove VLA. In this particular case use macro ARRAY_SIZE so the length of array _bo_ can be computed at preprocessing time. The use of stack Variable Length Arrays needs to be avoided, as they can be a vector for stack exhaustion, which can be both a runtime bug or a security flaw. Also, in general, as code evolves it is easy to lose track of how big a VLA can get. Thus, we can end up having runtime failures that are hard to debug. Also, fixed as part of the directive to remove all VLAs from the kernel: https://lkml.org/lkml/2018/3/7/621 Signed-off-by: Gustavo A. R. Silva <gustavo(a)embeddedor.com> --- drivers/gpu/drm/vc4/vc4_validate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vc4/vc4_validate.c b/drivers/gpu/drm/vc4/vc4_validate.c index 2db485a..eec76af 100644 --- a/drivers/gpu/drm/vc4/vc4_validate.c +++ b/drivers/gpu/drm/vc4/vc4_validate.c @@ -753,7 +753,7 @@ validate_gl_shader_rec(struct drm_device *dev, 28, /* cs */ }; uint32_t shader_reloc_count = ARRAY_SIZE(shader_reloc_offsets); - struct drm_gem_cma_object *bo[shader_reloc_count + 8]; + struct drm_gem_cma_object *bo[ARRAY_SIZE(shader_reloc_offsets) + 8]; uint32_t nr_attributes, nr_relocs, packet_size; int i; -- 2.7.4

2 1

[PATCH 1/3] drm: Add the optional .fb_modifier() hook
by Ville Syrjala 16 Mar '18

16 Mar '18

From: Ville Syrjälä <ville.syrjala(a)linux.intel.com> To make it possible for the core to check the fb pixel format and modifier, we need to first ask the driver to deduce the modifier when the request does not explicitly specify one. Add a new .fb_modifier() hook for that purpose and convert i915 and vc4 to make use if it. All other drivers seem to currently assume linear when the request does not specify anything else, hence we make the core use that as the fallback strategy when the hook is not provided. Since the two hooks are now separate it is of course possible to race set_tiling against addfb. But since that's just userspace intentially shooting itself in the foot I don't think we should hve to worry about it. The addfb will simply fail in the .fb_create() hook if the tiling has changed since .fb_mofifier() was called. Well, that's the case for i915. vc4 never did any cross checks between the tiling and modifier. framebuffer_check() now checks the request against the deduced modifier, and since we now know the final modifier we can convert the request to one with modifiers. This means that a driver will never even have to look at a request without modifiers outside of the .fb_modifuer() hook, should it need to provide one. Cc: Eric Anholt <eric(a)anholt.net> Signed-off-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> --- drivers/gpu/drm/drm_framebuffer.c | 61 +++++++++++++++++++++-------- drivers/gpu/drm/i915/intel_display.c | 74 ++++++++++++++++++++++++------------ drivers/gpu/drm/i915/intel_drv.h | 2 +- drivers/gpu/drm/i915/intel_fbdev.c | 2 + drivers/gpu/drm/vc4/vc4_kms.c | 57 +++++++++++---------------- include/drm/drm_mode_config.h | 29 ++++++++++++++ 6 files changed, 150 insertions(+), 75 deletions(-) diff --git a/drivers/gpu/drm/drm_framebuffer.c b/drivers/gpu/drm/drm_framebuffer.c index 7df025669067..21d3d51eb261 100644 --- a/drivers/gpu/drm/drm_framebuffer.c +++ b/drivers/gpu/drm/drm_framebuffer.c @@ -153,7 +153,8 @@ static int fb_plane_height(int height, } static int framebuffer_check(struct drm_device *dev, - const struct drm_mode_fb_cmd2 *r) + struct drm_mode_fb_cmd2 *r, + u64 modifier) { const struct drm_format_info *info; int i; @@ -210,14 +211,14 @@ static int framebuffer_check(struct drm_device *dev, } if (r->flags & DRM_MODE_FB_MODIFIERS && - r->modifier[i] != r->modifier[0]) { + r->modifier[i] != modifier) { DRM_DEBUG_KMS("bad fb modifier %llu for plane %d\n", r->modifier[i], i); return -EINVAL; } /* modifier specific checks: */ - switch (r->modifier[i]) { + switch (modifier) { case DRM_FORMAT_MOD_SAMSUNG_64_32_TILE: /* NOTE: the pitch restriction may be lifted later if it turns * out that no hw has this restriction: @@ -261,45 +262,73 @@ static int framebuffer_check(struct drm_device *dev, } } + /* + * Finally convert the request into one with + * modifiers to make life easier for drivers. + */ + if (dev->mode_config.allow_fb_modifiers) { + r->flags |= DRM_MODE_FB_MODIFIERS; + + for (i = 0; i < info->num_planes; i++) + r->modifier[i] = modifier; + } + return 0; } struct drm_framebuffer * drm_internal_framebuffer_create(struct drm_device *dev, - const struct drm_mode_fb_cmd2 *r, + const struct drm_mode_fb_cmd2 *user_r, struct drm_file *file_priv) { struct drm_mode_config *config = &dev->mode_config; + struct drm_mode_fb_cmd2 r = *user_r; struct drm_framebuffer *fb; + u64 modifier = 0; int ret; - if (r->flags & ~(DRM_MODE_FB_INTERLACED | DRM_MODE_FB_MODIFIERS)) { - DRM_DEBUG_KMS("bad framebuffer flags 0x%08x\n", r->flags); + if (r.flags & ~(DRM_MODE_FB_INTERLACED | DRM_MODE_FB_MODIFIERS)) { + DRM_DEBUG_KMS("bad framebuffer flags 0x%08x\n", r.flags); return ERR_PTR(-EINVAL); } - if ((config->min_width > r->width) || (r->width > config->max_width)) { + if (config->min_width > r.width || r.width > config->max_width) { DRM_DEBUG_KMS("bad framebuffer width %d, should be >= %d && <= %d\n", - r->width, config->min_width, config->max_width); + r.width, config->min_width, config->max_width); return ERR_PTR(-EINVAL); } - if ((config->min_height > r->height) || (r->height > config->max_height)) { + if (config->min_height > r.height || r.height > config->max_height) { DRM_DEBUG_KMS("bad framebuffer height %d, should be >= %d && <= %d\n", - r->height, config->min_height, config->max_height); + r.height, config->min_height, config->max_height); return ERR_PTR(-EINVAL); } - if (r->flags & DRM_MODE_FB_MODIFIERS && - !dev->mode_config.allow_fb_modifiers) { - DRM_DEBUG_KMS("driver does not support fb modifiers\n"); - return ERR_PTR(-EINVAL); + if (r.flags & DRM_MODE_FB_MODIFIERS) { + if (!dev->mode_config.allow_fb_modifiers) { + DRM_DEBUG_KMS("driver does not support fb modifiers\n"); + return ERR_PTR(-EINVAL); + } + + modifier = r.modifier[0]; + } else { + if (dev->mode_config.funcs->fb_modifier) { + ret = dev->mode_config.funcs->fb_modifier(dev, file_priv, + &r, &modifier); + if (ret) { + DRM_DEBUG_KMS("driver did not deduce the fb modifier\n"); + return ERR_PTR(ret); + } + } else { + /* assume linear if the driver doesn't say otherwise */ + modifier = DRM_FORMAT_MOD_LINEAR; + } } - ret = framebuffer_check(dev, r); + ret = framebuffer_check(dev, &r, modifier); if (ret) return ERR_PTR(ret); - fb = dev->mode_config.funcs->fb_create(dev, file_priv, r); + fb = dev->mode_config.funcs->fb_create(dev, file_priv, &r); if (IS_ERR(fb)) { DRM_DEBUG_KMS("could not create framebuffer\n"); return fb; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2933ad38094f..51d8d0c40674 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -123,7 +123,7 @@ static void ironlake_pch_clock_get(struct intel_crtc *crtc, static int intel_framebuffer_init(struct intel_framebuffer *ifb, struct drm_i915_gem_object *obj, - struct drm_mode_fb_cmd2 *mode_cmd); + const struct drm_mode_fb_cmd2 *mode_cmd); static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc); static void intel_set_pipe_timings(struct intel_crtc *intel_crtc); static void intel_set_pipe_src_size(struct intel_crtc *intel_crtc); @@ -9807,7 +9807,7 @@ static const struct drm_display_mode load_detect_mode = { struct drm_framebuffer * intel_framebuffer_create(struct drm_i915_gem_object *obj, - struct drm_mode_fb_cmd2 *mode_cmd) + const struct drm_mode_fb_cmd2 *mode_cmd) { struct intel_framebuffer *intel_fb; int ret; @@ -13985,7 +13985,7 @@ u32 intel_fb_pitch_limit(struct drm_i915_private *dev_priv, static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, struct drm_i915_gem_object *obj, - struct drm_mode_fb_cmd2 *mode_cmd) + const struct drm_mode_fb_cmd2 *mode_cmd) { struct drm_i915_private *dev_priv = to_i915(obj->base.dev); struct drm_framebuffer *fb = &intel_fb->base; @@ -13995,29 +13995,23 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, int ret = -EINVAL; int i; + if (WARN_ON((mode_cmd->flags & DRM_MODE_FB_MODIFIERS) == 0)) + return -EINVAL; + i915_gem_object_lock(obj); obj->framebuffer_references++; tiling = i915_gem_object_get_tiling(obj); stride = i915_gem_object_get_stride(obj); i915_gem_object_unlock(obj); - if (mode_cmd->flags & DRM_MODE_FB_MODIFIERS) { - /* - * If there's a fence, enforce that - * the fb modifier and tiling mode match. - */ - if (tiling != I915_TILING_NONE && - tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { - DRM_DEBUG_KMS("tiling_mode doesn't match fb modifier\n"); - goto err; - } - } else { - if (tiling == I915_TILING_X) { - mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED; - } else if (tiling == I915_TILING_Y) { - DRM_DEBUG_KMS("No Y tiling for legacy addfb\n"); - goto err; - } + /* + * If there's a fence, enforce that + * the fb modifier and tiling mode match. + */ + if (tiling != I915_TILING_NONE && + tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { + DRM_DEBUG_KMS("tiling_mode doesn't match fb modifier\n"); + goto err; } /* Passed in modifier sanity checking. */ @@ -14193,20 +14187,51 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, return ret; } +static int +intel_user_framebuffer_modifier(struct drm_device *dev, + struct drm_file *filp, + const struct drm_mode_fb_cmd2 *mode_cmd, + u64 *modifier) +{ + struct drm_i915_gem_object *obj; + unsigned int tiling; + + obj = i915_gem_object_lookup(filp, mode_cmd->handles[0]); + if (!obj) + return -ENOENT; + + i915_gem_object_lock(obj); + tiling = i915_gem_object_get_tiling(obj); + i915_gem_object_unlock(obj); + + i915_gem_object_put(obj); + + if (tiling == I915_TILING_Y) { + DRM_DEBUG_KMS("No Y tiling for legacy addfb\n"); + return -EINVAL; + } + + if (tiling == I915_TILING_X) + *modifier = I915_FORMAT_MOD_X_TILED; + else + *modifier = DRM_FORMAT_MOD_LINEAR; + + return 0; +} + static struct drm_framebuffer * intel_user_framebuffer_create(struct drm_device *dev, struct drm_file *filp, - const struct drm_mode_fb_cmd2 *user_mode_cmd) + const struct drm_mode_fb_cmd2 *mode_cmd) { struct drm_framebuffer *fb; struct drm_i915_gem_object *obj; - struct drm_mode_fb_cmd2 mode_cmd = *user_mode_cmd; - obj = i915_gem_object_lookup(filp, mode_cmd.handles[0]); + obj = i915_gem_object_lookup(filp, mode_cmd->handles[0]); if (!obj) return ERR_PTR(-ENOENT); - fb = intel_framebuffer_create(obj, &mode_cmd); + fb = intel_framebuffer_create(obj, mode_cmd); if (IS_ERR(fb)) i915_gem_object_put(obj); @@ -14251,6 +14276,7 @@ intel_mode_valid(struct drm_device *dev, } static const struct drm_mode_config_funcs intel_mode_funcs = { + .fb_modifier = intel_user_framebuffer_modifier, .fb_create = intel_user_framebuffer_create, .get_format_info = intel_get_format_info, .output_poll_changed = intel_fbdev_output_poll_changed, diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index fce5d3072d97..678755297814 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1517,7 +1517,7 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags); struct drm_framebuffer * intel_framebuffer_create(struct drm_i915_gem_object *obj, - struct drm_mode_fb_cmd2 *mode_cmd); + const struct drm_mode_fb_cmd2 *mode_cmd); int intel_prepare_plane_fb(struct drm_plane *plane, struct drm_plane_state *new_state); void intel_cleanup_plane_fb(struct drm_plane *plane, diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index 6f12adc06365..777f5bfbe8ef 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c @@ -131,6 +131,8 @@ static int intelfb_alloc(struct drm_fb_helper *helper, DIV_ROUND_UP(sizes->surface_bpp, 8), 64); mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth); + mode_cmd.modifier[0] = DRM_FORMAT_MOD_LINEAR; + mode_cmd.flags = DRM_MODE_FB_MODIFIERS; size = mode_cmd.pitches[0] * mode_cmd.height; size = PAGE_ALIGN(size); diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c index ba60153dddb5..a8aed12db578 100644 --- a/drivers/gpu/drm/vc4/vc4_kms.c +++ b/drivers/gpu/drm/vc4/vc4_kms.c @@ -148,50 +148,39 @@ static int vc4_atomic_commit(struct drm_device *dev, return 0; } -static struct drm_framebuffer *vc4_fb_create(struct drm_device *dev, - struct drm_file *file_priv, - const struct drm_mode_fb_cmd2 *mode_cmd) +static int vc4_fb_modifier(struct drm_device *dev, + struct drm_file *file_priv, + const struct drm_mode_fb_cmd2 *mode_cmd, + u64 *modifier) { - struct drm_mode_fb_cmd2 mode_cmd_local; - - /* If the user didn't specify a modifier, use the - * vc4_set_tiling_ioctl() state for the BO. - */ - if (!(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) { - struct drm_gem_object *gem_obj; - struct vc4_bo *bo; - - gem_obj = drm_gem_object_lookup(file_priv, - mode_cmd->handles[0]); - if (!gem_obj) { - DRM_DEBUG("Failed to look up GEM BO %d\n", - mode_cmd->handles[0]); - return ERR_PTR(-ENOENT); - } - bo = to_vc4_bo(gem_obj); - - mode_cmd_local = *mode_cmd; - - if (bo->t_format) { - mode_cmd_local.modifier[0] = - DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED; - } else { - mode_cmd_local.modifier[0] = DRM_FORMAT_MOD_NONE; - } + struct drm_gem_object *gem_obj; + struct vc4_bo *bo; + + gem_obj = drm_gem_object_lookup(file_priv, + mode_cmd->handles[0]); + if (!gem_obj) { + DRM_DEBUG("Failed to look up GEM BO %d\n", + mode_cmd->handles[0]); + return -ENOENT; + } + bo = to_vc4_bo(gem_obj); - drm_gem_object_put_unlocked(gem_obj); + if (bo->t_format) + *modifier = DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED; + else + *modifier = DRM_FORMAT_MOD_LINEAR; - mode_cmd = &mode_cmd_local; - } + drm_gem_object_put_unlocked(gem_obj); - return drm_gem_fb_create(dev, file_priv, mode_cmd); + return 0; } static const struct drm_mode_config_funcs vc4_mode_funcs = { .output_poll_changed = drm_fb_helper_output_poll_changed, .atomic_check = drm_atomic_helper_check, .atomic_commit = vc4_atomic_commit, - .fb_create = vc4_fb_create, + .fb_modifier = vc4_fb_modifier, + .fb_create = drm_gem_fb_create, }; int vc4_kms_load(struct drm_device *dev) diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 7569f22ffef6..c74aed292b58 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -45,6 +45,30 @@ struct drm_display_mode; * involve drivers. */ struct drm_mode_config_funcs { + /** + * @fb_modifier: + * + * Deduce the format modifier using a driver specific method. This + * gets called when the request does not explicitly state the + * modifier, ie. (@mode_cmd->flags & DRM_MODE_FB_MODIFIERS) == 0. + * The deduced modifier is returned via @modifier. + * + * Once the modifier is known several sanity checks will be performed + * and if all is deemed valid @fb_create() will be called to have + * the driver to actually create the framebuffer. + * + * This hook is optional. The core will assume DRM_FORMAT_MOD_LINEAR + * if the hook is not provided by the driver. + * + * RETURNS: + * + * Zero on success, negative error code on failure. + */ + int (*fb_modifier)(struct drm_device *dev, + struct drm_file *file_priv, + const struct drm_mode_fb_cmd2 *mode_cmd, + u64 *modifier); + /** * @fb_create: * @@ -52,6 +76,11 @@ struct drm_mode_config_funcs { * requested metadata, but most of that is left to the driver. See * &struct drm_mode_fb_cmd2 for details. * + * Note that for drivers that support modifiers, the core will convert + * all requests to one with modifiers. So the driver does not need to + * worry about requests without modifiers (apart from having to provide + * the @fb_modifier() hook if necessary). + * * If the parameters are deemed valid and the backing storage objects in * the underlying memory manager all exist, then the driver allocates * a new &drm_framebuffer structure, subclassed to contain -- 2.16.1

5 14

[PATCH] drm/vc4: Add support for SAND modifier.
by Eric Anholt 16 Mar '18

16 Mar '18

From: Dave Stevenson <dave.stevenson(a)raspberrypi.org> This is the format generated by VC4's H.264 engine, and preferred by the ISP as well. By displaying SAND buffers directly, we can avoid needing to use the ISP to rewrite the SAND H.264 output to linear before display. This is a joint effort by Dave Stevenson (who wrote the initial patch and DRM demo) and Eric Anholt (drm_fourcc.h generalization, safety checks, RGBA support). Signed-off-by: Dave Stevenson <dave.stevenson(a)raspberrypi.org> Signed-off-by: Eric Anholt <eric(a)anholt.net> Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Daniel Stone <daniels(a)collabora.com> Cc: Boris Brezillon <boris.brezillon(a)bootlin.com> Cc: Maxime Ripard <maxime.ripard(a)bootlin.com> --- Ccing a couple of folks who are likely to have opinions about drm_fourcc.h additions (Do we have enough docs? Are the macros OK?), and Bootlin who are likely reviewers. The plan is to use these modifiers in VC4 GL imports as well, and for buffers coming from the v4l2 mmal camera driver. You can find a demo using this in KMS planes at https://github.com/anholt/drm_mmal/commit/sand for now. drivers/gpu/drm/vc4/vc4_plane.c | 84 +++++++++++++++++++++++++++++++++++++---- drivers/gpu/drm/vc4/vc4_regs.h | 6 +++ include/uapi/drm/drm_fourcc.h | 59 +++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index c4c7af11fec5..97de9c7821c7 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -520,10 +520,12 @@ static int vc4_plane_mode_set(struct drm_plane *plane, struct drm_framebuffer *fb = state->fb; u32 ctl0_offset = vc4_state->dlist_count; const struct hvs_format *format = vc4_get_hvs_format(fb->format->format); + u64 base_format_mod = fourcc_mod_broadcom_mod(fb->modifier); int num_planes = drm_format_num_planes(format->drm); u32 scl0, scl1, pitch0; u32 lbm_size, tiling; unsigned long irqflags; + u32 hvs_format = format->hvs; int ret, i; ret = vc4_plane_setup_clipping_and_scaling(state); @@ -563,7 +565,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, scl1 = vc4_get_scl_field(state, 0); } - switch (fb->modifier) { + switch (base_format_mod) { case DRM_FORMAT_MOD_LINEAR: tiling = SCALER_CTL0_TILING_LINEAR; pitch0 = VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH); @@ -586,6 +588,49 @@ static int vc4_plane_mode_set(struct drm_plane *plane, break; } + case DRM_FORMAT_MOD_BROADCOM_SAND64: + case DRM_FORMAT_MOD_BROADCOM_SAND128: + case DRM_FORMAT_MOD_BROADCOM_SAND256: { + uint32_t param = fourcc_mod_broadcom_param(fb->modifier); + + /* Column-based NV12 or RGBA. + */ + if (fb->format->num_planes > 1) { + if (hvs_format != HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE) { + DRM_DEBUG_KMS("SAND format only valid for NV12/21"); + return -EINVAL; + } + hvs_format = HVS_PIXEL_FORMAT_H264; + } else { + if (base_format_mod == DRM_FORMAT_MOD_BROADCOM_SAND256) { + DRM_DEBUG_KMS("SAND256 format only valid for H.264"); + return -EINVAL; + } + } + + switch (base_format_mod) { + case DRM_FORMAT_MOD_BROADCOM_SAND64: + tiling = SCALER_CTL0_TILING_64B; + break; + case DRM_FORMAT_MOD_BROADCOM_SAND128: + tiling = SCALER_CTL0_TILING_128B; + break; + case DRM_FORMAT_MOD_BROADCOM_SAND256: + tiling = SCALER_CTL0_TILING_256B_OR_T; + break; + default: + break; + } + + if (param > SCALER_TILE_HEIGHT_MASK) { + DRM_DEBUG_KMS("SAND height too large (%d)\n", param); + return -EINVAL; + } + + pitch0 = VC4_SET_FIELD(param, SCALER_TILE_HEIGHT); + break; + } + default: DRM_DEBUG_KMS("Unsupported FB tiling flag 0x%16llx", (long long)fb->modifier); @@ -596,7 +641,7 @@ static int vc4_plane_mode_set(struct drm_plane *plane, vc4_dlist_write(vc4_state, SCALER_CTL0_VALID | (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) | - (format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) | + (hvs_format << SCALER_CTL0_PIXEL_FORMAT_SHIFT) | VC4_SET_FIELD(tiling, SCALER_CTL0_TILING) | (vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) | VC4_SET_FIELD(scl0, SCALER_CTL0_SCL0) | @@ -649,8 +694,13 @@ static int vc4_plane_mode_set(struct drm_plane *plane, /* Pitch word 1/2 */ for (i = 1; i < num_planes; i++) { - vc4_dlist_write(vc4_state, - VC4_SET_FIELD(fb->pitches[i], SCALER_SRC_PITCH)); + if (hvs_format != HVS_PIXEL_FORMAT_H264) { + vc4_dlist_write(vc4_state, + VC4_SET_FIELD(fb->pitches[i], + SCALER_SRC_PITCH)); + } else { + vc4_dlist_write(vc4_state, pitch0); + } } /* Colorspace conversion words */ @@ -920,11 +970,28 @@ static bool vc4_format_mod_supported(struct drm_plane *plane, case DRM_FORMAT_BGR565: case DRM_FORMAT_ARGB1555: case DRM_FORMAT_XRGB1555: - return true; - case DRM_FORMAT_YUV422: - case DRM_FORMAT_YVU422: + switch (fourcc_mod_broadcom_mod(modifier)) { + case DRM_FORMAT_MOD_LINEAR: + case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: + case DRM_FORMAT_MOD_BROADCOM_SAND64: + case DRM_FORMAT_MOD_BROADCOM_SAND128: + return true; + default: + return false; + } case DRM_FORMAT_YUV420: case DRM_FORMAT_YVU420: + switch (fourcc_mod_broadcom_mod(modifier)) { + case DRM_FORMAT_MOD_LINEAR: + case DRM_FORMAT_MOD_BROADCOM_SAND64: + case DRM_FORMAT_MOD_BROADCOM_SAND128: + case DRM_FORMAT_MOD_BROADCOM_SAND256: + return true; + default: + return false; + } + case DRM_FORMAT_YUV422: + case DRM_FORMAT_YVU422: case DRM_FORMAT_NV12: case DRM_FORMAT_NV16: default: @@ -954,6 +1021,9 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev, unsigned i; static const uint64_t modifiers[] = { DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED, + DRM_FORMAT_MOD_BROADCOM_SAND128, + DRM_FORMAT_MOD_BROADCOM_SAND64, + DRM_FORMAT_MOD_BROADCOM_SAND256, DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_MOD_INVALID }; diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index ce8bb7486456..00d2d90069b0 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -1029,6 +1029,12 @@ enum hvs_pixel_format { #define SCALER_SRC_PITCH_MASK VC4_MASK(15, 0) #define SCALER_SRC_PITCH_SHIFT 0 +/* PITCH0/1/2 fields for tiled (SAND). */ +#define SCALER_TILE_SKIP_0_MASK VC4_MASK(18, 16) +#define SCALER_TILE_SKIP_0_SHIFT 16 +#define SCALER_TILE_HEIGHT_MASK VC4_MASK(15, 0) +#define SCALER_TILE_HEIGHT_SHIFT 0 + /* PITCH0 fields for T-tiled. */ #define SCALER_PITCH0_TILE_WIDTH_L_MASK VC4_MASK(22, 16) #define SCALER_PITCH0_TILE_WIDTH_L_SHIFT 16 diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index e04613d30a13..f6b7aab3dab1 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -384,6 +384,23 @@ extern "C" { #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB \ fourcc_mod_code(NVIDIA, 0x15) +/* + * Some Broadcom modifiers take parameters, for example the number of + * vertical lines in the image. Reserve the lower 32 bits for modifier + * type, and the next 24 bits for parameters. Top 8 bits are the + * vendor code. + */ +#define __fourcc_mod_broadcom_param_shift 32 +#define __fourcc_mod_broadcom_param_bits 24 +#define fourcc_mod_broadcom_code(val, params) \ + fourcc_mod_code(BROADCOM, ((((__u64)params) << __fourcc_mod_broadcom_param_shift) | val)) +#define fourcc_mod_broadcom_param(m) \ + ((int)(((m) >> __fourcc_mod_broadcom_param_shift) & \ + ((1ULL << __fourcc_mod_broadcom_param_bits) - 1))) +#define fourcc_mod_broadcom_mod(m) \ + ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_shift) - 1) << \ + __fourcc_mod_broadcom_param_bits)) + /* * Broadcom VC4 "T" format * @@ -405,6 +422,48 @@ extern "C" { */ #define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1) +/* + * Broadcom SAND format + * + * This is the native format that the H.264 codec block uses. For VC4 + * HVS, it is only valid for H.264 (NV12/21) and RGBA modes. + * + * The image can be considered to be split into columns, and the + * columns are placed consecutively into memory. The width of those + * columns can be either 32, 64, 128, or 256 pixels, but in practice + * only 128 pixel columns are used. + * + * The pitch between the start of each column is set to optimally + * switch between SDRAM banks. This is passed as the number of lines + * of column width in the modifier (we can't use the stride value due + * to various core checks that look at it , so you should set the + * stride to width*cpp). + * + * Note that the column height for this format modifier is the same + * for all of the planes, assuming that each column contains both Y + * and UV. Some SAND-using hardware stores UV in a separate tiled + * image from Y to reduce the column height, which is not supported + * with these modifiers. + */ + +#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ + fourcc_mod_broadcom_code(2, v) +#define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) \ + fourcc_mod_broadcom_code(3, v) +#define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) \ + fourcc_mod_broadcom_code(4, v) +#define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) \ + fourcc_mod_broadcom_code(5, v) + +#define DRM_FORMAT_MOD_BROADCOM_SAND32 \ + DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(0) +#define DRM_FORMAT_MOD_BROADCOM_SAND64 \ + DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(0) +#define DRM_FORMAT_MOD_BROADCOM_SAND128 \ + DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(0) +#define DRM_FORMAT_MOD_BROADCOM_SAND256 \ + DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(0) + #if defined(__cplusplus) } #endif -- 2.16.2

2 2

[pull] radeon, amdgpu, amd ttm drm-next-4.17
by Alex Deucher 16 Mar '18

16 Mar '18

Hi Dave, Updates for 4.17. Highlights: - Continued cleanup and restructuring of powerplay - Fetch VRAM type from vbios rather than hardcoding for SOC15 asics - Allow ttm to drop its backing store when drivers don't need it - DC bandwidth calc updates - Enable DC backlight control pre-DCE11 asics - Enable DC on all supported asics - DC Fixes for planes due to the way our hw is ordered vs what drm expects - DC CTM/regamma fixes - Misc cleanup and bug fixes The following changes since commit 963976cfe9c54d4d9e725e61c90c47a4af6b5ea2: Merge tag 'drm-intel-next-2018-03-08' of git://anongit.freedesktop.org/drm/drm-intel into drm-next (2018-03-14 14:53:01 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-next-4.17 for you to fetch changes up to 6da2b9332c572fcda94de9631f8fa514f574388a: amdgpu/dm: Default PRE_VEGA ASIC support to 'y' (2018-03-16 16:16:50 -0500) ---------------------------------------------------------------- Alex Deucher (9): drm/amdgpu: save/restore backlight level in legacy dce code drm/amdgpu/psp: add a few more fw load type checks drm/amdgpu: move firmware loading type setup to common code drm/amdgpu: use adev->firmware to determine whether to load the PSP module drm/amdgpu/soc15: always load the psp module drm/amdgpu: move getting pcie info to common code drm/amdgpu/powerplay/vega10: fix memory leak in error path drm/amdgpu: remove trailing whitespace from soc15ip.h drm/amdgpu/sdma4: use num_instances for clock/powergating config Andrey Grodzovsky (2): drm/amd/powerplay: Fix KASAN user after free on driver unload. drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel Anthony Koo (2): drm/amd/display: Implement stats logging drm/amd/display: Add variable refresh rate parameters to DC structures Bhawanpreet Lakha (3): drm/amd/display: Fix takover from VGA mode drm/amd/display: Move DTRACE and dml_print defines drm/amd/display: Use MACROS instead of dm_logger Christian König (11): drm/ttm: move ttm_tt defines into ttm_tt.h drm/ttm: add ttm_sg_tt_init drm/amdgpu: stop allocating a page array for prime shared BOs drm/ttm: add ttm_bo_pipeline_gutting drm/ttm: add bo as parameter to the ttm_tt_create callback drm/ttm: move initializing ttm->sg into ttm_tt_init_fields drm/amdgpu: drop the backing store when DMA-buf imports are evicted drm/amdgpu: initial validate the prime BOs into the CPU domain drm/amdgpu: explicit give BO type to amdgpu_bo_create drm/amdgpu: fix prime teardown order drm/radeon: fix prime teardown order Clark Zheng (1): drm/amd/display: Refine disable VGA Colin Ian King (1): drm/amd/pp: remove redundant pointer internal_buf Dmytro Laktyushkin (2): drm/amd/display: update dce_calcs to latest version drm/amd/display: clean up dcn pplib notification call Emily Deng (2): drm/amdgpu: Correct the place of amdgpu_pm_sysfs_fini drm/amdgpu: Correct the amdgpu_ucode_fini_bo place for Tonga Eric Yang (2): drm/amd/display: fix check condition for edp power control drm/amd/display: early return if not in vga mode in disable_vga Feifei Xu (1): drm/amdgpu/sdma4: Remove unused header file from sdma_v4_0.c Harry Wentland (3): drm/amdgpu: Remove some unused elements from amdgpu_connector struct drm/amd/display: Check for HW blocks in HWSS, rather than DC core for cursor amdgpu/dm: Default PRE_VEGA ASIC support to 'y' Hawking Zhang (1): drm/amdgpu: query vram type from atombios Jerry (Fangzhi) Zuo (2): drm/amd/display: Allow passing of syspll id to get_smu_clock_info drm/amd/display: Use actual TG instance instead of pipe instance Krunoslav Kovac (1): drm/amd/display: use HW hdr mult for brightness boost Leo (Sunpeng) Li (3): drm/amd/display: Fix memleaks when atomic check fails. drm/amd/display: Use correct error codes drm/amd/display: Convert CTM to 2's complement Michel Dänzer (2): drm/amdgpu/dce: Don't turn off DP sink when disconnected drm/radeon: Don't turn off DP sink when disconnected Mikita Lipski (1): drm/amd/display: Enable backlight support for pre-DCE11 ASICs Monk Liu (2): drm/amdgpu: implement mmio byte access helper for MB drm/amdgpu: refactoring mailbox to fix TDR handshake bugs(v2) Oak Zeng (1): drm/amdgpu: Move IH clientid defs to separate file Rex Zhu (23): drm/amd/pp: Simplified the avfs btc state on smu7 drm/amd/pp: Fix memory leak in error path in smumgr drm/amd/pp: Clean up header file include drm/amd/pp: Delete is_smc_ram_running function on RV drm/amd/pp: Remove meanless return value check in RV drm/amd/pp: Add rv_read_arg_from_smc to smu backend function table drm/amd/pp: Mark internal functions as static in rv_smumgr.c drm/amd/pp: Add new smu backend function smc_table_manager drm/amd/pp: Add rv_copy_table_from/to_smc to smu backend function table drm/amd/pp: Fix function parameter not correct drm/amd/pp: Replace rv_* with smu10_* drm/amd/pp: Move helper functions to smu_help.c drm/amdgpu: Plus NULL function pointer check drm/amdgpu: Don't compared ip_block_type with ip_block_index drm/amdgpu: Remove wrapper layer of smu ip functions drm/amdgpu: Call amdgpu_ucode_fini_bo in amd_powerplay.c drm/amd/pp: Delete dead code on cz_clockpowergating.c drm/amd/pp: Remove dead header file pp_asicblocks.h drm/amd/pp: Mv cz uvd/vce pg/dpm functions to cz_hwmgr.c drm/amd/pp: Remove unneeded void * casts in cz_hwmgr.c/cz_smumgr.c drm/amd/pp: Replace function/struct name cz_* with smu8_* drm/amd/pp: Rename file name cz_* to smu8_* drm/amd/pp: Remove the cgs wrapper for notify smu version on APU Samson Tam (1): drm/amd/display: add support for regkey "LCDFreeSyncDefault" Shirish S (3): drm/amd/display: Correct the plane enumeration order (v2) drm/amd/display: Check msg->size before starting aux transfer drm/amd/display: fix dereferencing possible ERR_PTR() SivapiriyanKumarasamy (3): drm/amd/display: Vari-bright looks disabled near end of MM14 drm/amd/display: Varibright fix bug and review comments drm/amd/display: Varibright add null check Tom St Denis (1): drm/amd/amdgpu: Add missing "DDR4" label Tony Cheng (1): drm/amd/display: dal 3.1.38 Vitaly Prosyak (1): drm/amd/display: Fix handling of linear transfer function Yongqiang Sun (4): drm/amd/display: Remove 300Mhz minimum disp clk limit. drm/amd/display: Modified set bandwidth sequence. drm/amd/display: Set disp clk in a safe way to avoid over high dpp clk. (v2) drm/amd/display: Fixed dim around 1sec when resume from S3 (v2) drivers/gpu/drm/amd/amdgpu/Makefile | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 95 +- drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 8 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 5 - drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 31 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 45 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 8 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 43 +- drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 30 +- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 59 +- drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 288 ------ drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 + drivers/gpu/drm/amd/amdgpu/amdgpu_test.c | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 28 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 +- drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 4 +- drivers/gpu/drm/amd/amdgpu/atombios_encoders.h | 5 + drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 16 +- drivers/gpu/drm/amd/amdgpu/cik.c | 19 +- drivers/gpu/drm/amd/amdgpu/cik_dpm.h | 7 +- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 8 + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 8 + drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 8 + drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 8 + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 +- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 +- drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 16 +- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 200 +++-- drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h | 7 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 18 +- drivers/gpu/drm/amd/amdgpu/si.c | 8 +- drivers/gpu/drm/amd/amdgpu/si_dpm.c | 16 +- drivers/gpu/drm/amd/amdgpu/si_dpm.h | 3 +- drivers/gpu/drm/amd/amdgpu/soc15.c | 12 +- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 4 +- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 4 +- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 4 +- drivers/gpu/drm/amd/amdgpu/vi.c | 18 +- drivers/gpu/drm/amd/display/Kconfig | 2 +- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 123 ++- .../drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 15 +- .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 3 + drivers/gpu/drm/amd/display/dc/basics/logger.c | 3 +- drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 6 +- .../gpu/drm/amd/display/dc/bios/command_table2.c | 5 +- .../gpu/drm/amd/display/dc/bios/command_table2.h | 2 +- drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c | 160 ++-- drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 23 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 20 +- drivers/gpu/drm/amd/display/dc/core/dc_debug.c | 32 +- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 7 + drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 5 + drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 3 +- drivers/gpu/drm/amd/display/dc/dc.h | 9 +- drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 12 +- drivers/gpu/drm/amd/display/dc/dc_stream.h | 7 + drivers/gpu/drm/amd/display/dc/dc_types.h | 18 + drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h | 35 + drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c | 10 +- drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 24 +- .../gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 3 +- .../drm/amd/display/dc/dce100/dce100_resource.c | 50 ++ .../amd/display/dc/dce110/dce110_hw_sequencer.c | 28 +- .../gpu/drm/amd/display/dc/dce80/dce80_resource.c | 87 ++ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 1 + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h | 16 +- .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c | 9 + .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 261 ++++-- .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 7 +- .../amd/display/dc/dml/display_rq_dlg_helpers.c | 1 + .../gpu/drm/amd/display/dc/dml/dml_common_defs.h | 2 - .../gpu/drm/amd/display/dc/dml/dml_inline_defs.h | 1 + .../dc/dml/dml_logger.h} | 17 +- drivers/gpu/drm/amd/display/dc/inc/core_types.h | 2 + drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h | 6 + drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 3 + drivers/gpu/drm/amd/display/include/logger_types.h | 1 + .../drm/amd/display/modules/color/color_gamma.c | 6 +- .../drm/amd/display/modules/freesync/freesync.c | 155 +++- .../gpu/drm/amd/display/modules/inc/mod_freesync.h | 9 + .../modules/inc/mod_stats.h} | 56 +- drivers/gpu/drm/amd/display/modules/stats/stats.c | 334 +++++++ drivers/gpu/drm/amd/include/kgd_pp_interface.h | 3 +- drivers/gpu/drm/amd/include/soc15_ih_clientid.h | 70 ++ drivers/gpu/drm/amd/include/vega10_ip_offset.h | 286 +++--- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 617 ++++++------- drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 8 +- .../drm/amd/powerplay/hwmgr/cz_clockpowergating.c | 209 ----- .../drm/amd/powerplay/hwmgr/cz_clockpowergating.h | 36 - drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 577 +----------- .../powerplay/hwmgr/{rv_hwmgr.c => smu10_hwmgr.c} | 547 ++++++----- .../powerplay/hwmgr/{rv_hwmgr.h => smu10_hwmgr.h} | 130 +-- .../amd/powerplay/hwmgr/{rv_inc.h => smu10_inc.h} | 4 +- .../amd/powerplay/hwmgr/smu7_clockpowergating.h | 1 - drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 14 +- .../powerplay/hwmgr/{cz_hwmgr.c => smu8_hwmgr.c} | 997 ++++++++++++--------- .../powerplay/hwmgr/{cz_hwmgr.h => smu8_hwmgr.h} | 79 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c | 536 +++++++++++ drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h | 180 ++++ drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 6 +- drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 174 +--- drivers/gpu/drm/amd/powerplay/inc/pp_instance.h | 36 - drivers/gpu/drm/amd/powerplay/inc/smumgr.h | 28 +- drivers/gpu/drm/amd/powerplay/smumgr/Makefile | 4 +- drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c | 883 ------------------ drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 74 +- .../gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c | 4 +- .../drm/amd/powerplay/smumgr/polaris10_smumgr.c | 87 +- drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c | 399 --------- .../gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 344 +++++++ .../smumgr/{rv_smumgr.h => smu10_smumgr.h} | 19 +- drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 6 +- drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h | 7 +- drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 891 ++++++++++++++++++ .../smumgr/{cz_smumgr.h => smu8_smumgr.h} | 82 +- drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | 9 +- .../gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 4 +- .../gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | 61 +- drivers/gpu/drm/ast/ast_ttm.c | 6 +- drivers/gpu/drm/bochs/bochs_mm.c | 5 +- drivers/gpu/drm/cirrus/cirrus_ttm.c | 6 +- drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 5 +- drivers/gpu/drm/mgag200/mgag200_ttm.c | 6 +- drivers/gpu/drm/nouveau/nouveau_bo.c | 10 +- drivers/gpu/drm/nouveau/nouveau_sgdma.c | 7 +- drivers/gpu/drm/nouveau/nouveau_ttm.h | 4 +- drivers/gpu/drm/qxl/qxl_ttm.c | 8 +- drivers/gpu/drm/radeon/radeon_connectors.c | 31 +- drivers/gpu/drm/radeon/radeon_gem.c | 2 - drivers/gpu/drm/radeon/radeon_object.c | 2 + drivers/gpu/drm/radeon/radeon_ttm.c | 12 +- drivers/gpu/drm/ttm/ttm_agp_backend.c | 6 +- drivers/gpu/drm/ttm/ttm_bo.c | 15 +- drivers/gpu/drm/ttm/ttm_bo_util.c | 24 + drivers/gpu/drm/ttm/ttm_tt.c | 75 +- drivers/gpu/drm/virtio/virtgpu_ttm.c | 7 +- drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c | 10 +- drivers/staging/vboxvideo/vbox_ttm.c | 5 +- include/drm/ttm/ttm_bo_driver.h | 252 +----- include/drm/ttm/ttm_tt.h | 272 ++++++ include/uapi/drm/amdgpu_drm.h | 1 + 150 files changed, 5739 insertions(+), 5158 deletions(-) delete mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c rename drivers/gpu/drm/amd/{amdgpu/amdgpu_powerplay.h => display/dc/dml/dml_logger.h} (80%) rename drivers/gpu/drm/amd/{powerplay/inc/pp_asicblocks.h => display/modules/inc/mod_stats.h} (51%) create mode 100644 drivers/gpu/drm/amd/display/modules/stats/stats.c create mode 100644 drivers/gpu/drm/amd/include/soc15_ih_clientid.h delete mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c delete mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h rename drivers/gpu/drm/amd/powerplay/hwmgr/{rv_hwmgr.c => smu10_hwmgr.c} (55%) rename drivers/gpu/drm/amd/powerplay/hwmgr/{rv_hwmgr.h => smu10_hwmgr.h} (67%) rename drivers/gpu/drm/amd/powerplay/hwmgr/{rv_inc.h => smu10_inc.h} (97%) rename drivers/gpu/drm/amd/powerplay/hwmgr/{cz_hwmgr.c => smu8_hwmgr.c} (59%) rename drivers/gpu/drm/amd/powerplay/hwmgr/{cz_hwmgr.h => smu8_hwmgr.h} (80%) create mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c create mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h delete mode 100644 drivers/gpu/drm/amd/powerplay/inc/pp_instance.h delete mode 100644 drivers/gpu/drm/amd/powerplay/smumgr/cz_smumgr.c delete mode 100644 drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c create mode 100644 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c rename drivers/gpu/drm/amd/powerplay/smumgr/{rv_smumgr.h => smu10_smumgr.h} (77%) create mode 100644 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c rename drivers/gpu/drm/amd/powerplay/smumgr/{cz_smumgr.h => smu8_smumgr.h} (52%) create mode 100644 include/drm/ttm/ttm_tt.h

1 0

[PATCH libdrm 1/4] meson, configure: always define HAVE_OPEN_MEMSTREAM
by Eric Engestrom 16 Mar '18

16 Mar '18

Signed-off-by: Eric Engestrom <eric.engestrom(a)imgtec.com> --- configure.ac | 4 +++- intel/test_decode.c | 4 ++-- meson.build | 4 +--- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/configure.ac b/configure.ac index 5d3a20ffd3e7b38db5f1..5751a8113635ce6a1c48 100644 --- a/configure.ac +++ b/configure.ac @@ -189,7 +189,9 @@ AC_CHECK_FUNCS([clock_gettime], [CLOCK_LIB=], [AC_MSG_ERROR([Couldn't find clock_gettime])])]) AC_SUBST([CLOCK_LIB]) -AC_CHECK_FUNCS([open_memstream], [HAVE_OPEN_MEMSTREAM=yes]) +AC_CHECK_FUNCS([open_memstream], + [AC_DEFINE([HAVE_OPEN_MEMSTREAM], 1, [Have open_memstream()])], + [AC_DEFINE([HAVE_OPEN_MEMSTREAM], 0)]) dnl Use lots of warning flags with with gcc and compatible compilers diff --git a/intel/test_decode.c b/intel/test_decode.c index e25bbf10319b641e2c69..b9f5b92791d5ff0c8052 100644 --- a/intel/test_decode.c +++ b/intel/test_decode.c @@ -87,7 +87,7 @@ compare_batch(struct drm_intel_decode *ctx, const char *batch_filename) { FILE *out = NULL; void *ptr, *ref_ptr, *batch_ptr; -#ifdef HAVE_OPEN_MEMSTREAM +#if HAVE_OPEN_MEMSTREAM size_t size; #endif size_t ref_size, batch_size; @@ -105,7 +105,7 @@ compare_batch(struct drm_intel_decode *ctx, const char *batch_filename) * figure out how to output to a file in a safe and sane way * inside of an automake project's test infrastructure. */ -#ifdef HAVE_OPEN_MEMSTREAM +#if HAVE_OPEN_MEMSTREAM out = open_memstream((char **)&ptr, &size); #else fprintf(stderr, "platform lacks open_memstream, skipping.\n"); diff --git a/meson.build b/meson.build index 5e0840750d2b3ff8c608..f7986af9bb5259be5da5 100644 --- a/meson.build +++ b/meson.build @@ -196,9 +196,7 @@ if cc.has_header_symbol('sys/sysmacros.h', 'major') elif cc.has_header_symbol('sys/mkdev.h', 'major') config.set10('MAJOR_IN_MKDEV', true) endif -if cc.has_function('open_memstream') - config.set10('HAVE_OPEN_MEMSTREAM', true) -endif +config.set10('HAVE_OPEN_MEMSTREAM', cc.has_function('open_memstream')) warn_c_args = [] foreach a : ['-Wall', '-Wextra', '-Wsign-compare', '-Werror=undef', -- Cheers, Eric

4 6

[PATCH v8 00/11] Aspect ratio support in DRM layer
by Nautiyal, Ankit K 16 Mar '18

16 Mar '18

From: Ankit Nautiyal <ankit.k.nautiyal(a)intel.com> This patch series is a re-attempt to enable aspect ratio support in DRM layer. Currently the aspect ratio information gets lost in translation during a user->kernel mode or vice versa. The old patch series (https://pw-emeril.freedesktop.org/series/10850/) had 4 patches, out of which 2 patches were reverted due to lack of drm client protection while loading the aspect information. This patch series also includes 5 patches from Ville Syrjälä's series for 'Info-frame cleanup and fixes': https://patchwork.freedesktop.org/series/33730/ which fixes the mode matching mechanism via flags, and also ensures that no bogus aspect-ratios are sent in the AVI infoframes. This patch series, adds a DRM client option for aspect ratio, and loads aspect ratio flags, only when the client sets this cap. To test this patch, the testdiplay IGT test is modified to have an option to do a modeset with only aspect ratio modes. Also, there is a userspace implementation in Wayland/weston layer: https://patchwork.freedesktop.org/patch/188125/ (Which is already ACK'ed by wayland community.) This, helps us in passing HDMI compliance test cases like 7-27, where the test equipment applies a CEA mode, and expects the exact VIC in the AVI infoframes. Ankit Nautiyal (4): drm: Add DRM client cap for aspect-ratio drm: Handle aspect-ratio info in getblob drm: Handle aspect ratio info in legacy and atomic modeset paths drm: Expose modes with aspect ratio, only if requested Sharma, Shashank (2): drm: Add aspect ratio parsing in DRM layer drm: Add and handle new aspect ratios in DRM layer Ville Syrjälä (5): drm/modes: Introduce drm_mode_match() drm/edid: Use drm_mode_match_no_clocks_no_stereo() for consistentcy drm/edid: Fix cea mode aspect ratio handling drm/edid: Don't send bogus aspect ratios in AVI infoframes video/hdmi: Reject illegal picture aspect ratios drivers/gpu/drm/drm_atomic.c | 36 ++++-- drivers/gpu/drm/drm_atomic_helper.c | 6 +- drivers/gpu/drm/drm_connector.c | 40 ++++++- drivers/gpu/drm/drm_crtc.c | 8 ++ drivers/gpu/drm/drm_crtc_internal.h | 3 +- drivers/gpu/drm/drm_edid.c | 41 +++++-- drivers/gpu/drm/drm_fb_helper.c | 12 +- drivers/gpu/drm/drm_ioctl.c | 5 + drivers/gpu/drm/drm_mode_object.c | 9 +- drivers/gpu/drm/drm_modes.c | 226 +++++++++++++++++++++++++++++++----- drivers/gpu/drm/drm_property.c | 5 + drivers/video/hdmi.c | 3 + include/drm/drm_atomic.h | 5 +- include/drm/drm_file.h | 8 ++ include/drm/drm_modes.h | 13 +++ include/drm/drm_property.h | 2 + include/uapi/drm/drm.h | 7 ++ include/uapi/drm/drm_mode.h | 6 + 18 files changed, 369 insertions(+), 66 deletions(-) -- 2.7.4

2 12

[v2 PATCH 0/2] arm64: dts: Add sdm845 GPU/GMU and SMMU
by Jordan Crouse 16 Mar '18

16 Mar '18

Add DT nodes for the sdm845 GPU/GMU (graphics management unit) and the companion arm-smmu-v2 compatible SMMU. This builds on the following dependencies - https://patchwork.kernel.org/patch/10286369/ - bindings for qcom,level https://patchwork.kernel.org/patch/10281599/ - qcom,smmu-v2 bindings Please refer to https://patchwork.freedesktop.org/series/37428/ for the driver code. [v2 - changed qcom,arc-level to qcom,level following discussion with Viresh; change gmu phandle to qcom,gmu per Rob] Jordan Crouse (2): dt-bindings: Document qcom,adreno-gmu arm64: dts: sdm845: Add gpu and gmu device nodes .../devicetree/bindings/display/msm/gmu.txt | 54 ++++++++++ .../devicetree/bindings/display/msm/gpu.txt | 10 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 119 +++++++++++++++++++++ 3 files changed, 181 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/gmu.txt -- 2.16.1

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dri-devel March 2018