dri-devel October 2019

dri-devel@lists.freedesktop.org

359 participants
1833 discussions

[PATCH -next] drm/amd/display: Make dc_link_detect_helper static
by YueHaibing 16 Oct '19

16 Oct '19

Fix sparse warning: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:746:6: warning: symbol 'dc_link_detect_helper' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: YueHaibing <yuehaibing(a)huawei.com> --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index fb18681..9350536 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -743,7 +743,8 @@ static bool wait_for_alt_mode(struct dc_link *link) * This does not create remote sinks but will trigger DM * to start MST detection if a branch is detected. */ -bool dc_link_detect_helper(struct dc_link *link, enum dc_detect_reason reason) +static bool dc_link_detect_helper(struct dc_link *link, + enum dc_detect_reason reason) { struct dc_sink_init_data sink_init_data = { 0 }; struct display_sink_capability sink_caps = { 0 }; -- 2.7.4

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Re: linux-next: Tree for Oct 16 (amd display)
by Randy Dunlap 16 Oct '19

16 Oct '19

On 10/15/19 10:17 PM, Stephen Rothwell wrote: > Hi all, > > Changes since 20191015: > on x86_64: ../drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c: In function ‘dcn20_populate_dml_pipes_from_context’: ../drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:1913:48: error: ‘struct dc_crtc_timing_flags’ has no member named ‘DSC’ if (res_ctx->pipe_ctx[i].stream->timing.flags.DSC) ^ ../drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:1914:73: error: ‘struct dc_crtc_timing’ has no member named ‘dsc_cfg’ pipes[pipe_cnt].dout.output_bpp = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.bits_per_pixel / 16.0; ^ Full randconfig file is attached. -- ~Randy

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[PATCH v4] dt-bindings: display: renesas: du: Document optional reset properties
by Geert Uytterhoeven 16 Oct '19

16 Oct '19

Document the optional properties for describing module resets, to support resetting display channels on R-Car Gen2 and Gen3. Signed-off-by: Geert Uytterhoeven <geert+renesas(a)glider.be> Acked-by: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> Acked-by: Rob Herring <robh(a)kernel.org> --- v4: - Use "All but R8A7779" instead of "R8A779[0123456]", to reduce future churn, v3: - Add Acked-by, - Drop LVDS resets, as LVDS is now covered by a separate binding, - Update the example. v2: - s/phandles/phandle/. --- .../devicetree/bindings/display/renesas,du.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt b/Documentation/devicetree/bindings/display/renesas,du.txt index c97dfacad28118fa..59be7462a4c8bb8e 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.txt +++ b/Documentation/devicetree/bindings/display/renesas,du.txt @@ -45,6 +45,14 @@ Required Properties: instance that serves the DU channel, and the channel index identifies the LIF instance in that VSP. +Optional properties: + - resets: A list of phandle + reset-specifier pairs, one for each entry in + the reset-names property. + - reset-names: Names of the resets. This property is model-dependent. + - All but R8A7779 use one reset for a group of one or more successive + channels. The resets must be named "du.x" with "x" being the numerical + index of the lowest channel in the group. + Required nodes: The connections to the DU output video ports are modeled using the OF graph @@ -90,6 +98,8 @@ Example: R8A7795 (R-Car H3) ES2.0 DU <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>; clock-names = "du.0", "du.1", "du.2", "du.3"; + resets = <&cpg 724>, <&cpg 722>; + reset-names = "du.0", "du.2"; vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>; ports { -- 2.17.1

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[PATCH V4 1/3] drm/panel: simple: Add Logic PD Type 28 display support
by Adam Ford 16 Oct '19

16 Oct '19

Previously, there was an omap panel-dpi driver that would read generic timings from the device tree and set the display timing accordingly. This driver was removed so the screen no longer functions. This patch modifies the panel-simple file to setup the timings to the same values previously used. Fixes: 8bf4b1621178 ("drm/omap: Remove panel-dpi driver") Signed-off-by: Adam Ford <aford173(a)gmail.com> Reviewed-by: Sam Ravnborg <sam(a)ravnborg.org> --- V4: No Change V3: No Change V2: No Change diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 28fa6ba7b767..8abb31f83ffc 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -2048,6 +2048,40 @@ static const struct drm_display_mode mitsubishi_aa070mc01_mode = { .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; +static const struct drm_display_mode logicpd_type_28_mode = { + .clock = 9000, + .hdisplay = 480, + .hsync_start = 480 + 3, + .hsync_end = 480 + 3 + 42, + .htotal = 480 + 3 + 42 + 2, + + .vdisplay = 272, + .vsync_start = 272 + 2, + .vsync_end = 272 + 2 + 11, + .vtotal = 272 + 2 + 11 + 3, + .vrefresh = 60, + .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, +}; + +static const struct panel_desc logicpd_type_28 = { + .modes = &logicpd_type_28_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 105, + .height = 67, + }, + .delay = { + .prepare = 200, + .enable = 200, + .unprepare = 200, + .disable = 200, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE | + DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE, +}; + static const struct panel_desc mitsubishi_aa070mc01 = { .modes = &mitsubishi_aa070mc01_mode, .num_modes = 1, @@ -3264,6 +3298,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "lg,lp129qe", .data = &lg_lp129qe, + }, { + .compatible = "logicpd,type28", + .data = &logicpd_type_28, }, { .compatible = "mitsubishi,aa070mc01-ca1", .data = &mitsubishi_aa070mc01, -- 2.17.1

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[Bug 111599] [CI][RESUME] igt@gem_ctx_isolation@* - skip - Test requirement: !(gen > LAST_KNOWN_GEN), SKIP
by bugzilla-daemon＠freedesktop.org 16 Oct '19

16 Oct '19

https://bugs.freedesktop.org/show_bug.cgi?id=111599 Bug ID: 111599 Summary: [CI][RESUME] igt@gem_ctx_isolation@* - skip - Test requirement: !(gen > LAST_KNOWN_GEN), SKIP Product: DRI Version: XOrg git Hardware: Other OS: All Status: NEW Severity: not set Priority: not set Component: IGT Assignee: dri-devel(a)lists.freedesktop.org Reporter: martin.peres(a)free.fr https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_362/fi-tgl-u/igt@gem_ctx_is… Test requirement not met in function __real_main808, file ../tests/i915/gem_ctx_isolation.c:827: Test requirement: !(gen > LAST_KNOWN_GEN) Subtest bcs0-dirty-switch: SKIP -- You are receiving this mail because: You are the assignee for the bug.

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[Bug 112033] Store the runner and kernel logs as part of the IGT results
by bugzilla-daemon＠freedesktop.org 16 Oct '19

16 Oct '19

https://bugs.freedesktop.org/show_bug.cgi?id=112033 Bug ID: 112033 Summary: Store the runner and kernel logs as part of the IGT results Product: DRI Version: XOrg git Hardware: Other OS: All Status: NEW Severity: not set Priority: not set Component: IGT Assignee: dri-devel(a)lists.freedesktop.org Reporter: martin.peres(a)free.fr While it might appear like a trivial request to some, this is a little hairier than what it might initially appear. The main issue comes from the fact that runs can be resumed, so it means we need to distinguish every execution and be able to say which subtest got executed on which run (CI Bug Log's testsuiterun 's run ID). This is made a little harder by the fact that a binary execution can execute multiple tests and we need to support resuming it while still being able to say which subtest were executed on which run. So far, the idea is to store the current run ID in the runner's metadata.json, then log the current run ID in the journal. Petri, any thoughts? -- You are receiving this mail because: You are the assignee for the bug.

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[PATCH 1/8] gpu: host1x: Overhaul host1x_bo_{pin,unpin}() API
by Thierry Reding 16 Oct '19

16 Oct '19

From: Thierry Reding <treding(a)nvidia.com> The host1x_bo_pin() and host1x_bo_unpin() APIs are used to pin and unpin buffers during host1x job submission. Pinning currently returns the SG table and the DMA address (an IOVA if an IOMMU is used or a physical address if no IOMMU is used) of the buffer. The DMA address is only used for buffers that are relocated, whereas the host1x driver will map gather buffers into its own IOVA space so that they can be processed by the CDMA engine. This approach has a couple of issues. On one hand it's not very useful to return a DMA address for the buffer if host1x doesn't need it. On the other hand, returning the SG table of the buffer is suboptimal because a single SG table cannot be shared for multiple mappings, because the DMA address is stored within the SG table, and the DMA address may be different for different devices. Subsequent patches will move the host1x driver over to the DMA API which doesn't work with a single shared SG table. Fix this by returning a new SG table each time a buffer is pinned. This allows the buffer to be referenced by multiple jobs for different engines. Change the prototypes of host1x_bo_pin() and host1x_bo_unpin() to take a struct device *, specifying the device for which the buffer should be pinned. This is required in order to be able to properly construct the SG table. While at it, make host1x_bo_pin() return the SG table because that allows us to return an ERR_PTR()-encoded error code if we need to, or return NULL to signal that we don't need the SG table to be remapped and can simply use the DMA address as-is. At the same time, returning the DMA address is made optional because in the example of command buffers, host1x doesn't need to know the DMA address since it will have to create its own mapping anyway. Signed-off-by: Thierry Reding <treding(a)nvidia.com> --- drivers/gpu/drm/tegra/gem.c | 34 ++++++++++++++++++++++++++++++---- drivers/gpu/host1x/job.c | 15 ++++++++++++--- include/linux/host1x.h | 17 ++++++++++------- 3 files changed, 52 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c index d2f88cc3134f..564ef60f67c2 100644 --- a/drivers/gpu/drm/tegra/gem.c +++ b/drivers/gpu/drm/tegra/gem.c @@ -27,17 +27,43 @@ static void tegra_bo_put(struct host1x_bo *bo) drm_gem_object_put_unlocked(&obj->gem); } -static dma_addr_t tegra_bo_pin(struct host1x_bo *bo, struct sg_table **sgt) +static struct sg_table *tegra_bo_pin(struct device *dev, struct host1x_bo *bo, + dma_addr_t *phys) { struct tegra_bo *obj = host1x_to_tegra_bo(bo); + struct sg_table *sgt; + int err; + + if (phys) + *phys = obj->iova; - *sgt = obj->sgt; + sgt = kzalloc(sizeof(*sgt), GFP_KERNEL); + if (!sgt) + return ERR_PTR(-ENOMEM); - return obj->iova; + if (obj->pages) { + err = sg_alloc_table_from_pages(sgt, obj->pages, obj->num_pages, + 0, obj->gem.size, GFP_KERNEL); + if (err < 0) + goto free; + } else { + err = dma_get_sgtable(dev, sgt, obj->vaddr, obj->iova, + obj->gem.size); + if (err < 0) + goto free; + } + + return sgt; + +free: + kfree(sgt); + return ERR_PTR(err); } -static void tegra_bo_unpin(struct host1x_bo *bo, struct sg_table *sgt) +static void tegra_bo_unpin(struct device *dev, struct sg_table *sgt) { + sg_free_table(sgt); + kfree(sgt); } static void *tegra_bo_mmap(struct host1x_bo *bo) diff --git a/drivers/gpu/host1x/job.c b/drivers/gpu/host1x/job.c index eaa5c3352c13..90dd592fdfca 100644 --- a/drivers/gpu/host1x/job.c +++ b/drivers/gpu/host1x/job.c @@ -99,6 +99,7 @@ EXPORT_SYMBOL(host1x_job_add_gather); static unsigned int pin_job(struct host1x *host, struct host1x_job *job) { + struct device *dev = job->client->dev; unsigned int i; int err; @@ -115,7 +116,11 @@ static unsigned int pin_job(struct host1x *host, struct host1x_job *job) goto unpin; } - phys_addr = host1x_bo_pin(reloc->target.bo, &sgt); + sgt = host1x_bo_pin(dev, reloc->target.bo, &phys_addr); + if (IS_ERR(sgt)) { + err = PTR_ERR(sgt); + goto unpin; + } job->addr_phys[job->num_unpins] = phys_addr; job->unpins[job->num_unpins].bo = reloc->target.bo; @@ -139,7 +144,11 @@ static unsigned int pin_job(struct host1x *host, struct host1x_job *job) goto unpin; } - phys_addr = host1x_bo_pin(g->bo, &sgt); + sgt = host1x_bo_pin(host->dev, g->bo, &phys_addr); + if (IS_ERR(sgt)) { + err = PTR_ERR(sgt); + goto unpin; + } if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) && host->domain) { for_each_sg(sgt->sgl, sg, sgt->nents, j) @@ -566,7 +575,7 @@ void host1x_job_unpin(struct host1x_job *job) iova_pfn(&host->iova, job->addr_phys[i])); } - host1x_bo_unpin(unpin->bo, unpin->sgt); + host1x_bo_unpin(host->dev, unpin->bo, unpin->sgt); host1x_bo_put(unpin->bo); } diff --git a/include/linux/host1x.h b/include/linux/host1x.h index df6e613ba715..1ba23a6a2021 100644 --- a/include/linux/host1x.h +++ b/include/linux/host1x.h @@ -67,8 +67,9 @@ struct sg_table; struct host1x_bo_ops { struct host1x_bo *(*get)(struct host1x_bo *bo); void (*put)(struct host1x_bo *bo); - dma_addr_t (*pin)(struct host1x_bo *bo, struct sg_table **sgt); - void (*unpin)(struct host1x_bo *bo, struct sg_table *sgt); + struct sg_table *(*pin)(struct device *dev, struct host1x_bo *bo, + dma_addr_t *phys); + void (*unpin)(struct device *dev, struct sg_table *sgt); void *(*mmap)(struct host1x_bo *bo); void (*munmap)(struct host1x_bo *bo, void *addr); void *(*kmap)(struct host1x_bo *bo, unsigned int pagenum); @@ -95,15 +96,17 @@ static inline void host1x_bo_put(struct host1x_bo *bo) bo->ops->put(bo); } -static inline dma_addr_t host1x_bo_pin(struct host1x_bo *bo, - struct sg_table **sgt) +static inline struct sg_table *host1x_bo_pin(struct device *dev, + struct host1x_bo *bo, + dma_addr_t *phys) { - return bo->ops->pin(bo, sgt); + return bo->ops->pin(dev, bo, phys); } -static inline void host1x_bo_unpin(struct host1x_bo *bo, struct sg_table *sgt) +static inline void host1x_bo_unpin(struct device *dev, struct host1x_bo *bo, + struct sg_table *sgt) { - bo->ops->unpin(bo, sgt); + bo->ops->unpin(dev, sgt); } static inline void *host1x_bo_mmap(struct host1x_bo *bo) -- 2.23.0

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[Bug 112024] rasheed
by bugzilla-daemon＠freedesktop.org 16 Oct '19

16 Oct '19

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[PATCH] drm/i915/hdmi: enable resolution 3840x2160 for type 1 HDMI
by Jian-Hong Pan 16 Oct '19

16 Oct '19

Type 1 HDMI may be version 1.3 or upper, which supports higher max TMDS clock for higher resolutions, like 3840x2160. This patch sets max TMDS clock according to the chip, if the adapter is type 1 HDMI. Buglink: https://bugs.freedesktop.org/show_bug.cgi?id=112018 Fixes: b1ba124d8e95 ("drm/i915: Respect DP++ adaptor TMDS clock limit") Signed-off-by: Jian-Hong Pan <jian-hong(a)endlessm.com> --- drivers/gpu/drm/i915/display/intel_hdmi.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index e02f0faecf02..74e4426ffcad 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -2454,6 +2454,7 @@ intel_hdmi_dp_dual_mode_detect(struct drm_connector *connector, bool has_edid) { struct drm_i915_private *dev_priv = to_i915(connector->dev); struct intel_hdmi *hdmi = intel_attached_hdmi(connector); + struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base; enum port port = hdmi_to_dig_port(hdmi)->base.port; struct i2c_adapter *adapter = intel_gmbus_get_adapter(dev_priv, hdmi->ddc_bus); @@ -2488,8 +2489,16 @@ intel_hdmi_dp_dual_mode_detect(struct drm_connector *connector, bool has_edid) return; hdmi->dp_dual_mode.type = type; - hdmi->dp_dual_mode.max_tmds_clock = - drm_dp_dual_mode_max_tmds_clock(type, adapter); + /* Type 1 HDMI may be version 1.3 or upper, which supports higher max + * TMDS clock for higher resolutions, like 3840x2160. So, set it + * according to the chip, if the adapter is type 1 HDMI. + */ + if (type == DRM_DP_DUAL_MODE_TYPE1_HDMI) + hdmi->dp_dual_mode.max_tmds_clock = + intel_hdmi_source_max_tmds_clock(encoder); + else + hdmi->dp_dual_mode.max_tmds_clock = + drm_dp_dual_mode_max_tmds_clock(type, adapter); DRM_DEBUG_KMS("DP dual mode adaptor (%s) detected (max TMDS clock: %d kHz)\n", drm_dp_get_dual_mode_type_name(type), -- 2.23.0

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[RFC PATCH] drm/virtio: Export resource handles via DMA-buf API
by Tomasz Figa 16 Oct '19

16 Oct '19

This patch is an early RFC to judge the direction we are following in our virtualization efforts in Chrome OS. The purpose is to start a discussion on how to handle buffer sharing between multiple virtio devices. On a side note, we are also working on a virtio video decoder interface and implementation, with a V4L2 driver for Linux. Those will be posted for review in the near future as well. Any feedback will be appreciated! Thanks in advance. === With the range of use cases for virtualization expanding, there is going to be more virtio devices added to the ecosystem. Devices such as video decoders, encoders, cameras, etc. typically work together with the display and GPU in a pipeline manner, which can only be implemented efficiently by sharing the buffers between producers and consumers. Existing buffer management framework in Linux, such as the videobuf2 framework in V4L2, implements all the DMA-buf handling inside generic code and do not expose any low level information about the buffers to the drivers. To seamlessly enable buffer sharing with drivers using such frameworks, make the virtio-gpu driver expose the resource handle as the DMA address of the buffer returned from the DMA-buf mapping operation. Arguably, the resource handle is a kind of DMA address already, as it is the buffer identifier that the device needs to access the backing memory, which is exactly the same role a DMA address provides for native devices. A virtio driver that does memory management fully on its own would have code similar to following. The code is identical to what a regular driver for real hardware would do to import a DMA-buf. static int virtio_foo_get_resource_handle(struct virtio_foo *foo, struct dma_buf *dma_buf, u32 *id) { struct dma_buf_attachment *attach; struct sg_table *sgt; int ret = 0; attach = dma_buf_attach(dma_buf, foo->dev); if (IS_ERR(attach)) return PTR_ERR(attach); sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); if (IS_ERR(sgt)) { ret = PTR_ERR(sgt); goto err_detach; } if (sgt->nents != 1) { ret = -EINVAL; goto err_unmap; } *id = sg_dma_address(sgt->sgl); err_unmap: dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); err_detach: dma_buf_detach(dma_buf, attach); return ret; } On the other hand, a virtio driver that uses an existing kernel framework to manage buffers would not need to explicitly handle anything at all, as the framework part responsible for importing DMA-bufs would already do the work. For example, a V4L2 driver using the videobuf2 framework would just call thee vb2_dma_contig_plane_dma_addr() function to get what the above open-coded function would return. Signed-off-by: Tomasz Figa <tfiga(a)chromium.org> --- drivers/gpu/drm/virtio/virtgpu_drv.c | 2 + drivers/gpu/drm/virtio/virtgpu_drv.h | 4 ++ drivers/gpu/drm/virtio/virtgpu_prime.c | 81 ++++++++++++++++++++++++++ 3 files changed, 87 insertions(+) diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.c b/drivers/gpu/drm/virtio/virtgpu_drv.c index 0fc32fa0b3c0..ac095f813134 100644 --- a/drivers/gpu/drm/virtio/virtgpu_drv.c +++ b/drivers/gpu/drm/virtio/virtgpu_drv.c @@ -210,6 +210,8 @@ static struct drm_driver driver = { #endif .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, + .gem_prime_export = virtgpu_gem_prime_export, + .gem_prime_import = virtgpu_gem_prime_import, .gem_prime_get_sg_table = virtgpu_gem_prime_get_sg_table, .gem_prime_import_sg_table = virtgpu_gem_prime_import_sg_table, .gem_prime_vmap = virtgpu_gem_prime_vmap, diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h b/drivers/gpu/drm/virtio/virtgpu_drv.h index e28829661724..687cfce91885 100644 --- a/drivers/gpu/drm/virtio/virtgpu_drv.h +++ b/drivers/gpu/drm/virtio/virtgpu_drv.h @@ -367,6 +367,10 @@ void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo); int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait); /* virtgpu_prime.c */ +struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj, + int flags); +struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev, + struct dma_buf *buf); struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj); struct drm_gem_object *virtgpu_gem_prime_import_sg_table( struct drm_device *dev, struct dma_buf_attachment *attach, diff --git a/drivers/gpu/drm/virtio/virtgpu_prime.c b/drivers/gpu/drm/virtio/virtgpu_prime.c index dc642a884b88..562eb1a2ed5b 100644 --- a/drivers/gpu/drm/virtio/virtgpu_prime.c +++ b/drivers/gpu/drm/virtio/virtgpu_prime.c @@ -22,6 +22,9 @@ * Authors: Andreas Pokorny */ +#include <linux/dma-buf.h> +#include <linux/dma-direction.h> + #include <drm/drm_prime.h> #include "virtgpu_drv.h" @@ -30,6 +33,84 @@ * device that might share buffers with virtgpu */ +static struct sg_table * +virtgpu_gem_map_dma_buf(struct dma_buf_attachment *attach, + enum dma_data_direction dir) +{ + struct drm_gem_object *obj = attach->dmabuf->priv; + struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj); + struct sg_table *sgt; + int ret; + + sgt = kzalloc(sizeof(*sgt), GFP_KERNEL); + if (!sgt) + return ERR_PTR(-ENOMEM); + + ret = sg_alloc_table(sgt, 1, GFP_KERNEL); + if (ret) { + kfree(sgt); + return ERR_PTR(-ENOMEM); + } + + sg_dma_address(sgt->sgl) = bo->hw_res_handle; + sg_dma_len(sgt->sgl) = obj->size; + sgt->nents = 1; + + return sgt; +} + +static void virtgpu_gem_unmap_dma_buf(struct dma_buf_attachment *attach, + struct sg_table *sgt, + enum dma_data_direction dir) +{ + sg_free_table(sgt); + kfree(sgt); +} + +static const struct dma_buf_ops virtgpu_dmabuf_ops = { + .cache_sgt_mapping = true, + .attach = drm_gem_map_attach, + .detach = drm_gem_map_detach, + .map_dma_buf = virtgpu_gem_map_dma_buf, + .unmap_dma_buf = virtgpu_gem_unmap_dma_buf, + .release = drm_gem_dmabuf_release, + .mmap = drm_gem_dmabuf_mmap, + .vmap = drm_gem_dmabuf_vmap, + .vunmap = drm_gem_dmabuf_vunmap, +}; + +struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj, + int flags) +{ + struct dma_buf *buf; + + buf = drm_gem_prime_export(obj, flags); + if (!IS_ERR(buf)) + buf->ops = &virtgpu_dmabuf_ops; + + return buf; +} + +struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev, + struct dma_buf *buf) +{ + struct drm_gem_object *obj; + + if (buf->ops == &virtgpu_dmabuf_ops) { + obj = buf->priv; + if (obj->dev == dev) { + /* + * Importing dmabuf exported from our own gem increases + * refcount on gem itself instead of f_count of dmabuf. + */ + drm_gem_object_get(obj); + return obj; + } + } + + return drm_gem_prime_import(dev, buf); +} + struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj) { struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj); -- 2.23.0.237.gc6a4ce50a0-goog

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dri-devel October 2019