dri-devel August 2019

dri-devel@lists.freedesktop.org

318 participants
2338 discussions

[PATCH] drm/komeda: Adds internal bpp computing for arm afbc only format YU08 YU10
by Lowry Li (Arm Technology China) 12 Aug '19

12 Aug '19

From: "Lowry Li (Arm Technology China)" <Lowry.Li(a)arm.com> The drm_format_info doesn't have any cpp or block_size (both are zero) information for arm only afbc format YU08/YU10. we need to compute it by ourselves. Changes since v1: 1. Removed redundant warning check in komeda_get_afbc_format_bpp(); 2. Removed a redundant empty line; 3. Rebased the branch. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li(a)arm.com> --- .../gpu/drm/arm/display/komeda/komeda_format_caps.c | 19 +++++++++++++++++++ .../gpu/drm/arm/display/komeda/komeda_format_caps.h | 3 +++ .../gpu/drm/arm/display/komeda/komeda_framebuffer.c | 5 +++-- 3 files changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c index cd4d9f5..c9a1edb 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c @@ -35,6 +35,25 @@ return NULL; } +u32 komeda_get_afbc_format_bpp(const struct drm_format_info *info, u64 modifier) +{ + u32 bpp; + + switch (info->format) { + case DRM_FORMAT_YUV420_8BIT: + bpp = 12; + break; + case DRM_FORMAT_YUV420_10BIT: + bpp = 15; + break; + default: + bpp = info->cpp[0] * 8; + break; + } + + return bpp; +} + /* Two assumptions * 1. RGB always has YTR * 2. Tiled RGB always has SC diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h index 3631910..32273cf 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h @@ -97,6 +97,9 @@ static inline const char *komeda_get_format_name(u32 fourcc, u64 modifier) komeda_get_format_caps(struct komeda_format_caps_table *table, u32 fourcc, u64 modifier); +u32 komeda_get_afbc_format_bpp(const struct drm_format_info *info, + u64 modifier); + u32 *komeda_get_layer_fourcc_list(struct komeda_format_caps_table *table, u32 layer_type, u32 *n_fmts); diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c index 3b0a70e..1b01a62 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c @@ -43,7 +43,7 @@ static int komeda_fb_create_handle(struct drm_framebuffer *fb, struct drm_framebuffer *fb = &kfb->base; const struct drm_format_info *info = fb->format; struct drm_gem_object *obj; - u32 alignment_w = 0, alignment_h = 0, alignment_header, n_blocks; + u32 alignment_w = 0, alignment_h = 0, alignment_header, n_blocks, bpp; u64 min_size; obj = drm_gem_object_lookup(file, mode_cmd->handles[0]); @@ -88,8 +88,9 @@ static int komeda_fb_create_handle(struct drm_framebuffer *fb, kfb->offset_payload = ALIGN(n_blocks * AFBC_HEADER_SIZE, alignment_header); + bpp = komeda_get_afbc_format_bpp(info, fb->modifier); kfb->afbc_size = kfb->offset_payload + n_blocks * - ALIGN(info->cpp[0] * AFBC_SUPERBLK_PIXELS, + ALIGN(bpp * AFBC_SUPERBLK_PIXELS / 8, AFBC_SUPERBLK_ALIGNMENT); min_size = kfb->afbc_size + fb->offsets[0]; if (min_size > obj->size) { -- 1.9.1

2 1

[PATCH] drm/komeda: Fix potential integer overflow in komeda_crtc_update_clock_ratio
by Gustavo A. R. Silva 12 Aug '19

12 Aug '19

Add suffix ULL to constant 1000 in order to avoid a potential integer overflow and give the compiler complete information about the proper arithmetic to use. Notice that this constant is being used in a context that expects an expression of type u64, but it's currently evaluated using 32-bit arithmetic. Addresses-Coverity-ID: 1485796 ("Unintentional integer overflow") Fixes: ed22c6d9304d ("drm/komeda: Use drm_display_mode "crtc_" prefixed hardware timings") Signed-off-by: Gustavo A. R. Silva <gustavo(a)embeddedor.com> --- drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c index fa9a4593bb37..624d257da20f 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c @@ -27,7 +27,7 @@ static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st) return; } - pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000; + pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; aclk = komeda_crtc_get_aclk(kcrtc_st); kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); -- 2.22.0

2 1

[PATCH 02/22] ARM: omap1: make omapfb standalone compilable
by Arnd Bergmann 12 Aug '19

12 Aug '19

The omapfb driver is split into platform specific code for omap1, and driver code that is also specific to omap1. Moving both parts into the driver directory simplifies the structure and avoids the dependency on certain omap machine header files. The interrupt numbers in particular however must not be referenced directly from the driver to allow building in a multiplatform configuration, so these have to be passed through resources, is done for all other omap drivers. Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- arch/arm/mach-omap1/Makefile | 4 -- arch/arm/mach-omap1/fb.c | 19 +++++++- arch/arm/mach-omap1/include/mach/lcdc.h | 44 ------------------- drivers/video/fbdev/Makefile | 2 +- drivers/video/fbdev/omap/Makefile | 5 +++ .../video/fbdev/omap}/lcd_dma.c | 4 +- .../video/fbdev/omap}/lcd_dma.h | 2 - drivers/video/fbdev/omap/lcdc.c | 8 ++-- drivers/video/fbdev/omap/lcdc.h | 35 +++++++++++++++ drivers/video/fbdev/omap/omapfb.h | 2 + drivers/video/fbdev/omap/omapfb_main.c | 16 ++++++- drivers/video/fbdev/omap/sossi.c | 3 +- include/linux/omap-dma.h | 7 ++- 13 files changed, 90 insertions(+), 61 deletions(-) delete mode 100644 arch/arm/mach-omap1/include/mach/lcdc.h rename {arch/arm/mach-omap1 => drivers/video/fbdev/omap}/lcd_dma.c (99%) rename {arch/arm/mach-omap1/include/mach => drivers/video/fbdev/omap}/lcd_dma.h (98%) diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index c757a52d0801..450bbf552b57 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -57,7 +57,3 @@ obj-$(CONFIG_ARCH_OMAP730) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP850) += gpio7xx.o obj-$(CONFIG_ARCH_OMAP15XX) += gpio15xx.o obj-$(CONFIG_ARCH_OMAP16XX) += gpio16xx.o - -ifneq ($(CONFIG_FB_OMAP),) -obj-y += lcd_dma.o -endif diff --git a/arch/arm/mach-omap1/fb.c b/arch/arm/mach-omap1/fb.c index 0e32a959f254..b093375afc27 100644 --- a/arch/arm/mach-omap1/fb.c +++ b/arch/arm/mach-omap1/fb.c @@ -17,9 +17,12 @@ #include <linux/io.h> #include <linux/omapfb.h> #include <linux/dma-mapping.h> +#include <linux/irq.h> #include <asm/mach/map.h> +#include <mach/irqs.h> + #if IS_ENABLED(CONFIG_FB_OMAP) static bool omapfb_lcd_configured; @@ -27,6 +30,19 @@ static struct omapfb_platform_data omapfb_config; static u64 omap_fb_dma_mask = ~(u32)0; +struct resource omap_fb_resources[] = { + { + .name = "irq", + .start = INT_LCD_CTRL, + .flags = IORESOURCE_IRQ, + }, + { + .name = "irq", + .start = INT_SOSSI_MATCH, + .flags = IORESOURCE_IRQ, + }, +}; + static struct platform_device omap_fb_device = { .name = "omapfb", .id = -1, @@ -35,7 +51,8 @@ static struct platform_device omap_fb_device = { .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &omapfb_config, }, - .num_resources = 0, + .num_resources = ARRAY_SIZE(omap_fb_resources), + .resource = omap_fb_resources, }; void __init omapfb_set_lcd_config(const struct omap_lcd_config *config) diff --git a/arch/arm/mach-omap1/include/mach/lcdc.h b/arch/arm/mach-omap1/include/mach/lcdc.h deleted file mode 100644 index 7152db1f5361..000000000000 --- a/arch/arm/mach-omap1/include/mach/lcdc.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * arch/arm/mach-omap1/include/mach/lcdc.h - * - * Extracted from drivers/video/omap/lcdc.c - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak <imre.deak(a)nokia.com> - */ -#ifndef __MACH_LCDC_H__ -#define __MACH_LCDC_H__ - -#define OMAP_LCDC_BASE 0xfffec000 -#define OMAP_LCDC_SIZE 256 -#define OMAP_LCDC_IRQ INT_LCD_CTRL - -#define OMAP_LCDC_CONTROL (OMAP_LCDC_BASE + 0x00) -#define OMAP_LCDC_TIMING0 (OMAP_LCDC_BASE + 0x04) -#define OMAP_LCDC_TIMING1 (OMAP_LCDC_BASE + 0x08) -#define OMAP_LCDC_TIMING2 (OMAP_LCDC_BASE + 0x0c) -#define OMAP_LCDC_STATUS (OMAP_LCDC_BASE + 0x10) -#define OMAP_LCDC_SUBPANEL (OMAP_LCDC_BASE + 0x14) -#define OMAP_LCDC_LINE_INT (OMAP_LCDC_BASE + 0x18) -#define OMAP_LCDC_DISPLAY_STATUS (OMAP_LCDC_BASE + 0x1c) - -#define OMAP_LCDC_STAT_DONE (1 << 0) -#define OMAP_LCDC_STAT_VSYNC (1 << 1) -#define OMAP_LCDC_STAT_SYNC_LOST (1 << 2) -#define OMAP_LCDC_STAT_ABC (1 << 3) -#define OMAP_LCDC_STAT_LINE_INT (1 << 4) -#define OMAP_LCDC_STAT_FUF (1 << 5) -#define OMAP_LCDC_STAT_LOADED_PALETTE (1 << 6) - -#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) -#define OMAP_LCDC_CTRL_LCD_TFT (1 << 7) -#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10) - -#define OMAP_LCDC_IRQ_VSYNC (1 << 2) -#define OMAP_LCDC_IRQ_DONE (1 << 3) -#define OMAP_LCDC_IRQ_LOADED_PALETTE (1 << 4) -#define OMAP_LCDC_IRQ_LINE_NIRQ (1 << 5) -#define OMAP_LCDC_IRQ_LINE (1 << 6) -#define OMAP_LCDC_IRQ_MASK (((1 << 5) - 1) << 2) - -#endif /* __MACH_LCDC_H__ */ diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile index aab7155884ea..3324301e4c36 100644 --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile @@ -111,7 +111,7 @@ obj-$(CONFIG_FB_UDL) += udlfb.o obj-$(CONFIG_FB_SMSCUFX) += smscufx.o obj-$(CONFIG_FB_XILINX) += xilinxfb.o obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o -obj-$(CONFIG_FB_OMAP) += omap/ +obj-y += omap/ obj-y += omap2/ obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o obj-$(CONFIG_FB_CARMINE) += carminefb.o diff --git a/drivers/video/fbdev/omap/Makefile b/drivers/video/fbdev/omap/Makefile index daaa73a94e7f..b88e02f5cb1f 100644 --- a/drivers/video/fbdev/omap/Makefile +++ b/drivers/video/fbdev/omap/Makefile @@ -5,6 +5,11 @@ obj-$(CONFIG_FB_OMAP) += omapfb.o +ifdef CONFIG_FB_OMAP +# must be built-in +obj-y += lcd_dma.o +endif + objs-yy := omapfb_main.o lcdc.o objs-y$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += sossi.o diff --git a/arch/arm/mach-omap1/lcd_dma.c b/drivers/video/fbdev/omap/lcd_dma.c similarity index 99% rename from arch/arm/mach-omap1/lcd_dma.c rename to drivers/video/fbdev/omap/lcd_dma.c index a72ac0c02b4f..867a63c06f42 100644 --- a/arch/arm/mach-omap1/lcd_dma.c +++ b/drivers/video/fbdev/omap/lcd_dma.c @@ -26,7 +26,9 @@ #include <linux/omap-dma.h> #include <mach/hardware.h> -#include <mach/lcdc.h> + +#include "lcdc.h" +#include "lcd_dma.h" int omap_lcd_dma_running(void) { diff --git a/arch/arm/mach-omap1/include/mach/lcd_dma.h b/drivers/video/fbdev/omap/lcd_dma.h similarity index 98% rename from arch/arm/mach-omap1/include/mach/lcd_dma.h rename to drivers/video/fbdev/omap/lcd_dma.h index 1a3c0cf17899..1b4780197381 100644 --- a/arch/arm/mach-omap1/include/mach/lcd_dma.h +++ b/drivers/video/fbdev/omap/lcd_dma.h @@ -60,6 +60,4 @@ extern void omap_set_lcd_dma_b1_vxres(unsigned long vxres); extern void omap_set_lcd_dma_b1_mirror(int mirror); extern void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale); -extern int omap_lcd_dma_running(void); - #endif /* __MACH_OMAP1_LCD_DMA_H__ */ diff --git a/drivers/video/fbdev/omap/lcdc.c b/drivers/video/fbdev/omap/lcdc.c index fa73acfc1371..65953b7fbdb9 100644 --- a/drivers/video/fbdev/omap/lcdc.c +++ b/drivers/video/fbdev/omap/lcdc.c @@ -17,7 +17,6 @@ #include <linux/clk.h> #include <linux/gfp.h> -#include <mach/lcdc.h> #include <linux/omap-dma.h> #include <asm/mach-types.h> @@ -25,6 +24,7 @@ #include "omapfb.h" #include "lcdc.h" +#include "lcd_dma.h" #define MODULE_NAME "lcdc" @@ -713,7 +713,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, } clk_enable(lcdc.lcd_ck); - r = request_irq(OMAP_LCDC_IRQ, lcdc_irq_handler, 0, MODULE_NAME, fbdev); + r = request_irq(fbdev->int_irq, lcdc_irq_handler, 0, MODULE_NAME, fbdev); if (r) { dev_err(fbdev->dev, "unable to get IRQ\n"); goto fail2; @@ -744,7 +744,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, fail4: omap_free_lcd_dma(); fail3: - free_irq(OMAP_LCDC_IRQ, lcdc.fbdev); + free_irq(fbdev->int_irq, lcdc.fbdev); fail2: clk_disable(lcdc.lcd_ck); fail1: @@ -759,7 +759,7 @@ static void omap_lcdc_cleanup(void) free_palette_ram(); free_fbmem(); omap_free_lcd_dma(); - free_irq(OMAP_LCDC_IRQ, lcdc.fbdev); + free_irq(lcdc.fbdev->int_irq, lcdc.fbdev); clk_disable(lcdc.lcd_ck); clk_put(lcdc.lcd_ck); } diff --git a/drivers/video/fbdev/omap/lcdc.h b/drivers/video/fbdev/omap/lcdc.h index 8a7607d861c1..cbbfd9b9e949 100644 --- a/drivers/video/fbdev/omap/lcdc.h +++ b/drivers/video/fbdev/omap/lcdc.h @@ -1,6 +1,41 @@ /* SPDX-License-Identifier: GPL-2.0 */ #ifndef LCDC_H #define LCDC_H +/* + * Copyright (C) 2004 Nokia Corporation + * Author: Imre Deak <imre.deak(a)nokia.com> + */ +#define OMAP_LCDC_BASE 0xfffec000 +#define OMAP_LCDC_SIZE 256 +#define OMAP_LCDC_IRQ INT_LCD_CTRL + +#define OMAP_LCDC_CONTROL (OMAP_LCDC_BASE + 0x00) +#define OMAP_LCDC_TIMING0 (OMAP_LCDC_BASE + 0x04) +#define OMAP_LCDC_TIMING1 (OMAP_LCDC_BASE + 0x08) +#define OMAP_LCDC_TIMING2 (OMAP_LCDC_BASE + 0x0c) +#define OMAP_LCDC_STATUS (OMAP_LCDC_BASE + 0x10) +#define OMAP_LCDC_SUBPANEL (OMAP_LCDC_BASE + 0x14) +#define OMAP_LCDC_LINE_INT (OMAP_LCDC_BASE + 0x18) +#define OMAP_LCDC_DISPLAY_STATUS (OMAP_LCDC_BASE + 0x1c) + +#define OMAP_LCDC_STAT_DONE (1 << 0) +#define OMAP_LCDC_STAT_VSYNC (1 << 1) +#define OMAP_LCDC_STAT_SYNC_LOST (1 << 2) +#define OMAP_LCDC_STAT_ABC (1 << 3) +#define OMAP_LCDC_STAT_LINE_INT (1 << 4) +#define OMAP_LCDC_STAT_FUF (1 << 5) +#define OMAP_LCDC_STAT_LOADED_PALETTE (1 << 6) + +#define OMAP_LCDC_CTRL_LCD_EN (1 << 0) +#define OMAP_LCDC_CTRL_LCD_TFT (1 << 7) +#define OMAP_LCDC_CTRL_LINE_IRQ_CLR_SEL (1 << 10) + +#define OMAP_LCDC_IRQ_VSYNC (1 << 2) +#define OMAP_LCDC_IRQ_DONE (1 << 3) +#define OMAP_LCDC_IRQ_LOADED_PALETTE (1 << 4) +#define OMAP_LCDC_IRQ_LINE_NIRQ (1 << 5) +#define OMAP_LCDC_IRQ_LINE (1 << 6) +#define OMAP_LCDC_IRQ_MASK (((1 << 5) - 1) << 2) int omap_lcdc_set_dma_callback(void (*callback)(void *data), void *data); void omap_lcdc_free_dma_callback(void); diff --git a/drivers/video/fbdev/omap/omapfb.h b/drivers/video/fbdev/omap/omapfb.h index d930152c289c..313a051fe7a4 100644 --- a/drivers/video/fbdev/omap/omapfb.h +++ b/drivers/video/fbdev/omap/omapfb.h @@ -204,6 +204,8 @@ struct omapfb_device { struct lcd_panel *panel; /* LCD panel */ const struct lcd_ctrl *ctrl; /* LCD controller */ const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ + int ext_irq; + int int_irq; struct lcd_ctrl_extif *ext_if; /* LCD ctrl external interface */ struct device *dev; diff --git a/drivers/video/fbdev/omap/omapfb_main.c b/drivers/video/fbdev/omap/omapfb_main.c index 90eca64e3144..dc06057de91d 100644 --- a/drivers/video/fbdev/omap/omapfb_main.c +++ b/drivers/video/fbdev/omap/omapfb_main.c @@ -1618,7 +1618,7 @@ static int omapfb_do_probe(struct platform_device *pdev, init_state = 0; - if (pdev->num_resources != 0) { + if (pdev->num_resources != 1) { dev_err(&pdev->dev, "probed for an unknown device\n"); r = -ENODEV; goto cleanup; @@ -1637,6 +1637,20 @@ static int omapfb_do_probe(struct platform_device *pdev, r = -ENOMEM; goto cleanup; } + fbdev->int_irq = platform_get_irq(pdev, 0); + if (!fbdev->int_irq) { + dev_err(&pdev->dev, "unable to get irq\n"); + r = ENXIO; + goto cleanup; + } + + fbdev->ext_irq = platform_get_irq(pdev, 1); + if (!fbdev->ext_irq) { + dev_err(&pdev->dev, "unable to get irq\n"); + r = ENXIO; + goto cleanup; + } + init_state++; fbdev->dev = &pdev->dev; diff --git a/drivers/video/fbdev/omap/sossi.c b/drivers/video/fbdev/omap/sossi.c index 80ac67f27f0d..ade9d452254c 100644 --- a/drivers/video/fbdev/omap/sossi.c +++ b/drivers/video/fbdev/omap/sossi.c @@ -15,6 +15,7 @@ #include <linux/omap-dma.h> #include "omapfb.h" +#include "lcd_dma.h" #include "lcdc.h" #define MODULE_NAME "omapfb-sossi" @@ -638,7 +639,7 @@ static int sossi_init(struct omapfb_device *fbdev) l &= ~(1 << 31); /* REORDERING */ sossi_write_reg(SOSSI_INIT1_REG, l); - if ((r = request_irq(INT_1610_SoSSI_MATCH, sossi_match_irq, + if ((r = request_irq(fbdev->ext_irq, sossi_match_irq, IRQ_TYPE_EDGE_FALLING, "sossi_match", sossi.fbdev->dev)) < 0) { dev_err(sossi.fbdev->dev, "can't get SoSSI match IRQ\n"); diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h index ba3cfbb52312..e9d76ac6321d 100644 --- a/include/linux/omap-dma.h +++ b/include/linux/omap-dma.h @@ -346,8 +346,8 @@ extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth, void omap_dma_global_context_save(void); void omap_dma_global_context_restore(void); -#if defined(CONFIG_ARCH_OMAP1) && IS_ENABLED(CONFIG_FB_OMAP) -#include <mach/lcd_dma.h> +#if IS_ENABLED(CONFIG_FB_OMAP) +extern int omap_lcd_dma_running(void); #else static inline int omap_lcd_dma_running(void) { @@ -356,6 +356,9 @@ static inline int omap_lcd_dma_running(void) #endif #else /* CONFIG_ARCH_OMAP */ +static inline void omap_set_dma_priority(int lch, int dst_port, int priority) +{ +} static inline struct omap_system_dma_plat_info *omap_get_plat_info(void) { -- 2.20.0

2 5

[PATCH v8 0/4] Add support for Orange Pi 3
by megous＠megous.com 12 Aug '19

12 Aug '19

From: Ondrej Jirman <megous(a)megous.com> This series implements support for Xunlong Orange Pi 3 board. There are only a few patches remaining. - ethernet support - just a DT change (patch 1) - HDMI support (patches 2-4) For some people, ethernet doesn't work after reboot because u-boot doesn't support AXP805 PMIC, and will not turn off the etherent PHY regulators. So the regulator controlled by gpio will be shut down, but the other one controlled by the AXP PMIC will not. This is a problem only when running with a builtin driver. This needs to be fixed in u-boot. Please take a look. thank you and regards, Ondrej Jirman Changes in v8: - added reviewed-by tags - dropped already applied patches - added more info about the phy initialization issue after reset Changes in v7: - dropped stored reference to connector_pdev as suggested by Jernej - added forgotten dt-bindings reviewed-by tag Changes in v6: - added dt-bindings reviewed-by tag - fix wording in stmmac commit (as suggested by Sergei) Changes in v5: - dropped already applied patches (pinctrl patches, mmc1 pinconf patch) - rename GMAC-3V3 -> GMAC-3V to match the schematic (Jagan) - changed hdmi-connector's ddc-supply property to ddc-en-gpios (Rob Herring) Changes in v4: - fix checkpatch warnings/style issues - use enum in struct sunxi_desc_function for io_bias_cfg_variant - collected acked-by's - fix compile error in drivers/pinctrl/sunxi/pinctrl-sun9i-a80-r.c:156 caused by missing conversion from has_io_bias_cfg struct member (I've kept the acked-by, because it's a trivial change, but feel free to object.) (reported by Martin A. on github) I did not have A80 pinctrl enabled for some reason, so I did not catch this sooner. - dropped brcm firmware patch (was already applied) - dropped the wifi dts patch (will re-send after H6 RTC gets merged, along with bluetooth support, in a separate series) Changes in v3: - dropped already applied patches - changed pinctrl I/O bias selection constants to enum and renamed - added /omit-if-no-ref/ to mmc1_pins - made mmc1_pins default pinconf for mmc1 in H6 dtsi - move ddc-supply to HDMI connector node, updated patch descriptions, changed dt-bindings docs Changes in v2: - added dt-bindings documentation for the board's compatible string (suggested by Clement) - addressed checkpatch warnings and code formatting issues (on Maxime's suggestions) - stmmac: dropped useless parenthesis, reworded description of the patch (suggested by Sergei) - drop useles dev_info() about the selected io bias voltage - docummented io voltage bias selection variant macros - wifi: marked WiFi DTS patch and realted mmc1_pins as "DO NOT MERGE", because wifi depends on H6 RTC support that's not merged yet (suggested by Clement) - added missing signed-of-bys - changed &usb2otg dr_mode to otg, and added a note about VBUS - improved wording of HDMI driver's DDC power supply patch Ondrej Jirman (4): arm64: dts: allwinner: orange-pi-3: Enable ethernet dt-bindings: display: hdmi-connector: Support DDC bus enable drm: sun4i: Add support for enabling DDC I2C bus to sun8i_dw_hdmi glue arm64: dts: allwinner: orange-pi-3: Enable HDMI output .../display/connector/hdmi-connector.txt | 1 + .../dts/allwinner/sun50i-h6-orangepi-3.dts | 70 +++++++++++++++++++ drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 54 ++++++++++++-- drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 + 4 files changed, 123 insertions(+), 4 deletions(-) -- 2.22.0

6 10

[CI] dma-fence: Report the composite sync_file status
by Chris Wilson 12 Aug '19

12 Aug '19

Same as for the individual fences, we want to report the actual status of the fence when queried. Reported-by: Petri Latvala <petri.latvala(a)intel.com> Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Gustavo Padovan <gustavo(a)padovan.org> Cc: Petri Latvala <petri.latvala(a)intel.com> Reviewed-by: Matthew Auld <matthew.auld(a)intel.com> --- drivers/dma-buf/sync_file.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma-buf/sync_file.c b/drivers/dma-buf/sync_file.c index ee4d1a96d779..25c5c071645b 100644 --- a/drivers/dma-buf/sync_file.c +++ b/drivers/dma-buf/sync_file.c @@ -419,7 +419,7 @@ static long sync_file_ioctl_fence_info(struct sync_file *sync_file, * info->num_fences. */ if (!info.num_fences) { - info.status = dma_fence_is_signaled(sync_file->fence); + info.status = dma_fence_get_status(sync_file->fence); goto no_fences; } else { info.status = 1; -- 2.23.0.rc1

1 0

[PATCH] drm/panfrost: Add errata descriptions from kbase
by Alyssa Rosenzweig 12 Aug '19

12 Aug '19

While newer kbase include only the numbers of errata, older kbase releases included one-line descriptions for each errata, which is useful for those working on the driver. Import these descriptions. Most are from kbase verbatim; a few I edited for clarity. v2: Wrote a description for the workaround of an issue whose cause is still unknown (Stephen). Errata which pertain to newer models unsupported by the mainline driver, for which Arm has not yet released errata information, have been removed from the issue list as the kernel need not concern itself with these. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig(a)collabora.com> --- drivers/gpu/drm/panfrost/panfrost_issues.h | 106 +++++++++++++++------ 1 file changed, 78 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_issues.h b/drivers/gpu/drm/panfrost/panfrost_issues.h index cec6dcdad..36e503614 100644 --- a/drivers/gpu/drm/panfrost/panfrost_issues.h +++ b/drivers/gpu/drm/panfrost/panfrost_issues.h @@ -13,37 +13,101 @@ * to care about. */ enum panfrost_hw_issue { + /* Need way to guarantee that all previously-translated memory accesses + * are commited */ HW_ISSUE_6367, + + /* On job complete with non-done the cache is not flushed */ HW_ISSUE_6787, + + /* Write of PRFCNT_CONFIG_MODE_MANUAL to PRFCNT_CONFIG causes a + * instrumentation dump if PRFCNT_TILER_EN is enabled */ HW_ISSUE_8186, + + /* TIB: Reports faults from a vtile which has not yet been allocated */ HW_ISSUE_8245, + + /* uTLB deadlock could occur when writing to an invalid page at the + * same time as access to a valid page in the same uTLB cache line ( == + * 4 PTEs == 16K block of mapping) */ HW_ISSUE_8316, + + /* HT: TERMINATE for RUN command ignored if previous LOAD_DESCRIPTOR is + * still executing */ HW_ISSUE_8394, + + /* CSE: Sends a TERMINATED response for a task that should not be + * terminated */ HW_ISSUE_8401, + + /* Repeatedly Soft-stopping a job chain consisting of (Vertex Shader, + * Cache Flush, Tiler) jobs causes DATA_INVALID_FAULT on tiler job. */ HW_ISSUE_8408, + + /* Disable the Pause Buffer in the LS pipe. */ HW_ISSUE_8443, + + /* Change in RMUs in use causes problems related with the core's SDC */ HW_ISSUE_8987, + + /* Compute endpoint has a 4-deep queue of tasks, meaning a soft stop + * won't complete until all 4 tasks have completed */ HW_ISSUE_9435, + + /* HT: Tiler returns TERMINATED for non-terminated command */ HW_ISSUE_9510, + + /* Occasionally the GPU will issue multiple page faults for the same + * address before the MMU page table has been read by the GPU */ HW_ISSUE_9630, + + /* RA DCD load request to SDC returns invalid load ignore causing + * colour buffer mismatch */ HW_ISSUE_10327, + + /* MMU TLB invalidation hazards */ HW_ISSUE_10649, + + /* Missing cache flush in multi core-group configuration */ HW_ISSUE_10676, + + /* Chicken bit on T72X for a hardware workaround in compiler */ HW_ISSUE_10797, + + /* Soft-stopping fragment jobs might fail with TILE_RANGE_FAULT */ HW_ISSUE_10817, + + /* Intermittent missing interrupt on job completion */ HW_ISSUE_10883, + + /* Soft-stopping fragment jobs might fail with TILE_RANGE_ERROR + * (similar to issue 10817) and can use #10817 workaround */ HW_ISSUE_10959, + + /* Soft-stopped fragment shader job can restart with out-of-bound + * restart index */ HW_ISSUE_10969, + + /* Race condition can cause tile list corruption */ HW_ISSUE_11020, + + /* Write buffer can cause tile list corruption */ HW_ISSUE_11024, + + /* Pause buffer can cause a fragment job hang */ HW_ISSUE_11035, - HW_ISSUE_11056, + + /* Clear encoder state for a hard stopped fragment job which is AFBC + * encoded by soft resetting the GPU. Only for T76X r0p0, r0p1 and + * r0p1_50rel0 */ HW_ISSUE_T76X_3542, + + /* Keep tiler module clock on to prevent GPU stall */ HW_ISSUE_T76X_3953, - HW_ISSUE_TMIX_8463, + + /* Don't set SC_LS_ATTR_CHECK_DISABLE/SC_LS_ALLOW_ATTR_TYPES */ GPUCORE_1619, - HW_ISSUE_TMIX_8438, - HW_ISSUE_TGOX_R1_1234, + HW_ISSUE_END }; @@ -59,9 +123,7 @@ enum panfrost_hw_issue { BIT_ULL(HW_ISSUE_10676) | \ BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL(HW_ISSUE_11020) | \ - BIT_ULL(HW_ISSUE_11035) | \ - BIT_ULL(HW_ISSUE_11056) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) + BIT_ULL(HW_ISSUE_11035)) #define hw_issues_t600_r0p0_15dev0 (\ BIT_ULL(HW_ISSUE_8186) | \ @@ -78,9 +140,7 @@ enum panfrost_hw_issue { #define hw_issues_t620 (\ BIT_ULL(HW_ISSUE_10649) | \ BIT_ULL(HW_ISSUE_10883) | \ - BIT_ULL(HW_ISSUE_10959) | \ - BIT_ULL(HW_ISSUE_11056) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) + BIT_ULL(HW_ISSUE_10959)) #define hw_issues_t620_r0p1 (\ BIT_ULL(HW_ISSUE_10327) | \ @@ -97,14 +157,11 @@ enum panfrost_hw_issue { #define hw_issues_t720 (\ BIT_ULL(HW_ISSUE_10649) | \ BIT_ULL(HW_ISSUE_10797) | \ - BIT_ULL(HW_ISSUE_10883) | \ - BIT_ULL(HW_ISSUE_11056) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) + BIT_ULL(HW_ISSUE_10883)) #define hw_issues_t760 (\ BIT_ULL(HW_ISSUE_10883) | \ - BIT_ULL(HW_ISSUE_T76X_3953) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) + BIT_ULL(HW_ISSUE_T76X_3953)) #define hw_issues_t760_r0p0 (\ BIT_ULL(HW_ISSUE_11020) | \ @@ -129,36 +186,29 @@ enum panfrost_hw_issue { #define hw_issues_t820 (\ BIT_ULL(HW_ISSUE_10883) | \ - BIT_ULL(HW_ISSUE_T76X_3953) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) + BIT_ULL(HW_ISSUE_T76X_3953)) #define hw_issues_t830 (\ BIT_ULL(HW_ISSUE_10883) | \ - BIT_ULL(HW_ISSUE_T76X_3953) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) + BIT_ULL(HW_ISSUE_T76X_3953)) #define hw_issues_t860 (\ BIT_ULL(HW_ISSUE_10883) | \ - BIT_ULL(HW_ISSUE_T76X_3953) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) + BIT_ULL(HW_ISSUE_T76X_3953)) #define hw_issues_t880 (\ BIT_ULL(HW_ISSUE_10883) | \ - BIT_ULL(HW_ISSUE_T76X_3953) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) + BIT_ULL(HW_ISSUE_T76X_3953)) #define hw_issues_g31 0 -#define hw_issues_g31_r1p0 (\ - BIT_ULL(HW_ISSUE_TGOX_R1_1234)) +#define hw_issues_g31_r1p0 0 #define hw_issues_g51 0 #define hw_issues_g52 0 -#define hw_issues_g71 (\ - BIT_ULL(HW_ISSUE_TMIX_8463) | \ - BIT_ULL(HW_ISSUE_TMIX_8438)) +#define hw_issues_g71 0 #define hw_issues_g71_r0p0_05dev0 (\ BIT_ULL(HW_ISSUE_T76X_3953)) -- 2.20.1

3 2

[Bug 109955] amdgpu [RX Vega 64] system freeze while gaming
by bugzilla-daemon＠freedesktop.org 12 Aug '19

12 Aug '19

https://bugs.freedesktop.org/show_bug.cgi?id=109955 --- Comment #84 from Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer(a)amd.com> --- (In reply to Mauro Gaspari from comment #82) > (In reply to Pierre-Eric Pelloux-Prayer from comment #81) > > Can anyone provide a apitrace/renderdoc capture that can reliably reproduce > > the crash/freeze? > > Hello, Sadly my freezes are hard to reproduce. Sometimes I can play for a > day with no freeze, sometimes it freezes in 10 minutes, one hour, and so on. > Ok. This patch https://patchwork.freedesktop.org/series/64792/ might help: it won't fix any issue, but when a timeout is detected it should allow the soft recovery of the GPU. Other things worth trying: setting AMD_DEBUG environment variables. I'd suggest: AMD_DEBUG=zerovram,nodma,nodpbb There are others (see mesa/src/gallium/drivers/radeonsi/si_pipe.c) to try if these don't help. -- You are receiving this mail because: You are the assignee for the bug.

1 0

[PATCH] backlight: lms283gf05: Fix a typo in the description passed to 'devm_gpio_request_one()'
by Christophe JAILLET 12 Aug '19

12 Aug '19

The description passed to 'devm_gpio_request_one()' should be related to LMS283GF05, not LMS285GF05. Signed-off-by: Christophe JAILLET <christophe.jaillet(a)wanadoo.fr> --- drivers/video/backlight/lms283gf05.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/backlight/lms283gf05.c b/drivers/video/backlight/lms283gf05.c index 4237aaa7f269..4b62ed7e58c0 100644 --- a/drivers/video/backlight/lms283gf05.c +++ b/drivers/video/backlight/lms283gf05.c @@ -161,7 +161,7 @@ static int lms283gf05_probe(struct spi_device *spi) ret = devm_gpio_request_one(&spi->dev, pdata->reset_gpio, GPIOF_DIR_OUT | (!pdata->reset_inverted ? GPIOF_INIT_HIGH : GPIOF_INIT_LOW), - "LMS285GF05 RESET"); + "LMS283GF05 RESET"); if (ret) return ret; } -- 2.20.1

3 2

Re: [PATCH for-5.3] drm/omap: ensure we have a valid dma_mask
by Tomi Valkeinen 12 Aug '19

12 Aug '19

On 09/08/2019 11:07, Christoph Hellwig wrote: > On Fri, Aug 09, 2019 at 09:40:32AM +0300, Tomi Valkeinen wrote: >> We do call dma_set_coherent_mask() in omapdrm's probe() (in omap_drv.c), >> but apparently that's not enough anymore. Changing that call to >> dma_coerce_mask_and_coherent() removes the WARN. I can create a patch for >> that, or Christoph can respin this one. > > Oh, yes - that actually is the right thing to do here. If you already > have it please just send it out. > >> >> I am not too familiar with the dma mask handling, so maybe someone can >> educate: >> >> dma_coerce_mask_and_coherent() overwrites dev->dma_mask. Isn't that a bad >> thing? What if the platform has set dev->dma_mask, and the driver >> overwrites it with its value? Or who is supposed to set dev->dma_mask? > > ->dma_mask is a complete mess. It is a pointer when it really should > just be a u64, and that means every driver layer has to allocate space > for it. We don't really do that for platform_devices, as that breaks > horribly assumptions in the usb code. That is why > dma_coerce_mask_and_coherent exists as a nasty workaround that sets > the dma_mask to the coherent_dma_mask for devices that don't have > space for ->dma_mask allocated, which works as long as the device > doesn't have differnet addressing requirements for both. > > I'm actually working to fix that mess up at the moment, but it is going > to take a few cycles until everything falls into place. Alright, thanks for the clarification! Here's my version. >From c258309e36fc86076db155aead03a3900b96c3d4 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen <tomi.valkeinen(a)ti.com> Date: Fri, 9 Aug 2019 09:54:49 +0300 Subject: [PATCH] drm/omap: ensure we have a valid dma_mask The omapdrm driver uses dma_set_coherent_mask(), but that's not enough anymore when LPAE is enabled. >From Christoph Hellwig <hch(a)lst.de>: The traditional arm DMA code ignores, but the generic dma-direct/swiotlb has stricter checks and thus fails mappings without a DMA mask. As we use swiotlb for arm with LPAE now, omapdrm needs to catch up and actually set a DMA mask. Change the dma_set_coherent_mask() call to dma_coerce_mask_and_coherent() so that the dev->dma_mask is also set. Fixes: ad3c7b18c5b3 ("arm: use swiotlb for bounce buffering on LPAE configs") Reported-by: "H. Nikolaus Schaller" <hns(a)goldelico.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen(a)ti.com> diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index 288c59dae56a..1bad0a2cc5c6 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -669,7 +669,7 @@ static int pdev_probe(struct platform_device *pdev) if (omapdss_is_initialized() == false) return -EPROBE_DEFER; - ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); if (ret) { dev_err(&pdev->dev, "Failed to set the DMA mask\n"); return ret; -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

2 1

[Bug 109955] amdgpu [RX Vega 64] system freeze while gaming
by bugzilla-daemon＠freedesktop.org 12 Aug '19

12 Aug '19

https://bugs.freedesktop.org/show_bug.cgi?id=109955 --- Comment #83 from J. Andrew Lanz-O'Brien <jlanzobr(a)gmail.com> --- Can confirm that this bug is still present as of August 11, 2019 on kernel 5.2.8 with mesa 19.1.4. Borderlands 2 hard locked my system about 5 times tonight. Manually setting the power profile didn't help either, ie these two commands: echo manual > /sys/class/drm/card0/device/power_dpm_force_performance_level echo 7 > /sys/class/drm/card0/device/pp_dpm_sclk -- You are receiving this mail because: You are the assignee for the bug.

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel August 2019