The following series are intended to prepare the mtk-mmsys driver to
allow different DDP (Data Display Path) function call per SoC.
base change:
https://patchwork.kernel.org/project/linux-mediatek/patch/20201006193320.40…
Change since v2:
- fix review issue in v2
- add 8183 mmsys function call
- add 8192 new component
- add 8192 mmsys function call
On Thu, Oct 22, 2020 at 10:34 AM Peiyong Lin <lpy(a)google.com> wrote:
>
> Historically there is no common trace event for GPU frequency, in
> downstream Android each different hardware vendor implements their own
> way to expose GPU frequency, for example as a debugfs node. This patch
> standardize it as a common trace event in upstream linux kernel to help
> the ecosystem have a common implementation across hardware vendors.
> Toolings in the Linux ecosystem will …
[View More]benefit from this especially in the
> downstream Android, where this information is critical to graphics
> developers.
>
> Signed-off-by: Peiyong Lin <lpy(a)google.com>
> ---
>
> Changelog since v3:
> - Correct copyright title.
>
> Changelog since v2:
> - Add more comments to indicate when the event should be emitted.
> - Change state to frequency.
>
> Changelog since v1:
> - Use %u in TP_printk
>
> drivers/gpu/Makefile | 1 +
> drivers/gpu/trace/Kconfig | 3 +++
> drivers/gpu/trace/Makefile | 1 +
> drivers/gpu/trace/trace_gpu_frequency.c | 13 ++++++++++
> include/trace/events/power.h | 33 +++++++++++++++++++++++++
> 5 files changed, 51 insertions(+)
> create mode 100644 drivers/gpu/trace/trace_gpu_frequency.c
>
> diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
> index 835c88318cec..f289a47eb031 100644
> --- a/drivers/gpu/Makefile
> +++ b/drivers/gpu/Makefile
> @@ -6,3 +6,4 @@ obj-$(CONFIG_TEGRA_HOST1X) += host1x/
> obj-y += drm/ vga/
> obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
> obj-$(CONFIG_TRACE_GPU_MEM) += trace/
> +obj-$(CONFIG_TRACE_GPU_FREQUENCY) += trace/
> diff --git a/drivers/gpu/trace/Kconfig b/drivers/gpu/trace/Kconfig
> index c24e9edd022e..ac4aec8d5845 100644
> --- a/drivers/gpu/trace/Kconfig
> +++ b/drivers/gpu/trace/Kconfig
> @@ -2,3 +2,6 @@
>
> config TRACE_GPU_MEM
> bool
> +
> +config TRACE_GPU_FREQUENCY
> + bool
> diff --git a/drivers/gpu/trace/Makefile b/drivers/gpu/trace/Makefile
> index b70fbdc5847f..2b7ae69327d6 100644
> --- a/drivers/gpu/trace/Makefile
> +++ b/drivers/gpu/trace/Makefile
> @@ -1,3 +1,4 @@
> # SPDX-License-Identifier: GPL-2.0
>
> obj-$(CONFIG_TRACE_GPU_MEM) += trace_gpu_mem.o
> +obj-$(CONFIG_TRACE_GPU_FREQUENCY) += trace_gpu_frequency.o
> diff --git a/drivers/gpu/trace/trace_gpu_frequency.c b/drivers/gpu/trace/trace_gpu_frequency.c
> new file mode 100644
> index 000000000000..668fabd6b77a
> --- /dev/null
> +++ b/drivers/gpu/trace/trace_gpu_frequency.c
> @@ -0,0 +1,13 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * GPU frequency trace points
> + *
> + * Copyright (C) 2020 Google LLC
> + */
> +
> +#include <linux/module.h>
> +
> +#define CREATE_TRACE_POINTS
> +#include <trace/events/power.h>
> +
> +EXPORT_TRACEPOINT_SYMBOL(gpu_frequency);
> diff --git a/include/trace/events/power.h b/include/trace/events/power.h
> index af5018aa9517..343825a76953 100644
> --- a/include/trace/events/power.h
> +++ b/include/trace/events/power.h
> @@ -500,6 +500,39 @@ DEFINE_EVENT(dev_pm_qos_request, dev_pm_qos_remove_request,
>
> TP_ARGS(name, type, new_value)
> );
> +
> +/**
> + * gpu_frequency - Reports the GPU frequency in GPU clock domains.
> + *
> + * This event should be emitted whenever there's a GPU frequency change happens,
> + * or a GPU goes from idle state to active state, or vice versa.
> + *
> + * When the GPU goes from idle state to active state, this event should report
> + * the GPU frequency of the active state. When the GPU goes from active state to
> + * idle state, this event should report a zero frequency value.
> + *
> + * @frequency: New frequency (in KHz)
> + * @gpu_id: Id for each GPU clock domain
> + */
> +TRACE_EVENT(gpu_frequency,
> +
> + TP_PROTO(unsigned int frequency, unsigned int gpu_id),
> +
> + TP_ARGS(frequency, gpu_id),
> +
> + TP_STRUCT__entry(
> + __field(unsigned int, frequency)
> + __field(unsigned int, gpu_id)
> + ),
> +
> + TP_fast_assign(
> + __entry->frequency = frequency;
> + __entry->gpu_id = gpu_id;
> + ),
> +
> + TP_printk("frequency=%u gpu_id=%u",
> + __entry->frequency, __entry->gpu_id)
> +);
> #endif /* _TRACE_POWER_H */
>
> /* This part must be outside protection */
> --
> 2.29.0.rc1.297.gfa9743e501-goog
>
Hi there,
Per request, re-send this patch with dri-devel@ list CCed.
Thanks,
Peiyong
[View Less]
The Vulkan driver in Mesa for Intel hardware never uses relocations if
it's running on a version of i915 that supports at least softpin which
all versions of i915 supporting Gen12 do. On the OpenGL side, Gen12 is
only supported by iris which never uses relocations. The older i965
driver in Mesa does use relocations but it only supports Intel hardware
through Gen11 and has been deprecated for all hardware Gen9+. The entire
relocation UAPI and related infrastructure, therefore, doesn't have any
…
[View More]open-source userspace consumer starting with Gen12.
Rejecting relocations starting with Gen12 has the benefit that we don't
have to bother supporting it on platforms with local memory. Given how
much CPU touching of memory is required for relocations, not having to
do so on platforms where not all memory is directly CPU-accessible
carries significant advantages.
Signed-off-by: Jason Ekstrand <jason(a)jlekstrand.net>
Cc: Dave Airlie <airlied(a)redhat.com>
Cc: Daniel Vetter <daniel.vetter(a)intel.com>
Cc: Chris Wilson <chris(a)chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 4f9c1f5a4dedb..e10c93aff945d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1533,7 +1533,8 @@ eb_relocate_vma_slow(struct i915_execbuffer *eb, struct i915_vma *vma)
return err;
}
-static int check_relocations(const struct drm_i915_gem_exec_object2 *entry)
+static int check_relocations(const struct i915_execbuffer *eb,
+ const struct drm_i915_gem_exec_object2 *entry)
{
const char __user *addr, *end;
unsigned long size;
@@ -1543,6 +1544,9 @@ static int check_relocations(const struct drm_i915_gem_exec_object2 *entry)
if (size == 0)
return 0;
+ if (size && eb->reloc_cache.gen >= 12)
+ return -EINVAL;
+
if (size > N_RELOC(ULONG_MAX))
return -EINVAL;
@@ -1576,7 +1580,7 @@ static int eb_copy_relocations(const struct i915_execbuffer *eb)
if (nreloc == 0)
continue;
- err = check_relocations(&eb->exec[i]);
+ err = check_relocations(eb, &eb->exec[i]);
if (err)
goto err;
--
2.26.2
[View Less]
From: dillon min <dillon.minfei(a)gmail.com>
V6:
1 separate '[PATCH v5 5/8]' patchs to two, each one has a Fixes tags according
to Stephen Boyd's suggestion
2 fix panel-ilitek-ili9341 compile warning 'warning: Function parameter or
member xxx not described in xxx' with W=1
V5's update based on Mark Brown's suggestion, use 'SPI_MASTER_MUST_RX'
for SPI_SIMPLEX_RX mode on stm32 spi controller.
V5:
1 instead of add send dummy data out under SIMPLEX_RX mode,
add flags '…
[View More]SPI_CONTROLLER_MUST_TX' for stm32 spi driver
2 bypass 'SPI_CONTROLLER_MUST_TX' and 'SPI_CONTROLLER_MUST_RX' under
'SPI_3WIRE' mode
V4:
According to alexandre torgue's suggestion, combine ili9341 and
l3gd20's modification on stm32f429-disco board to one patchset.
Changes:
ili9341:
1 update ili9341 panel driver according to Linus's suggestion
2 drop V1's No.5 patch, sumbit new changes for clk-stm32f4
3 merge l3gd20's change to this patchset
V3:
1 merge original tiny/ili9341.c driver to panel/panel-ilitek-ili9341.c
to support serial spi & parallel rgb interface in one driver.
2 update ilitek,ili9341.yaml dts binding documentation.
3 update stm32f429-disco dts binding
V2:
1 verify ilitek,ili9341.yaml with make O=../linux-stm32
dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/panel/
ilitek,ili9341.yaml
V1:
1 add ili9341 drm panel driver
2 add ltdc, spi5 controller for stm32f429-disco
3 add ltdc, spi5 pin map for stm32f429-disco
4 add docs about ili9341
5 fix ltdc driver loading hang in clk set rate bug
L3gd20:
V3:
1 merge stm32f429-disco dtbs binding with ili9341 part
V2:
1 insert blank line at stm32f420-disco.dts line 143
2 add more description for l3gd20 in commit message
V1:
1 enable spi5 controller on stm32f429-disco (dts)
2 add spi5 pinmap for stm32f429-disco (dts)
3 add SPI_SIMPLEX_RX, SPI_3WIRE_RX support for stm32f4
dillon min (9):
ARM: dts: stm32: Add dma config for spi5
ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board
ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on
stm32429-disco board
dt-bindings: display: panel: Add ilitek ili9341 panel bindings
clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate
clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after
kernel startup
drm/panel: Add ilitek ili9341 panel driver
spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4
spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't
be coexit with 'SPI_3WIRE' mode
.../bindings/display/panel/ilitek,ili9341.yaml | 69 ++
arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 +
arch/arm/boot/dts/stm32f429-disco.dts | 48 +
arch/arm/boot/dts/stm32f429.dtsi | 3 +
drivers/clk/clk-stm32f4.c | 7 +-
drivers/gpu/drm/panel/Kconfig | 12 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 1288 ++++++++++++++++++++
drivers/spi/spi-stm32.c | 19 +-
drivers/spi/spi.c | 3 +-
10 files changed, 1508 insertions(+), 9 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c
--
2.7.4
[View Less]
Hi,
This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
Freescale i.MX8qxp SoC.
The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either
MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp
SCU firmware. The PHY driver would call a SCU function to configure the
mode.
The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC,
where it appears to be a single MIPI DPHY.
Patch 1/5 sets PHY mode in the Northwest Logic MIPI …
[View More]DSI host controller
bridge driver, since i.MX8qxp SoC embeds this controller IP to support
MIPI DSI displays together with the Mixel PHY.
Patch 2/5 allows LVDS PHYs to be configured through the generic PHY functions
and through a custom structure added to the generic PHY configuration union.
Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to json-schema.
Patch 4/5 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC.
Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver.
Welcome comments, thanks.
v2->v3:
* Improve readability of mixel_dphy_set_mode() in the Mixel PHY driver. (Guido)
* Improve the 'clock-names' property in the PHY dt binding.
v1->v2:
* Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido)
* Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido)
* Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver.
Liu Ying (5):
drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
phy: Add LVDS configuration options
dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema
dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for
i.MX8qxp
phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode
support
.../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt | 29 ---
.../bindings/phy/mixel,mipi-dsi-phy.yaml | 107 ++++++++
drivers/gpu/drm/bridge/nwl-dsi.c | 6 +
drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 269 ++++++++++++++++++++-
include/linux/phy/phy-lvds.h | 48 ++++
include/linux/phy/phy.h | 4 +
6 files changed, 423 insertions(+), 40 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml
create mode 100644 include/linux/phy/phy-lvds.h
--
2.7.4
[View Less]