dri-devel June 2020

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[PATCH v2] drm/fourcc: Add bayer formats and modifiers
by Niklas Söderlund 03 Jul '20

03 Jul '20

Bayer formats are used with cameras and contain green, red and blue components, with alternating lines of red and green, and blue and green pixels in different orders. For each block of 2x2 pixels there is one pixel with a red filter, two with a green filter, and one with a blue filter. The filters can be arranged in different patterns. Add DRM fourcc formats to describe the most common Bayer formats. Also add a modifiers to describe the custom packing layouts used by the Intel IPU3 and in the MIPI (Mobile Industry Processor Interface) CSI-2 specification. Signed-off-by: Niklas Söderlund <niklas.soderlund(a)ragnatech.se> --- * Changes since v1 - Rename the defines from DRM_FORMAT_SRGGB8 to DRM_FORMAT_BAYER_RGGB8. - Update the fourcc codes passed to fourcc_code() to avoid a conflict. - Add diagrams for all Bayer formats memory layout. - Update documentation. --- include/uapi/drm/drm_fourcc.h | 205 ++++++++++++++++++++++++++++++++++ 1 file changed, 205 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 8bc0b31597d80737..d07dd24b49bde6c1 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -285,6 +285,73 @@ extern "C" { #define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */ #define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */ +/* + * Bayer formats + * + * Bayer formats contain green, red and blue components, with alternating lines + * of red and green, and blue and green pixels in different orders. For each + * block of 2x2 pixels there is one pixel with a red filter, two with a green + * filter, and one with a blue filter. The filters can be arranged in different + * patterns. + * + * For example, RGGB: + * row0: RGRGRGRG... + * row1: GBGBGBGB... + * row2: RGRGRGRG... + * row3: GBGBGBGB... + * ... + * + * Vendors have different methods to pack the pixel samples. For this reason the + * fourcc only describes pixel sample size and the filter pattern for each block + * of 2x2 pixels. A modifier is needed to describe the memory layout. + * + * In addition to vendor modifiers for memory layout DRM_FORMAT_MOD_LINEAR may + * be used to describe a layout where all samples are placed consecutively in + * memory. If the sample does not fit inside a single byte each sample is stored + * in the minimum number of bytes required. Any unused bits in each sample are + * defined as padding bits and set to zero. + * + * For example, DRM_FORMAT_BAYER_RGGB10 with DRM_FORMAT_MOD_LINEAR: + * + * 0 row 0 (RGRG) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r0 r0 r0 r0 r0 r0 r0 r0 | 0 0 0 0 0 0 r0 r0 | g0 g0 g0 g0 g0 g0 g0 g0 | 0 0 0 0 0 0 g0 g0 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r1 r1 r1 r1 r1 r1 r1 r1 | 0 0 0 0 0 0 r1 r1 | g1 g1 g1 g1 g1 g1 g1 g1 | 0 0 0 0 0 0 g1 g1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * + * 0 row 1 (GBGB) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g0 g0 g0 g0 g0 g0 g0 g0 | 0 0 0 0 0 0 g0 g0 | b0 b0 b0 b0 b0 b0 b0 b0 | 0 0 0 0 0 0 b0 b0 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g1 g1 g1 g1 g1 g1 g1 g1 | 0 0 0 0 0 0 g1 g1 | b1 b1 b1 b1 b1 b1 b1 b1 | 0 0 0 0 0 0 b1 b1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + */ + +/* 8-bits Bayer formats */ +#define DRM_FORMAT_BAYER_RGGB8 fourcc_code('R', 'G', 'G', 'B') +#define DRM_FORMAT_BAYER_GRBG8 fourcc_code('G', 'R', 'B', 'G') +#define DRM_FORMAT_BAYER_GBRG8 fourcc_code('G', 'B', 'R', 'G') +#define DRM_FORMAT_BAYER_BGGR8 fourcc_code('B', 'G', 'G', 'R') + +/* 10-bit Bayer formats */ +#define DRM_FORMAT_BAYER_RGGB10 fourcc_code('R', 'G', '1', '0') +#define DRM_FORMAT_BAYER_GRBG10 fourcc_code('G', 'R', '1', '0') +#define DRM_FORMAT_BAYER_GBRG10 fourcc_code('G', 'B', '1', '0') +#define DRM_FORMAT_BAYER_BGGR10 fourcc_code('B', 'G', '1', '0') + +/* 12-bit Bayer formats */ +#define DRM_FORMAT_BAYER_RGGB12 fourcc_code('R', 'G', '1', '2') +#define DRM_FORMAT_BAYER_GRBG12 fourcc_code('G', 'R', '1', '2') +#define DRM_FORMAT_BAYER_GBRG12 fourcc_code('G', 'B', '1', '2') +#define DRM_FORMAT_BAYER_BGGR12 fourcc_code('B', 'G', '1', '2') + +/* 14-bit Bayer formats */ +#define DRM_FORMAT_BAYER_RGGB14 fourcc_code('R', 'G', '1', '4') +#define DRM_FORMAT_BAYER_GRBG14 fourcc_code('G', 'R', '1', '4') +#define DRM_FORMAT_BAYER_GBRG14 fourcc_code('G', 'B', '1', '4') +#define DRM_FORMAT_BAYER_BGGR14 fourcc_code('B', 'G', '1', '4') + /* * Format Modifiers: @@ -309,6 +376,7 @@ extern "C" { #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 +#define DRM_FORMAT_MOD_VENDOR_MIPI 0x0a /* add more to the end as needed */ @@ -434,6 +502,56 @@ extern "C" { */ #define I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7) + +/* + * IPU3 Bayer packing layout + * + * The IPU3 raw Bayer formats use a custom packing layout where there are no + * gaps between each 10-bit sample. It packs 25 pixels into 32 bytes leaving + * the 6 most significant bits in the last byte unused zero padding bits. + * + * For example, DRM_FORMAT_BAYER_BGGR10 with IPU3_FORMAT_MOD_PACKED: + * + * 0 row 0 (BGBGBGBGBGBGBGBGBGBGBGBGB) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | b0 b0 b0 b0 b0 b0 b0 b0 | g0 g0 g0 g0 g0 g0 b0 b0 | b1 b1 b1 b1 g0 g0 g0 g0 | g1 g1 b1 b1 b1 b1 b1 b1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g1 g1 g1 g1 g1 g1 g1 g1 | b2 b2 b2 b2 b2 b2 b2 b2 | g2 g2 g2 g2 g2 g2 b2 b2 | b3 b3 b3 b3 g2 g2 g2 g2 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g3 g3 b3 b3 b3 b3 b3 b3 | g3 g3 g3 g3 g3 g3 g3 g3 | b4 b4 b4 b4 b4 b4 b4 b4 | g4 g4 g4 g4 g4 g4 b4 b4 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | b5 b5 b5 b5 g4 g4 g4 g4 | g5 g5 b5 b5 b5 b5 b5 b5 | g5 g5 g5 g5 g5 g5 g5 g5 | b6 b6 b6 b6 b6 b6 b6 b6 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g6 g6 g6 g6 g6 g6 b6 b6 | b7 b7 b7 b7 g6 g6 g6 g6 | g7 g7 b7 b7 b7 b7 b7 b7 | g7 g7 g7 g7 g7 g7 g7 g7 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | b8 b8 b8 b8 b8 b8 b8 b8 | g8 g8 g8 g8 g8 g8 b8 b8 | b9 b9 b9 b9 g8 g8 g8 g8 | g9 g9 b9 b9 b9 b9 b9 b9 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g9 g9 g9 g9 g9 g9 g9 g9 | bA bA bA bA bA bA bA bA | gA gA gA gA gA gA bA bA | bB bB bB bB gA gA gA gA | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | gB gB bB bB bB bB bB bB | gB gB gB gB gB gB gB gB | bC bC bC bC bC bC bC bC | 0 0 0 0 0 0 bC bC | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * + * 0 row 1 (GRGRGRGRGRGRGRGRGRGRGRGRG) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g0 g0 g0 g0 g0 g0 g0 g0 | r0 r0 r0 r0 r0 r0 g0 g0 | g1 g1 g1 g1 r0 r0 r0 r0 | r1 r1 g1 g1 g1 g1 g1 g1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r1 r1 r1 r1 r1 r1 r1 r1 | g2 g2 g2 g2 g2 g2 g2 g2 | r2 r2 r2 r2 r2 r2 g2 g2 | g3 g3 g3 g3 r2 r2 r2 r2 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r3 r3 g3 g3 g3 g3 g3 g3 | r3 r3 r3 r3 r3 r3 r3 r3 | g4 g4 g4 g4 g4 g4 g4 g4 | r4 r4 r4 r4 r4 r4 g4 g4 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g5 g5 g5 g5 r4 r4 r4 r4 | r5 r5 g5 g5 g5 g5 g5 g5 | r5 r5 r5 r5 r5 r5 r5 r5 | g6 g6 g6 g6 g6 g6 g6 g6 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r6 r6 r6 r6 r6 r6 g6 g6 | g7 g7 g7 g7 r6 r6 r6 r6 | r7 r7 g7 g7 g7 g7 g7 g7 | r7 r7 r7 r7 r7 r7 r7 r7 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g8 g8 g8 g8 g8 g8 g8 g8 | r8 r8 r8 r8 r8 r8 g8 g8 | g9 g9 g9 g9 r8 r8 r8 r8 | r9 r9 g9 g9 g9 g9 g9 g9 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r9 r9 r9 r9 r9 r9 r9 r9 | gA gA gA gA gA gA gA gA | rA rA rA rA rA rA gA gA | gB gB gB gB rA rA rA rA | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | rB rB gB gB gB gB gB gB | rB rB rB rB rB rB rB rB | gC gC gC gC gC gC gC gC | 0 0 0 0 0 0 gC gC | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + */ +#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 8) + /* * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks * @@ -804,6 +922,93 @@ extern "C" { */ #define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1) +/* Mobile Industry Processor Interface (MIPI) modifiers */ + +/* + * MIPI CSI-2 packing layout + * + * The CSI-2 RAW formats (for example Bayer) use a different packing layout + * depending on the sample size. + * + * - 10-bits per sample + * Every four consecutive samples are packed into 5 bytes. Each of the first 4 + * bytes contain the 8 high order bits of the pixels, and the 5th byte + * contains the 2 least-significant bits of each pixel, in the same order. + * + * For example, DRM_FORMAT_BAYER_BGGR10 with MIPI_FORMAT_MOD_CSI2_PACKED: + * + * 0 row 0 (BGBGBGBG) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | b0 b0 b0 b0 b0 b0 b0 b0 | g0 g0 g0 g0 g0 g0 g0 g0 | b1 b1 b1 b1 b1 b1 b1 b1 | g1 g1 g1 g1 g1 g1 g1 g1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g1 g1 b1 b1 g0 g0 b0 b0 | b2 b2 b2 b2 b2 b2 b2 b2 | g2 g2 g2 g2 g2 g2 g2 g2 | b3 b3 b3 b3 b3 b3 b3 b3 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g3 g3 g3 g3 g3 g3 g3 g3 | g3 g3 b3 b3 g2 g2 b2 b2 | + * + - - - - - - - - + - - - - - - - - + + * + * 0 row 1 (GRGRGRGR) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g0 g0 g0 g0 g0 g0 g0 g0 | r0 r0 r0 r0 r0 r0 r0 r0 | g1 g1 g1 g1 g1 g1 g1 g1 | r1 r1 r1 r1 r1 r1 r1 r1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r1 r1 g1 g1 r0 r0 g0 g0 | g2 g2 g2 g2 g2 g2 g2 g2 | r2 r2 r2 r2 r2 r2 r2 r2 | g3 g3 g3 g3 g3 g3 g3 g3 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r3 r3 r3 r3 r3 r3 r3 r3 | r3 r3 g3 g3 r2 r2 g2 g2 | + * + - - - - - - - - + - - - - - - - - + + * + * - 12-bits per sample + * Every two consecutive samples are packed into three bytes. Each of the + * first two bytes contain the 8 high order bits of the pixels, and the third + * byte contains the four least-significant bits of each pixel, in the same + * order. + * + * For example, DRM_FORMAT_BAYER_GRBG12 with MIPI_FORMAT_MOD_CSI2_PACKED: + * + * 0 row 0 (GRGR) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g0 g0 g0 g0 g0 g0 g0 g0 | r0 r0 r0 r0 r0 r0 r0 r0 | r0 r0 r0 r0 g0 g0 g0 g0 | g1 g1 g1 g1 g1 g1 g1 g1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r1 r1 r1 r1 r1 r1 r1 r1 | r1 r1 r1 r1 g1 g1 g1 g1 | + * + - - - - - - - - + - - - - - - - - + + * + * 0 row 1 (BGBG) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | b0 b0 b0 b0 b0 b0 b0 b0 | g0 g0 g0 g0 g0 g0 g0 g0 | g0 g0 g0 g0 b0 b0 b0 b0 | b1 b1 b1 b1 b1 b1 b1 b1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g1 g1 g1 g1 g1 g1 g1 g1 | g1 g1 g1 g1 b1 b1 b1 b1 | + * + - - - - - - - - + - - - - - - - - + + * + * - 14-bits per sample + * Every four consecutive samples are packed into seven bytes. Each of the + * first four bytes contain the eight high order bits of the pixels, and the + * three following bytes contains the six least-significant bits of each + * pixel, in the same order. + * + * For example, DRM_FORMAT_BAYER_GBRG14 with MIPI_FORMAT_MOD_CSI2_PACKED: + * + * 0 row 0 (GBGBGBGB) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g0 g0 g0 g0 g0 g0 g0 g0 | b0 b0 b0 b0 b0 b0 b0 b0 | g1 g1 g1 g1 g1 g1 g1 g1 | b1 b1 b1 b1 b1 b1 b1 b1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | b0 b0 g0 g0 g0 g0 g0 g0 | g1 g1 g1 g1 b0 b0 b0 b0 | b1 b1 b1 b1 b1 b1 g1 g1 | g2 g2 g2 g2 g2 g2 g2 g2 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | b2 b2 b2 b2 b2 b2 b2 b2 | g3 g3 g3 g3 g3 g3 g3 g3 | b3 b3 b3 b3 b3 b3 b3 b3 | b2 b2 g2 g2 g2 g2 g2 g2 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g3 g3 g3 g3 b2 b2 b2 b2 | b3 b3 b3 b3 b3 b3 g3 g3 | + * + - - - - - - - - + - - - - - - - - + + * + * 0 row 1 (RGRGRGRG) 31 + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r0 r0 r0 r0 r0 r0 r0 r0 | g0 g0 g0 g0 g0 g0 g0 g0 | r1 r1 r1 r1 r1 r1 r1 r1 | g1 g1 g1 g1 g1 g1 g1 g1 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g0 g0 r0 r0 r0 r0 r0 r0 | r1 r1 r1 r1 g0 g0 g0 g0 | g1 g1 g1 g1 g1 g1 r1 r1 | r2 r2 r2 r2 r2 r2 r2 r2 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | g2 g2 g2 g2 g2 g2 g2 g2 | r3 r3 r3 r3 r3 r3 r3 r3 | g3 g3 g3 g3 g3 g3 g3 g3 | g2 g2 r2 r2 r2 r2 r2 r2 | + * + - - - - - - - - + - - - - - - - - + - - - - - - - - + - - - - - - - - + + * | r3 r3 r3 r3 g2 g2 g2 g2 | g3 g3 g3 g3 g3 g3 r3 r3 | + * + - - - - - - - - + - - - - - - - - + + */ +#define MIPI_FORMAT_MOD_CSI2_PACKED fourcc_mod_code(MIPI, 1) + #if defined(__cplusplus) } #endif -- 2.26.2

6 7

[PATCH 1/3] drm/edid: Allow looking for ext blocks starting from a specified index
by Ville Syrjala 02 Jul '20

02 Jul '20

From: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Apparently EDIDs with multiple DispID ext blocks is a thing, so prepare for iterating through multiple ext blocks of the same type by passing the starting ext block index to drm_find_edid_extension(). Well also have drm_find_edid_extension() update the index to point to the next ext block on success. Thus we should be able to call drm_find_edid_extension() in loop. Signed-off-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> --- drivers/gpu/drm/drm_edid.c | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index d8372d63851b..f2531d51dfa2 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3188,7 +3188,8 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, /* * Search EDID for CEA extension block. */ -static u8 *drm_find_edid_extension(const struct edid *edid, int ext_id) +static u8 *drm_find_edid_extension(const struct edid *edid, + int ext_id, int *ext_index) { u8 *edid_ext = NULL; int i; @@ -3198,23 +3199,26 @@ static u8 *drm_find_edid_extension(const struct edid *edid, int ext_id) return NULL; /* Find CEA extension */ - for (i = 0; i < edid->extensions; i++) { + for (i = *ext_index; i < edid->extensions; i++) { edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); if (edid_ext[0] == ext_id) break; } - if (i == edid->extensions) + if (i >= edid->extensions) return NULL; + *ext_index = i + 1; + return edid_ext; } static u8 *drm_find_displayid_extension(const struct edid *edid, - int *length, int *idx) + int *length, int *idx, + int *ext_index) { - u8 *displayid = drm_find_edid_extension(edid, DISPLAYID_EXT); + u8 *displayid = drm_find_edid_extension(edid, DISPLAYID_EXT, ext_index); struct displayid_hdr *base; int ret; @@ -3241,14 +3245,18 @@ static u8 *drm_find_cea_extension(const struct edid *edid) struct displayid_block *block; u8 *cea; u8 *displayid; + int ext_index; /* Look for a top level CEA extension block */ - cea = drm_find_edid_extension(edid, CEA_EXT); + ext_index = 0; + cea = drm_find_edid_extension(edid, CEA_EXT, &ext_index); if (cea) return cea; /* CEA blocks can also be found embedded in a DisplayID block */ - displayid = drm_find_displayid_extension(edid, &length, &idx); + ext_index = 0; + displayid = drm_find_displayid_extension(edid, &length, &idx, + &ext_index); if (!displayid) return NULL; @@ -5195,8 +5203,10 @@ static int add_displayid_detailed_modes(struct drm_connector *connector, int length, idx; struct displayid_block *block; int num_modes = 0; + int ext_index = 0; - displayid = drm_find_displayid_extension(edid, &length, &idx); + displayid = drm_find_displayid_extension(edid, &length, &idx, + &ext_index); if (!displayid) return 0; @@ -5870,11 +5880,13 @@ void drm_update_tile_info(struct drm_connector *connector, const struct edid *edid) { const void *displayid = NULL; + int ext_index = 0; int length, idx; int ret; connector->has_tile = false; - displayid = drm_find_displayid_extension(edid, &length, &idx); + displayid = drm_find_displayid_extension(edid, &length, &idx, + &ext_index); if (!displayid) { /* drop reference to any tile group we had */ goto out_drop_ref; -- 2.26.2

3 7

[RFC PATCH v5 0/6] Exynos: Simple QoS for exynos-bus using interconnect
by Sylwester Nawrocki 02 Jul '20

02 Jul '20

This patchset adds interconnect API support for the Exynos SoC "samsung, exynos-bus" compatible devices, which already have their corresponding exynos-bus driver in the devfreq subsystem. Complementing the devfreq driver with an interconnect functionality allows to ensure the QoS requirements of devices accessing the system memory (e.g. video processing devices) are fulfilled and to avoid issues like the one discussed in thread [1]. This patch series depends on 3 patches from Artur for the interconnect API [2], which introduce following changes: - exporting of_icc_get_from_provider() to avoid hard coding every graph edge in the DT or driver source, - relaxing the requirement on #interconnect-cells, so there is no need to provide dummy node IDs in the DT, - adding new field in struct icc_provider to explicitly allow configuring node pairs from two different providers. This series adds implementation of interconnect provider per each "samsung, exynos-bus" compatible DT node, with one interconnect node per provider. The interconnect code which was previously added as a part of the devfreq driver has been converted to a separate platform driver. In the devfreq a corresponding virtual child platform device is registered. Integration of devfreq and interconnect frameworks is achieved through the PM QoS API. A sample interconnect consumer for exynos-mixer is added in patches 5/6, 6/6, it is currently added only for exynos4412 and allows to address the mixer DMA underrun error issues [1]. The series has been tested on Odroid U3 board. It is based on icc-next branch with devfreq-next branch merged and patches [2] applied. -- Regards, Sylwester -- Changes since v3 [3] (v4 skipped to align with patchset [1]), detailed changes are listed at each patch: - conversion to a separate interconnect (platform) driver, - an update of the DT binding documenting new optional properties: #interconnect-cells, samsung,interconnect-parent in "samsung,exynos-bus" nodes, - new DT properties added to the SoC, rather than to the board specific files. Changes since v2 [5]: - Use icc_std_aggregate(). - Implement a different modification of apply_constraints() in drivers/interconnect/core.c (patch 03). - Use 'exynos,interconnect-parent-node' in the DT instead of 'devfreq'/'parent', depending on the bus. - Rebase on DT patches that deprecate the 'devfreq' DT property. - Improve error handling, including freeing generated IDs on failure. - Remove exynos_bus_icc_connect() and add exynos_bus_icc_get_parent(). Changes since v1 [4]: - Rebase on coupled regulators patches. - Use dev_pm_qos_*() API instead of overriding frequency in exynos_bus_target(). - Use IDR for node ID allocation. - Reverse order of multiplication and division in mixer_set_memory_bandwidth() (patch 07) to avoid integer overflow. References: [1] https://patchwork.kernel.org/patch/10861757/ (original issue) [2] https://www.spinics.net/lists/linux-samsung-soc/msg70014.html [3] https://lore.kernel.org/linux-pm/20191220115653.6487-1-a.swigon@samsung.com [4] https://patchwork.kernel.org/cover/11054417/ (v1 of this RFC) [5] https://patchwork.kernel.org/cover/11152595/ (v2 of this RFC) Artur Świgoń (1): ARM: dts: exynos: Add interconnects to Exynos4412 mixer Marek Szyprowski (1): drm: exynos: mixer: Add interconnect support Sylwester Nawrocki (4): dt-bindings: exynos-bus: Add documentation for interconnect properties interconnect: Add generic interconnect driver for Exynos SoCs PM / devfreq: exynos-bus: Add registration of interconnect child device ARM: dts: exynos: Add interconnect properties to Exynos4412 bus nodes .../devicetree/bindings/devfreq/exynos-bus.txt | 15 +- arch/arm/boot/dts/exynos4412.dtsi | 6 + drivers/devfreq/exynos-bus.c | 17 ++ drivers/gpu/drm/exynos/exynos_mixer.c | 73 +++++++- drivers/interconnect/Kconfig | 1 + drivers/interconnect/Makefile | 1 + drivers/interconnect/exynos/Kconfig | 6 + drivers/interconnect/exynos/Makefile | 4 + drivers/interconnect/exynos/exynos.c | 185 +++++++++++++++++++++ 9 files changed, 301 insertions(+), 7 deletions(-) create mode 100644 drivers/interconnect/exynos/Kconfig create mode 100644 drivers/interconnect/exynos/Makefile create mode 100644 drivers/interconnect/exynos/exynos.c -- 2.7.4

5 26

[PATCH 1/2] Revert "dma-buf: Report signaled links inside dma-fence-chain"
by Lionel Landwerlin 02 Jul '20

02 Jul '20

This reverts commit 5de376bb434f80a13138f0ebedc8351ab73d8b0d. This change breaks synchronization of a timeline. dma_fence_chain_find_seqno() might be a bit of a confusing name but this function is not trying to find a particular seqno, is supposed to give a fence to wait on for a particular point in the timeline. In a timeline, a particular value is reached when all the points up to and including that value have signaled. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin(a)intel.com> --- drivers/dma-buf/dma-fence-chain.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index c435bbba851c..3d123502ff12 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -99,12 +99,6 @@ int dma_fence_chain_find_seqno(struct dma_fence **pfence, uint64_t seqno) return -EINVAL; dma_fence_chain_for_each(*pfence, &chain->base) { - if ((*pfence)->seqno < seqno) { /* already signaled */ - dma_fence_put(*pfence); - *pfence = NULL; - break; - } - if ((*pfence)->context != chain->base.context || to_dma_fence_chain(*pfence)->prev_seqno < seqno) break; @@ -228,7 +222,6 @@ EXPORT_SYMBOL(dma_fence_chain_ops); * @chain: the chain node to initialize * @prev: the previous fence * @fence: the current fence - * @seqno: the sequence number (syncpt) of the fence within the chain * * Initialize a new chain node and either start a new chain or add the node to * the existing chain of the previous fence. -- 2.27.0

7 19

[PATCH 00/14] drm/ast: Managed modesetting
by Thomas Zimmermann 02 Jul '20

02 Jul '20

This is the first patchset to convert ast to use managed interfaces. These patches address modesetting. I expect that there will be at least one more set of patches for memory management and one for device strcutures. Patches 1 to 11 tackle HW cursor handling. The overall point is to get cursor support out of the plane functions and put the code into helpers. There are quite a few improvements that make cursors easier and faster to use. Patch 10 converts cursors to managed release. With cursors out of the way, modesetting initialization is much more simple. Patches 12 to 14 put all related code next to each other and switch to managed initialization. The patchset was tested on AST2100 hardware. Thomas Zimmermann (14): drm/ast: Move cursor functions to ast_cursor.c drm/ast: Pass struct ast_private instance to cursor init/fini functions drm/ast: Move cursor fb pinning and mapping into helper drm/ast: Update cursor image and checksum from same function drm/ast: Move cursor pageflip into helper drm/ast: Replace ast_cursor_move() with ast_cursor_show() drm/ast: Don't enable HW cursors twice during atomic update drm/ast: Add helper to hide cursor drm/ast: Keep cursor HW BOs mapped drm/ast: Managed cursor release drm/ast: Init cursors before creating modesetting structures drm/ast: Replace struct ast_crtc with struct drm_crtc drm/ast: Use managed mode-config init drm/ast: Initialize mode setting in ast_mode_config_init() drivers/gpu/drm/ast/Makefile | 3 +- drivers/gpu/drm/ast/ast_cursor.c | 289 +++++++++++++++++++++++++++ drivers/gpu/drm/ast/ast_drv.h | 19 +- drivers/gpu/drm/ast/ast_main.c | 35 +--- drivers/gpu/drm/ast/ast_mode.c | 322 ++++++------------------------- 5 files changed, 359 insertions(+), 309 deletions(-) create mode 100644 drivers/gpu/drm/ast/ast_cursor.c -- 2.27.0

3 19

[PATCH 00/59] Add support for Keem Bay DRM driver
by Anitha Chrisanthus 02 Jul '20

02 Jul '20

This is a new DRM driver for Intel's KeemBay SOC. The SoC couples an ARM Cortex A53 CPU with an Intel Movidius VPU. This driver is tested with the KMB EVM board which is the refernce baord for Keem Bay SOC. The SOC's display pipeline is as follows +--------------+ +---------+ +-----------------------+ |LCD controller| -> |Mipi DSI | -> |Mipi to HDMI Converter | +--------------+ +---------+ +-----------------------+ LCD controller and Mipi DSI transmitter are part of the SOC and mipi to HDMI converter is ADV7535 for KMB EVM board. The DRM driver is a basic KMS atomic modesetting display driver and has no 2D or 3D graphics.It calls into the ADV bridge driver at the connector level. Only 1080p resolution and single plane is supported at this time. The usecase is for debugging video and camera outputs. Since we are just starting the upstream process, the KMB EVM board is not in mainline and so Device tree changes are missing. Anitha Chrisanthus (52): drm/kmb: Add support for KeemBay Display drm/kmb: Added id to kmb_plane drm/kmb: Set correct values in the LAYERn_CFG register drm/kmb: Use biwise operators for register definitions drm/kmb: Updated kmb_plane_atomic_check drm/kmb: Initial check-in for Mipi DSI drm/kmb: Set OUT_FORMAT_CFG register drm/kmb: Added mipi_dsi_host initialization drm/kmb: Part 1 of Mipi Tx Initialization drm/kmb: Part 2 of Mipi Tx Initialization drm/kmb: Use correct mmio offset from data book drm/kmb: Part3 of Mipi Tx initialization drm/kmb: Part4 of Mipi Tx Initialization drm/kmb: Correct address offsets for mipi registers drm/kmb: Part5 of Mipi Tx Intitialization drm/kmb: Part6 of Mipi Tx Initialization drm/kmb: Part7 of Mipi Tx Initialization drm/kmb: Part8 of Mipi Tx Initialization drm/kmb: Added ioremap/iounmap for register access drm/kmb: Register IRQ for LCD drm/kmb: IRQ handlers for LCD and mipi dsi drm/kmb: Set hardcoded values to LCD_VSYNC_START drm/kmb: Additional register programming to update_plane drm/kmb: Add ADV7535 bridge drm/kmb: Display clock enable/disable drm/kmb: rebase to newer kernel version drm/kmb: minor name change to match device tree drm/kmb: Changed MMIO size drm/kmb: Defer Probe drm/kmb: call bridge init in the very beginning drm/kmb: Enable MSS_CAM_CLK_CTRL for LCD and MIPI drm/kmb: Set MSS_CAM_RSTN_CTRL along with enable drm/kmb: Mipi DPHY initialization changes drm/kmb: Fixed driver unload drm/kmb: Added LCD_TEST config drm/kmb: Changes for LCD to Mipi drm/kmb: Update LCD programming to match MIPI drm/kmb: Changed name of driver to kmb-drm drm/kmb: Mipi settings from input timings drm/kmb: Enable LCD interrupts drm/kmb: Enable LCD interrupts during modeset drm/kmb: Don’t inadvertantly disable LCD controller drm/kmb: SWAP R and B LCD Layer order drm/kmb: Disable ping pong mode drm/kmb: Do the layer initializations only once drm/kmb: disable the LCD layer in EOF irq handler drm/kmb: Initialize uninitialized variables drm/kmb: Added useful messages in LCD ISR kmb/drm: Prune unsupported modes drm/kmb: workaround for dma undeflow issue drm/kmb: Get System Clock from SCMI drm/kmb: work around for planar formats Edmund Dea (7): drm/kmb: Cleanup probe functions drm/kmb: Revert dsi_host back to a static variable drm/kmb: Initialize clocks for clk_msscam, clk_mipi_ecfg, & clk_mipi_cfg. drm/kmb: Remove declaration of irq_lcd/irq_mipi drm/kmb: Enable MIPI TX HS Test Pattern Generation drm/kmb: Write to LCD_LAYERn_CFG only once drm/kmb: Cleaned up code drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/kmb/Kconfig | 12 + drivers/gpu/drm/kmb/Makefile | 2 + drivers/gpu/drm/kmb/kmb_crtc.c | 243 +++++ drivers/gpu/drm/kmb/kmb_crtc.h | 61 ++ drivers/gpu/drm/kmb/kmb_drv.c | 828 +++++++++++++++++ drivers/gpu/drm/kmb/kmb_drv.h | 196 ++++ drivers/gpu/drm/kmb/kmb_dsi.c | 1950 +++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/kmb/kmb_dsi.h | 390 ++++++++ drivers/gpu/drm/kmb/kmb_plane.c | 538 +++++++++++ drivers/gpu/drm/kmb/kmb_plane.h | 142 +++ drivers/gpu/drm/kmb/kmb_regs.h | 758 +++++++++++++++ 13 files changed, 5123 insertions(+) create mode 100644 drivers/gpu/drm/kmb/Kconfig create mode 100644 drivers/gpu/drm/kmb/Makefile create mode 100644 drivers/gpu/drm/kmb/kmb_crtc.c create mode 100644 drivers/gpu/drm/kmb/kmb_crtc.h create mode 100644 drivers/gpu/drm/kmb/kmb_drv.c create mode 100644 drivers/gpu/drm/kmb/kmb_drv.h create mode 100644 drivers/gpu/drm/kmb/kmb_dsi.c create mode 100644 drivers/gpu/drm/kmb/kmb_dsi.h create mode 100644 drivers/gpu/drm/kmb/kmb_plane.c create mode 100644 drivers/gpu/drm/kmb/kmb_plane.h create mode 100644 drivers/gpu/drm/kmb/kmb_regs.h -- 2.7.4

4 62

[PATCH 0/4] DVFS support for dpu and dsi
by Rajendra Nayak 02 Jul '20

02 Jul '20

These patches add DVFS support for DPU and DSI. Where posted earlier as part of a series with multiple different drivers [1] I have split them into specific driver changes in order to avoid confusion on dependencies. Also added the corresponding device tree changes for sdm845 and sc7180 platforms. These patches have no other dependency and will need to be merged in via the MSM DRM tree. DT patches will need to land via the msm tree. [1] https://lkml.org/lkml/2020/6/15/535 Rajendra Nayak (4): drm/msm/dpu: Use OPP API to set clk/perf state drm/msm: dsi: Use OPP API to set clk/perf state arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domains arch/arm64/boot/dts/qcom/sc7180.dtsi | 49 ++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 59 +++++++++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 26 +++++++++++- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 4 ++ drivers/gpu/drm/msm/dsi/dsi.h | 2 + drivers/gpu/drm/msm/dsi/dsi_cfg.c | 4 +- drivers/gpu/drm/msm/dsi/dsi_host.c | 58 ++++++++++++++++++++++++++ 8 files changed, 201 insertions(+), 4 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

2 8

[PATCH RESEND v1] drm/meson: viu: fix setting the OSD burst length in VIU_OSD1_FIFO_CTRL_STAT
by Martin Blumenstingl 02 Jul '20

02 Jul '20

The burst length is configured in VIU_OSD1_FIFO_CTRL_STAT[31] and VIU_OSD1_FIFO_CTRL_STAT[11:10]. The public S905D3 datasheet describes this as: - 0x0 = up to 24 per burst - 0x1 = up to 32 per burst - 0x2 = up to 48 per burst - 0x3 = up to 64 per burst - 0x4 = up to 96 per burst - 0x5 = up to 128 per burst The lower two bits map to VIU_OSD1_FIFO_CTRL_STAT[11:10] while the upper bit maps to VIU_OSD1_FIFO_CTRL_STAT[31]. Replace meson_viu_osd_burst_length_reg() with pre-defined macros which set these values. meson_viu_osd_burst_length_reg() always returned 0 (for the two used values: 32 and 64 at least) and thus incorrectly set the burst size to 24. Fixes: 147ae1cbaa1842 ("drm: meson: viu: use proper macros instead of magic constants") Signed-off-by: Martin Blumenstingl <martin.blumenstingl(a)googlemail.com> --- re-send of v1 [0] with no changes as I still noticed that this is sitting in my tree and I wasn't asked to change anything in v1. [0] https://patchwork.kernel.org/patch/11510045/ drivers/gpu/drm/meson/meson_registers.h | 6 ++++++ drivers/gpu/drm/meson/meson_viu.c | 11 ++--------- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_registers.h b/drivers/gpu/drm/meson/meson_registers.h index 8ea00546cd4e..049c4bfe2a3a 100644 --- a/drivers/gpu/drm/meson/meson_registers.h +++ b/drivers/gpu/drm/meson/meson_registers.h @@ -261,6 +261,12 @@ #define VIU_OSD_FIFO_DEPTH_VAL(val) ((val & 0x7f) << 12) #define VIU_OSD_WORDS_PER_BURST(words) (((words & 0x4) >> 1) << 22) #define VIU_OSD_FIFO_LIMITS(size) ((size & 0xf) << 24) +#define VIU_OSD_BURST_LENGTH_24 (0x0 << 31 | 0x0 << 10) +#define VIU_OSD_BURST_LENGTH_32 (0x0 << 31 | 0x1 << 10) +#define VIU_OSD_BURST_LENGTH_48 (0x0 << 31 | 0x2 << 10) +#define VIU_OSD_BURST_LENGTH_64 (0x0 << 31 | 0x3 << 10) +#define VIU_OSD_BURST_LENGTH_96 (0x1 << 31 | 0x0 << 10) +#define VIU_OSD_BURST_LENGTH_128 (0x1 << 31 | 0x1 << 10) #define VD1_IF0_GEN_REG 0x1a50 #define VD1_IF0_CANVAS0 0x1a51 diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c index 304f8ff1339c..aede0c67a57f 100644 --- a/drivers/gpu/drm/meson/meson_viu.c +++ b/drivers/gpu/drm/meson/meson_viu.c @@ -411,13 +411,6 @@ void meson_viu_gxm_disable_osd1_afbc(struct meson_drm *priv) priv->io_base + _REG(VIU_MISC_CTRL1)); } -static inline uint32_t meson_viu_osd_burst_length_reg(uint32_t length) -{ - uint32_t val = (((length & 0x80) % 24) / 12); - - return (((val & 0x3) << 10) | (((val & 0x4) >> 2) << 31)); -} - void meson_viu_init(struct meson_drm *priv) { uint32_t reg; @@ -444,9 +437,9 @@ void meson_viu_init(struct meson_drm *priv) VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */ if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) - reg |= meson_viu_osd_burst_length_reg(32); + reg |= VIU_OSD_BURST_LENGTH_32; else - reg |= meson_viu_osd_burst_length_reg(64); + reg |= VIU_OSD_BURST_LENGTH_64; writel_relaxed(reg, priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT)); writel_relaxed(reg, priv->io_base + _REG(VIU_OSD2_FIFO_CTRL_STAT)); -- 2.27.0

2 2

[PATCH v3 0/16] backlight updates
by Sam Ravnborg 02 Jul '20

02 Jul '20

v3: - Dropped video patch that was reviewd and thus applied - Updated kernel-doc so all fields now have a short intro - Improved readability in a lot of places, thanks to review feedback from Daniel - thanks! - Added better intro to backlight - Added acks Several other smaller changes documented in the patches. I left out patches to make functions static as there are dependencies to drm-misc-next for these. When this is landed I have a pile of follow-up patches waiting, mostly introducing backlight_is_blank() all over. v2: - Dropped drm patches that was reviewed and thus applied (Thanks Tomi) - Updated backligth_is_blank() based on Daniel's feedback - Dropped EXPORT_SYMBOL that was no longer relevant - Reordered patches, so patches with no external dependencies comes first - Updated the description that follows. This following series touches a lot of backlight things. Starts with a small refactoring in backligth.c to remove some indents. This increases the readability and no functional changes. Then a new helper backlight_is_blank() is added. This helper will simplify the implementation of update_status() in almost all backlight drivers. Then while surfing the code I missed some documentation. So I got a bit carried away and updated the documentation for the backlight core and added it to kernel-doc. The documentation express my current understanding. Everything from spelling errors to outright wrong content shall be anticipated - so please review! We are all best helped if the documentation is correct and up-to-date and it is readable. In this process I identified that the backlight_bl driver was no longer in use - so drop it. Everything builds, but so far no run-time testing. Sam Sam Ravnborg (13): backlight: refactor fb_notifier_callback() backlight: add backlight_is_blank() backlight: improve backlight_ops documentation backlight: improve backlight_properties documentation backlight: improve backlight_device documentation backlight: document inline functions in backlight.h backlight: document enums in backlight.h backlight: remove the unused backlight_bl driver backlight: drop extern from prototypes backlight: add overview and update existing doc backlight: wire up kernel-doc documentation backlight: as3711_bl: introduce backlight_is_blank() backlight: use backlight_is_blank() in all backlight drivers Documentation/gpu/backlight.rst | 12 + Documentation/gpu/index.rst | 1 + drivers/video/backlight/88pm860x_bl.c | 8 +- drivers/video/backlight/Kconfig | 8 - drivers/video/backlight/Makefile | 1 - drivers/video/backlight/adp5520_bl.c | 5 +- drivers/video/backlight/adp8860_bl.c | 5 +- drivers/video/backlight/adp8870_bl.c | 5 +- drivers/video/backlight/as3711_bl.c | 8 +- drivers/video/backlight/backlight.c | 174 +++++++++----- drivers/video/backlight/bd6107.c | 4 +- drivers/video/backlight/corgi_lcd.c | 5 +- drivers/video/backlight/cr_bllcd.c | 22 +- drivers/video/backlight/da903x_bl.c | 8 +- drivers/video/backlight/ep93xx_bl.c | 3 +- drivers/video/backlight/generic_bl.c | 110 --------- drivers/video/backlight/gpio_backlight.c | 4 +- drivers/video/backlight/hp680_bl.c | 4 +- drivers/video/backlight/jornada720_bl.c | 2 +- drivers/video/backlight/kb3886_bl.c | 4 +- drivers/video/backlight/led_bl.c | 4 +- drivers/video/backlight/lm3533_bl.c | 4 +- drivers/video/backlight/locomolcd.c | 4 +- drivers/video/backlight/lv5207lp.c | 4 +- drivers/video/backlight/max8925_bl.c | 8 +- drivers/video/backlight/pwm_bl.c | 4 +- drivers/video/backlight/qcom-wled.c | 4 +- drivers/video/backlight/tps65217_bl.c | 4 +- drivers/video/backlight/wm831x_bl.c | 8 +- include/linux/backlight.h | 374 +++++++++++++++++++++++++------ 30 files changed, 465 insertions(+), 346 deletions(-)

4 22

[PATCH v2] dt-bindings: display: Convert connectors to DT schema
by Rob Herring 01 Jul '20

01 Jul '20

Convert the analog TV, DVI, HDMI, and VGA connector bindings to DT schema format. Cc: Sam Ravnborg <sam(a)ravnborg.org> Cc: Laurent Pinchart <Laurent.pinchart(a)ideasonboard.com> Cc: Maxime Ripard <mripard(a)kernel.org> Signed-off-by: Rob Herring <robh(a)kernel.org> --- v2: - Make Laurent maintainer - Add missing port and compatible required - Drop copy-n-paste 'type' from dvi-connector - Use 4 space indent on examples --- .../display/connector/analog-tv-connector.txt | 31 -------- .../connector/analog-tv-connector.yaml | 52 ++++++++++++++ .../display/connector/dvi-connector.txt | 36 ---------- .../display/connector/dvi-connector.yaml | 70 +++++++++++++++++++ .../display/connector/hdmi-connector.txt | 31 -------- .../display/connector/hdmi-connector.yaml | 64 +++++++++++++++++ .../display/connector/vga-connector.txt | 36 ---------- .../display/connector/vga-connector.yaml | 46 ++++++++++++ 8 files changed, 232 insertions(+), 134 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt create mode 100644 Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml delete mode 100644 Documentation/devicetree/bindings/display/connector/dvi-connector.txt create mode 100644 Documentation/devicetree/bindings/display/connector/dvi-connector.yaml delete mode 100644 Documentation/devicetree/bindings/display/connector/hdmi-connector.txt create mode 100644 Documentation/devicetree/bindings/display/connector/hdmi-connector.yaml delete mode 100644 Documentation/devicetree/bindings/display/connector/vga-connector.txt create mode 100644 Documentation/devicetree/bindings/display/connector/vga-connector.yaml diff --git a/Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt b/Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt deleted file mode 100644 index 883bcb2604c7..000000000000 --- a/Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt +++ /dev/null @@ -1,31 +0,0 @@ -Analog TV Connector -=================== - -Required properties: -- compatible: "composite-video-connector" or "svideo-connector" - -Optional properties: -- label: a symbolic name for the connector -- sdtv-standards: limit the supported TV standards on a connector to the given - ones. If not specified all TV standards are allowed. - Possible TV standards are defined in - include/dt-bindings/display/sdtv-standards.h. - -Required nodes: -- Video port for TV input - -Example -------- -#include <dt-bindings/display/sdtv-standards.h> - -tv: connector { - compatible = "composite-video-connector"; - label = "tv"; - sdtv-standards = <(SDTV_STD_PAL | SDTV_STD_NTSC)>; - - port { - tv_connector_in: endpoint { - remote-endpoint = <&venc_out>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml b/Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml new file mode 100644 index 000000000000..eebe88fed999 --- /dev/null +++ b/Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/connector/analog-tv-connector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog TV Connector + +maintainers: + - Laurent Pinchart <Laurent.pinchart(a)ideasonboard.com> + +properties: + compatible: + enum: + - composite-video-connector + - svideo-connector + + label: true + + sdtv-standards: + description: + Limit the supported TV standards on a connector to the given ones. If + not specified all TV standards are allowed. Possible TV standards are + defined in include/dt-bindings/display/sdtv-standards.h. + $ref: /schemas/types.yaml#/definitions/uint32 + + port: + description: Connection to controller providing analog TV signals + +required: + - compatible + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/display/sdtv-standards.h> + + connector { + compatible = "composite-video-connector"; + label = "tv"; + sdtv-standards = <(SDTV_STD_PAL | SDTV_STD_NTSC)>; + + port { + tv_connector_in: endpoint { + remote-endpoint = <&venc_out>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/connector/dvi-connector.txt b/Documentation/devicetree/bindings/display/connector/dvi-connector.txt deleted file mode 100644 index 207e42e9eba0..000000000000 --- a/Documentation/devicetree/bindings/display/connector/dvi-connector.txt +++ /dev/null @@ -1,36 +0,0 @@ -DVI Connector -============== - -Required properties: -- compatible: "dvi-connector" - -Optional properties: -- label: a symbolic name for the connector -- ddc-i2c-bus: phandle to the i2c bus that is connected to DVI DDC -- analog: the connector has DVI analog pins -- digital: the connector has DVI digital pins -- dual-link: the connector has pins for DVI dual-link -- hpd-gpios: HPD GPIO number - -Required nodes: -- Video port for DVI input - -Note: One (or both) of 'analog' or 'digital' must be set. - -Example -------- - -dvi0: connector@0 { - compatible = "dvi-connector"; - label = "dvi"; - - digital; - - ddc-i2c-bus = <&i2c3>; - - port { - dvi_connector_in: endpoint { - remote-endpoint = <&tfp410_out>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/connector/dvi-connector.yaml b/Documentation/devicetree/bindings/display/connector/dvi-connector.yaml new file mode 100644 index 000000000000..71cb9220fa59 --- /dev/null +++ b/Documentation/devicetree/bindings/display/connector/dvi-connector.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/connector/dvi-connector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DVI Connector + +maintainers: + - Laurent Pinchart <Laurent.pinchart(a)ideasonboard.com> + +properties: + compatible: + const: dvi-connector + + label: true + + hpd-gpios: + description: A GPIO line connected to HPD + maxItems: 1 + + ddc-i2c-bus: + description: phandle link to the I2C controller used for DDC EDID probing + $ref: /schemas/types.yaml#/definitions/phandle + + analog: + type: boolean + description: the connector has DVI analog pins + + digital: + type: boolean + description: the connector has DVI digital pins + + dual-link: + type: boolean + description: the connector has pins for DVI dual-link + + port: + description: Connection to controller providing DVI signals + +required: + - compatible + - port + +anyOf: + - required: + - analog + - required: + - digital + +additionalProperties: false + +examples: + - | + connector { + compatible = "dvi-connector"; + label = "dvi"; + + digital; + + ddc-i2c-bus = <&i2c3>; + + port { + dvi_connector_in: endpoint { + remote-endpoint = <&tfp410_out>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt b/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt deleted file mode 100644 index aeb07c4bd703..000000000000 --- a/Documentation/devicetree/bindings/display/connector/hdmi-connector.txt +++ /dev/null @@ -1,31 +0,0 @@ -HDMI Connector -============== - -Required properties: -- compatible: "hdmi-connector" -- type: the HDMI connector type: "a", "b", "c", "d" or "e" - -Optional properties: -- label: a symbolic name for the connector -- hpd-gpios: HPD GPIO number -- ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing -- ddc-en-gpios: signal to enable DDC bus - -Required nodes: -- Video port for HDMI input - -Example -------- - -hdmi0: connector@1 { - compatible = "hdmi-connector"; - label = "hdmi"; - - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&tpd12s015_out>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/connector/hdmi-connector.yaml b/Documentation/devicetree/bindings/display/connector/hdmi-connector.yaml new file mode 100644 index 000000000000..14d7128af592 --- /dev/null +++ b/Documentation/devicetree/bindings/display/connector/hdmi-connector.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/connector/hdmi-connector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HDMI Connector + +maintainers: + - Laurent Pinchart <Laurent.pinchart(a)ideasonboard.com> + +properties: + compatible: + const: hdmi-connector + + type: + description: The HDMI connector type + enum: + - a # Standard full size + - b # Never deployed? + - c # Mini + - d # Micro + - e # automotive + + label: true + + hpd-gpios: + description: A GPIO line connected to HPD + maxItems: 1 + + ddc-i2c-bus: + description: phandle link to the I2C controller used for DDC EDID probing + $ref: /schemas/types.yaml#/definitions/phandle + + ddc-en-gpios: + description: GPIO signal to enable DDC bus + maxItems: 1 + + port: + description: Connection to controller providing HDMI signals + +required: + - compatible + - port + - type + +additionalProperties: false + +examples: + - | + connector { + compatible = "hdmi-connector"; + label = "hdmi"; + + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&tpd12s015_out>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/connector/vga-connector.txt b/Documentation/devicetree/bindings/display/connector/vga-connector.txt deleted file mode 100644 index c727f298e7ad..000000000000 --- a/Documentation/devicetree/bindings/display/connector/vga-connector.txt +++ /dev/null @@ -1,36 +0,0 @@ -VGA Connector -============= - -Required properties: - -- compatible: "vga-connector" - -Optional properties: - -- label: a symbolic name for the connector corresponding to a hardware label -- ddc-i2c-bus: phandle to the I2C bus that is connected to VGA DDC - -Required nodes: - -The VGA connector internal connections are modeled using the OF graph bindings -specified in Documentation/devicetree/bindings/graph.txt. - -The VGA connector has a single port that must be connected to a video source -port. - - -Example -------- - -vga0: connector@0 { - compatible = "vga-connector"; - label = "vga"; - - ddc-i2c-bus = <&i2c3>; - - port { - vga_connector_in: endpoint { - remote-endpoint = <&adv7123_out>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/connector/vga-connector.yaml b/Documentation/devicetree/bindings/display/connector/vga-connector.yaml new file mode 100644 index 000000000000..5782c4bb3252 --- /dev/null +++ b/Documentation/devicetree/bindings/display/connector/vga-connector.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/connector/vga-connector.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VGA Connector + +maintainers: + - Laurent Pinchart <Laurent.pinchart(a)ideasonboard.com> + +properties: + compatible: + const: vga-connector + + label: true + + ddc-i2c-bus: + description: phandle link to the I2C controller used for DDC EDID probing + $ref: /schemas/types.yaml#/definitions/phandle + + port: + description: Connection to controller providing VGA signals + +required: + - compatible + - port + +additionalProperties: false + +examples: + - | + connector { + compatible = "vga-connector"; + label = "vga"; + + ddc-i2c-bus = <&i2c3>; + + port { + vga_connector_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + +... -- 2.25.1

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dri-devel June 2020