dri-devel June 2020

dri-devel@lists.freedesktop.org

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731 discussions

[PATCH] drm/connector: Add of_drm_find_connector
by Andy Yan 01 Jul '20

01 Jul '20

Add a function to look up a connector by device tree node, like what of_drm_find_bridge/panel does. Signed-off-by: Andy Yan <andy.yan(a)rock-chips.com> --- drivers/gpu/drm/drm_connector.c | 33 +++++++++++++++++++++++++++++++++ include/drm/drm_connector.h | 3 +++ 2 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c index d877ddc6dc57..516376cd1868 100644 --- a/drivers/gpu/drm/drm_connector.c +++ b/drivers/gpu/drm/drm_connector.c @@ -743,6 +743,39 @@ void drm_connector_list_iter_end(struct drm_connector_list_iter *iter) } EXPORT_SYMBOL(drm_connector_list_iter_end); +#ifdef CONFIG_OF +/** + * of_drm_find_connector - look up a connector using a device tree node + * @np: device tree node of the connector + * + * + * Return: A pointer to the connector which match the specified device tree + * node or NULL if no panel matching the device tree node can be found, or + * -ENODEV: the device is not available (status != "okay" or "ok") + */ +struct drm_connector *of_drm_find_connector(struct drm_device *dev, const struct device_node *np) +{ + struct drm_connector *connector; + struct drm_connector_list_iter conn_iter; + + if (!of_device_is_available(np)) + return ERR_PTR(-ENODEV); + + drm_connector_list_iter_begin(dev, &conn_iter); + drm_for_each_connector_iter(connector, &conn_iter) { + if (connector->of_node == np) { + drm_connector_list_iter_end(&conn_iter); + return connector; + } + } + drm_connector_list_iter_end(&conn_iter); + + return NULL; +} +EXPORT_SYMBOL(of_drm_find_connector); +#endif + + static const struct drm_prop_enum_list drm_subpixel_enum_list[] = { { SubPixelUnknown, "Unknown" }, { SubPixelHorizontalRGB, "Horizontal RGB" }, diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index fd543d1db9b2..63932bfae84a 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -1129,6 +1129,9 @@ struct drm_connector { /** @attr: sysfs attributes */ struct device_attribute *attr; + /** @of_node: device tree node */ + struct device_node *of_node; + /** * @head: * -- 2.17.1

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[PATCH] drm: gma500: Convert to GPIO descriptors
by Linus Walleij 01 Jul '20

01 Jul '20

Finalize he conversion of GMA500 to use only GPIO descriptors. The GPIO look-up-table is associated with the device directly in the GMA500 Medfield chip driver since no explicit platform type device (such as in x86/platform/intel-mid) exists: the GMA500 probes directly from the PCI device. Apparently GPIOs 88 and 34 are used on all of these so just go ahead and register those for resetting the DSI pipes. Cc: Patrik Jakobsson <patrik.r.jakobsson(a)gmail.com> Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- drivers/gpu/drm/gma500/mdfld_device.c | 20 +++++++++ drivers/gpu/drm/gma500/mdfld_dsi_dpi.c | 2 +- drivers/gpu/drm/gma500/mdfld_dsi_output.c | 51 ++++++++++++----------- drivers/gpu/drm/gma500/mdfld_dsi_output.h | 2 +- drivers/gpu/drm/gma500/mdfld_output.h | 2 +- drivers/gpu/drm/gma500/psb_intel_drv.h | 1 - 6 files changed, 49 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/gma500/mdfld_device.c b/drivers/gpu/drm/gma500/mdfld_device.c index b718efccdcf2..be9cf6b1e3b3 100644 --- a/drivers/gpu/drm/gma500/mdfld_device.c +++ b/drivers/gpu/drm/gma500/mdfld_device.c @@ -6,6 +6,7 @@ **************************************************************************/ #include <linux/delay.h> +#include <linux/gpio/machine.h> #include <asm/intel_scu_ipc.h> @@ -505,12 +506,31 @@ static const struct psb_offset mdfld_regmap[3] = { }, }; +/* + * The GPIO lines for resetting DSI pipe 0 and 2 are available in the + * PCI device 0000:00:0c.0 on the Medfield. + */ +static struct gpiod_lookup_table mdfld_dsi_pipe_gpio_table = { + .table = { + GPIO_LOOKUP("0000:00:0c.0", 128, "dsi-pipe0-reset", + GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("0000:00:0c.0", 34, "dsi-pipe2-reset", + GPIO_ACTIVE_HIGH), + { }, + }, +}; + static int mdfld_chip_setup(struct drm_device *dev) { struct drm_psb_private *dev_priv = dev->dev_private; if (pci_enable_msi(dev->pdev)) dev_warn(dev->dev, "Enabling MSI failed!\n"); dev_priv->regmap = mdfld_regmap; + + /* Associate the GPIO lines with the DRM device */ + mdfld_dsi_pipe_gpio_table.dev_id = dev_name(dev->dev); + gpiod_add_lookup_table(&mdfld_dsi_pipe_gpio_table); + return mid_chip_setup(dev); } diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c index c976a9dd9240..ae1223f631a7 100644 --- a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c +++ b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c @@ -955,7 +955,7 @@ struct mdfld_dsi_encoder *mdfld_dsi_dpi_init(struct drm_device *dev, /* panel hard-reset */ if (p_funcs->reset) { - ret = p_funcs->reset(pipe); + ret = p_funcs->reset(dev, pipe); if (ret) { DRM_ERROR("Panel %d hard-reset failed\n", pipe); return NULL; diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_output.c b/drivers/gpu/drm/gma500/mdfld_dsi_output.c index f350ac1ead18..c9478261964a 100644 --- a/drivers/gpu/drm/gma500/mdfld_dsi_output.c +++ b/drivers/gpu/drm/gma500/mdfld_dsi_output.c @@ -28,6 +28,7 @@ #include <linux/delay.h> #include <linux/moduleparam.h> #include <linux/pm_runtime.h> +#include <linux/gpio/consumer.h> #include <asm/intel_scu_ipc.h> @@ -432,42 +433,42 @@ static int mdfld_dsi_get_default_config(struct drm_device *dev, return 0; } -int mdfld_dsi_panel_reset(int pipe) +int mdfld_dsi_panel_reset(struct drm_device *ddev, int pipe) { - unsigned gpio; - int ret = 0; - + struct device *dev = ddev->dev; + struct gpio_desc *gpiod; + + /* + * Raise the GPIO reset line for the corresponding pipe to HIGH, + * this is probably because it is active low so this takes the + * respective pipe out of reset. (We have no code to put it back + * into reset in this driver.) + */ switch (pipe) { case 0: - gpio = 128; + gpiod = gpiod_get(dev, "dsi-pipe0-reset", GPIOD_OUT_HIGH); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); break; case 2: - gpio = 34; + gpiod = gpiod_get(dev, "dsi-pipe2-reset", GPIOD_OUT_HIGH); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); break; default: - DRM_ERROR("Invalid output\n"); + DRM_DEV_ERROR(dev, "Invalid output pipe\n"); return -EINVAL; } + gpiod_put(gpiod); - ret = gpio_request(gpio, "gfx"); - if (ret) { - DRM_ERROR("gpio_rqueset failed\n"); - return ret; - } - - ret = gpio_direction_output(gpio, 1); - if (ret) { - DRM_ERROR("gpio_direction_output failed\n"); - goto gpio_error; - } + /* Always read the pipe0 GPIO line, FIXME: explain why! */ + gpiod = gpiod_get(dev, "dsi-pipe0-reset", GPIOD_ASIS); + if (IS_ERR(gpiod)) + return PTR_ERR(gpiod); + gpiod_get_value(gpiod); + gpiod_put(gpiod); - gpio_get_value(128); - -gpio_error: - if (gpio_is_valid(gpio)) - gpio_free(gpio); - - return ret; + return 0; } /* diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_output.h b/drivers/gpu/drm/gma500/mdfld_dsi_output.h index 0cccfe400a98..5c0db3c2903f 100644 --- a/drivers/gpu/drm/gma500/mdfld_dsi_output.h +++ b/drivers/gpu/drm/gma500/mdfld_dsi_output.h @@ -372,6 +372,6 @@ extern void mdfld_dsi_controller_init(struct mdfld_dsi_config *dsi_config, extern int mdfld_dsi_get_power_mode(struct mdfld_dsi_config *dsi_config, u32 *mode, bool hs); -extern int mdfld_dsi_panel_reset(int pipe); +extern int mdfld_dsi_panel_reset(struct drm_device *dev, int pipe); #endif /*__MDFLD_DSI_OUTPUT_H__*/ diff --git a/drivers/gpu/drm/gma500/mdfld_output.h b/drivers/gpu/drm/gma500/mdfld_output.h index 17a944d70add..37a516cc56be 100644 --- a/drivers/gpu/drm/gma500/mdfld_output.h +++ b/drivers/gpu/drm/gma500/mdfld_output.h @@ -54,7 +54,7 @@ struct panel_funcs { const struct drm_encoder_helper_funcs *encoder_helper_funcs; struct drm_display_mode * (*get_config_mode)(struct drm_device *); int (*get_panel_info)(struct drm_device *, int, struct panel_info *); - int (*reset)(int pipe); + int (*reset)(struct drm_device *, int); void (*drv_ic_init)(struct mdfld_dsi_config *dsi_config, int pipe); }; diff --git a/drivers/gpu/drm/gma500/psb_intel_drv.h b/drivers/gpu/drm/gma500/psb_intel_drv.h index fb601983cef0..9221d1f545b0 100644 --- a/drivers/gpu/drm/gma500/psb_intel_drv.h +++ b/drivers/gpu/drm/gma500/psb_intel_drv.h @@ -13,7 +13,6 @@ #include <drm/drm_encoder.h> #include <drm/drm_probe_helper.h> #include <drm/drm_vblank.h> -#include <linux/gpio.h> #include "gma_display.h" /* -- 2.25.4

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[PATCH v5 00/13] Add support for PinePhone LCD panel
by Ondrej Jirman 01 Jul '20

01 Jul '20

This patchset adds support for the LCD panel of PinePhone. I've tested this on PinePhone 1.0 and 1.2. Please take a look. thank you and regards, Ondrej Jirman Changes in v5: - rewritten on top of rocktech-jh057n00900 driver - rocktech-jh057n00900 renamed to st7703 (controller name) - converted rocktech-jh057n00900 bindings to yaml and extended for xbd599 Changes in v4: - use ->type from the mode instead of hardcoding (Samuel) - move init_sequence to ->prepare (Samuel) - move anti-flicker delay to ->enable, explain it (Samuel) - add enter_sleep after display_off (Samuel) - drop ->disable (move code to ->unprepare) - add ID bytes dumping (Linus) (I can't test it since allwinner DSI driver has a broken dcs_read function, and I didn't manage to fix it.) - document magic bytes (Linus) - assert reset during powerup - cleanup powerup timings according to the datasheet Changes in v3: - Panel driver renamed to the name of the LCD controller - Re-organize the driver slightly to more easily support more panels based on the same controller. - Add patch to enable the touchscreen to complete the LCD support on PinePhone. - Dropped the "DSI fix" patch (the driver seems to work for me without it) - Improved brightness levels handling: - PinePhone 1.0 uses default levels generated by the driver - On PinePhone 1.1 duty cycles < 20% lead to black screen, so default levels can't be used. Martijn Braam came up with a list of duty cycle values that lead to perception of linear brigtness level <-> light intensity on PinePhone 1.1 - There was some feedback on v2 about this being similar to st7701. It's only similar in name. Most of the "user commands" are different, so I opted to keep this in a new driver instead of creating st770x. Anyone who likes to check the differences, here are datasheets: - https://megous.com/dl/tmp/ST7703_DS_v01_20160128.pdf - https://megous.com/dl/tmp/ST7701.pdf Changes in v2: - DT Example fix. - DT Format fix. - Raised copyright info to 2020. - Sort panel operation functions. - Sort inclusion. -- For phone owners: -- There's an open question on how to set the backlight brightness values on post 1.0 revision phone, since lower duty cycles (< 10-20%) lead to backlight being black. It would be nice if more people can test the various backlight levels on 1.1 and 1.2 revision with this change in dts: brightness-levels = <0 1000>; num-interpolated-steps = <1000>; and report at what brightness level the backlight turns on. So far it seems this has a wide range. Lowest useable duty cycle for me is ~7% on 1.2 and for Martijn ~20% on 1.1. Icenowy Zheng (2): dt-bindings: vendor-prefixes: Add Xingbangda arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone Ondrej Jirman (11): dt-bindings: panel: Convert rocktech,jh057n00900 to yaml dt-bindings: panel: Add compatible for Xingbangda XBD599 panel drm/panel: rocktech-jh057n00900: Rename the driver to st7703 drm/panel: st7703: Rename functions from jh057n prefix to st7703 drm/panel: st7703: Prepare for supporting multiple panels drm/panel: st7703: Move code specific to jh057n closer together drm/panel: st7703: Move generic part of init sequence to enable callback drm/panel: st7703: Add support for Xingbangda XBD599 drm/panel: st7703: Enter sleep after display off drm/panel: st7703: Assert reset prior to powering down the regulators arm64: dts: sun50i-a64-pinephone: Add touchscreen support .../display/panel/rocktech,jh057n00900.txt | 23 - .../display/panel/rocktech,jh057n00900.yaml | 70 ++ .../devicetree/bindings/vendor-prefixes.yaml | 2 + .../allwinner/sun50i-a64-pinephone-1.1.dts | 19 + .../dts/allwinner/sun50i-a64-pinephone.dtsi | 54 ++ drivers/gpu/drm/panel/Kconfig | 26 +- drivers/gpu/drm/panel/Makefile | 2 +- .../drm/panel/panel-rocktech-jh057n00900.c | 424 ------------ drivers/gpu/drm/panel/panel-sitronix-st7703.c | 655 ++++++++++++++++++ 9 files changed, 814 insertions(+), 461 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt create mode 100644 Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml delete mode 100644 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c create mode 100644 drivers/gpu/drm/panel/panel-sitronix-st7703.c -- 2.27.0

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[PATCH v9 0/7] iommu/arm-smmu: Enable split pagetable support
by Jordan Crouse 01 Jul '20

01 Jul '20

Another iteration of the split-pagetable support for arm-smmu and the Adreno GPU SMMU. After email discussions [1] we opted to make a arm-smmu implementation for specifically for the Adreno GPU and use that to enable split pagetable support and later other implementation specific bits that we need. On the hardware side this is very close to the same code from before [2] only the TTBR1 quirk is turned on by the implementation and not a domain attribute. In drm/msm we use the returned size of the aperture as a clue to let us know which virtual address space we should use for global memory objects. There are two open items that you should be aware of. First, in the implementation specific code we have to check the compatible string of the device so that we only enable TTBR1 for the GPU (SID 0) and not the GMU (SID 4). I went back and forth trying to decide if I wanted to use the compatible string or the SID as the filter and settled on the compatible string but I could be talked out of it. The other open item is that in drm/msm the hardware only uses 49 bits of the address space but arm-smmu expects the address to be sign extended all the way to 64 bits. This isn't a problem normally unless you look at the hardware registers that contain a IOVA and then the upper bits will be zero. I opted to restrict the internal drm/msm IOVA range to only 49 bits and then sign extend right before calling iommu_map / iommu_unmap. This is a bit wonky but I thought that matching the hardware would be less confusing when debugging a hang. v9: Fix bot-detected merge conflict v7: Add attached device to smmu_domain to pass to implementation specific functions [1] https://lists.linuxfoundation.org/pipermail/iommu/2020-May/044537.html [2] https://patchwork.kernel.org/patch/11482591/ Jordan Crouse (7): iommu/arm-smmu: Pass io-pgtable config to implementation specific function iommu/arm-smmu: Add support for split pagetables dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU iommu/arm-smmu: Add a pointer to the attached device to smmu_domain iommu/arm-smmu: Add implementation for the adreno GPU SMMU drm/msm: Set the global virtual address range from the IOMMU domain arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU .../devicetree/bindings/iommu/arm,smmu.yaml | 4 ++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 13 +++++- drivers/gpu/drm/msm/msm_iommu.c | 7 +++ drivers/iommu/arm-smmu-impl.c | 6 ++- drivers/iommu/arm-smmu-qcom.c | 45 ++++++++++++++++++- drivers/iommu/arm-smmu.c | 38 +++++++++++----- drivers/iommu/arm-smmu.h | 30 ++++++++++--- 8 files changed, 120 insertions(+), 25 deletions(-) -- 2.17.1

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[PATCH] drm: fix double free for gbo in drm_gem_vram_init and drm_gem_vram_create
by Jia Yang 01 Jul '20

01 Jul '20

I got a use-after-free report when doing some fuzz test: If ttm_bo_init() fails, the "gbo" and "gbo->bo.base" will be freed by ttm_buffer_object_destroy() in ttm_bo_init(). But then drm_gem_vram_create() and drm_gem_vram_init() will free "gbo" and "gbo->bo.base" again. BUG: KMSAN: use-after-free in drm_vma_offset_remove+0xb3/0x150 CPU: 0 PID: 24282 Comm: syz-executor.1 Tainted: G B W 5.7.0-rc4-msan #2 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Ubuntu-1.8.2-1ubuntu1 04/01/2014 Call Trace: __dump_stack dump_stack+0x1c9/0x220 kmsan_report+0xf7/0x1e0 __msan_warning+0x58/0xa0 drm_vma_offset_remove+0xb3/0x150 drm_gem_free_mmap_offset drm_gem_object_release+0x159/0x180 drm_gem_vram_init drm_gem_vram_create+0x7c5/0x990 drm_gem_vram_fill_create_dumb drm_gem_vram_driver_dumb_create+0x238/0x590 drm_mode_create_dumb drm_mode_create_dumb_ioctl+0x41d/0x450 drm_ioctl_kernel+0x5a4/0x710 drm_ioctl+0xc6f/0x1240 vfs_ioctl ksys_ioctl __do_sys_ioctl __se_sys_ioctl+0x2e9/0x410 __x64_sys_ioctl+0x4a/0x70 do_syscall_64+0xb8/0x160 entry_SYSCALL_64_after_hwframe+0x44/0xa9 RIP: 0033:0x4689b9 Code: fd e0 fa ff c3 66 2e 0f 1f 84 00 00 00 00 00 66 90 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 0f 83 cb e0 fa ff c3 66 2e 0f 1f 84 00 00 00 00 RSP: 002b:00007f368fa4dc98 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 RAX: ffffffffffffffda RBX: 000000000076bf00 RCX: 00000000004689b9 RDX: 0000000020000240 RSI: 00000000c02064b2 RDI: 0000000000000003 RBP: 0000000000000004 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000 R13: 00000000004d17e0 R14: 00007f368fa4e6d4 R15: 000000000076bf0c Uninit was created at: kmsan_save_stack_with_flags kmsan_internal_poison_shadow+0x66/0xd0 kmsan_slab_free+0x6e/0xb0 slab_free_freelist_hook slab_free kfree+0x571/0x30a0 drm_gem_vram_destroy ttm_buffer_object_destroy+0xc8/0x130 ttm_bo_release kref_put ttm_bo_put+0x117d/0x23e0 ttm_bo_init_reserved+0x11c0/0x11d0 ttm_bo_init+0x289/0x3f0 drm_gem_vram_init drm_gem_vram_create+0x775/0x990 drm_gem_vram_fill_create_dumb drm_gem_vram_driver_dumb_create+0x238/0x590 drm_mode_create_dumb drm_mode_create_dumb_ioctl+0x41d/0x450 drm_ioctl_kernel+0x5a4/0x710 drm_ioctl+0xc6f/0x1240 vfs_ioctl ksys_ioctl __do_sys_ioctl __se_sys_ioctl+0x2e9/0x410 __x64_sys_ioctl+0x4a/0x70 do_syscall_64+0xb8/0x160 entry_SYSCALL_64_after_hwframe+0x44/0xa9 If ttm_bo_init() fails, the "gbo" will be freed by ttm_buffer_object_destroy() in ttm_bo_init(). But then drm_gem_vram_create() and drm_gem_vram_init() will free "gbo" again. Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: Jia Yang <jiayang5(a)huawei.com> --- drivers/gpu/drm/drm_gem_vram_helper.c | 28 +++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c index 8b2d5c945c95..1d85af9a481a 100644 --- a/drivers/gpu/drm/drm_gem_vram_helper.c +++ b/drivers/gpu/drm/drm_gem_vram_helper.c @@ -175,6 +175,10 @@ static void drm_gem_vram_placement(struct drm_gem_vram_object *gbo, } } +/* + * Note that on error, drm_gem_vram_init will free the buffer object. + */ + static int drm_gem_vram_init(struct drm_device *dev, struct drm_gem_vram_object *gbo, size_t size, unsigned long pg_align) @@ -184,15 +188,19 @@ static int drm_gem_vram_init(struct drm_device *dev, int ret; size_t acc_size; - if (WARN_ONCE(!vmm, "VRAM MM not initialized")) + if (WARN_ONCE(!vmm, "VRAM MM not initialized")) { + kfree(gbo); return -EINVAL; + } bdev = &vmm->bdev; gbo->bo.base.funcs = &drm_gem_vram_object_funcs; ret = drm_gem_object_init(dev, &gbo->bo.base, size); - if (ret) + if (ret) { + kfree(gbo); return ret; + } acc_size = ttm_bo_dma_acc_size(bdev, size, sizeof(*gbo)); @@ -203,13 +211,13 @@ static int drm_gem_vram_init(struct drm_device *dev, &gbo->placement, pg_align, false, acc_size, NULL, NULL, ttm_buffer_object_destroy); if (ret) - goto err_drm_gem_object_release; + /* + * A failing ttm_bo_init will call ttm_buffer_object_destroy + * to release gbo->bo.base and kfree gbo. + */ + return ret; return 0; - -err_drm_gem_object_release: - drm_gem_object_release(&gbo->bo.base); - return ret; } /** @@ -243,13 +251,9 @@ struct drm_gem_vram_object *drm_gem_vram_create(struct drm_device *dev, ret = drm_gem_vram_init(dev, gbo, size, pg_align); if (ret < 0) - goto err_kfree; + return ERR_PTR(ret); return gbo; - -err_kfree: - kfree(gbo); - return ERR_PTR(ret); } EXPORT_SYMBOL(drm_gem_vram_create); -- 2.26.0.106.g9fadedd

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[PATCH] backlight: Delete the OT200 backlight driver
by Linus Walleij 01 Jul '20

01 Jul '20

This driver has no in-kernel users. The device can only be populated by board files since it does not support device tree nor ACPI, and nothing in the kernel creates a device named "ot200-backlight". This driver has been in the kernel since 2012. If it is used by out-of-tree code that code should have been upstreamed by now, it's been 8 years. It uses the idiomatic forked GPIO of the CS5535 which combines pin control and GPIO into its private custom interface, which causes me a headache because that is not how we do things these days: we creates separate pin control and GPIO drivers. Delete this unused driver. Cc: Christian Gmeiner <christian.gmeiner(a)gmail.com> Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- drivers/video/backlight/Kconfig | 7 -- drivers/video/backlight/Makefile | 1 - drivers/video/backlight/ot200_bl.c | 162 ----------------------------- 3 files changed, 170 deletions(-) delete mode 100644 drivers/video/backlight/ot200_bl.c diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index 7d22d7377606..95c546cc8774 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -386,13 +386,6 @@ config BACKLIGHT_LP8788 help This supports TI LP8788 backlight driver. -config BACKLIGHT_OT200 - tristate "Backlight driver for ot200 visualisation device" - depends on CS5535_MFGPT && GPIO_CS5535 - help - To compile this driver as a module, choose M here: the module will be - called ot200_bl. - config BACKLIGHT_PANDORA tristate "Backlight driver for Pandora console" depends on TWL4030_CORE diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index 0c1a1524627a..2072d21b60f7 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -45,7 +45,6 @@ obj-$(CONFIG_BACKLIGHT_LP8788) += lp8788_bl.o obj-$(CONFIG_BACKLIGHT_LV5207LP) += lv5207lp.o obj-$(CONFIG_BACKLIGHT_MAX8925) += max8925_bl.o obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o -obj-$(CONFIG_BACKLIGHT_OT200) += ot200_bl.o obj-$(CONFIG_BACKLIGHT_PANDORA) += pandora_bl.o obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o obj-$(CONFIG_BACKLIGHT_PWM) += pwm_bl.o diff --git a/drivers/video/backlight/ot200_bl.c b/drivers/video/backlight/ot200_bl.c deleted file mode 100644 index 23ee7106c72a..000000000000 --- a/drivers/video/backlight/ot200_bl.c +++ /dev/null @@ -1,162 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2012 Bachmann electronic GmbH - * Christian Gmeiner <christian.gmeiner(a)gmail.com> - * - * Backlight driver for ot200 visualisation device from - * Bachmann electronic GmbH. - */ - -#include <linux/module.h> -#include <linux/fb.h> -#include <linux/backlight.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/cs5535.h> - -static struct cs5535_mfgpt_timer *pwm_timer; - -/* this array defines the mapping of brightness in % to pwm frequency */ -static const u8 dim_table[101] = {0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, - 4, 5, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 9, 9, - 10, 10, 11, 11, 12, 12, 13, 14, 15, 15, 16, - 17, 18, 19, 20, 21, 22, 23, 24, 26, 27, 28, - 30, 31, 33, 35, 37, 39, 41, 43, 45, 47, 50, - 53, 55, 58, 61, 65, 68, 72, 75, 79, 84, 88, - 93, 97, 103, 108, 114, 120, 126, 133, 140, - 147, 155, 163}; - -struct ot200_backlight_data { - int current_brightness; -}; - -#define GPIO_DIMM 27 -#define SCALE 1 -#define CMP1MODE 0x2 /* compare on GE; output high on compare - * greater than or equal */ -#define PWM_SETUP (SCALE | CMP1MODE << 6 | MFGPT_SETUP_CNTEN) -#define MAX_COMP2 163 - -static int ot200_backlight_update_status(struct backlight_device *bl) -{ - struct ot200_backlight_data *data = bl_get_data(bl); - int brightness = bl->props.brightness; - - if (bl->props.state & BL_CORE_FBBLANK) - brightness = 0; - - /* enable or disable PWM timer */ - if (brightness == 0) - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_SETUP, 0); - else if (data->current_brightness == 0) { - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_COUNTER, 0); - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_SETUP, - MFGPT_SETUP_CNTEN); - } - - /* apply new brightness value */ - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_CMP1, - MAX_COMP2 - dim_table[brightness]); - data->current_brightness = brightness; - - return 0; -} - -static int ot200_backlight_get_brightness(struct backlight_device *bl) -{ - struct ot200_backlight_data *data = bl_get_data(bl); - return data->current_brightness; -} - -static const struct backlight_ops ot200_backlight_ops = { - .update_status = ot200_backlight_update_status, - .get_brightness = ot200_backlight_get_brightness, -}; - -static int ot200_backlight_probe(struct platform_device *pdev) -{ - struct backlight_device *bl; - struct ot200_backlight_data *data; - struct backlight_properties props; - int retval = 0; - - /* request gpio */ - if (devm_gpio_request(&pdev->dev, GPIO_DIMM, - "ot200 backlight dimmer") < 0) { - dev_err(&pdev->dev, "failed to request GPIO %d\n", GPIO_DIMM); - return -ENODEV; - } - - /* request timer */ - pwm_timer = cs5535_mfgpt_alloc_timer(7, MFGPT_DOMAIN_ANY); - if (!pwm_timer) { - dev_err(&pdev->dev, "MFGPT 7 not available\n"); - return -ENODEV; - } - - data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); - if (!data) { - retval = -ENOMEM; - goto error_devm_kzalloc; - } - - /* setup gpio */ - cs5535_gpio_set(GPIO_DIMM, GPIO_OUTPUT_ENABLE); - cs5535_gpio_set(GPIO_DIMM, GPIO_OUTPUT_AUX1); - - /* setup timer */ - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_CMP1, 0); - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_CMP2, MAX_COMP2); - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_SETUP, PWM_SETUP); - - data->current_brightness = 100; - props.max_brightness = 100; - props.brightness = 100; - props.type = BACKLIGHT_RAW; - - bl = devm_backlight_device_register(&pdev->dev, dev_name(&pdev->dev), - &pdev->dev, data, &ot200_backlight_ops, - &props); - if (IS_ERR(bl)) { - dev_err(&pdev->dev, "failed to register backlight\n"); - retval = PTR_ERR(bl); - goto error_devm_kzalloc; - } - - platform_set_drvdata(pdev, bl); - - return 0; - -error_devm_kzalloc: - cs5535_mfgpt_free_timer(pwm_timer); - return retval; -} - -static int ot200_backlight_remove(struct platform_device *pdev) -{ - /* on module unload set brightness to 100% */ - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_COUNTER, 0); - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN); - cs5535_mfgpt_write(pwm_timer, MFGPT_REG_CMP1, - MAX_COMP2 - dim_table[100]); - - cs5535_mfgpt_free_timer(pwm_timer); - - return 0; -} - -static struct platform_driver ot200_backlight_driver = { - .driver = { - .name = "ot200-backlight", - }, - .probe = ot200_backlight_probe, - .remove = ot200_backlight_remove, -}; - -module_platform_driver(ot200_backlight_driver); - -MODULE_DESCRIPTION("backlight driver for ot200 visualisation device"); -MODULE_AUTHOR("Christian Gmeiner <christian.gmeiner(a)gmail.com>"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:ot200-backlight"); -- 2.25.4

3 2

[PATCH] backlight: lms501kf03: Drop unused include
by Linus Walleij 01 Jul '20

01 Jul '20

This driver includes <linux/gpio.h> but does not use any symbols from that file, drop the include. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- drivers/video/backlight/lms501kf03.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/video/backlight/lms501kf03.c b/drivers/video/backlight/lms501kf03.c index 8ae32e3573c1..52d3ee6c3f7f 100644 --- a/drivers/video/backlight/lms501kf03.c +++ b/drivers/video/backlight/lms501kf03.c @@ -9,7 +9,6 @@ #include <linux/backlight.h> #include <linux/delay.h> #include <linux/fb.h> -#include <linux/gpio.h> #include <linux/lcd.h> #include <linux/module.h> #include <linux/spi/spi.h> -- 2.25.4

3 2

[PATCH 1/2] backlight: sky81452: Convert to GPIO descriptors
by Linus Walleij 01 Jul '20

01 Jul '20

The SKY81452 backlight driver just obtains a GPIO (named "gpios" in the device tree) drives it high and leaves it high until the driver is removed. Switch to use GPIO descriptors for this, simple and straight-forward. Cc: Gyungoh Yoo <jack.yoo(a)skyworksinc.com> Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- drivers/video/backlight/sky81452-backlight.c | 18 ++++-------------- .../linux/platform_data/sky81452-backlight.h | 6 ++++-- 2 files changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/video/backlight/sky81452-backlight.c b/drivers/video/backlight/sky81452-backlight.c index 2355f00f5773..81d2c8f3ca50 100644 --- a/drivers/video/backlight/sky81452-backlight.c +++ b/drivers/video/backlight/sky81452-backlight.c @@ -8,12 +8,11 @@ #include <linux/backlight.h> #include <linux/err.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of.h> -#include <linux/of_gpio.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/platform_data/sky81452-backlight.h> @@ -182,7 +181,7 @@ static struct sky81452_bl_platform_data *sky81452_bl_parse_dt( pdata->ignore_pwm = of_property_read_bool(np, "skyworks,ignore-pwm"); pdata->dpwm_mode = of_property_read_bool(np, "skyworks,dpwm-mode"); pdata->phase_shift = of_property_read_bool(np, "skyworks,phase-shift"); - pdata->gpio_enable = of_get_gpio(np, 0); + pdata->gpiod_enable = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH); ret = of_property_count_u32_elems(np, "led-sources"); if (ret < 0) { @@ -264,15 +263,6 @@ static int sky81452_bl_probe(struct platform_device *pdev) return PTR_ERR(pdata); } - if (gpio_is_valid(pdata->gpio_enable)) { - ret = devm_gpio_request_one(dev, pdata->gpio_enable, - GPIOF_OUT_INIT_HIGH, "sky81452-en"); - if (ret < 0) { - dev_err(dev, "failed to request GPIO. err=%d\n", ret); - return ret; - } - } - ret = sky81452_bl_init_device(regmap, pdata); if (ret < 0) { dev_err(dev, "failed to initialize. err=%d\n", ret); @@ -312,8 +302,8 @@ static int sky81452_bl_remove(struct platform_device *pdev) bd->props.brightness = 0; backlight_update_status(bd); - if (gpio_is_valid(pdata->gpio_enable)) - gpio_set_value_cansleep(pdata->gpio_enable, 0); + if (pdata->gpiod_enable) + gpiod_set_value_cansleep(pdata->gpiod_enable, 0); return 0; } diff --git a/include/linux/platform_data/sky81452-backlight.h b/include/linux/platform_data/sky81452-backlight.h index 02653d92d84f..d6f46670d923 100644 --- a/include/linux/platform_data/sky81452-backlight.h +++ b/include/linux/platform_data/sky81452-backlight.h @@ -9,11 +9,13 @@ #ifndef _SKY81452_BACKLIGHT_H #define _SKY81452_BACKLIGHT_H +#include <linux/gpio/consumer.h> + /** * struct sky81452_platform_data * @name: backlight driver name. If it is not defined, default name is lcd-backlight. - * @gpio_enable:GPIO number which control EN pin + * @gpios_enable:GPIO descriptor which control EN pin * @enable: Enable mask for current sink channel 1, 2, 3, 4, 5 and 6. * @ignore_pwm: true if DPWMI should be ignored. * @dpwm_mode: true is DPWM dimming mode, otherwise Analog dimming mode. @@ -23,7 +25,7 @@ */ struct sky81452_bl_platform_data { const char *name; - int gpio_enable; + struct gpio_desc *gpiod_enable; unsigned int enable; bool ignore_pwm; bool dpwm_mode; -- 2.25.4

3 5

[PATCH v1 0/7] drm_connector: drop legacy drm_bus_flags
by Sam Ravnborg 01 Jul '20

01 Jul '20

Drop all uses of legacy drm_bus_flags, and then drop the flags. Follow-up with a patch to inline the documentation of the flags. The conversion was triggered by Laurent's clean-up of the bus_flags use in panel-simple. https://lore.kernel.org/dri-devel/20200630135802.GA581802@ravnborg.org/T/#t Build tested only. Patches on top of latest drm-misc-next. Sam (Procrastination, was supposed to review patches, not producing them). Sam Ravnborg (7): drm/tidss: drop use of legacy drm_bus_flags drm/ingenic-drm: drop use of legacy drm_bus_flags drm/panel: raydium-rm67191: drop use of legacy drm_bus_flags drm/panel: novatek-nt39016: drop use of legacy drm_bus_flags drm/panel: panel-simple: drop use of legacy drm_bus_flags drm/drm_connector: drop legacy drm_bus_flags values drm/drm_connector: use inline comments for drm_bus_flags drivers/gpu/drm/ingenic/ingenic-drm.c | 2 +- drivers/gpu/drm/panel/panel-novatek-nt39016.c | 2 +- drivers/gpu/drm/panel/panel-raydium-rm67191.c | 2 +- drivers/gpu/drm/panel/panel-simple.c | 28 +++--- drivers/gpu/drm/tidss/tidss_dispc.c | 4 +- include/drm/drm_connector.h | 124 ++++++++++++++++++-------- 6 files changed, 104 insertions(+), 58 deletions(-)

3 10

[pull] amdgpu, amdkfd, radeon drm-next-5.9
by Alex Deucher 01 Jul '20

01 Jul '20

Hi Dave, Daniel, First pull for 5.9. Big feature here is initial support for a new GPU, sienna cichlid. The following changes since commit 9ca1f474cea0edc14a1d7ec933e5472c0ff115d3: Merge tag 'amd-drm-next-5.8-2020-05-27' of git://people.freedesktop.org/~agd5f/linux into drm-next (2020-05-28 16:10:17 +1000) are available in the Git repository at: git://people.freedesktop.org/~agd5f/linux tags/amd-drm-next-5.9-2020-06-26 for you to fetch changes up to 0749c81d923d3d5dcd0de13e32061449d393f1eb: drm/amd/powerplay: Fix NULL dereference in lock_bus() on Vega20 w/o RAS (2020-06-25 13:33:16 -0400) ---------------------------------------------------------------- amd-drm-next-5.9-2020-06-26: amdgpu: - DC DMUB updates - HDCP fixes - Thermal interrupt fixes - Add initial support for Sienna Cichlid GPU - Add support for unique id on Arcturus - Major swSMU code cleanup - Skip BAR resizing if the bios already did id - Fixes for DCN bandwidth calculations - Runtime PM reference count fixes - Add initial UVD support for SI - Add support for ASSR on eDP links - Lots of misc fixes and cleanups - Enable runtime PM on vega10 boards that support BACO - RAS fixes - SR-IOV fixes - Use IP discovery table on renoir - DC stream synchronization fixes amdkfd: - Track SDMA usage per process - Fix GCC10 compiler warnings - Locking fix radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes UAPI: - Update comments to clarify MTYPE ---------------------------------------------------------------- Aditya Pakki (2): drm/radeon: fix multiple reference count leak drm/radeon: Fix reference count leaks caused by pm_runtime_get_sync Alex Deucher (36): drm/amdgpu: simplify ATIF backlight handling drm/amdgpu/sdma4: add renoir to powergating setup drm/amdgpu/gfx10: add navi12 to gfxoff case drm/amdgpu: simplify raven and renoir checks drm/amdgpu: simplify CZ/ST and KV/KB/ML checks drm/amdgpu: simplify mec2 fw check drm/amdgpu/sdma4: simplify the logic around powering up sdma drm/amdgpu: put some case statments in family order drm/amdgpu/gmc10: program the smallK fragment size drm/amdgpu/pm: return an error during GPU reset or suspend (v2) drm/amdgpu: skip gpu_info firmware if discovery info is available drm/amdgpu: clean up discovery testing drm/amdgpu: use IP discovery table for renoir drm/amdgpu/nv: allow access to SDMA status registers drm/amdgpu/nv: remove some dead code drm/amdgpu/nv: enable init reset check drm/amdgpu/fru: fix header guard and include header drm/amdgpu/mes10.1: add no scheduler flag for mes drm/amdgpu/vcn3.0: schedule instance 0 for decode and 1 for encode drm/amdgpu/display: fix build without CONFIG_DRM_AMD_DC_DCN3_0 Revert "drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper" drm/amdgpu/fence: use the no_scheduler flag drm/amdgpu/display: use blanked rather than plane state for sync groups drm/amdgpu: skip BAR resizing if the bios already did it drm/amdgpu/pm: update comment to clarify Overdrive interfaces drm/amdgpu: fix documentation around busy_percentage drm/amdgpu/fence: fix ref count leak when pm_runtime_get_sync fails drm/amdkfd: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/debugfs: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/pm: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/display bail early in dm_pp_get_static_clocks drm/amdgpu/display: properly guard the calls to swSMU functions drm/amdgpu/uvd3.x: fix register definition warnings drm/amdgpu: make sure to reserve tmr region on all asics which support it drm/amdgpu: rework runtime pm enablement for BACO drm/amdgpu: enable runtime pm on vega10 when noretry=0 Alvin Lee (5): drm/amd/display: Disable PG on NV12 drm/amd/display: Don't compare same stream for synchronized vblank drm/amd/display: Get num_chans from VBIOS table drm/amd/display: Update DCN3 bounding box drm/amd/display: Update bounding box states (v2) Anthony Koo (11): drm/amd/display: FW release 1.0.10 drm/amd/display: FW Release 1.0.11 drm/amd/display: combine public interfaces into single header drm/amd/display: [FW Promotion] Release 1.0.12 drm/amd/display: [FW Promotion] Release 1.0.13 drm/amd/display: [FW Promotion] Release 1.0.14 drm/amd/display: [FW Promotion] Release 1.0.15 drm/amd/display: [FW Promotion] Release 1.0.16 drm/amd/display: [FW Promotion] Release 1.0.17 drm/amd/display: [FW Promotion] Release 1.0.18 drm/amd/display: [FW Promotion] Release 1.0.19 Aric Cyr (10): drm/amd/display: 3.2.85 drm/amd/display: 3.2.86 drm/amd/display: Handle link loss interrupt better drm/amd/display: Guard against invalid array access drm/amd/display: 3.2.87 drm/amd/display: 3.2.88 drm/amd/display: Improve DisplayPort monitor interop drm/amd/display: 3.2.89 drm/amd/display: 3.2.90 drm/amd/display: 3.2.91 Aurabindo Pillai (2): drm/amd/display: Enable use of dmub iff dmcu is disabled drm/amd/display: clip plane rects in DM before passing into DC Bernard Zhao (2): drm/amd: add missing fill of the array`s first element drm/amd: fix potential memleak in err branch Bhawanpreet Lakha (30): drm/amd/display: Fix incorrect HDCP caps for dongle drm/amd/display: Add DCN3 chip ids drm/amd/display: Add DCN3 DIO drm/amd/display: Add DCN3 CLK_MGR drm/amd/display: Add DCN3 DCCG drm/amd/display: Add DCN3 OPTC drm/amd/display: Add DCN3 OPP header drm/amd/display: Add DCN3 MPC drm/amd/display: Add DCN3 DPP drm/amd/display: Add DCN3 HUBHUB drm/amd/display: Add DCN3 HUBP drm/amd/display: Add DCN3 MMHUBHUB drm/amd/display: Add DCN3 DWB drm/amd/display: Add DCN3 DML drm/amd/display: Add DCN3 IRQ drm/amd/display: Add DCN3 GPIO drm/amd/display: Add DCN3 DMUB drm/amd/display: Add DCN3 HWSEQ drm/amd/display: Add DCN3 Support in DM (v2) drm/amd/display: Add DCN3 Resource drm/amd/display: Add DCN3 Command Table Helpers drm/amd/display: Add DCN3 AFMT drm/amd/display: Add DCN3 VPG drm/amd/display: Init function tables for DCN3 drm/amd/display: Handle RGBE_ALPHA Pixel Format drm/amd/display: Remove Unused Registers drm/amdgpu: Enable DM block for DCN3 drm/amd/display: Add DCN3 blocks to Makefile drm/amd/display: Add DCN3 to Kconfig drm/amd/display: enable assr Boyuan Zhang (11): drm/amdgpu: add clock gating DPG mode for VCN3.0 drm/amdgpu: add mc resume DPG mode for VCN3.0 drm/amdgpu: add start DPG mode for VCN3.0 drm/amdgpu: add stop DPG mode for VCN3.0 drm/amdgpu: add pause DPG mode for VCN3.0 drm/amdgpu: set indirect sram mode for VCN3.0 drm/amdgpu: add internal reg offset translation for VCN inst 1 drm/amdgpu: rename macro for VCN1.0 drm/amdgpu: rename macro for VCN2.0 2.5 and 3.0 drm/amdgpu: add workaround for issue in DPG for VCN3.0 drm/amdgpu: enable DPG mode for VCN3.0 Brandon Syu (1): drm/amd/display: use dispclk AVFS for dppclk Camille Cho (1): drm/amd/display: Correctly respond in psr enablement interface Charlene Liu (2): drm/amd/display: correct alpha_en programming for new pixel format drm/amd/display: update audio wall clock programming Chen Tao (2): drm/amdgpu/debugfs: fix memory leak when pm_runtime_get_sync failed drm/amdgpu/debugfs: fix memory leak when amdgpu_virt_enable_access_debugfs failed Chris Park (2): drm/amd/display: Force ODM combine on 5K+ 420 modes drm/amd/display: Allow 4 split on 10K 420 modes Christian König (2): drm/radeon: disable AGP by default drm/amdgpu: remove distinction between explicit and implicit sync (v2) Colin Ian King (5): drm/amdkfd: fix a dereference of pdd before it is null checked drm/amd/display: fix spelling mistake: "propogation" -> "propagation" drm/amdgpu: remove redundant initialization of variable ret drm/amdgpu: ensure 0 is returned for success in jpeg_v2_5_wait_for_idle drm/radeon: fix array out-of-bounds read and write issues Colton Lewis (1): drm/amd: correct trivial kernel-doc inconsistencies Dale Zhao (2): drm/amd/display: Disable pipe split for modes with borders drm/amd/display: fine tune logic of edid max TMDS clock check Dan Carpenter (2): drm/amd/display: Fix indenting in dcn30_set_output_transfer_func() drm/amdgpu: Fix a buffer overflow handling the serial number David Galiffi (2): drm/amd/display: Increase Default Sizes of FW State and Trace Buffer drm/amd/display: Compare v_front_porch when checking if streams are synchronizable Denis Efremov (3): drm/amd/display: Use kvfree() to free coeff in build_regamma() drm/amd/display: Use kfree() to free rgb_user in calculate_user_regamma_ramp() drm/radeon: fix fb_div check in ni_init_smc_spll_table() Derek Lai (1): drm/amd/display: VSC SDP supported for SST Dmytro Laktyushkin (8): drm/amd/display: update dml interfaces and variables drm/amd/display: fix dml log2 function drm/amd/display: fix dml immediate flip input drm/amd/display: simplify dml log2 function drm/amd/display: fix and simplify pipe split logic for DCN3 drm/amd/display: remove unnecessary mpcc updates drm/amd/display: make calculate watermarks a function pointer drm/amd/display: fix 4to1 odm MPC_OUT_FLOW_CONTROL_COUNT Emily Deng (3): drm/amdgpu/sriov: Add clear vf fw support drm/amdgpu/sriov: Disable pm for multiple vf sriov drm/amdgpu/sriov: Need to clear kiq position Eric Bernstein (1): drm/amd/display: Allow Diagnostics test with eDP not connected Eric Yang (1): drm/amd/display: add mechanism to skip DCN init Evan Quan (50): drm/amd/powerplay: check whether SMU IP is enabled before access drm/amd/powerplay: ack the SMUToHost interrupt on receive V2 drm/amd/powerplay: update Arcturus smu-driver headers drm/amd/powerplay: implement ASIC specific thermal throttling logging drm/amd/powerplay: enable thermal throttling logging support V2 drm/amdgpu: added a sysfs interface for thermal throttling related V4 drm/amd/powerplay: stop thermal IRQs on suspend drm/amd/powerplay: use the common APIs for IRQ disablement/enablement drm/amd/powerplay: give better names for the thermal IRQ related APIs drm/amd/powerplay: let PMFW to handle the features disablement on BACO in V2 drm/amd/powerplay: eliminate asic type check drm/amd/powerplay: drop unused APIs and unnecessary checks drm/amd/powerplay: implement a common API for dpms disablement drm/amd/powerplay: centralize all buffer allocation in sw_init phase drm/amd/powerplay: clean up the APIs for bootup clocks drm/amd/powerplay: clean up the APIs for pptable setup drm/amd/powerplay: clean up the overdrive settings drm/amd/powerplay: postpone operations not required for hw setup to late_init drm/amd/powerplay: move those operations not needed for resume out drm/amd/powerplay: maximize code sharing between .hw_init and .resume drm/amd/powerplay: sort those operations performed in hw setup drm/amd/powerplay: better namings drm/amd/powerplay: maximize code sharing between .hw_fini and .suspend drm/amd/powerplay: move amdgpu_irq_src to the smu structure allocation drm/amd/powerplay: add firmware cleanup on sw_fini drm/amd/powerplay: skip BACO feature on DPMs disablement drm/amd/powerplay: use work queue to perform throttling logging drm/amd/powerplay: update how to use metrics table on Arcturus drm/amd/powerplay: update how to use metrics table on Navi10 drm/amd/powerplay: update how to use metrics table on Sienna Cichlid drm/amd/powerplay: use the same interval as PMFW on retrieving metrics table drm/amd/powerplay: use MGPU friendly err/warn/info/dbg messages drm/amd/powerplay: forbid to use pr_err/warn/info/debug drm/amd/powerplay: add error messages on some critical paths drm/amd/powerplay: drop dead vce powergate code drm/amd/powerplay: drop unnecessary wrappers drm/amd/powerplay: correct the APIs' naming drm/amd/powerplay: drop unnecessary get_pptable_power_limit wrappers drm/amd/powerplay: maximize code sharing around power limit drm/amd/powerplay: simplify the code around retrieving power limit drm/amd/powerplay: simplify the code around setting power limit drm/amd/powerplay: drop unused code around power limit drm/amd/powerplay: correct power limit retrieving based on current power source drm/amd/powerplay: add check for power limit OD support drm/amd/powerplay: move maximum sustainable clock retrieving to .hw_init drm/amd/powerplay: drop redundant .set_min_dcefclk_deep_sleep API (v2) drm/amd/powerplay: drop unnecessary wrapper .populate_smc_tables drm/amd/powerplay: drop unnecessary SMU_MSG_GetDpmClockFreq check drm/amd/powerplay: revise the calling chain on sensor reading drm/amd/powerplay: maximum code sharing on sensor reading Felix Kuehling (2): drm/amdkfd: Fix GCC 10 compiler warning drm/amdkfd: Add eviction debug messages Flora Cui (2): drm/amd/display: drop duplicated structure drm/amd/display: drop duplicated .dsc_pg_control for dcn30 Gavin Wan (1): drm/amd/amdgpu: Fix the CGCG setting is overwritten for SRIOV. Guchun Chen (3): drm/amdgpu: print warning when input address is invalid drm/amdgpu: fix RAS memory leak in error case drm/amdgpu: remove useless code in RAS Gustavo A. R. Silva (2): drm/radeon/dpm: Replace one-element array and use struct_size() helper drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper Harry Wentland (1): Revert "drm/amd/display: disable dcn20 abm feature for bring up" Hawking Zhang (7): drm/amdgpu: force pa_sc_tile_steering_override to 0 for gfx10.3 drm/amdgpu: add vram_info v2_5 in atomfirmware header drm/amdgpu: support query vram info for sienna_cichlid drm/amdgpu: drop gfx_v10_0_tiling_mode_table_init drm/amdgpu: add firmware_info v3_4 structure for Sienna_Cichlid drm/amdgpu: add atomfirmware helper funciton to query reserved fb size drm/amdgpu: switch to query reserved fb size from vbios (v3) Hua Zhang (1): drm/amd/powerplay: skip smu_i2c_eeprom_init/fini under sriov mode Huang Rui (1): drm/amd/powerplay: use existed smu_dpm_set* interfaces to implement powergate functions Hugo Hu (2): drm/amd/display: enable plane if container of plane_status changed drm/amd/display: Revert "enable plane if plane_status changed" Ivan Mironov (1): drm/amd/powerplay: Fix NULL dereference in lock_bus() on Vega20 w/o RAS Jack Xiao (25): drm/amdgpu: assign the doorbell index to mes ring drm/amdgpu: add the ring type definition of MES drm/amdgpu: avoid dereferencing a NULL pointer drm/amdgpu/mes: update some mes definitions drm/amdgpu/mes10.1: allocate the eop buffer drm/amdgpu/mes10.1: initialize the software part of mes ring drm/amdgpu/mes10.1: implement the ring functions of mes specific drm/amdgpu/mes10.1: allocate mqd buffer drm/amdgpu/mes10.1: initialize the mqd drm/amdgpu/mes10.1: install mes queue by register programming drm/amdgpu/mes10.1: install mes queue via kiq drm/amdgpu/mes10.1: enable the mes ring during initialization drm/amdgpu/mes10.1: add the mes fw api drm/amdgpu/mes10.1: add the helper function for mes command submission drm/amdgpu/mes10.1: implement adding hardware queue drm/amdgpu/mes10.1: implement removing hardware queue drm/amdgpu/mes10.1: implement querying the scheduler status drm/amdgpu/mes10.1: implement setting hardware resources drm/amdgpu/mes10.1: add sienna_cichlid mes firmware support drm/amdgpu/mes10.1: copy mes fw info into global fw array drm/amdgpu: upload mes firmware to gpu buffer drm/amdgpu/psp: convert amdgpu mes ucode type drm/amdgpu: no need to set up GPU scheduler for mes ring drm/amdgpu/mes10.1: update mes initialization drm/amdgpu: add mes block to sienna_cichlid Jaehyun Chung (1): drm/amd/display: Handle persistence in DM Jake Wang (2): drm/amd/display: vbios data table packing drm/amd/display: Added local_sink null check before access James Zhu (7): drm/amdgpu: fix typo for vcn3/jpeg3 idle check drm/amdgpu/jpeg: fix race condition issue for jpeg start drm/amdgpu/jpeg1.0: fix no previous prototype for functions drm/amdgpu/jpeg2.0: fix no previous prototype for functions drm/amdgpu/vcn1.0: fix no previous prototype for functions drm/amdgpu/vcn2.0: fix no previous prototype for functions drm/amdgpu: fix unused variable Jay Cornwall (3): drm/amdkfd: Add Sienna_Cichlid trap handler support drm/amdkfd: Support newer assemblers in gfx10 trap handler drm/amdkfd: Support debugger in Navi1x trap handler Jerry (Fangzhi) Zuo (2): drm/amd/display: Add dcn30 Headers (v2) drm/amdgpu/dc: Add missing Sienna_Cichlid chip id John Clements (1): drm/amdgpu: add XGMI support for sienna cichlid John van der Kamp (1): drm/amdgpu/display: Unlock mutex on error Joseph Greathouse (1): drm/amdgpu: Reconfigure ULV for gfx9 server SKUs Jun Lei (1): drm/amd/display: add support for per-state dummy-pstate latency Kenneth Feng (10): drm/amd/amdgpu: fix the HDP LS/DS/SD programming drm/amd/amdgpu: add HDP mgcg and ls support drm/amd/amdgpu: add IH cg support drm/amd/amdgpu: add athub ls support drm/amd/powerplay: enable athub pg drm/amd/powerplay: enable mmhub pg drm/amd/powerplay: enable GPO drm/amd/powerplay: bundle GPO with gfx DPM drm/amd/powerplay: enable fw ctf drm/amd/powerplay: show gfxclk=0 in gfxoff state Kent Russell (2): drm/amdgpu: Add ReadSerial defines for Arcturus drm/amdgpu: Add unique_id and serial_number for Arcturus v3 Kevin Wang (5): drm/amd/powerplay: remove the support of xgmi pstate on vega20 from swsmu drm/amd/powerplay: remove the support of vega20 from swsmu drm/amd/smu: unify pptable_func{} callback interface drm/amd/smu: unify smu ppt callback macros drm/amdgpu: restrict the hw sched jobs number to power of two Le Ma (4): drm/amdgpu/mes: update mes fw api drm/amdgpu/mes: add status fence memory definitions drm/amdgpu/mes: allocate memory slots for hw resource setting drm/amdgpu: skip VM inv eng assignment for mes ring Lei Guo (1): drm/amdgpu/gfx9: Fix incorrect firmware size calculation Leo Liu (14): drm/amdgpu: add VCN3.0 register headers (v2) drm/amdgpu: add 2rd VCN instance doorbell support drm/amdgpu: add VCN3.0 support for Sienna_Cichlid drm/amdgpu: add Sienna_Cichlid VCN PG and CG support (v2) drm/amdgpu: enable VCN3.0 PG and CG for Sienna_Cichlid drm/amdgpu: add Sienna_Cichlid VCN to the VCN family drm/amdgpu: enable VCN3.0 for Sienna_Cichlid drm/amdgpu: add JPEG3.0 support for Sienna_Cichlid drm/amdgpu: add Sienna_Cichlid JPEG PG and CG support drm/amdgpu: enable JPEG3.0 PG and CG for Sienna_Cichlid drm/amdgpu: enable JPEG3.0 for Sienna_Cichlid drm/amdgpu: change the offset for VCN FW cache window drm/amdgpu: fix the PSP front door loading VCN firmware drm/amdgpu: set the LMI ctrl and reset earlier Lewis Huang (1): drm/amd/display: change global buffer to local buffer Likun Gao (95): drm/amdgpu: change memory training to common function drm/amdgpu: add GC 10.3 header files (v2) drm/amdgpu: add sienna_cichlid asic type drm/amdgpu: add sienna_cichlid gpu info firmware v2 drm/amdgpu: set fw load type for sienna_cichlid drm/amdgpu: set asic family and ip blocks for sienna_cichlid drm/amdgpu/gfx10: add support for sienna_cichlid firmware drm/amdgpu/gmc10: add sienna_cichlid support drm/amdgpu/gfx10: add clockgating support for sienna_cichlid drm/amdgpu/soc15: add support for sienna_cichlid drm/amdgpu: initialize IP offset for sienna_cichlid (v2) drm/amdgpu/soc15: add common ip block for sienna_cichlid drm/amdgpu: add support on mmhub for sienna_cichlid drm/amdgpu: add support gfxhub for sienna_cichlid (v3) drm/amdgpu: add gmc ip block for sienna_cichlid drm/amdgpu: add ih ip block for sienna_cichlid drm/amdgpu: add gfx ip block for sienna_cichlid (v3) drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2) drm/amdgpu: add sdma ip block for sienna_cichlid (v5) drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid drm/amdgpu/gfx10: change register configure for sienna_cichlid drm/amdgpu: add virtual display support for sienna_cichlid drm/amdgpu/powerplay: add initial swSMU support for sienna_cichlid (v2) drm/amd/powerplay: add support to set performance level for sienna_cichlid drm/amd/powerplay: set SOCCLK DPM for sienna_cichlid drm/amd/powerplay: set FCLK DPM for sienna_cichlid drm/amd/powerplay: enable Ultra Low Voltage for sienna_cichlid drm/amd/powerplay: enable Graphics Clock Deep Sleep for sienna_cichlid drm/amd/powerplay: enable SOC Clock Deep Sleep for sienna_cichlid drm/amdgpu/powerplay: set Thermal control for sienna_cichlid drm/amdgpu/powerplay: set UCLK DPM for sienna_cichlid drm/amd/powerplay: make gfx ds can be configure for sienna_cichlid drm/amd/powerplay: Enable SOCCLK ULV for sienna_cichlid drm/amd/powerplay: enable DCEFCLK DPM and DS for sienna_cichlid drm/amd/powerplay: support pcie value set and update for sienna_cichlid drm/amd/powerplay: support to print pcie levels for sienna_cichlid drm/amd/powerplay: enable LCLK DPM for sienna_cichlid drm/amd/powerplay: enable GFX SS for sienna_cichlid drm/amd/powerplay: enable Fan control for sienna_cichlid drm/amd/powerplay: support to get power index for sienna_cichlid drm/amd/powerplay: enable PPT and TDC for sienna_cichlid drm/amdgpu/powerplay: add smu block for sienna_cichlid drm/amdgpu: skip ASD fw load for sienna_cichlid drm/amdgpu/psp: add psp support for sienna_cichlid drm/amdgpu: skip for reroute ih for sienna_cichlid psp ring init currently drm/amdgpu: enable psp ip block for sienna_cichlid drm/amdgpu: update SDMA 5.2 microcode init drm/amdgpu: add support for athub v2.1 drm/amdgpu: add gmc cg support for sienna_cichlid drm/amdgpu: add psp block load condition for sienna_cichlid drm/amdgpu: update the num of queue per pipe for mec on sienna_cichlid drm/amdgpu/mes: correct register offset for sienna_cichlid drm/amdgpu/gfx10: add gc golden setting for sienna_cichlid drm/amdgpu: add cp firmware backdoor loading triger drm/amdgpu: disable gfxoff for sienna_cichlid drm/amdgpu: only send one sdma firmware for sienna_cichlid drm/amdgpu: open GFX clock gating for sienna_cichlid drm/amdgpu: update golden setting for gfx10.3 drm/amdgpu: Enable Multi Media Hub (MMHUB) Clock Gating for sienna_cichlid. drm/amdgpu: fix SDMA hdp flush engine conflict drm/amdgpu: enable 3D pipe 1 on Sienna_Cichlid drm/amd/powerplay: enable VR0HOT for sienna_cichlid drm/amd/powerplay: enable FCLK DS for sienna_cichlid drm/amd/powerplay: enable MM DPM PG for sienna_cichlid (v2) drm/amd/powerplay: enable BACO for sienna_cichlid drm/amd/powerplay: enable APCC DFLL for sienna_cichlid drm/amd/powerplay: add function to get power limit for sienna_cichlid drm/amdgpu: update golden setting for sienna_cichlid drm/amd/powerplay: enable RSMU SMN PG for sienna_cichlid drm/am/powerplay: enable OUT OF BAND MONITER for sienna_cichlid drm/amd/powerplay: enable ULCK DS for sienna_cichlid drm/amd/powerplay: and smc dpm info struct for sienna_cichlid drm/amd/powerplay: append pptable for sienna_cichlid (v2) drm/amd/powerplay: enable VDDCI and MVDD for sienna_cichlid drm/amdgpu: skip GPU scheduler setup for KIQ and MES ring drm/amdgpu: disable runtime pm for sienna_cichlid temporarily drm/amd/powerplay: drop jpeg instance1 dpm setup drm/amdgpu: only use one gfx pipe for Sienna_Cichlid drm/amd/powerplay: support mclk socclk limit value set for sienna_cichlid. drm/amd/amdgpu: disable gfxoff to retrieve gfxclk drm/amdgpu: enable gfxoff for sienna_cichlid drm/amdgpu/psp: add structure to support PSP SPL drm/amdgpu/psp: initialization PSP SPL fw drm/amdgpu/psp: support for loading PSP SPL fw drm/amdgpu: update golden setting for sienna_cichlid drm/amd/powerplay: update smu function for sienna_cichlid drm/amd/powerplay: drop sienna_cichlid hardcode of using pptable drm/amdgpu: reserve fb according to return value from vbios drm/amdgpu: support memory training for sienna_cichlid drm/amdgpu: remove unnecessary check for mem train drm/amdgpu: bypass tmr when reserve c2p memory drm/amd/powerplay: move powerplay table operation out of smu_v11_0.c drm/amd/powerplay: add smu v11_0_7 pptable drm/amd/powerplay: update powerplay table for sienna_cichlid drm/amd/powerplay: update driver if file for sienna_cichlid Liu ChengZhe (1): drm/amd/amdgpu: handle return value of amdgpu_driver_load_kms Lorenz Brun (1): drm/amdkfd: Use correct major in devcgroup check Martin Leung (1): drm/amd/display: enable seamless boot for dcn30 Martin Tsai (1): drm/amd/display: Force delay after DP receive power up Michael Strauss (2): drm/amd/display: Fix incorrect dcn1 bandwidth calculations drm/amd/display: implement edid max TMDS clock check in DC Mikita Lipski (1): drm/amd/display: Fix calculation of virtual channel payload Mukul Joshi (2): drm/amdkfd: Track SDMA utilization per process drm/amdkfd: Fix circular locking dependency warning Navid Emamdoost (4): drm/amdgpu: fix ref count leak in amdgpu_driver_open_kms drm/amd/display: fix ref count leak in amdgpu_drm_ioctl drm/amdgpu: fix ref count leak in amdgpu_display_crtc_set_config drm/amdgpu/display: fix ref count leak when pm_runtime_get_sync fails Nicholas Kazlauskas (11): drm/amd/display: Check bss_data_size before going down legacy DMUB load path drm/amd/display: Don't pass invalid fw_bss_data pointer into DMUB srv drm/amd/display: Add DMUB firmware version helpers in DMUB service drm/amd/display: Support CW4 for DMUB ringbuffer inbox drm/amd/display: Make BREAK_TO_DEBUGGER() a debug print drm/amd/display: Only actually breakpoint if DEBUG_KERNEL_DC is enabled drm/amd/display: Revalidate bandwidth before commiting DC updates drm/amd/display: Use u16 for drm_bpp in DSC calculations drm/amd/display: Fix VBA chroma calculation for pipe splitting drm/amd/display: Fix DML failures caused by doubled stereo viewport drm/amd/display: Fill in dmub_srv fw_version from firmware metadata Nirmoy Das (9): drm/amdgpu: fix compiler warning drm/amdgpu: label internally used symbols as static drm/amdkfd: label internally used symbols as static drm/powerplay: label internally used symbols as static drm/amd/display: label internally used symbols as static drm/amdgpu: remove unused functions drm/powerplay: fix compilation warning drm/amd/powerplay: return current DCEFCLK on sysfs read (v2) drm/amdgpu: call release_firmware() without a NULL check Paul Hsieh (2): drm/amd/display: link_status not align when power off encoder drm/amd/display: unit show garbage when do OPTC blank Peikang Zhang (1): drm/amd/display: Red screen observed on startup Prike.Liang (2): drm/amdgpu/soc15: fix nullptr issue in soc15_read_register() for reg base accessing drm/amdgpu: fix the nullptr issue as for PWR IP not existing in discovery table Qingqing Zhuo (1): drm/amd/display: fix compilation error on allmodconfig Qiushi Wu (1): drm/amdkfd: Fix reference count leaks. Rajneesh Bhardwaj (1): drm/amdgpu: restrict bo mapping within gpu address limits Rodrigo Siqueira (3): drm/amd/display: Add bit swap helper based on endianness drm/amd/display: Rework dsc to isolate FPU operations drm/amd/display: Add helper to convert DC status Roman Li (1): drm/amd/display: Remove unused macro from dcn21 Sandeep Raghuraman (1): drm/amdgpu: Replace invalid device ID with a valid device ID Sonny Jiang (8): drm amdgpu: SI UVD add firmwares drm amdgpu: SI UVD PACKET_TYPE0 drm amdgpu: SI UVD registers drm amdgpu: SI UVD v3_1 (v2) drm amdgpu: SI UVD context rreg/wreg drm amdgpu: SI UVD add uvd_v3_1 to makefile drm amdgpu: SI UVD enable for Oland drm amdgpu: SI UVD enabled on Verde, Tahiti, Pitcairn Stanley.Yang (1): drm/amdgpu: support reserve bad page for virt (v3) Stylon Wang (2): drm/amd/display: Enable output_bpc property on all outputs drm/amd/display: Fix ineffective setting of max bpc property Sung Lee (1): drm/amd/display: Do not fail if build scaling params fails Tianci.Yin (1): drm/amdgpu: temporarily read bounding box from gpu_info fw for navi12 Tom St Denis (4): drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2) drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers drm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2) Wenhui Sheng (7): drm/amd/powerplay: add SMC message filter for SMU11 drm/amd/powerplay: enable SMC message filter drm/amd/powerplay: remove SRIOV check in SMU11 (v2) drm/amd/powerplay: add check before i2c_add_adapter drm/amdgpu: remove perf level dpm in one-VF drm/amdgpu: sdma v5_2 ring bo mem leak drm/amdgpu: add fw release for sdma v5_0 Wenjing Liu (4): drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update drm/amd/display: Revert "DP link layer test 4.2.1.1 fix due to specs update" drm/amd/display: allow query ddc data over aux to be read only operation drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update Wesley Chalmers (1): drm/amd/display: Move call to disable DPG Wyatt Wood (2): drm/amd/display: Fix ABM memory alignment issue drm/amd/display: Use dmub fw to lock pipe, cursor, dig Yi-Ling Chen (1): drm/amd/display: Fixed using wrong eDP power sequence function pointer Yong Zhao (4): drm/amdgpu: Improve the MTYPE comments drm/amdgpu: Add ATHUB 2.1 header files (v2) drm/amdgpu: Use variable instead of constant for sdma doorbell range drm/amdkfd: Support Sienna_Cichlid KFD v4 Yongqiang Sun (5): drm/amd/display: Implement some asic specific abm call backs. drm/amd/display: Remove nv12 work around drm/amd/display: runtime select dmub emulatior. drm/amd/display: not reset dmub in driver. drm/amd/display: Not doing bios data pack. kernel test robot (1): drm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be static po-tchen (1): drm/amd/display: Passing initial SDP deadline to dmub shaoyunl (4): drm/amdkfd: sienna_cichlid virtual function support drm/amdgpu: Sienna_Cichlid don't enable SMU for SRIOV drm/amdgpu/sriov : Use kiq to do tlb invalidation for gfx10 on sriov drm/amdgpu/sriov : Add sriov detection for sienna_cichlid Documentation/gpu/amdgpu.rst | 9 +- drivers/gpu/drm/amd/amdgpu/Makefile | 30 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 73 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c | 834 + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 8 +- drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 5 - drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 79 +- drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 16 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 106 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 134 +- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 18 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 33 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.h | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 3 + drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 2 - drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 15 +- drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 16 +- drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 43 +- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 45 +- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 475 +- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 126 +- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 30 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 33 +- drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h | 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 115 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 39 + drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 9 + drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 26 + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 25 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 178 +- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 30 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 2 - drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 5 - drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 100 + drivers/gpu/drm/amd/amdgpu/athub_v2_1.h | 30 + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 527 +- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 +- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 12 +- drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 4 + drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 411 + .../inc/dmub_fw_meta.h => amdgpu/gfxhub_v2_1.h} | 50 +- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 94 +- drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c | 1 + drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 15 +- drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 8 +- drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 613 + drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.h | 29 + drivers/gpu/drm/amd/amdgpu/mes_api_def.h | 443 + drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 664 +- drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 76 +- drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 21 +- drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 14 +- drivers/gpu/drm/amd/amdgpu/nv.c | 103 +- drivers/gpu/drm/amd/amdgpu/nv.h | 1 + drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 8 + drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 92 +- .../inc/dmub_cmd_dal.h => amdgpu/sdma_common.h} | 42 +- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 47 +- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 7 +- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.h | 15 - drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 1757 + drivers/gpu/drm/amd/amdgpu/sdma_v5_2.h | 30 + drivers/gpu/drm/amd/amdgpu/si.c | 33 +- drivers/gpu/drm/amd/amdgpu/si_dpm.h | 2 +- drivers/gpu/drm/amd/amdgpu/si_ih.c | 2 + drivers/gpu/drm/amd/amdgpu/sid.h | 26 +- .../gpu/drm/amd/amdgpu/sienna_cichlid_reg_init.c | 54 + drivers/gpu/drm/amd/amdgpu/soc15.c | 16 +- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 15 +- drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 793 + drivers/gpu/drm/amd/amdgpu/uvd_v3_1.h | 29 + drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 148 +- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 127 +- drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 122 +- drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 1684 + drivers/gpu/drm/amd/amdgpu/vcn_v3_0.h | 29 + drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 877 +- .../gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm | 301 +- drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_device.c | 28 + .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 63 +- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 1 + drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c | 1 + drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 24 +- drivers/gpu/drm/amd/amdkfd/kfd_process.c | 246 +- drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 295 +- drivers/gpu/drm/amd/display/Kconfig | 8 + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 111 +- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 + .../drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 10 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 8 +- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 43 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 20 + .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 19 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 30 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 25 - drivers/gpu/drm/amd/display/dc/Makefile | 4 + drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 204 + .../amd/display/dc/bios/command_table_helper2.c | 5 + .../dc/bios/dce112/command_table_helper2_dce112.c | 40 + .../dc/bios/dce112/command_table_helper2_dce112.h | 3 + .../gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c | 6 +- drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 18 +- drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile | 10 + drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 22 + .../amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 18 +- .../drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 3 +- .../gpu/drm/amd/display/dc/clk_mgr/dcn30/dalsmc.h | 60 + .../amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 543 + .../amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.h | 38 + .../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c | 255 + .../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h | 108 + drivers/gpu/drm/amd/display/dc/core/dc.c | 167 +- drivers/gpu/drm/amd/display/dc/core/dc_debug.c | 59 + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 43 +- drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | 42 +- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 163 +- drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 8 +- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 40 +- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 37 + drivers/gpu/drm/amd/display/dc/core/dc_vm_helper.c | 3 - drivers/gpu/drm/amd/display/dc/dc.h | 65 +- drivers/gpu/drm/amd/display/dc/dc_bios_types.h | 5 +- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 28 +- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 2 + drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 75 + drivers/gpu/drm/amd/display/dc/dc_link.h | 6 +- drivers/gpu/drm/amd/display/dc/dc_stream.h | 15 + drivers/gpu/drm/amd/display/dc/dc_types.h | 36 + drivers/gpu/drm/amd/display/dc/dce/Makefile | 3 +- drivers/gpu/drm/amd/display/dc/dce/dce_abm.h | 20 + drivers/gpu/drm/amd/display/dc/dce/dce_audio.c | 4 +- .../gpu/drm/amd/display/dc/dce/dce_clock_source.c | 153 +- .../gpu/drm/amd/display/dc/dce/dce_clock_source.h | 42 + drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 46 + .../gpu/drm/amd/display/dc/dce/dce_panel_cntl.c | 10 +- drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 92 - .../inc/dmub_types.h => dc/dce/dmub_hw_lock_mgr.c} | 78 +- .../gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h | 39 + drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 3 +- .../amd/display/dc/dce110/dce110_hw_sequencer.c | 28 +- .../amd/display/dc/dce110/dce110_hw_sequencer.h | 1 + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 12 + .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 37 +- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c | 1 + .../drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 7 + .../drm/amd/display/dc/dcn10/dcn10_link_encoder.h | 6 + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 13 +- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h | 62 + .../amd/display/dc/dcn10/dcn10_stream_encoder.h | 42 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h | 22 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c | 4 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 17 - drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h | 12 - .../gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c | 9 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 20 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | 41 + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 134 +- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c | 1 + .../drm/amd/display/dc/dcn20/dcn20_link_encoder.h | 7 +- .../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 93 +- drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 121 +- drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hwseq.c | 89 + drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hwseq.h | 6 + drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c | 5 +- .../gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 4 +- drivers/gpu/drm/amd/display/dc/dcn30/Makefile | 54 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c | 206 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.h | 230 + .../gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c | 640 + .../gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.h | 78 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.c | 100 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h | 66 + .../amd/display/dc/dcn30/dcn30_dio_link_encoder.c | 205 + .../amd/display/dc/dcn30/dcn30_dio_link_encoder.h | 76 + .../display/dc/dcn30/dcn30_dio_stream_encoder.c | 851 + .../display/dc/dcn30/dcn30_dio_stream_encoder.h | 269 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 1414 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h | 608 + .../gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 410 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c | 264 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h | 923 + .../gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c | 354 + .../gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c | 417 + .../gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h | 119 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c | 532 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.h | 292 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 719 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h | 70 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 141 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.h | 33 + .../gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c | 239 + .../gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.h | 463 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 1409 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h | 665 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_opp.h | 36 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 365 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h | 333 + .../gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 2691 + .../gpu/drm/amd/display/dc/dcn30/dcn30_resource.h | 82 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c | 194 + drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h | 133 + drivers/gpu/drm/amd/display/dc/dm_cp_psp.h | 1 + drivers/gpu/drm/amd/display/dc/dm_helpers.h | 23 + drivers/gpu/drm/amd/display/dc/dm_services.h | 69 - drivers/gpu/drm/amd/display/dc/dml/Makefile | 7 + .../display/dc/dml/dcn20/display_rq_dlg_calc_20.c | 33 +- .../dc/dml/dcn20/display_rq_dlg_calc_20v2.c | 33 +- .../display/dc/dml/dcn21/display_rq_dlg_calc_21.c | 36 +- .../amd/display/dc/dml/dcn30/display_mode_vba_30.c | 6865 ++ .../amd/display/dc/dml/dcn30/display_mode_vba_30.h | 43 + .../display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 1868 + .../display/dc/dml/dcn30/display_rq_dlg_calc_30.h | 69 + .../drm/amd/display/dc/dml/display_mode_enums.h | 6 + .../gpu/drm/amd/display/dc/dml/display_mode_lib.c | 181 + .../gpu/drm/amd/display/dc/dml/display_mode_lib.h | 11 + .../drm/amd/display/dc/dml/display_mode_structs.h | 14 + .../gpu/drm/amd/display/dc/dml/display_mode_vba.c | 67 +- .../gpu/drm/amd/display/dc/dml/display_mode_vba.h | 230 +- .../gpu/drm/amd/display/dc/dml/dml_inline_defs.h | 18 +- drivers/gpu/drm/amd/display/dc/dsc/Makefile | 2 - drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 18 +- drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c | 151 +- drivers/gpu/drm/amd/display/dc/dsc/rc_calc.h | 5 +- drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c | 27 +- drivers/gpu/drm/amd/display/dc/gpio/Makefile | 10 + .../amd/display/dc/gpio/dcn30/hw_factory_dcn30.c | 257 + .../amd/display/dc/gpio/dcn30/hw_factory_dcn30.h | 33 + .../amd/display/dc/gpio/dcn30/hw_translate_dcn30.c | 387 + .../amd/display/dc/gpio/dcn30/hw_translate_dcn30.h | 35 + drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c | 9 +- drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c | 8 + drivers/gpu/drm/amd/display/dc/inc/core_status.h | 2 + drivers/gpu/drm/amd/display/dc/inc/core_types.h | 31 +- drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h | 2 +- drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h | 2 +- drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 75 + .../drm/amd/display/dc/inc/hw/clk_mgr_internal.h | 14 + drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 6 + drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 7 + drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h | 83 + drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 7 +- drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 9 + drivers/gpu/drm/amd/display/dc/inc/hw/mcif_wb.h | 8 + drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 108 + .../gpu/drm/amd/display/dc/inc/hw/stream_encoder.h | 4 + .../drm/amd/display/dc/inc/hw/timing_generator.h | 19 + drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 6 + drivers/gpu/drm/amd/display/dc/inc/resource.h | 3 + drivers/gpu/drm/amd/display/dc/irq/Makefile | 10 + .../amd/display/dc/irq/dcn30/irq_service_dcn30.c | 384 + .../amd/display/dc/irq/dcn30/irq_service_dcn30.h | 37 + drivers/gpu/drm/amd/display/dc/os_types.h | 10 +- drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 27 +- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 500 +- .../gpu/drm/amd/display/dmub/inc/dmub_gpint_cmd.h | 75 - drivers/gpu/drm/amd/display/dmub/inc/dmub_rb.h | 152 - drivers/gpu/drm/amd/display/dmub/src/Makefile | 3 + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 49 +- drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h | 6 +- drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c | 10 - drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.h | 6 - drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c | 184 + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.h | 50 + drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h | 2 +- drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 91 +- drivers/gpu/drm/amd/display/include/dal_asic_id.h | 4 + drivers/gpu/drm/amd/display/include/dal_types.h | 1 + .../amd/display/include/grph_object_ctrl_defs.h | 5 + drivers/gpu/drm/amd/display/modules/color/Makefile | 2 +- .../drm/amd/display/modules/color/color_gamma.c | 119 +- .../drm/amd/display/modules/color/color_gamma.h | 18 +- .../drm/amd/display/modules/color/color_table.c | 48 + .../drm/amd/display/modules/color/color_table.h | 47 + .../gpu/drm/amd/display/modules/inc/mod_stats.h | 8 +- .../drm/amd/display/modules/power/power_helpers.c | 96 +- .../include/asic_reg/athub/athub_2_1_0_offset.h | 523 + .../include/asic_reg/athub/athub_2_1_0_sh_mask.h | 2378 + .../amd/include/asic_reg/dcn/dcn_3_0_0_offset.h | 17880 +++++ .../amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h | 70929 +++++++++++++++++++ .../amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h | 573 + .../amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h | 3565 + .../drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h | 6 +- .../amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h | 36 + .../amd/include/asic_reg/gc/gc_10_3_0_default.h | 7272 ++ .../drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h | 13473 ++++ .../amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h | 47727 +++++++++++++ .../drm/amd/include/asic_reg/gc/gc_9_0_offset.h | 8 +- .../drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h | 27 + .../drm/amd/include/asic_reg/gc/gc_9_1_offset.h | 8 +- .../drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h | 26 + .../drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h | 8 +- .../drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h | 26 + .../gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h | 98 + .../drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h | 804 + .../amd/include/asic_reg/vcn/vcn_3_0_0_offset.h | 1542 + .../amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h | 5496 ++ drivers/gpu/drm/amd/include/atomfirmware.h | 283 + .../amd/include/ivsrcid/sdma2/irqsrcs_sdma2_5_0.h | 45 + .../amd/include/ivsrcid/sdma3/irqsrcs_sdma3_5_0.h | 45 + .../gpu/drm/amd/include/sienna_cichlid_ip_offset.h | 1168 + drivers/gpu/drm/amd/include/soc15_ih_clientid.h | 1 + drivers/gpu/drm/amd/powerplay/Makefile | 2 +- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 1520 +- drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 1152 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 8 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 10 +- .../gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c | 4 +- drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 4 +- .../amd/powerplay/hwmgr/vega12_processpptables.c | 2 +- .../gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c | 4 +- drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 6 +- drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 84 +- drivers/gpu/drm/amd/powerplay/inc/arcturus_ppsmc.h | 3 + .../amd/powerplay/inc/smu11_driver_if_arcturus.h | 12 +- .../powerplay/inc/smu11_driver_if_sienna_cichlid.h | 1220 + drivers/gpu/drm/amd/powerplay/inc/smu_types.h | 4 + drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 35 +- .../gpu/drm/amd/powerplay/inc/smu_v11_0_7_ppsmc.h | 139 + .../drm/amd/powerplay/inc/smu_v11_0_7_pptable.h | 196 + drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h | 2 +- drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 747 +- drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 31 +- drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 2640 + .../sienna_cichlid_ppt.h} | 26 +- drivers/gpu/drm/amd/powerplay/smu_internal.h | 274 +- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 639 +- drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 54 +- drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c | 4 +- .../gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 2 +- .../gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c | 11 +- drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 3288 - drivers/gpu/drm/amd/powerplay/vega20_ppt.h | 179 - drivers/gpu/drm/radeon/ci_dpm.c | 2 +- drivers/gpu/drm/radeon/ni_dpm.c | 9 +- drivers/gpu/drm/radeon/radeon_connectors.c | 20 +- drivers/gpu/drm/radeon/radeon_display.c | 4 +- drivers/gpu/drm/radeon/radeon_drv.c | 9 +- drivers/gpu/drm/radeon/radeon_kms.c | 4 +- include/drm/amd_asic_type.h | 1 + include/uapi/drm/amdgpu_drm.h | 10 +- 363 files changed, 222693 insertions(+), 8642 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c create mode 100644 drivers/gpu/drm/amd/amdgpu/athub_v2_1.c create mode 100644 drivers/gpu/drm/amd/amdgpu/athub_v2_1.h create mode 100644 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c rename drivers/gpu/drm/amd/{display/dmub/inc/dmub_fw_meta.h => amdgpu/gfxhub_v2_1.h} (53%) create mode 100644 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c create mode 100644 drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.h create mode 100644 drivers/gpu/drm/amd/amdgpu/mes_api_def.h rename drivers/gpu/drm/amd/{display/dmub/inc/dmub_cmd_dal.h => amdgpu/sdma_common.h} (62%) create mode 100644 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c create mode 100644 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.h create mode 100644 drivers/gpu/drm/amd/amdgpu/sienna_cichlid_reg_init.c create mode 100644 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c create mode 100644 drivers/gpu/drm/amd/amdgpu/uvd_v3_1.h create mode 100644 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c create mode 100644 drivers/gpu/drm/amd/amdgpu/vcn_v3_0.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dalsmc.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h rename drivers/gpu/drm/amd/display/{dmub/inc/dmub_types.h => dc/dce/dmub_hw_lock_mgr.c} (55%) create mode 100644 drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/Makefile create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_link_encoder.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mmhubbub.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_opp.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.h create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.h create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.h create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.h create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c create mode 100644 drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.h delete mode 100644 drivers/gpu/drm/amd/display/dmub/inc/dmub_gpint_cmd.h delete mode 100644 drivers/gpu/drm/amd/display/dmub/inc/dmub_rb.h create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.h create mode 100644 drivers/gpu/drm/amd/display/modules/color/color_table.c create mode 100644 drivers/gpu/drm/amd/display/modules/color/color_table.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_1_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_1_0_sh_mask.h create mode 100755 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h create mode 100755 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_sh_mask.h create mode 100755 drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h create mode 100755 drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_default.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/ivsrcid/sdma2/irqsrcs_sdma2_5_0.h create mode 100644 drivers/gpu/drm/amd/include/ivsrcid/sdma3/irqsrcs_sdma3_5_0.h create mode 100644 drivers/gpu/drm/amd/include/sienna_cichlid_ip_offset.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if_sienna_cichlid.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_7_ppsmc.h create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_7_pptable.h create mode 100644 drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c rename drivers/gpu/drm/amd/{display/dmub/inc/dmub_cmd_vbios.h => powerplay/sienna_cichlid_ppt.h} (74%) delete mode 100644 drivers/gpu/drm/amd/powerplay/vega20_ppt.c delete mode 100644 drivers/gpu/drm/amd/powerplay/vega20_ppt.h

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dri-devel June 2020