dri-devel October 2021

dri-devel@lists.freedesktop.org

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825 discussions

[PATCH] drm/msm/dp: fix missing #include
by Arnd Bergmann 26 Oct '21

26 Oct '21

From: Arnd Bergmann <arnd(a)arndb.de> Some randconfig builds fail when drm/drm_bridge.h is not included implicitly in this file: drivers/gpu/drm/msm/dp/dp_parser.c:279:25: error: implicit declaration of function 'devm_drm_panel_bridge_add' [-Werror,-Wimplicit-function-declaration] parser->panel_bridge = devm_drm_panel_bridge_add(dev, panel); Fixes: 4b296d15b355 ("drm/msm/dp: Allow attaching a drm_panel") Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- drivers/gpu/drm/msm/dp/dp_parser.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index 81dbcc86d08a..a7acc23f742b 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -8,6 +8,7 @@ #include <drm/drm_of.h> #include <drm/drm_print.h> +#include <drm/drm_bridge.h> #include "dp_parser.h" #include "dp_reg.h" -- 2.29.2

1 0

[PATCH v6 00/16] Add MediaTek SoC DRM (vdosys1) support for mt8195
by Nancy.Lin 26 Oct '21

26 Oct '21

The hardware path of vdosys1 with DPTx output need to go through by several modules, such as, OVL_ADAPTOR and MERGE. Add DRM and these modules support by the patches below: Changes in v6: - rebase on kernel-5.15-rc1. - change mbox label to gce0 for dts node of vdosys1. - modify mmsys reset num for mt8195. - rebase on vdosys0 series v10. (ref [5]) - use drm to bring up ovl_adaptor driver. - move drm iommu/mutex check from kms init to drm bind. - modify rdma binding doc location. (Documentation/devicetree/bindings/arm/) - modify for reviewer's comment in v5. Changes in v5: - add mmsys reset controller reference. Changes in v4: - use merge common driver for merge1~4. - refine ovl_adaptor rdma driver. - use ovl_adaptor ddp_comp function instead of ethdr. - modify for reviewer's comment in v3. Changes in v3: - modify for reviewer's comment in v2. - add vdosys1 2 pixels align limit. - add mixer odd offset support. Changes in v2: - Merge PSEUDO_OVL and ETHDR into one DRM component. - Add mmsys config API for vdosys1 hardware setting. - Add mmsys reset control using linux reset framework. Signed-off-by: Nancy.Lin <nancy.lin(a)mediatek.com> This series are based on the following patch: [1] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile https://patchwork.kernel.org/project/linux-mediatek/patch/20210601075350.31… [2] arm64: dts: mt8195: add IOMMU and smi nodes https://patchwork.kernel.org/project/linux-mediatek/patch/20210615173233.26… [3] [01/24] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU https://patchwork.kernel.org/project/linux-mediatek/patch/20210630023504.18… [4] Add gce support for mt8195 https://patchwork.kernel.org/project/linux-mediatek/list/?series=537069 [5] Add MediaTek SoC DRM (vdosys0) support for mt8195 https://patchwork.kernel.org/project/linux-mediatek/list/?series=543493 [6] [v8,1/2] dt-bindings: reset: mt8195: add toprgu reset-controller header file https://patchwork.kernel.org/project/linux-mediatek/patch/20210806023606.16… [7] [v3,2/7] dt-bindings: mediatek: Add #reset-cells to mmsys system controller https://patchwork.kernel.org/project/linux-mediatek/patch/20210825122613.v3… [8] [v3,6/7] soc: mediatek: mmsys: Add reset controller support https://patchwork.kernel.org/project/linux-mediatek/patch/20210825122613.v3… Nancy.Lin (16): dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 dt-bindings: mediatek: add vdosys1 MERGE property for mt8195 dt-bindings: mediatek: add ethdr definition for mt8195 dt-bindings: reset: mt8195: add vdosys1 reset control bit arm64: dts: mt8195: add display node for vdosys1 soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 soc: mediatek: add mtk-mmsys config API for mt8195 vdosys1 soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1 soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 soc: mediatek: add mtk-mutex support for mt8195 vdosys1 drm/mediatek: add display MDP RDMA support for MT8195 drm/mediatek: add display merge api support for MT8195 drm/mediatek: add ETHDR support for MT8195 drm/mediatek: add ovl_adaptor support for MT8195 drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support drm/mediatek: add mediatek-drm of vdosys1 support for MT8195 .../arm/mediatek/mediatek,mdp-rdma.yaml | 77 +++ .../display/mediatek/mediatek,ethdr.yaml | 145 +++++ .../display/mediatek/mediatek,merge.yaml | 4 + arch/arm64/boot/dts/mediatek/mt8195.dtsi | 222 ++++++++ drivers/gpu/drm/mediatek/Makefile | 5 +- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 29 + drivers/gpu/drm/mediatek/mtk_disp_merge.c | 90 +++- .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 498 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 36 +- drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 3 +- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 30 +- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 339 +++++++++--- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 10 +- drivers/gpu/drm/mediatek/mtk_ethdr.c | 403 ++++++++++++++ drivers/gpu/drm/mediatek/mtk_ethdr.h | 25 + drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 305 +++++++++++ drivers/gpu/drm/mediatek/mtk_mdp_rdma.h | 19 + drivers/soc/mediatek/mt8195-mmsys.h | 199 +++++++ drivers/soc/mediatek/mtk-mmsys.c | 80 ++- drivers/soc/mediatek/mtk-mmsys.h | 12 + drivers/soc/mediatek/mtk-mutex.c | 296 ++++++----- include/dt-bindings/reset/mt8195-resets.h | 12 + include/linux/soc/mediatek/mtk-mmsys.h | 22 + 24 files changed, 2621 insertions(+), 241 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c create mode 100644 drivers/gpu/drm/mediatek/mtk_ethdr.c create mode 100644 drivers/gpu/drm/mediatek/mtk_ethdr.h create mode 100644 drivers/gpu/drm/mediatek/mtk_mdp_rdma.c create mode 100644 drivers/gpu/drm/mediatek/mtk_mdp_rdma.h -- 2.18.0

3 36

[PATCH] drm: bridge: fix unmet dependency on DRM_KMS_HELPER for DRM_PANEL_BRIDGE
by Julian Braha 26 Oct '21

26 Oct '21

When DRM_CHIPONE_ICN6211 is selected, and DRM_KMS_HELPER is not selected, Kbuild gives the following warning: WARNING: unmet direct dependencies detected for DRM_PANEL_BRIDGE Depends on [n]: HAS_IOMEM [=y] && DRM_BRIDGE [=y] && DRM_KMS_HELPER [=n] Selected by [y]: - DRM_CHIPONE_ICN6211 [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_BRIDGE [=y] && OF [=y] This is because DRM_CHIPONE_ICN6211 selects DRM_PANEL_BRIDGE without depending on or selecting DRM_KMS_HELPER, despite DRM_PANEL_BRIDGE depending on DRM_KMS_HELPER. This unmet dependency bug was detected by Kismet, a static analysis tool for Kconfig. Please advise if this is not the appropriate solution. Fixes: ce517f18944e ("drm: bridge: Add Chipone ICN6211 MIPI-DSI to RGB bridge") Reviewed-by: Robert Foss <robert.foss(a)linaro.org> Signed-off-by: Julian Braha <julianbraha(a)gmail.com> --- drivers/gpu/drm/bridge/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 431b6e12a81f..a630cb8fd1c8 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -30,6 +30,7 @@ config DRM_CDNS_DSI config DRM_CHIPONE_ICN6211 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge" depends on OF + select DRM_KMS_HELPER select DRM_MIPI_DSI select DRM_PANEL_BRIDGE help -- 2.30.2

2 4

[PATCH] drm/mediatek: Set Rotation default value to 1.
by Mark Yacoub 26 Oct '21

26 Oct '21

From: Mark Yacoub <markyacoub(a)google.com> [Why] The Rotation prob is a bitmask value. It must always have a valid value. A default NO rotation is equal to 1 not 0. [How] 1. At the reset hook, call __drm_atomic_helper_plane_reset which is called at the initialization of the plane and sets the default value of all planes to DRM_MODE_ROTATE_0 which is equal to 1. 2. At the ovl layer check, do no overwrite the state->rotation value 0 if DRM_MODE_ROTATE_0 is set. We should not change the value that the userspace has set, especially if it's an unsupported value. Tested on Jacuzzi(MTK). Fixes IGT@kms_properties@plane-properties-{legacy,atomic} and IGT@kms_properties@get_properties-sanity-{atomic,non-atomic} Signed-off-by: Mark Yacoub <markyacoub(a)chromium.org> --- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 +- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 20 +++++++------------- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 5 ++--- drivers/gpu/drm/mediatek/mtk_drm_plane.c | 3 ++- 4 files changed, 12 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h index 86c3068894b11..2fc566964f68e 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h @@ -64,7 +64,7 @@ void mtk_ovl_config(struct device *dev, unsigned int w, unsigned int h, unsigned int vrefresh, unsigned int bpc, struct cmdq_pkt *cmdq_pkt); int mtk_ovl_layer_check(struct device *dev, unsigned int idx, - struct mtk_plane_state *mtk_state); + const struct mtk_plane_state *mtk_state); void mtk_ovl_layer_config(struct device *dev, unsigned int idx, struct mtk_plane_state *state, struct cmdq_pkt *cmdq_pkt); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index ea5760f856ec6..13999564304bc 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -190,19 +190,15 @@ unsigned int mtk_ovl_supported_rotations(struct device *dev) } int mtk_ovl_layer_check(struct device *dev, unsigned int idx, - struct mtk_plane_state *mtk_state) + const struct mtk_plane_state *mtk_state) { - struct drm_plane_state *state = &mtk_state->base; - unsigned int rotation = 0; + const struct drm_plane_state *state = &mtk_state->base; + unsigned int rotation = drm_rotation_simplify( + state->rotation, + DRM_MODE_ROTATE_0 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y); - rotation = drm_rotation_simplify(state->rotation, - DRM_MODE_ROTATE_0 | - DRM_MODE_REFLECT_X | - DRM_MODE_REFLECT_Y); - rotation &= ~DRM_MODE_ROTATE_0; - - /* We can only do reflection, not rotation */ - if ((rotation & DRM_MODE_ROTATE_MASK) != 0) + /* We can only do reflection, not non-zero rotation */ + if (((rotation & ~DRM_MODE_ROTATE_0) & DRM_MODE_ROTATE_MASK) != 0) return -EINVAL; /* @@ -212,8 +208,6 @@ int mtk_ovl_layer_check(struct device *dev, unsigned int idx, if (state->fb->format->is_yuv && rotation != 0) return -EINVAL; - state->rotation = rotation; - return 0; } diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h index 1b582262b682b..530bdd031933f 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -53,9 +53,8 @@ struct mtk_ddp_comp_funcs { void (*disable_vblank)(struct device *dev); unsigned int (*supported_rotations)(struct device *dev); unsigned int (*layer_nr)(struct device *dev); - int (*layer_check)(struct device *dev, - unsigned int idx, - struct mtk_plane_state *state); + int (*layer_check)(struct device *dev, unsigned int idx, + const struct mtk_plane_state *state); void (*layer_config)(struct device *dev, unsigned int idx, struct mtk_plane_state *state, struct cmdq_pkt *cmdq_pkt); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c index e6dcb34d30522..accd26481b9fb 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c @@ -44,9 +44,10 @@ static void mtk_plane_reset(struct drm_plane *plane) state = kzalloc(sizeof(*state), GFP_KERNEL); if (!state) return; - plane->state = &state->base; } + __drm_atomic_helper_plane_reset(plane, &state->base); + state->base.plane = plane; state->pending.format = DRM_FORMAT_RGB565; } -- 2.33.0.1079.g6e70778dc9-goog

2 2

[PATCH] dma-buf: fix uninitialized variable usage in selftests
by Christian König 25 Oct '21

25 Oct '21

"i" can be used uninitialized in one of the error branches. Fix this. Signed-off-by: Christian König <christian.koenig(a)amd.com> Reported-by: kernel test robot <lkp(a)intel.com> --- drivers/dma-buf/st-dma-resv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/dma-buf/st-dma-resv.c b/drivers/dma-buf/st-dma-resv.c index 6f3ba756da3e..bc2265807f6c 100644 --- a/drivers/dma-buf/st-dma-resv.c +++ b/drivers/dma-buf/st-dma-resv.c @@ -295,7 +295,7 @@ static int test_get_fences(void *arg, bool shared) if (r) { pr_err("Resv shared slot allocation failed\n"); dma_resv_unlock(&resv); - goto err_free; + goto err_fini; } dma_resv_add_shared_fence(&resv, f); @@ -336,6 +336,7 @@ static int test_get_fences(void *arg, bool shared) while (i--) dma_fence_put(fences[i]); kfree(fences); +err_fini: dma_resv_fini(&resv); dma_fence_put(f); return r; -- 2.25.1

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[PATCH RESEND v5 0/4] drm/amdgpu, Add DP 2.0 MST support + drm/dp_mst helpers
by Lyude Paul 25 Oct '21

25 Oct '21

(Sorry for the noise, had to resend because I typo'd amd's mailing list email address by accident) Just resubmitting this patch series from AMD with _very_ minor changes (just a typo and fixing a debug message) so that this can be pushed upstream with a proper patchwork link. Will be pushing this into a topic branch and submitting to airlied in a moment. Bhawanpreet Lakha (3): drm: Remove slot checks in dp mst topology during commit drm: Update MST First Link Slot Information Based on Encoding Format drm/amd/display: Add DP 2.0 MST DM Support Fangzhi Zuo (1): drm/amd/display: Add DP 2.0 MST DC Support .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 ++ .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3 + .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 5 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 14 + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 292 ++++++++++++++++++ .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++ drivers/gpu/drm/amd/display/dc/dc_link.h | 7 + drivers/gpu/drm/amd/display/dc/dc_stream.h | 13 + drivers/gpu/drm/drm_dp_mst_topology.c | 42 ++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 2 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 4 +- include/drm/drm_dp_mst_helper.h | 5 +- 13 files changed, 423 insertions(+), 16 deletions(-) -- 2.31.1

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[PATCH v5 0/4] drm/amdgpu, Add DP 2.0 MST support + drm/dp_mst helpers
by Lyude Paul 25 Oct '21

25 Oct '21

Just resubmitting this patch series from AMD with _very_ minor changes (just a typo and fixing a debug message) so that this can be pushed upstream with a proper patchwork link. Will be pushing this into a topic branch and submitting to airlied in a moment. Bhawanpreet Lakha (3): drm: Remove slot checks in dp mst topology during commit drm: Update MST First Link Slot Information Based on Encoding Format drm/amd/display: Add DP 2.0 MST DM Support Fangzhi Zuo (1): drm/amd/display: Add DP 2.0 MST DC Support .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 ++ .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3 + .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 5 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 14 + drivers/gpu/drm/amd/display/dc/core/dc_link.c | 292 ++++++++++++++++++ .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++ drivers/gpu/drm/amd/display/dc/dc_link.h | 7 + drivers/gpu/drm/amd/display/dc/dc_stream.h | 13 + drivers/gpu/drm/drm_dp_mst_topology.c | 42 ++- drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 2 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 4 +- include/drm/drm_dp_mst_helper.h | 5 +- 13 files changed, 423 insertions(+), 16 deletions(-) -- 2.31.1

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[PATCH v2 1/4] dt-bindings: msm: add DT bindings for sc7280
by Krishna Manikandan 25 Oct '21

25 Oct '21

MSM Mobile Display Subsystem (MDSS) encapsulates sub-blocks like DPU display controller, DSI, EDP etc. Add required DPU device tree bindings for SC7280. Signed-off-by: Krishna Manikandan <quic_mkrishn(a)quicinc.com> Changes in v2: - Drop target from description (Stephen Boyd) - Drop items from compatible (Stephen Boyd) - Add clock names one per line for readability (Stephen Boyd) - Use correct indendation (Stephen Boyd) --- .../bindings/display/msm/dpu-sc7280.yaml | 232 +++++++++++++++++++++ 1 file changed, 232 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml new file mode 100644 index 0000000..fbeb931 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml @@ -0,0 +1,232 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display DPU dt properties for SC7280 + +maintainers: + - Krishna Manikandan <mkrishn(a)codeaurora.org> + +description: | + Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates + sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree + bindings of MDSS and DPU are mentioned for SC7280. + +properties: + compatible: + const: qcom,sc7280-mdss + + reg: + maxItems: 1 + + reg-names: + const: mdss + + power-domains: + maxItems: 1 + + clocks: + items: + - description: Display AHB clock from gcc + - description: Display AHB clock from dispcc + - description: Display core clock + + clock-names: + items: + - const: iface + - const: ahb + - const: core + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#address-cells": true + + "#size-cells": true + + "#interrupt-cells": + const: 1 + + iommus: + items: + - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0 + + ranges: true + + interconnects: + items: + - description: Interconnect path specifying the port ids for data bus + + interconnect-names: + const: mdp0-mem + +patternProperties: + "^display-controller@[0-9a-f]+$": + type: object + description: Node containing the properties of DPU. + + properties: + compatible: + const: qcom,sc7280-dpu + + reg: + items: + - description: Address offset and size for mdp register set + - description: Address offset and size for vbif register set + + reg-names: + items: + - const: mdp + - const: vbif + + clocks: + items: + - description: Display hf axi clock + - description: Display sf axi clock + - description: Display ahb clock + - description: Display lut clock + - description: Display core clock + - description: Display vsync clock + + clock-names: + items: + - const: bus + - const: nrt_bus + - const: iface + - const: lut + - const: core + - const: vsync + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + operating-points-v2: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: | + Contains the list of output ports from DPU device. These ports + connect to interfaces that are external to the DPU hardware, + such as DSI, DP etc. Each output port contains an endpoint that + describes how it is connected to an external interface. + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: DPU_INTF1 (DSI) + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: DPU_INTF5 (EDP) + + required: + - port@0 + + required: + - compatible + - reg + - reg-names + - clocks + - interrupts + - power-domains + - operating-points-v2 + - ports + +required: + - compatible + - reg + - reg-names + - power-domains + - clocks + - interrupts + - interrupt-controller + - iommus + - ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,dispcc-sc7280.h> + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interconnect/qcom,sc7280.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + display-subsystem@ae00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "qcom,sc7280-mdss"; + reg = <0xae00000 0x1000>; + reg-names = "mdss"; + power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>; + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "iface", + "ahb", + "core"; + + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; + interconnect-names = "mdp0-mem"; + + iommus = <&apps_smmu 0x900 0x402>; + ranges; + + display-controller@ae01000 { + compatible = "qcom,sc7280-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + + reg-names = "mdp", "vbif"; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&gcc GCC_DISP_SF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "bus", + "nrt_bus", + "iface", + "lut", + "core", + "vsync"; + + interrupt-parent = <&mdss>; + interrupts = <0>; + power-domains = <&rpmhpd SC7280_CX>; + operating-points-v2 = <&mdp_opp_table>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + dpu_intf5_out: endpoint { + remote-endpoint = <&edp_in>; + }; + }; + }; + }; + }; +... -- 2.7.4

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[PATCH v2 8/8] drm: vkms: Add support the RGB565 format
by Igor Torrente 25 Oct '21

25 Oct '21

Adds this common format to vkms. This commit also adds new helper macros to deal with fixed-point arithmetic. It was done to improve the precision of the conversion to ARGB16161616 since the "conversion ratio" is not an integer. Signed-off-by: Igor Torrente <igormtorrente(a)gmail.com> --- drivers/gpu/drm/vkms/vkms_composer.c | 4 ++ drivers/gpu/drm/vkms/vkms_formats.h | 72 +++++++++++++++++++++++++++ drivers/gpu/drm/vkms/vkms_plane.c | 6 ++- drivers/gpu/drm/vkms/vkms_writeback.c | 3 +- 4 files changed, 82 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/vkms/vkms_composer.c b/drivers/gpu/drm/vkms/vkms_composer.c index f16fcfc88cea..57ec82839a89 100644 --- a/drivers/gpu/drm/vkms/vkms_composer.c +++ b/drivers/gpu/drm/vkms/vkms_composer.c @@ -166,6 +166,8 @@ static void ((*get_line_fmt_transform_function(u32 format)) return &get_ARGB16161616; else if (format == DRM_FORMAT_XRGB16161616) return &XRGB16161616_to_ARGB16161616; + else if (format == DRM_FORMAT_RGB565) + return &RGB565_to_ARGB16161616; else return &XRGB8888_to_ARGB16161616; } @@ -179,6 +181,8 @@ static void ((*get_output_line_function(u32 format)) return &convert_to_ARGB16161616; else if (format == DRM_FORMAT_XRGB16161616) return &convert_to_XRGB16161616; + else if (format == DRM_FORMAT_RGB565) + return &convert_to_RGB565; else return &convert_to_XRGB8888; } diff --git a/drivers/gpu/drm/vkms/vkms_formats.h b/drivers/gpu/drm/vkms/vkms_formats.h index aa433edd00bd..1e2db1a844aa 100644 --- a/drivers/gpu/drm/vkms/vkms_formats.h +++ b/drivers/gpu/drm/vkms/vkms_formats.h @@ -8,6 +8,26 @@ #define pixel_offset(composer, x, y) \ ((composer)->offset + ((y) * (composer)->pitch) + ((x) * (composer)->cpp)) +/* + * FP stands for _Fixed Point_ and **not** _Float Point_ + * LF stands for Long Float (i.e. double) + * The following macros help doing fixed point arithmetic. + */ +/* + * With FP scale 15 we have 17 and 15 bits of integer and fractional parts + * respectively. + * | 0000 0000 0000 0000 0.000 0000 0000 0000 | + * 31 0 + */ +#define FP_SCALE 15 + +#define LF_TO_FP(a) ((a) * (u64)(1 << FP_SCALE)) +#define INT_TO_FP(a) ((a) << FP_SCALE) +#define FP_MUL(a, b) ((s32)(((s64)(a) * (b)) >> FP_SCALE)) +#define FP_DIV(a, b) ((s32)(((s64)(a) << FP_SCALE) / (b))) +/* This macro converts a fixed point number to int, and round half up it */ +#define FP_TO_INT_ROUND_UP(a) (((a) + (1 << (FP_SCALE - 1))) >> FP_SCALE) + /* * packed_pixels_addr - Get the pointer to pixel of a given pair of coordinates * @@ -102,6 +122,35 @@ static void XRGB16161616_to_ARGB16161616(void *pixels_addr, int length, } } +static void RGB565_to_ARGB16161616(void *pixels_addr, int length, + u64 *line_buffer) +{ + __le16 *src_pixels = pixels_addr; + int i; + + for (i = 0; i < length; i++) { + u16 rgb_565 = le16_to_cpu(*src_pixels); + int fp_r = INT_TO_FP((rgb_565 >> 11) & 0x1f); + int fp_g = INT_TO_FP((rgb_565 >> 5) & 0x3f); + int fp_b = INT_TO_FP(rgb_565 & 0x1f); + + /* + * The magic constants is the "conversion ratio" and is calculated + * dividing 65535(2^16 - 1) by 31(2^5 -1) and 63(2^6 - 1) respectively. + */ + int fp_rb_ratio = LF_TO_FP(2114.032258065); + int fp_g_ratio = LF_TO_FP(1040.238095238); + + u64 r = FP_TO_INT_ROUND_UP(FP_MUL(fp_r, fp_rb_ratio)); + u64 g = FP_TO_INT_ROUND_UP(FP_MUL(fp_g, fp_g_ratio)); + u64 b = FP_TO_INT_ROUND_UP(FP_MUL(fp_b, fp_rb_ratio)); + + line_buffer[i] = 0xffffllu << 48 | r << 32 | g << 16 | b; + + src_pixels++; + } +} + /* * The following functions are used as blend operations. But unlike the * `alpha_blend`, these functions take an ARGB16161616 pixel from the @@ -177,4 +226,27 @@ static void convert_to_XRGB16161616(void *pixels_addr, int length, } } +static void convert_to_RGB565(void *pixels_addr, int length, + u64 *line_buffer) +{ + __le16 *dst_pixels = pixels_addr; + int i; + + for (i = 0; i < length; i++) { + int fp_r = INT_TO_FP((line_buffer[i] >> 32) & 0xffff); + int fp_g = INT_TO_FP((line_buffer[i] >> 16) & 0xffff); + int fp_b = INT_TO_FP(line_buffer[i] & 0xffffllu); + + int fp_rb_ratio = LF_TO_FP(2114.032258065); + int fp_g_ratio = LF_TO_FP(1040.238095238); + + u16 r = FP_TO_INT_ROUND_UP(FP_DIV(fp_r, fp_rb_ratio)); + u16 g = FP_TO_INT_ROUND_UP(FP_DIV(fp_g, fp_g_ratio)); + u16 b = FP_TO_INT_ROUND_UP(FP_DIV(fp_b, fp_rb_ratio)); + + *dst_pixels = cpu_to_le16(r << 11 | g << 5 | b); + dst_pixels++; + } +} + #endif /* _VKMS_FORMATS_H_ */ diff --git a/drivers/gpu/drm/vkms/vkms_plane.c b/drivers/gpu/drm/vkms/vkms_plane.c index 516e48b38806..de250808aa39 100644 --- a/drivers/gpu/drm/vkms/vkms_plane.c +++ b/drivers/gpu/drm/vkms/vkms_plane.c @@ -13,14 +13,16 @@ static const u32 vkms_formats[] = { DRM_FORMAT_XRGB8888, - DRM_FORMAT_XRGB16161616 + DRM_FORMAT_XRGB16161616, + DRM_FORMAT_RGB565 }; static const u32 vkms_plane_formats[] = { DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888, DRM_FORMAT_XRGB16161616, - DRM_FORMAT_ARGB16161616 + DRM_FORMAT_ARGB16161616, + DRM_FORMAT_RGB565 }; static struct drm_plane_state * diff --git a/drivers/gpu/drm/vkms/vkms_writeback.c b/drivers/gpu/drm/vkms/vkms_writeback.c index 0f7bb77f981e..11eb1be5a0fc 100644 --- a/drivers/gpu/drm/vkms/vkms_writeback.c +++ b/drivers/gpu/drm/vkms/vkms_writeback.c @@ -15,7 +15,8 @@ static const u32 vkms_wb_formats[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_XRGB16161616, - DRM_FORMAT_ARGB16161616 + DRM_FORMAT_ARGB16161616, + DRM_FORMAT_RGB565 }; static const struct drm_connector_funcs vkms_wb_connector_funcs = { -- 2.30.2

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[PATCH v2 7/8] drm: vkms: Exposes ARGB_1616161616 and adds XRGB_16161616 formats
by Igor Torrente 25 Oct '21

25 Oct '21

This will be useful to write tests that depends on these formats. ARGB format is already used as the universal format for internal uses. Here we are just exposing it to the user space. XRGB follows the a similar implementation of the former format. Just overwriting the alpha channel. Signed-off-by: Igor Torrente <igormtorrente(a)gmail.com> --- drivers/gpu/drm/vkms/vkms_composer.c | 4 ++++ drivers/gpu/drm/vkms/vkms_formats.h | 25 +++++++++++++++++++++++++ drivers/gpu/drm/vkms/vkms_plane.c | 5 ++++- drivers/gpu/drm/vkms/vkms_writeback.c | 2 ++ 4 files changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vkms/vkms_composer.c b/drivers/gpu/drm/vkms/vkms_composer.c index 69fe3a89bdc9..f16fcfc88cea 100644 --- a/drivers/gpu/drm/vkms/vkms_composer.c +++ b/drivers/gpu/drm/vkms/vkms_composer.c @@ -164,6 +164,8 @@ static void ((*get_line_fmt_transform_function(u32 format)) return &ARGB8888_to_ARGB16161616; else if (format == DRM_FORMAT_ARGB16161616) return &get_ARGB16161616; + else if (format == DRM_FORMAT_XRGB16161616) + return &XRGB16161616_to_ARGB16161616; else return &XRGB8888_to_ARGB16161616; } @@ -175,6 +177,8 @@ static void ((*get_output_line_function(u32 format)) return &convert_to_ARGB8888; else if (format == DRM_FORMAT_ARGB16161616) return &convert_to_ARGB16161616; + else if (format == DRM_FORMAT_XRGB16161616) + return &convert_to_XRGB16161616; else return &convert_to_XRGB8888; } diff --git a/drivers/gpu/drm/vkms/vkms_formats.h b/drivers/gpu/drm/vkms/vkms_formats.h index 5b850fce69f3..aa433edd00bd 100644 --- a/drivers/gpu/drm/vkms/vkms_formats.h +++ b/drivers/gpu/drm/vkms/vkms_formats.h @@ -89,6 +89,19 @@ static void get_ARGB16161616(void *pixels_addr, int length, u64 *line_buffer) } } +static void XRGB16161616_to_ARGB16161616(void *pixels_addr, int length, + u64 *line_buffer) +{ + __le64 *src_pixels = pixels_addr; + int i; + + for (i = 0; i < length; i++) { + line_buffer[i] = le64_to_cpu(*src_pixels) | (0xffffllu << 48); + + src_pixels++; + } +} + /* * The following functions are used as blend operations. But unlike the * `alpha_blend`, these functions take an ARGB16161616 pixel from the @@ -152,4 +165,16 @@ static void convert_to_ARGB16161616(void *pixels_addr, int length, } } +static void convert_to_XRGB16161616(void *pixels_addr, int length, + u64 *line_buffer) +{ + __le64 *dst_pixels = pixels_addr; + int i; + + for (i = 0; i < length; i++) { + *dst_pixels = cpu_to_le64(line_buffer[i] | (0xffffllu << 48)); + dst_pixels++; + } +} + #endif /* _VKMS_FORMATS_H_ */ diff --git a/drivers/gpu/drm/vkms/vkms_plane.c b/drivers/gpu/drm/vkms/vkms_plane.c index 0a28cb7a85e2..516e48b38806 100644 --- a/drivers/gpu/drm/vkms/vkms_plane.c +++ b/drivers/gpu/drm/vkms/vkms_plane.c @@ -13,11 +13,14 @@ static const u32 vkms_formats[] = { DRM_FORMAT_XRGB8888, + DRM_FORMAT_XRGB16161616 }; static const u32 vkms_plane_formats[] = { DRM_FORMAT_ARGB8888, - DRM_FORMAT_XRGB8888 + DRM_FORMAT_XRGB8888, + DRM_FORMAT_XRGB16161616, + DRM_FORMAT_ARGB16161616 }; static struct drm_plane_state * diff --git a/drivers/gpu/drm/vkms/vkms_writeback.c b/drivers/gpu/drm/vkms/vkms_writeback.c index 42f3396c523a..0f7bb77f981e 100644 --- a/drivers/gpu/drm/vkms/vkms_writeback.c +++ b/drivers/gpu/drm/vkms/vkms_writeback.c @@ -14,6 +14,8 @@ static const u32 vkms_wb_formats[] = { DRM_FORMAT_XRGB8888, + DRM_FORMAT_XRGB16161616, + DRM_FORMAT_ARGB16161616 }; static const struct drm_connector_funcs vkms_wb_connector_funcs = { -- 2.30.2

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dri-devel October 2021