dri-devel October 2021

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825 discussions

[PATCH 00/30] drm/i915/gem: ioctl clean-ups (v9)
by Jason Ekstrand 22 Oct '21

22 Oct '21

Overview: --------- This patch series attempts to clean up some of the IOCTL mess we've created over the last few years. The most egregious bit being context mutability. In summary, this series: 1. Drops two never-used context params: RINGSIZE and NO_ZEROMAP 2. Drops the entire CONTEXT_CLONE API 3. Implements SINGLE_TIMELINE with a syncobj instead of actually sharing intel_timeline between engines. 4. Adds a few sanity restrictions to the balancing/bonding API. 5. Implements a proto-… [View More]ctx mechanism so that the engine set and VM can only be set early on in the lifetime of a context, before anything ever executes on it. This effectively makes the VM and engine set immutable. This series has been tested with IGT as well as the Iris, ANV, and the Intel media driver doing an 8K decode (this uses bonding/balancing). I've also done quite a bit of git archeology to ensure that nothing in here will break anything that's already shipped at some point in history. It's possible I've missed something, but I've dug quite a bit. Details and motivation: ----------------------- In very broad strokes, there's an effort going on right now within Intel to try and clean up and simplify i915 anywhere we can. We obviously don't want to break any shipping userspace but, as can be seen by this series, there's a lot i915 theoretically supports which userspace doesn't actually need. Some of this, like the two context params used here, were simply oversights where we went through the usual API review process and merged the i915 bits but the userspace bits never landed for some reason. Not all are so innocent, however. For instance, there's an entire context cloning API which allows one to create a context with certain parameters "cloned" from some other context. This entire API has never been used by any userspace except IGT and there were never patches to any other userspace to use it. It never should have landed. Also, when we added support for setting explicit engine sets and sharing VMs across contexts, people decided to do so via SET_CONTEXT_PARAM. While this allowed them to re-use existing API, it did so at the cost of making those states mutable which leads to a plethora of potential race conditions. There were even IGT tests merged to cover some of theses: - gem_vm_create@async-destroy and gem_vm_create@destroy-race which test swapping out the VM on a running context. - gem_ctx_persistence@replace* which test whether a client can escape a non-persistent context by submitting a hanging batch and then swapping out the engine set before the hang is detected. - api_intel_bb@bb-with-vm which tests the that intel_bb_assign_vm works properly. This API is never used by any other IGT test. There is also an entire deferred flush and set state framework in i915_gem_cotnext.c which exists for safely swapping out the VM while there is work in-flight on a context. So, clearly people knew that this API was inherently racy and difficult to implement but they landed it anyway. Why? The best explanation I've been given is because it makes the API more "unified" or "symmetric" for this stuff to go through SET_CONTEXT_PARAM. It's not because any userspace actually wants to be able to swap out the VM or the set of engines on a running context. That would be utterly insane. This patch series cleans up this particular mess by introducing the concept of a i915_gem_proto_context data structure which contains context creation information. When you initially call GEM_CONTEXT_CREATE, a proto-context in created instead of an actual context. Then, the first time something is done on the context besides SET_CONTEXT_PARAM, an actual context is created. This allows us to keep the old drivers which use SET_CONTEXT_PARAM to set up the engine set (see also media) while ensuring that, once you have an i915_gem_context, the VM and the engine set are immutable state. Eventually, there are more clean-ups I'd like to do on top of this which should make working with contexts inside i915 simpler and safer: 1. Move the GEM handle -> vma LUT from i915_gem_context into either i915_ppgtt or drm_i915_file_private depending on whether or not the hardware has a full PPGTT. 2. Move the delayed context destruction code into intel_context or a per-engine wrapper struct rather than i915_gem_context. 3. Get rid of the separation between context close and context destroy 4. Get rid of the RCU on i915_gem_context However, these should probably be done as a separate patch series as this one is already starting to get longish, especially if you consider the 89 IGT patches that go along with it. Test-with: 20210707210215.351483-1-jason(a)jlekstrand.net Jason Ekstrand (30): drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE drm/i915: Stop storing the ring size in the ring pointer (v3) drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP drm/i915/gem: Set the watchdog timeout directly in intel_context_set_gem (v2) drm/i915/gem: Return void from context_apply_all drm/i915: Drop the CONTEXT_CLONE API (v2) drm/i915: Implement SINGLE_TIMELINE with a syncobj (v4) drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES drm/i915/gem: Disallow bonding of virtual engines (v3) drm/i915/gem: Remove engine auto-magic with FENCE_SUBMIT (v2) drm/i915/request: Remove the hook from await_execution drm/i915/gem: Disallow creating contexts with too many engines drm/i915: Stop manually RCU banging in reset_stats_ioctl (v2) drm/i915/gem: Add a separate validate_priority helper drm/i915: Add gem/i915_gem_context.h to the docs drm/i915/gem: Add an intermediate proto_context struct (v5) drm/i915/gem: Rework error handling in default_engines drm/i915/gem: Optionally set SSEU in intel_context_set_gem drm/i915: Add an i915_gem_vm_lookup helper drm/i915/gem: Make an alignment check more sensible drm/i915/gem: Use the proto-context to handle create parameters (v5) drm/i915/gem: Return an error ptr from context_lookup drm/i915/gt: Drop i915_address_space::file (v2) drm/i915/gem: Delay context creation (v3) drm/i915/gem: Don't allow changing the VM on running contexts (v4) drm/i915/gem: Don't allow changing the engine set on running contexts (v3) drm/i915/selftests: Take a VM in kernel_context() i915/gem/selftests: Assign the VM at context creation in igt_shared_ctx_exec drm/i915/gem: Roll all of context creation together drm/i915: Finalize contexts in GEM_CONTEXT_CREATE on version 13+ Documentation/gpu/i915.rst | 2 + drivers/gpu/drm/i915/Makefile | 1 - drivers/gpu/drm/i915/gem/i915_gem_context.c | 2926 ++++++++--------- drivers/gpu/drm/i915/gem/i915_gem_context.h | 3 + .../gpu/drm/i915/gem/i915_gem_context_types.h | 196 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 31 +- .../drm/i915/gem/selftests/i915_gem_context.c | 127 +- .../gpu/drm/i915/gem/selftests/mock_context.c | 67 +- .../gpu/drm/i915/gem/selftests/mock_context.h | 4 +- drivers/gpu/drm/i915/gt/intel_context.c | 3 +- drivers/gpu/drm/i915/gt/intel_context.h | 5 - drivers/gpu/drm/i915/gt/intel_context_param.c | 63 - drivers/gpu/drm/i915/gt/intel_context_param.h | 6 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 1 + drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 7 - .../drm/i915/gt/intel_execlists_submission.c | 114 - .../drm/i915/gt/intel_execlists_submission.h | 8 +- drivers/gpu/drm/i915/gt/intel_gtt.h | 11 - drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +- drivers/gpu/drm/i915/gt/intel_migrate.c | 3 +- drivers/gpu/drm/i915/gt/selftest_execlists.c | 251 +- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +- drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +- drivers/gpu/drm/i915/gt/selftest_timeline.c | 2 +- drivers/gpu/drm/i915/gvt/scheduler.c | 7 +- drivers/gpu/drm/i915/i915_drv.h | 82 +- drivers/gpu/drm/i915/i915_perf.c | 4 +- drivers/gpu/drm/i915/i915_request.c | 42 +- drivers/gpu/drm/i915/i915_request.h | 4 +- .../drm/i915/selftests/i915_mock_selftests.h | 1 - drivers/gpu/drm/i915/selftests/mock_gtt.c | 1 - include/uapi/drm/i915_drm.h | 40 +- 33 files changed, 1681 insertions(+), 2340 deletions(-) delete mode 100644 drivers/gpu/drm/i915/gt/intel_context_param.c -- 2.31.1 [View Less]

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[PATCH v9 0/4] drm: LogiCVC display controller support
by Paul Kocialkowski 22 Oct '21

22 Oct '21

This series introduces support for the LogiCVC display controller. The controller is a bit unusual since it is usually loaded as programmable logic on Xilinx FPGAs or Zynq-7000 SoCs. More details are presented on the main commit for the driver. More information about the controller is available on the dedicated web page: https://www.logicbricks.com/Products/logiCVC-ML.aspx Note that this driver has rather simple connector management, which was not converted to drm_panel_bridge to keep the … [View More]ability to enable the panel at first vblank but also to support DVI. Changes since v8: - Rebased on top of the latest drm-misc-next; - Dropped useless phandle-based syscon regmap support; - Switched to a single-port graph description; - Updated the device-tree schema to the port schema and added a description for the port. Change since v7: - Replaced DRM_INFO/DRM_ERROR/DRM_DEBUG_DRIVER with fashions using drm_device; - Fixed yaml binding alignment issue; - Renamed logicvc-display name to the generic "display" name; - Added patternProperties match for display in the parent mfd binding; - Used drm_atomic_get_new_crtc_state when needed; - Checked mode in mode_valid instead of atomic_check; - Switched to drmm_mode_config_init; - Removed useless logicvc_connector_destroy wrapper; - Removed useless drm_dev_put calls; - Removed atomic_commit_tail that enables the panel and streamlined the logic; - Reworked Makefile cosmetics; - Fixed checkpatch issues. Changes since v6: - Updated to the latest DRM internal API changes; - Used an enum to index dt properties instead of the name string. Changes since v5: - Subclass DRM device and use devm_drm_dev_alloc for allocation; - Removed call to drm_mode_config_cleanup (done automatically with devm); - Some related code cleanups; - Bring back not-for-merge patch adding colorkey support. Changes since v4: - Updated to internal DRM API changes (rebased on drm-misc-next); - Added Kconfig dependency on OF; - Added MAINTAINERS entry; - Used drm_err and dev_err instead of DRM_ERROR where possible; - Various cosmetic changes. Changes since v3: - Rebased on latest drm-misc; - Improved event lock wrapping; - Added collect tag; - Added color-key support patch (not for merge, for reference only). Changes since v2: - Fixed and slightly improved dt schema. Changes since v1: - Switched dt bindings documentation to dt schema; - Described more possible dt parameters; - Added support for the lvds-3bit interface; - Added support for grabbing syscon regmap from parent node; - Removed layers count property and count layers child nodes instead. Paul Kocialkowski (4): dt-bindings: display: Document the Xylon LogiCVC display controller dt-bindings: mfd: logicvc: Add patternProperties for the display drm: Add support for the LogiCVC display controller NOTFORMERGE: drm/logicvc: Add plane colorkey support .../display/xylon,logicvc-display.yaml | 302 +++++++ .../bindings/mfd/xylon,logicvc.yaml | 3 + MAINTAINERS | 6 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/logicvc/Kconfig | 9 + drivers/gpu/drm/logicvc/Makefile | 9 + drivers/gpu/drm/logicvc/logicvc_crtc.c | 280 +++++++ drivers/gpu/drm/logicvc/logicvc_crtc.h | 21 + drivers/gpu/drm/logicvc/logicvc_drm.c | 471 +++++++++++ drivers/gpu/drm/logicvc/logicvc_drm.h | 67 ++ drivers/gpu/drm/logicvc/logicvc_interface.c | 214 +++++ drivers/gpu/drm/logicvc/logicvc_interface.h | 28 + drivers/gpu/drm/logicvc/logicvc_layer.c | 767 ++++++++++++++++++ drivers/gpu/drm/logicvc/logicvc_layer.h | 71 ++ drivers/gpu/drm/logicvc/logicvc_mode.c | 80 ++ drivers/gpu/drm/logicvc/logicvc_mode.h | 15 + drivers/gpu/drm/logicvc/logicvc_of.c | 185 +++++ drivers/gpu/drm/logicvc/logicvc_of.h | 46 ++ drivers/gpu/drm/logicvc/logicvc_regs.h | 88 ++ 20 files changed, 2665 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml create mode 100644 drivers/gpu/drm/logicvc/Kconfig create mode 100644 drivers/gpu/drm/logicvc/Makefile create mode 100644 drivers/gpu/drm/logicvc/logicvc_crtc.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_crtc.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_drm.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_drm.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_interface.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_interface.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_layer.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_layer.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_mode.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_mode.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_of.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_of.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_regs.h -- 2.32.0 [View Less]

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Linux >= 5.14.12 and 5.15-rc5 fail to show anything on the screen with CONFIG_DRM_SIMPLEDRM=y
by Artem S. Tashkinov 22 Oct '21

22 Oct '21

Hello, Kernel 5.14.12 introduced this change, git commit ec7cc3f74b4236860ce612656aa5be7936d1c594: --- a/linux-5.14.11/drivers/video/fbdev/Kconfig +++ b/linux-5.14.12/drivers/video/fbdev/Kconfig @@ -2191,8 +2191,9 @@ config FB_HYPERV This framebuffer driver supports Microsoft Hyper-V Synthetic Video. config FB_SIMPLE - bool "Simple framebuffer support" - depends on (FB = y) && !DRM_SIMPLEDRM + tristate "Simple framebuffer support" + depends on FB + depends on !… [View More]

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[PATCH] dma-buf: fix kerneldoc for renamed members
by Christian König 22 Oct '21

22 Oct '21

Those members where renamed, update the kerneldoc as well. Signed-off-by: Christian König <christian.koenig(a)amd.com> --- include/linux/dma-buf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h index 02c2eb874da6..9807aef33685 100644 --- a/include/linux/dma-buf.h +++ b/include/linux/dma-buf.h @@ -433,8 +433,8 @@ struct dma_buf { /** @poll: for userspace poll support */ wait_queue_head_t poll; - /** @cb_excl:… [View More]

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[PATCH] drm/msm/a5xx: Eliminate condition on setup of SMMU CP_PROTECT
by Vladimir Lypak 22 Oct '21

22 Oct '21

Only GPU that has larger SMMU region size (0x8000 dwords) is A530. All other GPUs have 0x4000 SMMU region. However those GPUs work correctly with larger range protected because there is no known registers after SMMU region. This patch needs to be backported to stable releases because A540 GPU was forgotten to get its branch (that would set up protected region of 0x4000 dwords). Fixes: b5f103ab98c7 ("drm/msm: gpu: Add A5XX target support") Signed-off-by: Vladimir Lypak <vladimir.lypak(a)… [View More]

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[PATCH] cmdq: fix gce_num of mt8192 driver data
by jason-jh.lin 22 Oct '21

22 Oct '21

Because mt8192 only have 1 gce, the gce_num should be 1. Fixes: 85dfdbfc13ea ("mailbox: cmdq: add multi-gce clocks support for mt8195") Signed-off-by: jason-jh.lin <jason-jh.lin(a)mediatek.com> --- drivers/mailbox/mtk-cmdq-mailbox.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index 64175a893312..fd5576a9f8b4 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-… [View More]

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[PATCH] drm/i915/selftests: Properly reset mock object propers for each test
by Daniel Vetter 22 Oct '21

22 Oct '21

I forgot to do this properly in commit 6f11f37459d8f9f74ff1c299c0bedd50b458057a Author: Daniel Vetter <daniel.vetter(a)ffwll.ch> Date: Fri Jul 23 10:34:55 2021 +0200 drm/plane: remove drm_helper_get_plane_damage_clips intel-gfx CI didn't spot this because we run each selftest in each own invocations, which means reloading i915.ko. But if you just run all the selftests in one go at boot-up, then it falls apart and eventually we cross over the hardcoded limited of how many … [View More]

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[PATCH] drm/i915: remove CNL leftover
by Lucas De Marchi 22 Oct '21

22 Oct '21

We left the definition IS_CANNONLAKE() macro while removing it from the tree due to having to merge the changes in different branches. Now that everything is back in sync and nobody is using IS_CANNONLAKE(), we can safely ditch it. Signed-off-by: Lucas De Marchi <lucas.demarchi(a)intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 357faa043b3a..5e23c0273cf0 100644 --- a/… [View More]

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[PATCH 1/4] drm: Remove slot checks in dp mst topology during commit
by Bhawanpreet Lakha 22 Oct '21

22 Oct '21

This code path is used during commit, and we dont expect things to fail during the commit stage, so remove this. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha(a)amd.com> Reviewed-by: Lyude Paul <lyude(a)redhat.com> --- drivers/gpu/drm/drm_dp_mst_topology.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index ad0795afc21c..5ab3b3a46e89 100644 --- a/drivers/gpu/drm/… [View More]

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[next] [dragonboard 410c] Unable to handle kernel paging request at virtual address 00000000007c4240
by Naresh Kamboju 22 Oct '21

22 Oct '21

Following kernel crash noticed on linux next 20211020 tag. while booting on arm64 architecture dragonboard 410c device. I see the following config is enabled in 20211020 tag builds. CONFIG_STACKDEPOT=y Crash log, [ 18.583097] Unable to handle kernel paging request at virtual address 00000000007c4240 [ 18.583521] Mem abort info: [ 18.590286] ESR = 0x96000004 [ 18.592920] EC = 0x25: DABT (current EL), IL = 32 bits [ 18.596103] SET = 0, FnV = 0 [ 18.601512] EA = 0, S1PTW = 0 [… [View More] 18.604384] FSC = 0x04: level 0 translation fault [ 18.607447] Data abort info: [ 18.612296] ISV = 0, ISS = 0x00000004 [ 18.615451] CM = 0, WnR = 0 [ 18.618990] user pgtable: 4k pages, 48-bit VAs, pgdp=000000008b4c7000 [ 18.622054] [00000000007c4240] pgd=0000000000000000, p4d=0000000000000000 [ 18.628974] Internal error: Oops: 96000004 [#1] SMP [ 18.635073] Modules linked in: adv7511 cec snd_soc_lpass_apq8016 snd_soc_lpass_cpu snd_soc_lpass_platform snd_soc_msm8916_digital qcom_camss qrtr snd_soc_apq8016_sbc videobuf2_dma_sg qcom_pon qcom_spmi_vadc snd_soc_qcom_common qcom_q6v5_mss qcom_vadc_common rtc_pm8xxx qcom_spmi_temp_alarm msm qcom_pil_info v4l2_fwnode qcom_q6v5 snd_soc_msm8916_analog qcom_sysmon qcom_common v4l2_async qnoc_msm8916 qcom_rng gpu_sched qcom_glink_smem venus_core videobuf2_memops icc_smd_rpm qmi_helpers drm_kms_helper v4l2_mem2mem mdt_loader display_connector i2c_qcom_cci videobuf2_v4l2 crct10dif_ce videobuf2_common socinfo drm rmtfs_mem fuse [ 18.672948] CPU: 0 PID: 178 Comm: kworker/u8:3 Not tainted 5.15.0-rc6-next-20211020 #1 [ 18.695000] Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT) [ 18.695012] Workqueue: events_unbound deferred_probe_work_func [ 18.695033] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 18.715282] pc : __stack_depot_save+0x13c/0x4e0 [ 18.722130] lr : stack_depot_save+0x14/0x20 [ 18.726641] sp : ffff800014a23500 [ 18.730801] x29: ffff800014a23500 x28: 00000000000f8848 x27: ffff800013acdf68 [ 18.734294] x26: 0000000000000000 x25: 00000000007c4240 x24: ffff800014a23780 [ 18.741413] x23: 0000000000000008 x22: ffff800014a235b8 x21: 0000000000000008 [ 18.748530] x20: 00000000c32f8848 x19: ffff00001038cc18 x18: ffffffffffffffff [ 18.755649] x17: ffff80002d9f8000 x16: ffff800010004000 x15: 000000000000c426 [ 18.762767] x14: 0000000000000000 x13: ffff800014a23780 x12: 0000000000000000 [ 18.769885] x11: ffff00001038cc80 x10: ffff8000136e9ba0 x9 : ffff800014a235f4 [ 18.777003] x8 : 0000000000000001 x7 : 00000000b664620b x6 : 0000000011a58b4a [ 18.784121] x5 : 000000001aa43464 x4 : 000000009e7d8b67 x3 : 0000000000000001 [ 18.791239] x2 : 0000000000002800 x1 : ffff800013acd000 x0 : 00000000f2d429d8 [ 18.798358] Call trace: [ 18.805451] __stack_depot_save+0x13c/0x4e0 [ 18.807716] stack_depot_save+0x14/0x20 [ 18.811881] __drm_stack_depot_save+0x44/0x70 [drm] [ 18.815710] modeset_lock.part.0+0xe0/0x1a4 [drm] [ 18.820571] drm_modeset_lock_all_ctx+0x2d4/0x334 [drm] [ 18.825435] drm_client_firmware_config.constprop.0.isra.0+0xc0/0x5d0 [drm] [ 18.830478] drm_client_modeset_probe+0x328/0xbb0 [drm] [ 18.837413] __drm_fb_helper_initial_config_and_unlock+0x54/0x5b4 [drm_kms_helper] [ 18.842633] drm_fb_helper_initial_config+0x5c/0x70 [drm_kms_helper] [ 18.850266] msm_fbdev_init+0x98/0x100 [msm] [ 18.856767] msm_drm_bind+0x650/0x720 [msm] [ 18.861021] try_to_bring_up_master+0x230/0x320 [ 18.864926] __component_add+0xc8/0x1c4 [ 18.869435] component_add+0x20/0x30 [ 18.873253] mdp5_dev_probe+0xe0/0x11c [msm] [ 18.877077] platform_probe+0x74/0xf0 [ 18.881328] really_probe+0xc4/0x470 [ 18.884883] __driver_probe_device+0x11c/0x190 [ 18.888534] driver_probe_device+0x48/0x110 [ 18.892786] __device_attach_driver+0xa4/0x140 [ 18.896869] bus_for_each_drv+0x84/0xe0 [ 18.901380] __device_attach+0xe4/0x1c0 [ 18.905112] device_initial_probe+0x20/0x30 [ 18.908932] bus_probe_device+0xac/0xb4 [ 18.913098] deferred_probe_work_func+0xc8/0x120 [ 18.916920] process_one_work+0x280/0x6a0 [ 18.921780] worker_thread+0x80/0x454 [ 18.925683] kthread+0x178/0x184 [ 18.929326] ret_from_fork+0x10/0x20 [ 18.932634] Code: d37d4e99 92404e9c f940077a 8b190359 (c8dfff33) [ 18.936203] ---[ end trace 3e289b724840642d ]--- Full log, https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20211020/te… https://lkft.validation.linaro.org/scheduler/job/3786583#L2549 Build config: https://builds.tuxbuild.com/1zlLlQrUyHVr1MQ1gcler3dKaE6/config Reported-by: Linux Kernel Functional Testing <lkft(a)linaro.org> steps to reproduce: 1) https://builds.tuxbuild.com/1zlLlQrUyHVr1MQ1gcler3dKaE6/tuxmake_reproducer.… 2) Boot db410c device -- Linaro LKFT https://lkft.linaro.org [View Less]

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dri-devel October 2021